Signal modulation based on duty cycle control for radio frequency (RF) power amplifiers

Abstract

The invention provides a method, a device and a system for wireless communication. The present implementations more particularly relate to reducing power consumption of a radio frequency (RF) power amplifier without sacrificing power efficiency. In some aspects, the RF transmitter may include a signal generator, a power amplifier, and a duty cycle controller. The signal generator is configured to generate one or more RF signals based on a modulation scheme, and the power amplifier is configured to amplify the one or more RF signals for transmission over a wireless communication channel. In some implementations, a duty cycle controller may adjust the duty cycle of each RF signal based on data to be transmitted according to a modulation scheme. By changing the duty cycle of the RF signal, the duty cycle controller can switch the output power of the power amplifier and thus modulate the amplitude of the output waveform to carry data.

Description

Field of Technology

[0001] This implementation generally relates to wireless communication and, more particularly, to signal modulation based on duty cycle control for a radio frequency (RF) power amplifier. Background Art

[0002] Wireless communication devices rely on radio frequency (RF) transmitters and receivers (also referred to as "wireless radios") to communicate with other devices over a wireless communication channel. Many RF transmitters are configured to modulate data or other information onto a carrier wave (e.g., by mixing a modulated waveform with a local oscillator (LO) signal oscillating at radio frequency) and up-convert the modulated waveform to radio frequency (such as 2.4 GHz). The resulting RF signal is further amplified by a power amplifier for transmission over a wireless channel via one or more antennas. Different classes of power amplifiers are designed to provide different levels of power efficiency. For example, linear class power amplifiers (such as class A amplifiers, class B amplifiers, and class AB amplifiers) sacrifice power efficiency to provide a more linear response or power curve. In contrast, non-linear class power amplifiers (such as class C amplifiers, class D amplifiers, class E amplifiers, and class F amplifiers) provide greater power efficiency but suffer from non-linear response.

[0003] Many wireless communication devices are battery-operated devices with a limited power budget. Accordingly, many wireless communication devices implement wireless radios with non-linear class power amplifiers to achieve better power efficiency. However, non-linear class power amplifiers achieve their maximum power efficiency when operating at their maximum supported output power, while power efficiency tends to decrease when operating at lower output powers. In other words, non-linear class power amplifiers have a relatively narrow dynamic range in terms of linearity and efficiency. Thus, there is a need to reduce the power consumption of RF power amplifiers (and transmitters) without sacrificing power efficiency. Summary of the Invention

[0004] This Summary of the Invention is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary of the Invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

[0005] An innovative aspect of the subject matter of the present disclosure can be implemented in a method of wireless communication performed by a radio frequency (RF) transmitter. The method includes: obtaining data for transmission according to a modulation scheme; obtaining one or more RF signals associated with the modulation scheme; adjusting the duty cycle of each RF signal in the one or more RF signals based on the data and the modulation scheme; and providing the one or more RF signals to a power amplifier set configured to: amplify each RF signal in the one or more RF signals by a corresponding gain at least partially based on the adjusted duty cycle of the RF signal; and generate a modulated waveform carrying the data based on the one or more amplified RF signals.

[0006] Another innovative aspect of the subject matter of the present disclosure can be implemented in a controller for an RF transmitter, the controller including a processing system and a memory. The memory stores instructions that, when executed by the processing system, cause the controller to: obtain data for transmission according to a modulation scheme; obtain one or more RF signals associated with the modulation scheme; adjust the duty cycle of each RF signal in the one or more RF signals based on the data and the modulation scheme; and provide the one or more RF signals to a power amplifier set configured to: amplify each RF signal in the one or more RF signals by a corresponding gain at least partially based on the adjusted duty cycle of the RF signal; and generate a modulated waveform carrying the data based on the one or more amplified RF signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] This implementation is illustrated by way of example and is not intended to be limited by the figures of the drawings.

[0008] Figure 1 A block diagram illustrating an example radio frequency (RF) transmitter according to some implementations.

[0009] Figure 2 A block diagram illustrating an example duty cycle controller according to some implementations.

[0010] Figure 3 A timing diagram depicting an example operation of a duty cycle controller according to some implementations.

[0011] Figure 4 A block diagram illustrating an example RF transmitter supporting quadrature modulation according to some implementations.

[0012] Figure 5 Another block diagram illustrating an example RF transmitter supporting quadrature modulation according to some implementations.

[0013] Figure 6 Another block diagram illustrating an example RF transmitter supporting quadrature modulation according to some implementations.

[0014] Figure 7 A block diagram showing an example phase and duty cycle controller according to some implementations.

[0015] Figure 8 Another block diagram showing an example RF transmitter supporting quadrature modulation according to some implementations.

[0016] Figure 9 A block diagram showing an example controller for an RF transmitter according to some implementations.

[0017] Figure 10 An illustrative flowchart showing an example operation for wireless communication according to some implementations. Detailed Description

[0018] In the following description, numerous specific details are set forth, such as examples of specific components, circuits, and processes, to provide a thorough understanding of the present disclosure. As used herein, the term "coupled" means directly connected to or connected through one or more intermediate components or circuits. The terms "electronic system" and "electronic device" may be used interchangeably to refer to any system capable of electronically processing information. Similarly, in the following description and for purposes of explanation, specific terms are set forth to provide a thorough understanding of aspects of the present disclosure. However, it will be apparent to those skilled in the art that these specific details may not be required to practice the example embodiments. In other instances, well-known circuits and devices are shown in block diagram form to avoid obscuring the present disclosure. Some subsequent portions of the detailed description are presented in terms of procedures, logic blocks, processing, and other symbolic representations of operations on data bits within a computer memory.

[0019] These descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. In the present disclosure, procedures, logic blocks, processes, etc. are considered a self-consistent sequence of steps or instructions leading to a desired result. The steps are those requiring physical manipulation of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated in a computer system. However, it should be borne in mind that all of these terms and like terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities.

[0020] Unless otherwise specifically stated, as will be apparent from the following discussion, it is realized that throughout this application, discussions using terms such as "access", "receive", "send", "use", "select", "determine", "normalize", "multiply", "average", "monitor", "compare", "apply", "update", "measure", "derive", etc. relate to actions and processes of a computer system or similar electronic computing device: manipulating and transforming data represented as physical (electronic) quantities within the registers and memories of the computer system into other data similarly represented as physical quantities within the memories or registers of the computer system or other such information storage, transmission, or display devices.

[0021] In the figures, a single block may be described as performing one or more functions; however, in actual practice, one or more functions performed by that block may be performed in a single component or across multiple components, and / or may be performed using hardware, using software, or using a combination of hardware and software. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been generally described hereinafter in terms of their functionality. Whether such functionality is implemented as hardware or as software depends on the particular application and the design constraints imposed on the overall system. A person skilled in the art may implement the described functionality in different ways for each particular application, but such implementation decisions should not be construed as causing a departure from the scope of the present disclosure. Similarly, example input devices may include components other than those shown, including well-known components such as processors, memories, etc.

[0022] Unless the techniques described herein are specifically described as being implemented in a specific manner, the techniques may be implemented in hardware, software, firmware, or any combination thereof. Any feature described as a module or component may also be implemented together in an integrated logic device or separately as discrete but interoperable logic devices. If implemented in software, the techniques may be at least partially implemented by a non-transitory processor-readable storage medium that includes instructions that, when executed, perform one or more of the methods described above. The non-transitory processor-readable data storage medium may form part of a computer program product, which may include packaging materials.

[0023] A non-transitory processor-readable storage medium can include random access memory (RAM) such as synchronous dynamic random access memory (SDRAM), read-only memory (ROM), non-volatile random access memory (NVRAM), electrically erasable programmable read-only memory (EEPROM), flash memory, other known storage media, and the like. Additionally or alternatively, the techniques may be implemented, at least in part, by a processor-readable communication medium that carries or transmits code in the form of instructions or data structures and that can be accessed, read, and / or executed by a computer or other processor.

[0024] The various illustrative logical blocks, modules, circuits, and instructions described in connection with the embodiments disclosed herein may be executed by one or more processors (or processing systems). As used herein, the term "processor" may refer to any general-purpose processor, special-purpose processor, conventional processor, controller, microcontroller, and / or state machine capable of executing a script or instructions of one or more software programs stored in a memory.

[0025] As described above, many radio frequency (RF) transmitters are configured (e.g., by mixing a modulated waveform with a local oscillator (LO) signal oscillating at radio frequency) to modulate data or other information onto a carrier and up-convert the modulated waveform to radio frequency (such as 2.4 GHz). The resulting RF signal is further amplified by a power amplifier for transmission via one or more antennas over a wireless communication channel. Many wireless communication devices are battery-operated devices with a limited power budget. Accordingly, many wireless communication devices implement a radio with a non-linear class power amplifier to achieve better power efficiency. However, a non-linear class power amplifier achieves its maximum power efficiency when operating at its maximum supported output power, while the power efficiency tends to decrease when operating at lower output powers. In other words, a non-linear class power amplifier has a relatively narrow dynamic range in terms of linearity and efficiency.

[0026] Many non-linear class power amplifiers are designed to have transistors that operate as switches for supplying current to an output load. For example, the drain (or source) of a transistor can be coupled to a high voltage potential (such as a voltage source), the source (or drain) of the transistor can be coupled to a low voltage potential (such as ground), and the gate of the transistor can be driven by an input RF signal. As a result, the transistor typically operates in the saturation region, thereby delivering an appropriate amount of current between its source terminal and drain terminal depending on the voltage or amplitude of the input RF signal. The output power and power consumption of the power amplifier depend on the amount and duration of the current supplied by the transistor to the output load (such as when the voltage of the input RF signal is higher than a voltage threshold). Aspects of the present disclosure recognize that without sacrificing efficiency, the power consumption of such a power amplifier can be reduced by reducing or shortening the duty cycle of the input RF signal. Additionally, since changing the duty cycle of the input RF signal also changes the output power of the power amplifier, aspects of the present disclosure further recognize that the amplitude of the output RF signal can be modulated by switching or adjusting the duty cycle of the input RF signal.

[0027] Various aspects generally relate to RF transmitters, and more particularly to techniques for reducing the power consumption of an RF transmitter without sacrificing efficiency. In some aspects, an RF transmitter can include a signal generator, a power amplifier, and a duty cycle controller coupled between the signal generator and the power amplifier. The signal generator is configured to generate one or more RF signals based on a modulation scheme, and the power amplifier is configured to amplify the one or more RF signals for transmission over a wireless communication channel. In some implementations, the duty cycle controller can adjust the duty cycle of each RF signal based on data to be transmitted according to the modulation scheme. More specifically, by changing the duty cycle of the RF signal, the duty cycle controller can switch the output power (or gain) of the power amplifier and thus modulate the amplitude of the output waveform to carry data according to the modulation scheme.

[0028] In some aspects, the modulation scheme can be an orthogonal modulation scheme, such as quadrature phase shift keying (QPSK) or quadrature amplitude modulation (QAM), where information is encoded in the phase (and amplitude) of the modulated waveform. In such aspects, the signal generator can be configured to generate a first RF signal representing the in-phase (I) component of the modulated waveform and a second RF signal representing the quadrature (Q) component of the modulated waveform, where the modulated waveform is the sum of the first RF signal and the second RF signal. In some implementations, the signal generator can control the phases of the first RF signal and the second RF signal based on the data to be transmitted according to the modulation scheme to achieve the desired phase of the modulated waveform. In some other implementations, the duty cycle controller can adjust the phases of the first RF signal and the second RF signal based on the data to be transmitted according to the modulation scheme to achieve the desired phase of the modulated waveform.

[0029] Certain implementations of the subject matter described in this disclosure can be implemented to achieve one or more of the following potential advantages. By controlling the duty cycle of the RF signal to modulate the waveform at the output of the power amplifier, aspects of this disclosure can significantly improve the efficiency of the RF transmitter. For example, reducing the duty cycle of the RF signal reduces the duration during which the power amplifier is conducting current and also reduces the output power of the power amplifier, while maintaining a constant or consistent power efficiency over a relatively large dynamic range. This allows the power amplifier to operate with a relatively high power efficiency while reducing its total power consumption over time. Many existing RF transmitters require a phase-locked loop (PLL), an RF mixer, or an RF digital-to-analog converter (DAC) to support orthogonal modulation. However, by controlling the phase and amplitude of the modulated waveform via a duty cycle controller, aspects of this disclosure can achieve orthogonal modulation without applying modulation via a PLL, an RF mixer, or an RF DAC.

[0030] Figure 1 A block diagram of an example RF transmitter 100 is shown in accordance with some implementations. The RF transmitter 100 is configured to transmit (TX) data 102 or other digital information over a wireless communication channel on behalf of a wireless communication device. In some aspects, the RF transmitter 100 can comply with one or more wireless communication standards. Example suitable wireless communication standards include, among other examples, various Institute of Electrical and Electronics Engineers (IEEE) 802.11 standards, IEEE 802.15 standards, standards defined by the Bluetooth Special Interest Group (SIG), long term evolution (LTE), 3G, 4G, 5G, 6G, or 7G standards released by the Third Generation Partnership Project (3GPP), digital enhanced cordless telecommunications (DECT) standards, and Zigbee standards.

[0031] The RF transmitter 100 includes a signal generation component 110, a duty cycle control component 120, and a power amplifier (PA) component 130. The signal generation component 110 is configured to generate one or more RF signals 104 based on a modulation scheme for encoding TX data 102 onto a modulated waveform for transmission over a wireless communication channel. As used herein, the term "RF signal" may refer to any analog waveform oscillating at a radio frequency (such as in the range of 3 kHz - 300 GHz). For example, in the case where the modulation scheme includes quadrature modulation (such as QPSK or QAM), the signal generation component 110 may generate a pair of RF signals 104 representing the in-phase (I) and quadrature (Q) components of the modulated waveform. For simplicity, only a single RF signal 104 is depicted in the example of Figure 1 for purposes of illustration.

[0032] The power amplifier 130 is configured to amplify the RF signal for transmission via one or more antennas 140. In some implementations, the power amplifier 130 may be a non-linear class RF power amplifier with relatively high power efficiency. Example suitable non-linear class power amplifiers include class C amplifiers, class D amplifiers, class E amplifiers, and class F amplifiers, among other examples. Aspects of the present disclosure recognize that the duty cycle of the RF signal amplified by the power amplifier 130 controls the duration during which current flows through the power amplifier 130 within a given oscillation period (which is related to the output power of the power amplifier 130). However, many signal generators (such as local oscillators and PLLs) are designed to generate RF signals with a fixed duty cycle (such as a 50% duty cycle).

[0033] In some aspects, the duty cycle control component 120 may control the output power of the power amplifier 130 by adjusting the duty cycle of the RF signal 104. More specifically, the duty cycle control component 120 may generate an RF signal 106 that has the same frequency and amplitude as the RF signal 104, but a different duty cycle. Since the duty cycle of the RF signal 106 controls the output power of the power amplifier 130, the duty cycle control component 120 is able to cause the power amplifier 130 to output a modulated RF signal 108 by varying the duty cycle of the RF signal 106. In some implementations, the duty cycle control component 120 may adjust the duty cycle of the RF signal 104 based on the TX data 102 such that the generated RF signal 106 causes the power amplifier 130 to modulate the amplitude of the RF signal 108 based on the associated modulation scheme (such that the modulated RF signal 108 carries the TX data 102).

[0034] Aspects of the present disclosure further recognize that reducing the duty cycle of the RF signal 104 also reduces the power consumption of the power amplifier 130 within a given oscillation period. For example, compared to the RF signal 106 with a 50% duty cycle, the RF signal 106 with a 25% duty cycle consumes significantly less power from the power amplifier 130 within a given duration. In some implementations, the duty cycle control component 120 can adjust the duty cycle of the RF signal 104 by reducing its duty cycle to below 50%. The reduced duty cycle reduces both the output power and the power consumption of the power amplifier 130 over time without sacrificing power efficiency. Thus, by reducing the duty cycle of the RF signal 104, the duty cycle control component 120 can operate the power amplifier 130 below its maximum output power.

[0035] In some aspects, the RF signal 108 can be modulated according to an orthogonal modulation scheme (such as QPSK or QAM), where information is encoded in the phase (and amplitude) of the modulated waveform. In some implementations, the signal generation component 110 can control the phase of the RF signal 104 based on the TX data 102 to achieve the desired phase of the modulated RF signal 108. In some other implementations, the phase modulation can be performed at the duty cycle control component 120 rather than the signal generation component 110. More specifically, in such implementations, the duty cycle control component 120 can adjust the phase and duty cycle of the RF signal 104 based on the TX data 102 to achieve the desired phase and amplitude of the modulated RF signal 108.

[0036] Figure 2 A block diagram of an example duty cycle controller 200 according to some implementations is shown. The duty cycle controller 200 is configured to change or adjust the duty cycle of an input signal (IN). More specifically, the duty cycle controller 200 generates an output signal (OUT) that has the same frequency and amplitude as the input signal IN but a different duty cycle. In some implementations, the duty cycle controller 200 can be Figure 1 an example of the duty cycle control component 120. Referring to Figure 1 , the input signal IN can be an example of the RF signal 104 input to the duty cycle control component 120, and the output signal OUT can be an example of the RF signal 106 output by the duty cycle control component 120 to the power amplifier 130.

[0037] The duty cycle controller 200 includes a programmable delay component 210 and a combinational logic component 220. The programmable delay component 210 is configured to delay an input signal IN for a given duration, resulting in a delayed input signal D_IN. Accordingly, the delayed input signal D_IN and the input signal IN have the same frequency and amplitude, but different phases. In some implementations, the programmable delay component 210 may delay the input signal IN based on a target output power 203 (or gain) associated with a power amplifier (such as Figure 1 the power amplifier 130) for transmitting the output signal OUT through a wireless communication channel. As described with reference to Figure 1 , the output power of the power amplifier 130 can be switched to modulate the amplitude of the RF signal 108. Thus, the target output power 203 may be associated with the TX data 102.

[0038] The combinational logic component 220 is configured to generate an output signal OUT based on the input signal IN and the delayed input signal D_IN. In some implementations, the combinational logic component 220 may use combinational logic to combine the input signal IN with the delayed input signal D_IN to generate the output signal OUT. For example, the combinational logic component 220 may include an AND logic gate that has inputs receiving the input signal IN and the inverse of the delayed input signal and provides the output signal OUT as the output of the logical AND combination of the input signal IN and . As a result, the output signal OUT has the same frequency as the original input signal IN, but a different duty cycle (due to the phase difference between the input signal IN and the delayed input signal D_IN).

[0039] Aspects of the present disclosure recognize that the phase difference between the input signal IN and the delayed input signal D_IN determines the duty cycle of the output signal OUT. Thus, the programmable delay component 210 can control the duty cycle of the output signal OUT based on the delay applied to the input signal IN. As described with reference to Figure 1 , the duty cycle of the output signal OUT affects the output power of the power amplifier when transmitting the output signal OUT. For example, reducing the duty cycle of the output signal OUT reduces the output power of the power amplifier. In some implementations, the programmable delay component 210 may tune the delay associated with the delayed input signal D_IN such that the resulting duty cycle of the output signal OUT causes the power amplifier to amplify the output signal OUT at the target output power 203.

[0040] Figure 3 FIG. 300 shows a timing diagram depicting an example operation of a duty cycle controller according to some implementations. In some implementations, the duty cycle controller may beFigure 2 More specifically, the duty cycle controller may be configured to adjust the duty cycle of the input signal IN. Figure 2 As described, the duty cycle controller delays the input signal IN to generate a delayed input signal D_IN, and uses combinational logic to combine the input signal IN with the delayed input signal D_IN to generate an output signal OUT, the output signal OUT having the same frequency and amplitude as the input signal IN, but a different duty cycle.

[0041] like Figure 3 As shown in , the input signal IN has a 50% duty cycle across a period (T0) from time t0 to t4. More specifically, the input signal IN has a relatively high amplitude or voltage (indicating a "high" logic state) between times t0 and t2, and a relatively low amplitude or voltage (indicating a "low" logic state) between times t2 and t4. The delayed input signal D_IN has a 50% duty cycle across a period T0 from time t1 to t5. More specifically, the delayed input signal D_IN has a relatively high amplitude or voltage between times t1 and t3, and a relatively low amplitude or voltage between times t3 and t5. Figure 3 In the example of , the delayed input signal D_IN is 90° out of phase with the input signal IN. In other words, the delayed input signal D_IN transitions from low to high halfway between time t0 and t2 (at time t1), and transitions from high to low halfway between time t2 and t4 (at time t3).

[0042] exist Figure 3 In the example of FIG. 1 , the output signal OUT represents the inverse of the input signal IN and the delayed input signal. Logical AND Thus, the output signal OUT has a relatively high amplitude or voltage from time t0 to t1 before transitioning to a relatively low amplitude or voltage at time t1 (coinciding with a low-to-high transition of the delayed input signal D_IN). The output signal OUT maintains a low amplitude or voltage from time t1 to t4 until transitioning back to a high amplitude or voltage at time t4 (coinciding with a low-to-high transition of the input signal IN). The output signal OUT maintains a high amplitude or voltage from time t4 to t5 until transitioning back to a low amplitude or voltage at time t5 (coinciding with another low-to-high transition of the delayed input signal D_IN). As a result, the output signal OUT has a 25% duty cycle across the period T0 from time t0 to t4. Thus, at Figure 3 In the example of FIG. 4 , the duty cycle controller reduces the duty cycle of the input signal IN by half.

[0043] Figure 4A block diagram illustrating an example RF transmitter 400 supporting orthogonal modulation according to some implementations. In some implementations, the RF transmitter 400 can be an example of the RF transmitter 100 of Figure 1 . More specifically, the RF transmitter 400 is configured to transmit (TX) data 402 or other digital information via a wireless communication channel with a modulated RF signal 408. Referring to Figure 1 , the TX data 402 can be an example of the TX data 102, and the modulated RF signal 408 can be an example of the modulated RF signal 108.

[0044] The RF transmitter 400 includes a signal generation component 410, a duty cycle control component 420, a power amplification component 430, and a modulation controller 440. The signal generation component 410, together with the duty cycle adjustment component 420, is configured to generate a pair of RF signals 406(I) and 406(Q) that oscillate at a radio frequency. More specifically, the signal generation component 410 is configured to generate a pair of RF signals 404(I) and 404(Q), where the RF signal 404(I) represents the in-phase (I) component of the modulated RF signal 408, and the RF signal 404(Q) represents the quadrature phase (Q) component of the modulated RF signal 408. The duty cycle adjustment component 420 is configured to adjust the duty cycles of the RF signals 404(I) and 404(Q) based on a control word 442 to modulate the amplitude of the RF signal 408. More specifically, the duty cycle adjustment component 420 can generate the RF signals 406(I) and 406(Q), which have the same frequency and amplitude as the RF signals 404(I) and 404(Q) respectively, but different duty cycles (such as those described with reference to Figures 1-3 ).

[0045] The power amplification component 430 is configured to generate the modulated RF signal 408 based on the RF signals 406(I) and 406(Q). More specifically, the power amplification component 430 can amplify each of the RF signals 406(I) and 406(Q) by a corresponding gain at least in part based on the duty cycle of the RF signal (such as those described with reference to Figure 1 ). In some implementations, the power amplification component 430 can include one or more non-linear RF power amplifiers (such as class C amplifiers, class D amplifiers, class E amplifiers, or class F amplifiers) configured to amplify each of the RF signals 406(I) and 406(Q). The power amplification component 430 can further sum or combine the amplified RF signals (not shown for simplicity) to generate the modulated RF signal 408. In other words, the modulated RF signal 408 represents the sum of the I-component output and the Q-component output of the power amplification component 430.

[0046] In some aspects, the modulation controller 440 may control or manage the operation of the RF transmitter 400 based on the TX data 402. More specifically, the modulation controller 440 may control at least one of the components 410, 420, or 430 of the RF transmitter 400 to adjust the phase and amplitude of the modulated RF signal 408 such that the modulated RF signal 408 carries the TX data 402 according to an orthogonal modulation scheme such as QPSK or QAM. In some implementations, the modulation controller 440 may control the amplitude of the modulated RF signal 408 via the duty cycle adjustment component 420. In such an implementation, the modulation controller 440 may convert the TX data 402 into one or more control words 442 that cause the duty cycle adjustment component 420 to generate each of the RF signals 406(I) and 406(Q) with a corresponding duty cycle that results (after being amplified and summed by the power amplification component 430) in the desired amplitude of the modulated RF signal 408.

[0047] In some implementations, the modulation controller 440 may control the phase of the modulated RF signal 408 via the signal generation component 410. In such an implementation, the modulation controller 440 may convert the TX data 402 into one or more control words 444 that cause the signal generation component 410 to generate each of the RF signals 404(I) and 404(Q) with a corresponding phase offset that results in the desired phase of the modulated RF signal 408. In some other implementations, the modulation controller 440 may control the phase of the modulated RF signal 408 via the duty cycle adjustment component 420. In such an implementation, the modulation controller 440 may convert the TX data 402 into one or more control words 442 that cause the duty cycle adjustment component 420 to generate each of the RF signals 406(I) and 406(Q) with a corresponding duty cycle and phase offset that result in the desired phase and amplitude of the modulated RF signal 408.

[0048] Still further, in some implementations, the modulation controller 440 may control the amplitude of the modulated RF signal 408 via the duty cycle adjustment component 420 and the power amplification component 430. In such an implementation, the modulation controller 402 may convert the TX data 402 into control word sets 442 and 446, where the control word sets 442 and 446 represent a fine amplitude control value and a coarse amplitude control value, respectively. The coarse amplitude control value 446 may select one of a plurality of ("digital") power amplifiers provided by the power amplification component 430, where each power amplifier has a corresponding output power range. The fine amplitude control value 442 may further select a duty cycle associated with the desired gain of the selected power amplifier. In other words, the combination of the control words 442 and 446 causes the duty cycle adjustment component 420 to generate each of the RF signals 406(I) and 406(Q) with a corresponding duty cycle, where the corresponding duty cycle results in the desired amplitude of the modulated RF signal 408 when amplified by the power amplifier selected by the control word 446.

[0049] Figure 5 Another block diagram illustrating an example RF transmitter 500 supporting quadrature modulation according to some implementations. In some implementations, the RF transmitter 500 may be Figure 4 an example of the RF transmitter 400. More specifically, the RF transmitter 500 is configured to generate a modulated RF signal 508 based on the digital phase inputs 501(I) and 501(Q) and the amplitude control words 505(I) and 505(Q).

[0050] In some implementations, the phase inputs 501(I) and 501(Q) and the amplitude control words 505(I) and 505(Q) may represent TX data to be carried on the modulated RF signal 508. Referring to Figure 4 the phase inputs 501(I) and 501(Q) may be an example of the control word 444, and the amplitude control words 505(I) and 505(Q) may be an example of the control word 442 generated by the modulation controller 440 based on the TX data 402, and the modulated RF signal 508 may be an example of the modulated RF signal 408. More specifically, the phase inputs 501(I) and 501(Q) may control the phase of the modulated RF signal 508 according to a quadrature modulation scheme (such as QPSK or QAM), and the amplitude control words 505(I) and 505(Q) may control the amplitude of the modulated RF signal 508 according to the quadrature modulation scheme.

[0051] The RF transmitter 500 includes digital-to-analog converters (DACs) 512 and 514, RF mixers 522 and 524, duty cycle controllers (DTCs) 532 and 534, power amplifiers (PAs) 542 and 544, and a local oscillator 552 that oscillates at radio frequency. The DACs 512 and 514 are configured to convert digital phase inputs 501(I) and 501(Q) into analog phase modulation (PM) signals 502(I) and 502(Q), respectively. In some implementations, the DACs 512 and 514 may be replaced or superseded by digital precision phase shifters. As a result, the PM signal 502(I) is an analog waveform having a phase associated with the digital phase input 501(I), and the PM signal 502(Q) is an analog waveform having a phase associated with the digital phase input 501(Q). In some implementations, each of the PM signals 502(I) and 502(Q) may be passed through a reconstruction filter (not shown for simplicity) to eliminate any quantization associated with the DACs 512 and 514.

[0052] The RF mixers 522 and 524 are configured to up-convert the PM signals 502(I) and 502(Q) into RF signals 504(I) and 504(Q) having radio frequency, respectively. More specifically, the RF mixer 522 generates the RF signal 504(I) by mixing the PM signal 502(I) with a local oscillator (LO) signal 503 generated by the local oscillator 552, and the RF mixer 524 generates the RF signal 504(Q) by mixing the PM signal 502(Q) with the LO signal 503', which is also generated by the local oscillator 552 but is 90° out of phase with the LO signal 503. Thus, the RF signals 504(I) and 504(Q) represent the in-phase and quadrature components of the modulated RF signal 508. Referring Figure 4 , the RF signals 504(I) and 504(Q) may be examples of the RF signals 404(I) and 404(Q) output by the signal generation component 410, respectively.

[0053] The DTCs 532 and 534 are configured to adjust the duty cycles of the RF signals 504(I) and 504(Q) based on amplitude control words 505(I) and 505(Q), respectively. More specifically, the DTC 532 may generate an RF signal 506(I) having a duty cycle associated with the amplitude control word 505(I), and the DTC 534 may generate an RF signal 506(Q) having a duty cycle associated with the amplitude control word 505(Q). As referred to Figures 1-3As described, the RF signal 506(I) has the same frequency and amplitude as the RF signal 504(I), but a different duty cycle, and the RF signal 506(Q) has the same frequency and amplitude as the RF signal 504(Q), but a different duty cycle. Refer to Figure 4 , the RF signals 506(I) and 506(Q) can be examples of the RF signals 406(I) and 406(Q) output by the duty cycle adjustment component 420, respectively.

[0054] PA542 and 544 are configured to amplify the RF signals 506(I) and 506(Q) by corresponding gains based on the duty cycle of each RF signal. In some implementations, each of the power amplifiers 542 and 544 can be a non-linear class RF power amplifier (such as a class C amplifier, a class D amplifier, a class E amplifier, or a class F amplifier, among other examples). Thus, PA542 can generate an amplified RF signal 507(I), where the voltage gain between the RF signals 506(I) and 506(I) depends on the duty cycle of the RF signal 506(I). Similarly, PA544 can generate an amplified RF signal 507(Q), where the voltage gain between the RF signals 506(Q) and 507(Q) depends on the duty cycle of the RF signal 506(Q). The amplified RF signals 507(I) and 507(Q) are summed together to generate a modulated RF signal 508.

[0055] In Figure 5 the example, the DACs 512 and 514 are configured to modulate the phase of the RF signal 508 in response to the phase inputs 501(I) and 501(Q), and the DTCs 532 and 534 are configured to modulate the amplitude of the RF signal 508 in response to the amplitude control words 505(I) and 505(Q). For example, the phase inputs 501(I) and 501(Q) can control the phases of the PM signals 502(I) and 502(Q), respectively, such that when the generated amplified RF signals 507(I) and 507(Q) are summed or combined, the modulated RF signal 508 has the desired phase. Additionally, the amplitude control words 505(I) and 505(Q) can control the duty cycles of the RF signals 506(I) and 506(Q), respectively, such that when the generated amplified RF signals 507(I) and 507(Q) are summed or combined, the modulated RF signal 508 has the desired amplitude.

[0056] Figure 6 Another block diagram showing an example RF transmitter 600 that supports quadrature modulation according to some implementations. In some implementations, the RF transmitter 600 can be Figure 4An example of the RF transmitter 400. More specifically, the RF transmitter 600 is configured to generate a modulated RF signal 608 based on the phase control words 601(I) and 601(Q) and the amplitude control words 603(I) and 603(Q).

[0057] In some implementations, the phase control words 601(I) and 601(Q) and the amplitude control words 603(I) and 603(Q) may represent TX data to be carried on the modulated RF signal 608. Refer to Figure 4 , the phase control words 601(I) and 601(Q) and the amplitude control words 603(I) and 603(Q) may be an example of the control word 442 generated by the modulation controller 440 based on the TX data 402, and the modulated RF signal 608 may be an example of the modulated RF signal 408. More specifically, the phase control words 601(I) and 601(Q) may control the phase of the modulated RF signal 608 according to an orthogonal modulation scheme (such as QPSK or QAM), and the amplitude control words 603(I) and 603(Q) may control the amplitude of the modulated RF signal 608 according to the orthogonal modulation scheme.

[0058] The RF transmitter 600 includes a local oscillator 612, phase and duty cycle controllers (P+DTC) 622 and 624, and power amplifiers (PA) 632 and 634. Contrasted with Figure 5 the RF transmitter 500, the RF transmitter 600 does not include any DAC or RF mixer. The local oscillator 612 generates an LO signal 602 that oscillates at a radio frequency. The LO signal 602 is provided as an input to the P+DTC 622, and the phase-shifted LO signal 602' is provided as an input to the P+DTC 624. The phase-shifted LO signal 602' oscillates at the same radio frequency as the LO signal 602 but is 90° out of phase with the LO signal 602. Thus, the LO signals 602 and 602' represent the in-phase and quadrature components of the modulated RF signal 608. Refer to Figure 4 , the LO signals 602 and 602' may be examples of the RF signals 404(I) and 404(Q) output by the signal generation component 410, respectively.

[0059] The P+DTC 622 and 624 are configured to adjust the duty cycle and phase of the LO signals 602 and 602', respectively. More specifically, the P+DTC 622 may generate an RF signal 604(I) having a phase associated with the phase control word 601(I) and a duty cycle associated with the amplitude control word 603(I), and the P+DTC 624 may generate an RF signal 604(Q) having a phase associated with the phase control word 601(Q) and a duty cycle associated with the amplitude control word 603(Q). As referred toFigures 1-3 As described, the RF signal 604(I) has the same frequency and amplitude as the LO signal 602, but different phases and duty cycles, and the RF signal 604(Q) has the same frequency and amplitude as the LO signal 602’, but different duty cycles. Refer to Figure 4 , the RF signals 604(I) and 604(Q) can be examples of the RF signals 406(I) and 406(Q) output by the duty cycle adjustment component 420, respectively.

[0060] PA632 and 634 are configured to amplify the RF signals 604(I) and 604(Q) by corresponding gains based on the duty cycle of each RF signal. In some implementations, each of the power amplifiers 632 and 634 can be a non-linear class RF power amplifier (such as a class C amplifier, a class D amplifier, a class E amplifier, or a class F amplifier, among other examples). Thus, PA632 can generate the amplified RF signal 606(I), where the voltage gain between the RF signal 604(I) and 606(I) depends on the duty cycle of the RF signal 604(I). Similarly, PA632 can generate the amplified RF signal 606(Q), where the voltage gain between the RF signal 604(Q) and 606(Q) depends on the duty cycle of the RF signal 604(Q). The amplified RF signals 606(I) and 606(Q) are summed together to generate the modulated RF signal 608.

[0061] In Figure 6 the example, the P+DTC 622 and 624 are configured to modulate the phase of the RF signal 608 in response to the phase control words 601(I) and 601(Q), and are further configured to modulate the amplitude of the RF signal 608 in response to the amplitude control words 603(I) and 603(Q). For example, the phase control words 601(I) and 601(Q) can control the phases of the RF signals 604(I) and 604(Q) respectively, such that when the generated amplified RF signals 606(I) and 606(Q) are summed or combined, the modulated RF signal 608 has the desired phase. Additionally, the amplitude control words 603(I) and 603(Q) can control the duty cycles of the RF signals 604(I) and 604(Q) respectively, such that when the generated amplified RF signals 606(I) and 606(Q) are summed or combined, the modulated RF signal 608 has the desired amplitude.

[0062] Figure 7 FIG. shows a block diagram of an example phase and duty cycle controller 700 according to some implementations. In some implementations, the controller 700 can be Figure 6An example of any P+DTC in P+DTC 622 or 624. More specifically, the controller 700 is configured to generate the RF signal 704 based on the LO signal 701. Refer to Figure 6 , the LO signal 701 can be an example of any LO signal in LO signal 602 or 602’, and the RF signal 704 can be an example of any RF signal in RF signal 604(I) or 604(Q).

[0063] The controller 700 includes a number (N) of duty cycle controllers (DTCs) 710(1)-710(N) coupled in parallel and zero or more delay elements 720 coupled to the output (or input) of each DTC. Each DTC in DTCs 710(1)-710(N) is configured to adjust the duty cycle of the LO signal 701 based on the amplitude control word 702 (such as described with reference to Figures 1-5 . Refer to Figure 6 , the amplitude control word 702 can be an example of the amplitude control word 603(I) or the amplitude control word 603(Q). However, only one DTC in DTCs 710(1)-710(N) can be activated at any given time based on the enable signal set EN_1-EN_N. Refer to Figure 6 , the enable signals EN_1-EN_N can be an example of the phase control word 601(I) or the phase control word 601(Q). More specifically, only one of the enable signals EN_1-EN_N can be asserted (such as to the logic high state) at any given time, while the remaining enable signals are de-asserted (such as to the logic low state). The asserted enable signal EN_1-EN_N activates one of the DTCs 710-710(N) respectively, so that the active DTC generates the RF signal 704.

[0064] Each DTC in DTCs 710(1)-710(N) has a different number of delay elements 720 coupled to its output to apply different amounts of phase delay to the RF signal 704. As Figure 7As shown, the number of delay elements 720 coupled to the output of each DTC increases incrementally between the first DTC 710(1) and the Nth DTC 710(N). For example, no delay element is coupled to the output of the first DTC 710(1), exactly one delay element 720 is coupled to the output of the second DTC 710(2), and a total of N - 1 delay elements 720 are coupled to the output of the Nth DTC 710(N). As a result, the enable signals EN_1 - EN_N determine the amount of phase delay to be applied to the RF signal 704. For example, when the enable signal EN_0 is asserted, the controller 700 may not apply any phase delay to the RF signal 704. In contrast, when the enable signal EN_N is asserted, the controller 700 may apply the maximum amount of phase delay to the RF signal 704.

[0065] In Figure 7 the example of, the delay elements 720 are shown as being coupled to the outputs of the DTCs 710(2) - 710(N). However, in some implementations, the relative positioning of the DTCs 710(1) - 710(N) and the delay elements 720 may be reversed. For example, DTC710(2) may include a single delay element 720 coupled to its input (instead of its output), and DTC 710(N) may include N - 1 delay elements 720 coupled to its input (instead of its output). In some other implementations, the delay elements 720 may be distributed between the inputs and outputs of one or more of the DTCs 710(1) - 710(N). For example, DTC 710(N) may include a number (M) of delay elements 720 coupled to its input and N - M - 1 delay elements 720 coupled to its output.

[0066] Figure 8 Another block diagram illustrating an example RF transmitter 800 supporting quadrature modulation according to some implementations. In some implementations, the RF transmitter 800 may be Figure 4 an example of the RF transmitter 400 of. More specifically, the RF transmitter 800 is configured to generate a modulated RF signal 808 based on phase control words 801(I) and 801(Q), fine amplitude control words 803(I) and 803(Q), and coarse amplitude control words 805(I) and 805(Q).

[0067] In some implementations, the phase control words 801(I) and 801(Q), the fine amplitude control words 803(I) and 803(Q), and the coarse amplitude control words 805(I) and 805(Q) may represent TX data to be carried on the modulated RF signal 808. Refer to Figure 4, the phase control words 801(I) and 801(Q), and the fine amplitude control words 803(I) and 803(Q) can be an example of the control word 442, and the coarse amplitude control words 805(I) and 805(Q) can be an example of the control word 446 generated by the modulation controller 440 based on the TX data 402, and the modulated RF signal 808 can be an example of the modulated RF signal 408. More specifically, the phase control words 801(I) and 801(Q) can control the phase of the modulated RF signal 808 according to an orthogonal modulation scheme (such as QPSK or QAM), and the fine amplitude control words 803(I) and 803(Q) and the coarse amplitude control words 805(I) and 805(Q) can control the amplitude of the modulated RF signal 808 according to the orthogonal modulation scheme.

[0068] The RF transmitter 800 includes a local oscillator 812, phase and duty cycle controllers (P+DTC) 822 and 824, and radio frequency (RF) digital-to-analog converters (DACs) 832 and 834. The local oscillator 812 generates an LO signal 802 that oscillates at a radio frequency. The LO signal 802 is provided as an input to the P+DTC 822, and the phase-shifted LO signal 802' is provided as an input to the P+DTC 824. The phase-shifted LO signal 802' oscillates at the same radio frequency as the LO signal 802 but is 90° out of phase with the LO signal 802. Thus, the LO signals 802 and 802' represent the in-phase and quadrature components of the modulated RF signal 808. Refer Figure 4 , the LO signals 802 and 802' can be examples of the RF signals 404(I) and 404(Q) output by the signal generation component 410, respectively.

[0069] The P+DTCs 822 and 824 are configured to adjust the duty cycle and phase of the LO signals 802 and 802', respectively. More specifically, the P+DTC 822 can generate an RF signal 804(I) having a phase associated with the phase control word 801(I) and a duty cycle associated with the fine amplitude control word 803(I), and the P+DTC 824 can generate an RF signal 804(Q) having a phase associated with the phase control word 801(Q) and a duty cycle associated with the fine amplitude control word 803(Q). In some implementations, each of the P+DTCs 822 and 824 can be Figure 7 an example of the phase and duty cycle controller 700. Refer Figure 4 , the RF signals 804(I) and 804(Q) can be examples of the RF signals 406(I) and 406(Q) output by the duty cycle adjustment component 420, respectively.

[0070] RF DACs 832 and 834 are configured to amplify RF signals 804(I) and 804(Q) by respective gains based on coarse amplitude control words 805(I) and 805(Q) and the duty cycle of each RF signal. In some implementations, each of the RF DACs 832 and 834 can be associated with multiple (“digital”) power amplifiers (PAs), where each PA has a respective output power range. Coarse amplitude control word 805(I) can select one of the PAs associated with RF DAC 832, and coarse amplitude control word 805(Q) can select one of the PAs associated with RF DAC 834. Thus, RF DAC 832 can produce amplified RF signal 806(I), where the voltage gain between RF signals 804(I) and 806(I) depends on the duty cycle of RF signal 804(I) and the output power of the PA selected by coarse amplitude control word 805(I). Similarly, RF DAC 834 can produce amplified RF signal 806(Q), where the voltage gain between RF signals 804(Q) and 806(Q) depends on the duty cycle of RF signal 804(Q) and the output power of the PA selected by coarse amplitude control word 805(Q). The amplified RF signals 806(I) and 806(Q) are summed together to produce modulated RF signal 808.

[0071] In Figure 8 the example of, P+DTCs 822 and 824 are configured to modulate the phase of RF signal 808 in response to phase control words 801(I) and 801(Q). For example, phase control words 801(I) and 801(Q) can control the phases of RF signals 804(I) and 804(Q), respectively, such that when the resulting amplified RF signals 806(I) and 806(Q) are summed or combined, modulated RF signal 808 has a desired phase. P+DTCs 822 and 824 are combined with RF DACs 832 and 834 and configured to modulate the amplitude of RF signal 808 in response to fine amplitude control words 803(I) and 803(Q) and coarse amplitude control words 805(I) and 805(Q). For example, fine amplitude control words 803(I) and 803(Q) can control the duty cycles of RF signals 804(I) and 804(Q), such that when RF signals 804(I) and 804(Q) are amplified by the PAs selected by coarse amplitude control words 805(I) and 805(Q), and when the resulting amplified RF signals 806(I) and 806(Q) are summed or combined, modulated RF signal 808 has a desired amplitude.

[0072] Figure 9FIG. 0 shows a block diagram of an example controller 900 for an RF transmitter. In some implementations, controller 900 may be an example of modulation controller 440 of Figure 4 . More specifically, controller 900 may be configured to modulate an RF signal to carry TX data over a wireless communication channel.

[0073] Controller 900 includes a communication interface 910, a processing system 920, and a memory 930. Communication interface 910 is configured to communicate with one or more components of the RF transmitter. In some implementations, communication interface 910 may include a data interface 912 and a signal interface 914. Data interface 912 is configured to obtain data for transmission (such as Figure 4 TX data 402) according to a modulation scheme. Signal interface 914 is configured to obtain one or more RF signals associated with the modulation scheme (such as Figure 4 RF signals 404(I) and 404(Q)).

[0074] Memory 930 may include a non-transitory computer-readable medium (including one or more non-volatile memory elements, such as EPROM, EEPROM, flash memory, or a hard disk drive, among other examples), which may store at least the following software (SW) modules: · Duty cycle adjustment SW module 932, which is used to adjust the duty cycle of each RF signal in one or more RF signals based on the data and the modulation scheme; and · Power amplification SW module 934, which is used to provide one or more RF signals to a power amplifier set, and the power amplifier set is configured to: amplify each RF signal in one or more RF signals by a corresponding gain at least partially based on the adjusted duty cycle of the RF signal; and generate a modulated waveform carrying data based on one or more amplified RF signals. Each software module includes instructions that, when executed by processing system 920, cause controller 900 to perform the corresponding function.

[0075] The processing system 920 may include any suitable one or more processors capable of executing scripts or instructions of one or more software programs stored in the controller 900 (such as in the memory 930). For example, the processing system 920 may execute the duty cycle adjustment SW module 932 to adjust the duty cycle of each RF signal in one or more RF signals based on data and a modulation scheme. The processing system 920 may further execute the power amplification SW module 934 to provide one or more RF signals to a set of power amplifiers configured to: amplify each RF signal in the one or more RF signals by a corresponding gain at least in part based on the adjusted duty cycle of the RF signal; and generate a modulated waveform carrying data based on the one or more amplified RF signals.

[0076] Figure 10 FIG. shows an illustrative flowchart depicting example operation 1000 for wireless communication according to some implementations. In some implementations, example operation 1000 may be performed by a controller for an RF transmitter (such as Figure 4 modulation controller 440 of Figure 9 or controller 900 of

[0077] The controller obtains data for transmission according to a modulation scheme (1010). The controller also obtains one or more data signals associated with the modulation scheme (1020). In some implementations, the one or more RF signals may include a first RF signal representing the in-phase component of the modulated waveform and a second RF signal representing the quadrature component of the modulated waveform. The controller adjusts the duty cycle of each RF signal in the one or more RF signals based on the data and the modulation scheme (1030). The controller further provides the one or more RF signals to a set of power amplifiers configured to: amplify each RF signal in the one or more RF signals by a corresponding gain at least in part based on the adjusted duty cycle of the RF signal; and generate a modulated waveform carrying data based on the one or more amplified RF signals (1040). In some implementations, the modulated waveform may be the sum of the first RF signal and the second RF signal.

[0078] In some aspects, obtaining one or more RF signals can include: determining a first digital input and a second digital input associated with the phase of a modulated waveform; generating a first analog signal having a first phase based on the first digital input; and generating a second analog signal having a second phase based on the second digital input. In some implementations, the first RF signal can include the first analog signal mixed with a first LO signal oscillating at radio frequency, and the second RF signal can include the second analog signal mixed with a second LO signal oscillating at radio frequency and phase-shifted 90° relative to the first LO signal.

[0079] In some other aspects, the first RF signal can be a first LO signal oscillating at radio frequency, and the second RF signal can be a second LO signal oscillating at radio frequency and phase-shifted 90° relative to the first LO signal. In some implementations, the controller can delay at least one of the first RF signal or the second RF signal based on the phase of the modulated waveform.

[0080] In some aspects, the duty cycle of each of the one or more RF signals can be adjusted at least in part based on the amplitude of the modulated waveform. In some implementations, the power amplifier set can include an RF DAC. In some implementations, the controller can further determine a fine amplitude adjustment factor and a coarse amplitude adjustment factor based on the amplitude of the modulated waveform, wherein the duty cycle of each of the one or more RF signals is adjusted based on the fine amplitude adjustment factor; and select an output power range associated with the RF DAC based on the coarse amplitude adjustment factor.

[0081] Those skilled in the art will appreciate that information and signals can be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description can be represented by voltages, currents, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof.

[0082] Furthermore, those skilled in the art will appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the aspects disclosed herein can be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, the various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

[0083] The methods, sequences, or algorithms described in connection with the aspects disclosed herein can be embodied directly in hardware, in software modules executed by a processor, or in a combination of both. The software modules can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. The exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium can be integrated with the processor.

[0084] In the foregoing specification, embodiments have been described with reference to specific examples thereof. However, it will be apparent that various modifications and changes can be made thereto without departing from the broader scope of the disclosure as set forth in the appended claims. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.

Claims

1. A method of wireless communication performed by a radio frequency (RF) transmitter, comprising: obtaining data for transmission according to a modulation scheme; obtaining one or more RF signals associated with the modulation scheme; adjusting the duty cycle of each RF signal in the one or more RF signals based on the data and the modulation scheme; and providing the one or more RF signals to a power amplifier set configured to: amplify each RF signal in the one or more RF signals by a corresponding gain at least in part based on the adjusted duty cycle of the RF signal; and generate a modulated waveform carrying the data based on the one or more amplified RF signals.

2. The method according to claim 1, wherein The one or more RF signals include a first RF signal representing an in-phase component of the modulated waveform and a second RF signal representing a quadrature component of the modulated waveform.

3. The method according to claim 2, wherein, The modulated waveform is the sum of the first RF signal and the second RF signal.

4. The method according to claim 2, wherein The obtaining of the one or more RF signals includes: determining a first digital input and a second digital input associated with the phase of the modulated waveform; and generating a first analog signal having a first phase based on the first digital input; and generating a second analog signal having a second phase based on the second digital input.

5. The method according to claim 4, wherein, The first RF signal includes the first analog signal mixed with a first local oscillator (LO) signal oscillating at the radio frequency, and the second RF signal includes the second analog signal mixed with a second LO signal oscillating at the radio frequency and phase-shifted 90° relative to the first LO signal.

6. The method according to claim 2, wherein, The first RF signal is a first LO signal oscillating at the radio frequency, and the second RF signal is a second LO signal oscillating at the radio frequency and phase-shifted 90° relative to the first LO signal.

7. The method according to claim 6, further comprising: delaying at least one of the first RF signal or the second RF signal based on the phase of the modulated waveform.

8. The method according to claim 1, wherein The duty cycle of each RF signal in the one or more RF signals is adjusted at least in part based on the amplitude of the modulated waveform.

9. The method according to claim 8, wherein, The power amplifier set includes an RF DAC.

10. The method according to claim 9, further comprising: determining a fine amplitude adjustment factor and a coarse amplitude adjustment factor based on the amplitude of the modulated waveform, the duty cycle of each RF signal in the one or more RF signals being adjusted based on the fine amplitude adjustment factor; and selecting an output power range associated with the RF DAC based on the coarse amplitude adjustment factor.

11. A controller for a radio frequency (RF) transmitter, comprising: a processing system; and a memory storing instructions which, when executed by the processing system, cause the controller to: obtain data for transmission according to a modulation scheme; obtain one or more RF signals associated with the modulation scheme; Adjust the duty cycle of each of the one or more RF signals based on the data and the modulation scheme; and Provide the one or more RF signals to a power amplifier set configured to: amplify each of the one or more RF signals by a respective gain at least in part based on the adjusted duty cycle of the RF signal; and generate a modulated waveform carrying the data based on the one or more amplified RF signals.

12. The controller according to claim 11, wherein, The one or more RF signals include a first RF signal representing the in-phase component of the modulated waveform and a second RF signal representing the quadrature component of the modulated waveform.

13. The controller according to claim 12, wherein, The modulated waveform is the sum of the first RF signal and the second RF signal.

14. The controller according to claim 12, wherein, The obtaining of the one or more RF signals includes: Determine a first digital input and a second digital input associated with the phase of the modulated waveform; and Generate a first analog signal having a first phase based on the first digital input; and Generate a second analog signal having a second phase based on the second digital input.

15. The controller according to claim 14, wherein, The first RF signal includes the first analog signal mixed with a first local oscillator (LO) signal oscillating at the radio frequency, and the second RF signal includes the second analog signal mixed with a second LO signal oscillating at the radio frequency and phase-shifted 90° relative to the first LO signal.

16. The controller according to claim 12, wherein, The first RF signal is a first LO signal oscillating at the radio frequency, and the second RF signal is a second LO signal oscillating at the radio frequency and phase-shifted 90° relative to the first LO signal.

17. The controller according to claim 16, wherein, The execution of the instructions further causes the controller to: Delay at least one of the first RF signal or the second RF signal based on the phase of the modulated waveform.

18. The controller according to claim 11, wherein, The duty cycle of each of the one or more RF signals is adjusted at least in part based on the amplitude of the modulated waveform.

19. The controller according to claim 18, wherein, The power amplifier set includes an RF DAC.

20. The controller according to claim 19, wherein, The execution of the instructions further causes the controller to: Determine a fine amplitude adjustment factor and a coarse amplitude adjustment factor based on the amplitude of the modulated waveform, and the duty cycle of each of the one or more RF signals is adjusted based on the fine amplitude adjustment factor; and Select an output power range associated with the RF DAC based on the coarse amplitude adjustment factor.

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