Circuit and method for suppressing LMX2594 integer boundary stray

Abstract

The invention relates to a circuit and a method for suppressing LMX2594 integer boundary stray, the circuit comprises a variable reference circuit, a radio frequency output circuit and a single chip microcomputer control circuit, the radio frequency output circuit and the single chip microcomputer control circuit are connected with the variable reference circuit, a first LMX2594 works in a fractional frequency division mode, a second LMX2594 works in an integer frequency division mode, and the single chip microcomputer control circuit is connected with the variable reference circuit. The VCO output frequency of the second LMX2594 is an integral multiple of the output frequency of the variable reference circuit, the integral multiple is used as an integer variable, and the output frequency of the variable reference circuit and a decimal part obtained by dividing the output frequency of the variable reference circuit by the crystal oscillator frequency are determined; and by adding one to the value of the integer variable, cyclic judgment is realized until the product of the decimal part and the frequency of the crystal oscillator is greater than or equal to ten times of the loop bandwidth of the variable reference circuit, and the singlechip sets the corresponding integer variable as the integer frequency division value of the second LMX2594 according to the judgment result. According to the variable reference circuit, the value of the integer variable is converted, so that the output frequency of the variable reference circuit is changed, and the aim of suppressing the integer boundary stray of the LMX2594 output signal is fulfilled.

Description

Technical Field

[0001] The present invention relates to a method for suppressing integer boundary spurs, and more specifically to a circuit and method for suppressing integer boundary spurs of LMX2594. Background Art

[0002] With the rapid development of electronic technology, wideband frequency sources have been widely used in fields such as radar, communication, electronic measurement, and electronic countermeasure. The performance of the frequency source directly affects the sensitivity and anti-interference ability of the entire system. LMX2594 is a high-performance and high-bandwidth frequency synthesizer, with a wide output frequency range from 10 MHz to 15 GHz, and integrates features such as low phase noise and programmable output power, and is widely used in fields such as communication, radar, and high-speed data converters. However, in practical applications, especially when operating in the high-frequency band, the frequency synthesizer will encounter the problem of integer boundary spurs. Integer boundary spurs are a key indicator for measuring the performance of the frequency source. Excessive integer boundary spurs will lead to problems such as signal distortion, increased bit error rate, and decreased system resolution. Therefore, it is of great practical significance to study effective methods to reduce the integer boundary spurs of wideband frequency sources.

[0003] Existing ideas for solving integer boundary spurs all start from changing the phase detection frequency, lack a basis for how to change the phase detection frequency, and are uncertain about the specific value of the step change of the phase detection frequency, which reduces the operability of suppressing integer boundary spurs. Summary of the Invention

[0004] One of the purposes of the present invention is to provide a circuit for suppressing integer boundary spurs of LMX2594, so as to provide a circuit for effectively suppressing integer boundary spurs of LMX2594.

[0005] Another purpose of the present invention is to provide a method for suppressing integer boundary spurs of LMX2594, so as to solve the problem that the existing technology for solving integer boundary spurs of LMX2594 reduces the operability of suppressing integer boundary spurs.

[0006] One of the purposes of the present invention is achieved as follows:

[0007] A circuit for suppressing integer boundary spurs of LMX2594 includes:

[0008] A variable reference circuit, including a first LMX2594, a crystal oscillator, and a first filter circuit, which are respectively connected to a radio frequency output circuit and a single-chip microcomputer control circuit, and are used to output a reference signal;

[0009] A radio frequency output circuit, including a second LMX2594 and a second filter circuit, which are respectively connected to the variable reference circuit and the single-chip microcomputer control circuit, and are used to output a main target signal;

[0010] The single-chip microcomputer control circuit includes a single-chip microcomputer, which is respectively connected to a variable reference circuit and a radio frequency output circuit, and is used to send control signals to the variable reference circuit and the radio frequency output circuit.

[0011] Further, the structure of the first filtering circuit is that the CPOUT terminal of the first LMX2594 is divided into three paths. One path is grounded through capacitor C35, the second path is grounded through capacitor C27 and resistor R14, and the third path is connected to the VTUNE terminal of the first LMX2594 after passing through a voltage dividing circuit composed of resistor R11 and resistor R12. The VTUNE terminal of the first LMX2594 is grounded through capacitor C33. One end of capacitor C34 is connected to the voltage dividing node of the voltage dividing circuit composed of resistor R11 and resistor R12, and the other end is grounded.

[0012] Further, the structure of the second filtering circuit is that the CPOUT terminal of the second LMX2594 is divided into three paths. One path is grounded through capacitor C30, the second path is grounded through capacitor C24 and resistor R13, and the third path is connected to the VTUNE terminal of the second LMX2594 after passing through a voltage dividing circuit composed of resistor R9 and resistor R10. The VTUNE terminal of the second LMX2594 is grounded through capacitor C28. One end of capacitor C29 is connected to the voltage dividing node of the voltage dividing circuit composed of resistor R9 and resistor R10, and the other end is grounded.

[0013] The second object of the present invention is achieved as follows:

[0014] A method for suppressing the integer boundary spurs of LMX2594 includes the following steps:

[0015] S1. Set up the circuit for suppressing the integer boundary spurs of LMX2594 described in the first object of the present invention;

[0016] S2. The single-chip microcomputer initializes the first LMX2594 and the second LMX2594, so that the first LMX2594 operates in the fractional frequency division mode and the second LMX2594 operates in the integer frequency division mode;

[0017] S3. The single-chip microcomputer calculates the VCO frequency of the second LMX2594 according to the target output frequency; determines the integer variable according to the VCO frequency of the second LMX2594 and the configured frequency in the integer frequency division mode;

[0018] S4. The single-chip microcomputer determines the output frequency of the variable reference circuit according to the integer variable and the VCO frequency of the second LMX2594;

[0019] S5. The MCU calculates the fractional part obtained by dividing the output frequency of the variable reference circuit by the crystal oscillator frequency, and determines whether the product of the fractional part and the crystal oscillator frequency is greater than or equal to ten times the loop bandwidth of the variable reference circuit; if the determination result is no, then steps S6 - S7 are executed;

[0020] S6. Increment the integer variable by 1, and loop to execute steps S4 - S5 to calculate the output frequency of the variable reference circuit according to the incremented integer variable and the VCO frequency of the second LMX2594; calculate the fractional part obtained by dividing the output frequency of the variable reference circuit by the crystal oscillator frequency;

[0021] S7. Loop to execute step S6 until the determination result is yes; the MCU configures the integer variable corresponding to the determination result of yes as the integer division value of the second LMX2594; and configures the output frequency of the variable reference circuit corresponding to the determination result of yes as the output frequency of the first LMX2594, and configures the target output frequency of the second LMX2594; to obtain the main target signal output by the RF output circuit.

[0022] Further, the specific method for calculating the VCO frequency of the second LMX2594 is:

[0023] S3a - 1. If the target output frequency f req is within the direct output frequency range of the VCO of the LMX2594, then the VCO frequency of the second LMX2594 is equal to the target output frequency;

[0024] S3a - 2. If the target output frequency f req is not within the direct output frequency range of the VCO of the LMX2594, then f VCO = f req *X, where f VCO is the VCO frequency of the second LMX2594, and X is the channel division ratio.

[0025] Further, the specific method for determining the integer variable in step S3 is:

[0026] S3b - 1. Determine whether the VCO frequency of the second LMX2594 is greater than its configured frequency. If the determination result is yes, then the integer division value is N1; if the determination result is no, then the integer division value is N2, where N1 and N2 are the initial integer division values of the second LMX2594 at different VCO frequencies;

[0027] S3b - 2. Use the integer division value as the integer variable.

[0028] Further, the calculation formula for the output frequency f ref of the variable reference circuit is:

[0029] f ref = fVCO / P

[0030] where f VCO is the VCO frequency of the second LMX2594, and P is an integer variable.

[0031] The present invention optimizes the loop filter parameters through a combination of calculation and experiment. On the premise of ensuring normal locking, the loop bandwidth is minimized as much as possible so that the spurs fall outside the loop bandwidth and are attenuated. Further, the LMX2594 of the RF output circuit is set to the integer division mode, effectively avoiding the integer boundary spurs of this circuit and optimizing its phase noise. Secondly, the output frequency value of the variable reference circuit is obtained through the integer multiple relationship between the VCO frequency of the second LMX2594 and the output frequency of the variable reference circuit, and a value with low phase noise and low spurs is selected from them to effectively suppress the integer boundary spurs of the variable reference circuit, and further suppress the integer boundary spurs of the main target signal.

[0032] The present invention starts from the output frequency of the RF output circuit and inversely calculates the VCO frequency f VCO of the second LMX2594, and sets the output frequency of the variable reference circuit to be an integer multiple of the VCO frequency f VCO of the second LMX2594. This method can directly avoid the integer boundary spurs of the RF output circuit. From it, a frequency that satisfies the low spurs output of the variable reference circuit is judged and selected. This frequency can not only make the variable reference circuit output low spurs but also make the RF output circuit avoid integer boundary spurs, and finally achieve low spurs output.

[0033] The present invention changes the output frequency of the variable reference circuit by changing the integer division value of the second LMX2594. During the change process, the output frequency of the variable reference circuit is always an integer multiple of the VCO frequency f VCO of the second LMX2594. When the decimal part obtained by dividing the output frequency of the variable reference circuit by the crystal oscillator frequency, multiplied by the crystal oscillator frequency, is greater than or equal to ten times the loop bandwidth of the variable reference circuit, the integer boundary spurs in the output main target signal are suppressed. The present invention provides an effective basis and an implementable method for suppressing integer boundary spurs and has a novel idea. It does not require blindly changing the output frequency of the variable reference circuit, improving the operability of suppressing integer boundary spurs. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 is a schematic circuit diagram of the present invention.

[0035] Figure 2 is a circuit structure diagram of the variable reference circuit.

[0036] Figure 3 is a circuit structure diagram of the RF output circuit.

[0037] Figure 4 It is the circuit structure diagram of the single-chip microcomputer control circuit.

[0038] Figure 5 The method flowchart of the present invention.

[0039] Figure 6 It is the flowchart for calculating the output frequency of the variable reference circuit.

[0040] Figure 7 It is the signal output diagram when the circuit and method of the present invention are not used.

[0041] Figure 8 It is the signal output diagram when the circuit and method of the present invention are used. Detailed implementation manners

[0042] The present invention will be further described in detail below with reference to the accompanying drawings.

[0043] As Figure 1 shown, the circuit for suppressing the integer boundary spurs of LMX2594 provided by the present invention includes a variable reference circuit, a radio frequency output circuit and a single-chip microcomputer control circuit; the single-chip microcomputer control circuit is respectively connected to the variable reference circuit and the radio frequency output circuit, the variable reference circuit is connected to the radio frequency output circuit, the variable reference circuit includes a first LMX2594, a crystal oscillator and a first filter circuit; the radio frequency output circuit includes a second LMX2594 and a second filter circuit, and the single-chip microcomputer control circuit includes a single-chip microcomputer.

[0044] The single-chip microcomputer circuit is respectively connected to the variable reference circuit and the radio frequency output circuit, and is used for initializing the first LMX2594 and the second LMX2594, and controlling the parameter changes of the first LMX2594 and the second LMX2594. The variable reference circuit is connected to the radio frequency output circuit, and the output signal of the variable reference circuit is input to the reference input terminal of the radio frequency output circuit.

[0045] The crystal oscillator Y1 is connected to pin 8 of the first LMX2594. The signal RFOUTAP1 output by the first LMX2594 is input from pin 23 of the first LMX2594 to pin 8 of the second LMX2594.

[0046] As Figure 2As shown, pin 1, pin 7, pin 11, pin 15, pin 21, pin 26, and pin 37 of the first LMX2594 are connected to the power supply VCC. Each pin connected to VCC requires a corresponding filter capacitor to provide a stable voltage for the first LMX2594. Among them, pin 1 of the first LMX2594 is grounded through capacitor C8, pin 7 is grounded through capacitor C9, pin 11 is grounded through capacitor C10, pin 15 is grounded through capacitor C11, pin 21 is grounded through capacitor C12, pin 26 is grounded through capacitor C13, and pin 37 is grounded through capacitor C14. Pin 2, pin 4, pin 6, pin 13, pin 14, pin 25, pin 31, pin 34, pin 39, pin 40, and the DAP pin of the first LMX2594 are all grounded; pin 24 of the first LMX2594 is connected to pin 33 of the single-chip microcomputer, pin 16 is connected to pin 34 of the single-chip microcomputer, and pin 17 is connected to pin 36 of the single-chip microcomputer; pin 8 of the first LMX2594 is connected to the crystal oscillator, pin 23 of the first LMX2594 is connected to pin 8 of the second LMX2594, and the output signal of the first LMX2594 serves as the reference signal for the second LMX2594.

[0047] As Figure 3 and Figure 4 shown, pin 1, pin 7, pin 11, pin 15, pin 21, pin 26, and pin 37 of the second LMX2594 are connected to the power supply VCC. Each pin connected to VCC requires a corresponding filter capacitor to provide a stable voltage for the second LMX2594. Among them, pin 1 of the second LMX2594 is grounded through capacitor C1, pin 7 is grounded through capacitor C2, pin 11 is grounded through capacitor C3, pin 15 is grounded through capacitor C4, pin 21 is grounded through capacitor C5, pin 26 is grounded through capacitor C6, and pin 37 is grounded through capacitor C7. Pin 2, pin 4, pin 6, pin 13, pin 14, pin 25, pin 31, pin 34, pin 39, pin 40, and the DAP pin of the second LMX2594 are all grounded; pin 24 of the second LMX2594 is connected to pin 20 of the single-chip microcomputer, pin 16 is connected to pin 23 of the single-chip microcomputer, and pin 17 is connected to pin 22 of the single-chip microcomputer; the main target signal is output from pin 23 of the second LMX2594.

[0048] The model of the single-chip microcomputer is stm32. Pin 12, pin 18, pin 31, pin 47, and pin 63 of the single-chip microcomputer are all grounded, and pin 13, pin 19, pin 32, pin 48, and pin 64 are all connected to the power supply VC. Each pin connected to VC requires a corresponding filter capacitor to provide a stable voltage for the single-chip microcomputer. Among them, pin 13 of the single-chip microcomputer is grounded through capacitor C15, pin 19 is grounded through capacitor C16, pin 32 is grounded through capacitor C17, pin 48 is grounded through capacitor C18, and pin 64 is grounded through capacitor C19.

[0049] The single-chip microcomputer control circuit and the variable reference circuit and the radio frequency output circuit are powered separately, which can improve the anti-interference ability.

[0050] The structure of the first filtering circuit is as follows: the CPOUT terminal of the first LMX2594 is divided into three paths. One path is grounded through capacitor C35, another path is grounded through capacitor C27 and resistor R14, and the third path is connected to the VTUNE terminal of the first LMX2594 after passing through a voltage dividing circuit composed of resistor R11 and resistor R12. The VTUNE terminal of the first LMX2594 is grounded through capacitor C33. One end of capacitor C34 is connected to the voltage dividing node of the voltage dividing circuit composed of resistor R11 and resistor R12, and the other end is grounded.

[0051] The structure of the second filtering circuit is as follows: the CPOUT terminal of the second LMX2594 is divided into three paths. One path is grounded through capacitor C30, another path is grounded through capacitor C24 and resistor R13, and the third path is connected to the VTUNE terminal of the second LMX2594 after passing through a voltage dividing circuit composed of resistor R9 and resistor R10. The VTUNE terminal of the second LMX2594 is grounded through capacitor C28. One end of capacitor C29 is connected to the voltage dividing node of the voltage dividing circuit composed of resistor R9 and resistor R10, and the other end is grounded.

[0052] The invention optimizes the loop filter parameters by combining calculation and experiment. On the premise of ensuring normal locking, the loop bandwidth is minimized as much as possible so that the spurs fall outside the loop bandwidth and are attenuated.

[0053] As Figure 5 shown, the method for suppressing the integer boundary spurs of LMX2594 provided by the present invention includes the following steps:

[0054] S1. Set up a circuit for suppressing the integer boundary spurs of LMX2594.

[0055] The present invention sets up a variable reference circuit, a radio frequency output circuit and a single-chip microcomputer circuit. Only need to set the integer division value of the second LMX2594 as an integer variable, and change the output frequency of the variable reference circuit according to the value of the integer variable, so that the fractional part obtained by dividing the output frequency of the variable reference circuit by the crystal oscillator frequency multiplied by the crystal oscillator frequency is much larger than the loop bandwidth of the variable reference circuit, then the integer boundary spurs of the output signal of LMX2594 can be suppressed.

[0056] The crystal oscillator frequency is the phase discrimination frequency of the variable reference circuit, and the output frequency of the variable reference circuit is the phase discrimination frequency of the radio frequency output circuit.

[0057] S2. The single-chip microcomputer initializes the first LMX2594 and the second LMX254 so that the first LMX2594 works in the fractional division mode and the second LMX2594 works in the integer division mode.

[0058] There are multiple registers inside the LMX2594, which are used to control its various functions and parameters. The single-chip microcomputer writes specific values to the registers through the SPI interface to configure the working mode, output frequency, division ratio, output power, etc. of the LMX2594. Set the first LMX2594 to work in the fractional division mode and the second LMX2594 to work in the integer division mode; make the VCO frequency of the second LMX2594 an integer multiple of the output frequency of the variable reference circuit, suppressing the integer boundary spurs of the output signal of the RF output circuit.

[0059] S3. The single-chip microcomputer calculates the VCO frequency of the second LMX2594 according to the target output frequency; determines the integer variable according to the VCO frequency of the second LMX2594 and the configured frequency in the integer division mode.

[0060] The target output frequency is the signal frequency that the desired RF output circuit finally outputs.

[0061] First, judge whether the target output frequency is within the VCO direct output frequency range. If the target output frequency is within the VCO direct output frequency range, the target output frequency f req is the VCO direct output; when the target output frequency is not within the VCO direct output frequency range, the target output frequency f req is the VCO divided output.

[0062] When the target output frequency f req is the VCO direct output, f VCO = freq, where f VCO is the VCO frequency of the second LMX2594.

[0063] When the target output frequency f req is the VCO divided output, the target output frequency f req is achieved by setting the division ratio, f VCO = f req *X, where X is the channel division ratio, and the value of X is 2, 4, 6, 8... established values. Each X value has a divided output range, which is a parameter in the LMX2594 technical manual. For example, the VCO direct output frequency range is 7.5 GHz - 15 GHz, and the divided output range corresponding to X = 2 is 3.75 GHz - 7.5 GHz. When the target output frequency is 4 GHz, it satisfies this range, so the division ratio X is set to 2, and the VCO frequency f VCO is 8 GHz. After determining the VCO frequency, further determine which VCO to select. There are 7 VCOs (i.e., VCO1 - VCO7) inside the LMX2594, and each VCO corresponds to an output frequency band. For example, when the VCO frequency is 8 GHz, the output frequency range of VCO1 is 7.5 GHz - 8.6 GHz, so VCO1 can be selected at this time.

[0064] After determining the VCO frequency, determine the integer division value of the second LMX2594. The integer division value needs to select N1 or N2 according to the VCO frequency of the second LMX2594 and the configured frequency of the LMX2594. N1 and N2 are the initial integer division values of the LMX2594 at different VCO frequencies, which are parameters in the technical manual and also the minimum values for the transformation of the integer division value. The configured frequency of the second LMX2594 is determined according to the specific working mode of the LMX2594, and the configured frequencies in different modes are different. For example, in the integer division mode, the configured frequency is 12.5 GHz. The single-chip microcomputer judges whether the VCO frequency f VCO is greater than the configured frequency of the LMX2594. When the judgment result is yes, the integer division value is N1; when the judgment result is no, the integer division value is N2.

[0065] Take the determined integer division value as an integer variable.

[0066] S4. The single-chip microcomputer determines the output frequency of the variable reference circuit according to the integer variable and the VCO frequency of the second LMX2594.

[0067] The output frequency f ref of the variable reference circuit is calculated by the formula: f ref = f VCO / P, where P is an integer variable.

[0068] The phase discrimination frequency of the variable reference circuit is the crystal oscillator frequency, and the phase discrimination frequency of the RF output circuit is the output frequency of the variable reference circuit.

[0069] The output frequency f ref of the variable reference circuit needs to be less than 400 MHz, which is a technical parameter of the LMX2594.

[0070] S5. The single-chip microcomputer calculates the fractional part obtained by dividing the output frequency of the variable reference circuit by the crystal oscillator frequency, and judges whether the product of the fractional part and the crystal oscillator frequency is greater than or equal to ten times the loop bandwidth of the variable reference circuit; when the judgment result is no, execute steps S6 - S7.

[0071] As Figure 6 shown, the single-chip microcomputer calculates the fractional part f ref obtained by dividing the output frequency f Y1 of the variable reference circuit by the crystal oscillator frequency f x , and judges whether f x* f Y1 is greater than 10 times the loop bandwidth f bw of the variable reference circuit.

[0072] The crystal oscillator frequency f Y1Generally, the standard value is taken as 100 MHz. This frequency has fewer frequency multiplication times relative to the output frequency and lower phase noise.

[0073] When the judgment result is yes, set the integer variable corresponding to the judgment result of yes as the integer division value of the second LMX2594; and configure the output frequency of the variable reference circuit corresponding to the judgment result of yes as the output frequency of the first LMX2594, and configure the target output frequency of the second LMX2594, then the main target signal output by the RF output circuit can be obtained.

[0074] Among them, the main target signal is the signal that the expected circuit finally outputs.

[0075] The loop bandwidth of the variable reference circuit is achieved through hardware design. For example, by adjusting the sizes of capacitors and resistors, the value of the loop bandwidth of the variable reference circuit is generally less than 1 / 20 of the phase discrimination frequency of the variable reference circuit. For example, take about 300 kHz, and it can also be adjusted according to specific requirements.

[0076] S6. Increment the integer variable by 1, and loop to execute steps S4 - S5 to calculate the output frequency of the variable reference circuit according to the incremented integer variable and the VCO frequency of the second LMX2594; calculate the fractional part obtained by dividing the output frequency of the variable reference circuit by the crystal oscillator frequency, and determine whether the product of the fractional part and the crystal oscillator frequency is greater than or equal to ten times the loop bandwidth of the variable reference circuit.

[0077] When the integer variable is incremented by 1, the output frequency f of the variable reference circuit ref changes accordingly. The output frequency f of the variable reference circuit ref divided by the crystal oscillator frequency f Y1 results in a fractional part f x which changes correspondingly until the fractional part f x multiplied by the crystal oscillator frequency f Y1 is greater than or equal to ten times the loop bandwidth of the variable reference circuit.

[0078] When calculating using the method of the present invention, the units of all parameters use the same order of magnitude.

[0079] S7. Loop to execute step S6 until the judgment result is yes; the single - chip microcomputer sets the integer variable corresponding to the judgment result of yes as the integer division value of the second LMX2594; and configures the output frequency of the variable reference circuit corresponding to the judgment result of yes as the output frequency of the first LMX2594, and configures the target output frequency of the second LMX2594; obtain the main target signal output by the RF output circuit.

[0080] At this time, the output frequency f of the variable reference circuit ref not only satisfies that the VCO frequency f of the RF output circuit VCOIs an integer multiple (i.e., P times) relationship, enabling the RF output circuit to effectively avoid integer boundary spurs, and also satisfying that the fractional multiple phase discrimination frequency generated by dividing the output frequency of the variable output circuit by its phase discrimination frequency is far from the integer boundary spur points, that is, f x *f Y1 Is much greater than f bw , thus achieving low spur output.

[0081] The output frequency of the variable reference circuit corresponding to the judgment result being yes is the output frequency of the variable reference circuit when suppressing integer boundary spurs, that is, the output frequency of the first LMX2594. The single-chip microcomputer configures the first LMX2594 and the second LMX2594 with the parameters that meet the integer boundary spur suppression respectively. At this time, the integer boundary spurs in the output signal of the RF output circuit are suppressed.

[0082] Such as Figure 7 And Figure 8 Shown, Figure 7 The spur of the output signal obtained without using the circuit and method of the present invention is about -55 dBm, Figure 8 After using the circuit and method of the present invention, the spur of the output signal is below -70 dBm, and the integer boundary spurs in the output signal are effectively suppressed.

[0083] Among them, Figure 7 The frequency of the output signal in is: 9 GHz, Maker1: -5.1 dBm, amplitude / division: 10 dB; Figure 8 The frequency of the output signal in is: 9 GHz, Maker1: -2.13 dBm, amplitude / division: 10 dB.

Claims

1. A circuit for suppressing integer boundary spurs of LMX2594, characterized in that Comprising: A variable reference circuit, including a first LMX2594, a crystal oscillator, and a first filter circuit, which are respectively connected to a radio frequency output circuit and a single-chip microcomputer control circuit, and are used for outputting a reference signal; A radio frequency output circuit, including a second LMX2594 and a second filter circuit, which are respectively connected to the variable reference circuit and the single-chip microcomputer control circuit, and are used for outputting a main target signal; A single-chip microcomputer control circuit, including a single-chip microcomputer, which is respectively connected to the variable reference circuit and the radio frequency output circuit, and is used for sending control signals to the variable reference circuit and the radio frequency output circuit.

2. The circuit for suppressing the integer boundary spurs of LMX2594 according to claim 1, wherein The structure of the first filter circuit is that the CPOUT terminal of the first LMX2594 is divided into three paths. One path is grounded through a capacitor C35, another path is grounded through a capacitor C27 and a resistor R14, and the third path is connected to the VTUNE terminal of the first LMX2594 after passing through a voltage division circuit composed of a resistor R11 and a resistor R12. The VTUNE terminal of the first LMX2594 is grounded through a capacitor C33. One end of a capacitor C34 is connected to the voltage division node of the voltage division circuit composed of a resistor R11 and a resistor R12, and the other end is grounded.

3. The circuit for suppressing the integer boundary spurs of LMX2594 according to claim 1, wherein The structure of the second filter circuit is that the CPOUT terminal of the second LMX2594 is divided into three paths. One path is grounded through a capacitor C30, another path is grounded through a capacitor C24 and a resistor R13, and the third path is connected to the VTUNE terminal of the second LMX2594 after passing through a voltage division circuit composed of a resistor R9 and a resistor R10. The VTUNE terminal of the second LMX2594 is grounded through a capacitor C28. One end of a capacitor C29 is connected to the voltage division node of the voltage division circuit composed of a resistor R9 and a resistor R10, and the other end is grounded.

4. A method for suppressing integer boundary spurs of LMX2594, characterized in that, Including the following steps: S1. Set up the circuit for suppressing the integer boundary spurs of LMX2594 according to any one of claims 1-3; S2. The single-chip microcomputer initializes the first LMX2594 and the second LMX2594, so that the first LMX2594 operates in a fractional frequency division mode and the second LMX2594 operates in an integer frequency division mode; S3. The single-chip microcomputer calculates the VCO frequency of the second LMX2594 according to the target output frequency; determines an integer variable according to the VCO frequency of the second LMX2594 and the configured frequency in the integer frequency division mode; S4. The single-chip microcomputer determines the output frequency of the variable reference circuit according to the integer variable and the VCO frequency of the second LMX2594; S5. The single-chip microcomputer calculates the fractional part obtained by dividing the output frequency of the variable reference circuit by the crystal oscillator frequency, and judges whether the product of the fractional part and the crystal oscillator frequency is greater than or equal to ten times the loop bandwidth of the variable reference circuit; If the judgment result is negative, then execute steps S6-S7; S6. Add 1 to the integer variable, and loop to execute steps S4-S5 to calculate the output frequency of the variable reference circuit according to the incremented integer variable and the VCO frequency of the second LMX2594; calculate the fractional part obtained by dividing the output frequency of the variable reference circuit by the crystal oscillator frequency; S7. Loop and execute step S6 until the judgment result is yes; the microcontroller configures the integer variable corresponding to the judgment result of yes as the integer division value of the second LMX2594; and configures the output frequency of the variable reference circuit corresponding to the judgment result of yes as the output frequency of the first LMX2594, and configures the target output frequency of the second LMX2594; to obtain the main target signal output by the radio frequency output circuit.

5. The method for suppressing the integer boundary spurs of LMX2594 according to claim 4, wherein The specific method for calculating the VCO frequency of the second LMX2594 is as follows: S3a-1. If the target output frequency f req is within the VCO direct output frequency range of the LMX2594, the VCO frequency of the second LMX2594 is equal to the target output frequency; S3a-2. If the target output frequency f req is not within the VCO direct output frequency range of the LMX2594, then f VCO = f req * X, where f VCO is the VCO frequency of the second LMX2594, and X is the channel division ratio.

6. The method for suppressing the integer boundary spurs of LMX2594 according to claim 4, wherein The specific method for determining the integer variable in step S3 is as follows: S3b-1. Judge whether the VCO frequency of the second LMX2594 is greater than its configured frequency. If the judgment result is yes, the integer division value is N1; if the judgment result is no, the integer division value is N2. The N1 and N2 are the initial integer division values of the second LMX2594 at different VCO frequencies; S3b-2. Take the integer division value as the integer variable.

7. The method for suppressing the integer boundary spurs of LMX2594 according to claim 4, wherein The output frequency f of the variable reference circuit ref The calculation formula is as follows: f ref = f VCO / P where f VCO is the VCO frequency of the second LMX2594, and P is an integer variable.

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