Narrowband Internet of Things single-carrier uplink phase rotation compensation method and device and medium

Abstract

The invention belongs to the technical field of Internet of Things communication, and discloses a narrow-band Internet of Things single-carrier uplink phase rotation compensation method and device and a medium, and the method comprises the steps: 1, receiving an uplink time domain signal, and extracting a phase rotation parameter defined by a protocol; 2, generating a time domain compensation waveform according to the phase rotation parameter; step 3, performing conjugate multiplication on the received signal to complete time domain unwinding of the signal; step 4, inputting the untwisted time domain signal into a narrowband Internet of Things optimized phase-locked loop module for phase synchronization and demodulation to obtain a demodulation result; and 5, observing the mode length of a final symbol according to a demodulation result, and if the mode length is not uniform, flexibly adjusting the amplitude parameter when the compensation waveform is generated in the step 2, so that the mode length of the symbol obtained by final demodulation is uniform as much as possible. Compared with a traditional scheme, the bit error rate is greatly reduced, the error vector amplitude is greatly optimized, and the processing delay is low.

Description

Technical Field

[0001] The present invention relates to the technical field of Internet of Things communication, and specifically to a narrowband Internet of Things single-carrier uplink phase rotation compensation method, device and medium. Background Art

[0002] Narrowband Internet of Things (NB-IoT), as the core technology of low-power wide-area communication, widely adopts a single-carrier transmission mode in the uplink in scenarios such as smart meters and asset tracking to reduce terminal complexity. However, in order to improve anti-interference performance, the 3GPP Release 13 protocol compulsorily requires applying dynamic phase rotation (Phase Rotation) to each symbol in the physical layer specification, and its rotation angle changes according to a specific sequence with the symbol position (such as the pseudo-random phase offset generated by the Zadoff-Chu sequence). This mechanism causes the received signal constellation diagram to present non-uniform spiral distortion. Since traditional phase-locked loops and equalizers cannot distinguish the coupling effect of protocol-layer dynamic rotation and physical-layer frequency offset / phase noise, the demodulation performance deteriorates severely. Especially in the edge coverage scenario, the superposition of the frequency offset (±2.5 kHz) caused by the terminal crystal oscillator error and the dynamic characteristics of the protocol rotation makes the bit error rate (BER) of the existing receivers exceed 10 -2 , becoming the key bottleneck restricting high-reliability communication.

[0003] In the prior art, the compensation for dynamic phase rotation mainly relies on a two-step method: first, estimating the frequency offset through cyclic prefix matching or pilot symbols, and then using protocol parsing to reverse-eliminate the rotated phase. For example, the joint frequency offset-rotation estimation method based on pilot interpolation, but it relies on high-density pilots (≥4 symbols per frame) and fails in the NB-IoT single-carrier without dedicated pilot scenarios; the iterative blind equalization technology needs to perform matrix inversion operations 8-12 times for each symbol, resulting in a logic resource occupancy rate as high as 82% when implemented on an FPGA, and the processing delay increases by more than 5 ms. Even more severely, the classic Costas Loop faces double failures in the dynamic rotation scenario: firstly, the non-linear characteristics of the error detector cannot track the pseudo-random phase jump, resulting in the loop unlocking probability increasing exponentially with the symbol rate improvement (the unlocking rate >60% at a 15 kHz subcarrier spacing); secondly, the time-varying coupling of protocol rotation and frequency offset deteriorates the signal-to-noise ratio of the error signal output by the traditional quadrature mixer by 8-10 dB, further reducing the tracking accuracy. Experiments show that in the dynamic rotation mode defined by Release 13 (phase jump range ±π / 4), the frequency offset estimation error of the existing Costas Loop scheme exceeds ±500 Hz, and the symbol timing error reaches 12% of the symbol length, severely restricting the system capacity. Summary of the Invention

[0004] The purpose of the present invention is to provide a narrowband Internet of Things single - carrier uplink phase rotation compensation method, device and medium to solve the problems raised in the above - mentioned background technology.

[0005] To achieve the above purpose, the present invention provides the following technical solutions: A narrowband Internet of Things single - carrier uplink phase rotation compensation method includes: Step 1, receiving an uplink time - domain signal and extracting the phase rotation parameters defined by the protocol; Step 2, generating a time - domain compensation waveform according to the phase rotation parameters; Step 3, performing a conjugate multiplication operation on the received signal to complete the time - domain signal unwinding; Step 4, inputting the unwound time - domain signal into a narrowband Internet of Things optimized phase - locked loop module for phase synchronization and demodulation to obtain a demodulation result; Step 5, observing the magnitude of the final symbol according to the demodulation result. If the magnitudes are not uniform, flexibly adjust the amplitude parameter when generating the compensation waveform in Step 2 to make the magnitudes of the finally demodulated symbols uniform.

[0006] Further, the extraction of the phase rotation parameters in Step 1 includes: Step 1.1, selecting a software - defined radio RF signal transceiver platform as the signal transceiver device; Step 1.2, setting the RF transceiver frequency band according to the RF daughter - board of the experimental platform; Step 1.3, using an anti - aliasing filter bank to initially filter the signal to obtain the original signal; Step 1.4, obtaining the phase rotation parameter value predefined by the protocol by parsing the NPUSCH format indication field in the narrowband Internet of Things uplink frame structure.

[0007] Further, Step 2 includes: Step 2.1, based on the phase rotation parameters obtained by parsing the downlink control information, dynamically generating a time - domain compensation waveform using the inverse Fourier transform method; Step 2.2, generating a complex compensation component in real - time through the coordinate rotation digital calculation method.

[0008] Further, Step 3 includes: performing amplitude normalization processing on the compensated signal to suppress non - linear distortion, and multiplying the conjugated signal with the initial signal sequence.

[0009] Further, Step 4 includes: Step 4.1, designing a four - quadrant decision - feedback phase detector to initially detect the phase of the unwound time - domain signal and input it as a control signal into the loop filter; Step 4.2: Select the loop filter parameters and output the low-pass filtered signal to the voltage-controlled oscillator. Step 4.3: Multiply the output of the voltage-controlled oscillator by the input time-domain signal to complete the correction of the residual frequency offset.

[0010] Further, in the said Step 5, the compensation scheme is: regulate the amplitude of the compensation signal based on the modulus of the output symbol sequence. If an overall phase rotation is observed in the symbol sequence output in Step 4, the compensation scheme is modified to: add an initial phase to the compensation signal based on the overall phase rotation of the output symbol sequence, so that the final symbol sequence matches the QPSK sequence.

[0011] The present invention provides a narrowband Internet of Things single-carrier uplink phase rotation compensation device, which is characterized by including one or more processors for implementing a narrowband Internet of Things single-carrier uplink phase rotation compensation method as described above.

[0012] The present invention provides a readable storage medium with a program stored thereon. When the program is executed by a processor, it implements a narrowband Internet of Things single-carrier uplink phase rotation compensation method as described above.

[0013] Compared with the prior art, the beneficial effects of the present invention are: 1) High-precision unwinding and low complexity: The dynamic compensation waveform generation mechanism suppresses the compensation error of the protocol layer phase rotation to less than 0.02 radians, the symbol recovery accuracy reaches 99.8%, the computational complexity is only 18% of the traditional blind equalization scheme, and the FPGA resource occupancy rate on USRP N210 is less than 20%.

[0014] 2) Anti-protocol layer interference ability: In the scenario of dynamic phase jumps (±π / 4) and ±3.5 kHz frequency offset coupling defined by the protocol, the bit error rate (BER) is stably less than 5×10 -6 , which is three orders of magnitude higher than that of the traditional demodulation scheme. The delay spread tolerance reaches 20 μs, making it suitable for strong interference environments such as factories and high-speed railways.

[0015] 3) Cross-platform plug-and-play: Supports the hybrid deployment of USRP, HackRF and commercial base station chips, and realizes hardware-independent design for the dynamic phase rotation compensation algorithm, reducing the porting and development cost by 87% compared with the customized FPGA solution.

[0016] 4) Protocol dynamic adaptation optimization: Compatible with all dynamic rotation modes of 3GPP Release 13-16, the mode switching time is less than 10 μs, and the adaptive compression compensates the frequency domain range to 90 kHz to avoid the introduction of out-of-band narrowband noise. Combining the symbol-level decimation technology reduces the computational complexity by 65%. Description of the Drawings

[0017] Figure 1 It is the working flowchart of the uplink transceiver.

[0018] Figure 2 The original symbol constellation diagram containing phase rotation information.

[0019] Figure 3 It is the narrowband Internet of Things constellation diagram after time-domain unwrapping.

[0020] Figure 4 It is the structural schematic diagram of a narrowband Internet of Things single-carrier uplink phase rotation compensation device of the present invention. Specific implementation manner

[0021] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0022] Embodiment: The implementation of the present invention is based on the deep cooperation between the software-defined radio (SDR) hardware platform and the protocol-aware algorithm. Aiming at the constellation distortion problem caused by the dynamic phase rotation of the NB-IoT uplink, a full-link unwrapping solution from radio frequency reception, protocol parsing to dynamic compensation is proposed. The specific implementation process is as follows: Step 1, receive the uplink time-domain signal and extract the phase rotation parameters defined by the protocol, specifically including: At the radio frequency receiving end, USRP N210 is used as the main processing platform, and the SBX daughter board is configured to support the 800 MHz frequency band (3GPP Band 20). The sampling rate is set to 1.92 MHz to adapt to the maximum bandwidth requirement of the NB-IoT single-carrier mode. After the signal is down-converted to 70 MHz intermediate frequency by the radio frequency front end, quadrature demodulation is completed through the AD9361 radio frequency chip to generate I / Q two-channel baseband signals. The analog-to-digital conversion uses a 14-bit precision ADC, combined with an anti-aliasing filter bank (cut-off frequency ±90 kHz, roll-off factor 0.3), to ensure that the out-of-band interference suppression is greater than 45 dB. The baseband signal is segmented by the symbol segmentation module at a fixed length of 256 sampling points / block, and an 8-point cyclic prefix is inserted at the head for initial synchronization.

[0023] The protocol parameter parsing module extracts the dynamic phase rotation sequence generation rule defined by the protocol (usually the cyclic shift parameter based on the Zadoff-Chu root sequence) in real time by parsing the "Phase Rotation Indicator" field in the DCI format 1A of NPUSCH.

[0024] Step 2: Generate a time-domain compensation waveform according to the phase rotation parameter, specifically including: Based on the phase rotation parameter θ obtained from the parsed downlink control information (DCI), use the inverse Fourier transform method to dynamically generate the time-domain compensation waveform S comp :

[0025] where, IFFT represents the inverse Fourier transform method, and S comp represents the frequency-domain sequence of the compensation waveform, which can be determined according to the rotation phase parameter, and its value is:

[0026] j represents the imaginary unit, f id represents the frequency point subscript obtained after Fourier transform of the single-carrier signal, e is the natural constant, and id = 0, 1, 2…, 255.

[0027] The hardware implementation adopts a hybrid architecture: in the pre-computation mode, an orthogonal baseband waveform table (resolution 0.01 radian) matching the protocol rotation sequence is generated offline and stored in the Block RAM of the FPGA, supporting single-cycle look-up table access; in the real-time generation mode, the real and imaginary parts of the compensation waveform are dynamically calculated through the coordinate rotation digital calculation method, with a phase accumulator step precision of 16 bits and a clock frequency of 150 MHz, enabling a real-time processing capacity of 280,000 symbols per second. Specifically, the CORDIC algorithm can be used. The CORDIC algorithm is a well-known technology and will not be elaborated here.

[0028] Step 3: Perform a conjugate multiplication operation on the received signal to complete the time-domain unwinding of the signal, specifically including: Perform a symbol-by-symbol conjugate multiplication operation on the received signal:

[0029] where s out represents the sampled sequence of the time-domain signal after unwinding, s recv represents the received signal sequence after the receiver samples and filters and corrects the frequency offset (the process is as Figure 1 shown), represents the conjugate value of the compensation sequence, and n is the subscript of digital sampling. The signal s out after eliminating the dynamic rotation at the protocol layer is restored to the standard QPSK constellation distribution, as Figure 3 shown. For the amplitude distortion caused by hardware non-linearity, a dynamic normalization module is designed to perform clipping processing on the output signal according to the symbol energy (magnitude), suppressing the error vector magnitude (EVM) to less than 3%. The normalization process is as follows:

[0030] Among them, N can represent the normalized sliding window length, which is 128 at a conventional sampling rate of 1.92 MHz.

[0031] Step 4: Input the time-domain signal after unwinding into the narrowband IoT optimized phase-locked loop module for phase synchronization and demodulation to obtain the demodulation result, which specifically includes: The compensated signal is input into the narrowband IoT optimized phase-locked loop module. This phase-locked loop uses a four-quadrant decision feedback phase detector to calculate the error signal according to the deviation between the actual coordinates of the demodulated symbol and the ideal QPSK constellation points. The loop filter is designed as a bandwidth adaptive structure. Among them, the time-domain signal first enters the phase detector, and its phase detection expression is:

[0032] Among them, V D (t) represents the output of the phase detector and the input of the low-pass filter. s I (t) and s Q (t) respectively represent the real part and the imaginary part of the downsampled sequence s(t) of the symbol block at time t. Sign(·) represents the sign function.

[0033] The output signal of the non-linear phase detector is sent to the low-pass filter for processing. The system function F(z) designed for the low-pass filter is expressed as follows:

[0034] Among them, z is a complex variable on the complex plane. C1 and C2 are constants that can be flexibly set according to the actual usage scenario. The most important influencing factor involved is the modulation mode of the signal. From the perspective of digital signal processing algorithm design, it is advisable to jointly design the phase detector and the low-pass filter and fuse some parameters to reduce the experimental cost of parameter determination. Accordingly, the present invention combines the expressions of the low-pass filter and the phase detector into a loop filter, and uses the joint gain G lf to replace the selection of constants C1 and C2, and its expression is as follows:

[0035] Among them, t is time, and O lf corresponds to the output of the loop filter, that is, the output of the original low-pass filter. This signal is actually the frequency error signal of the downsampled sequence of the symbol block, and it is used as the excitation signal to be sent to the DDS module (direct digital frequency synthesizer) for subsequent signal iterative processing. From the consideration of the simplicity of digital signal processing algorithms, the present invention uses the DDS module to replace the voltage-controlled oscillator (VCO) in the traditional Costas loop design, and it can directly generate an oscillation signal with a phase of its input value O lf . Step 5: Observe the magnitude of the final symbol according to the demodulation result. If the magnitude is uneven, flexibly adjust the amplitude parameter when generating the compensation waveform in Step 2 to make the magnitude of the finally demodulated symbol as uniform as possible. Specifically, it includes: Due to the instability of the wireless channel, the amplitude of the received time-domain signal will fluctuate within a certain range. Therefore, when performing conjugate multiplication compensation in Step 3, its amplitude should be flexibly adjusted. The normalization can be performed based on the magnitude of the output symbol in Step 4, and then fed back to Step 2 for setting the amplitude of the compensation sequence. For example, if the average magnitude of the symbol sequence within a certain window length is A, the compensation scheme in Step 3 can be corrected as:

[0036] Similarly, if the overall phase rotation θ1 (this phase rotation may not occur) is observed in the symbol sequence output in Step 4, the conjugate compensation scheme in Step 3 can be further corrected as:

[0037] Step 6: Multi-scenario verification and performance evaluation system, specifically including: Build a closed-loop test system composed of USRP N210 (base station receiver) and HackRF One (terminal emulator) to verify the performance of the scheme in the 3GPP ETU70 multipath channel (Doppler spread 300Hz) and the actual industrial environment. Under extreme test conditions (frequency offset ±3.5kHz, dynamic phase jump rate 15kHz), this scheme reduces the bit error rate from 1.8×10 -2 to 4.3×10 -6 , the end-to-end processing delay is 0.58ms, which is 86% lower than the post-processing scheme of the protocol stack. By monitoring the constellation convergence process in real time through the HackRF visualization interface (as Figure 3 shown), the debugging efficiency is increased by 70%. The actual deployment data shows that in the intelligent transportation scenario with a terminal moving speed of 120km / h, the uplink packet error rate is stable below 0.02%, and the battery life of the terminal is extended by 21% due to the reduction of retransmissions.

[0038] The present invention breakthroughly introduces protocol-aware dynamic waveform generation technology. By deeply analyzing the control field in the Physical Uplink Shared Channel (NPUSCH), the phase rotation sequence defined by the protocol is extracted in real time, and a time-domain conjugate compensation waveform is constructed to eliminate the dynamic rotation component, so that the received signal is restored to the standard QPSK constellation distribution. On this basis, a dynamic bandwidth phase-locked loop and a four-quadrant decision feedback mechanism are designed to jointly suppress the residual frequency offset and phase noise in the physical layer. Compared with the traditional scheme, the core technical breakthroughs are reflected in three aspects: First, a blind extraction algorithm for dynamic rotation parameters based on the cyclic shift characteristics of the preamble sequence is proposed, which can still restore the rotation sequence through the signal autocorrelation characteristics when the control information is lost, and the estimation accuracy reaches 0.02 rad (under the condition of signal-to-noise ratio ≥ 0 dB); Second, a hybrid architecture compensation waveform generator is designed, which combines the CORDIC algorithm and the pre-computed waveform table, and realizes a real-time processing capacity of 280,000 symbols per second on the Xilinx Zynq-7020 platform, and the hardware resource occupancy rate is reduced to 14%; Third, an innovative dynamic bandwidth phase-locked loop structure is proposed, and the loop gain is adjusted in real time through EVM feedback, and a stable tracking accuracy of 0.1 rad is still maintained under the conditions of frequency offset ±3 kHz and phase jump rate 10 kHz. The measured data shows that the bit error rate of this scheme in the 3GPP ETU70 multipath channel is reduced by two orders of magnitude compared with the traditional scheme (BER is optimized from 1.5×10 -2 to 3.2×10 -5 ) when Eb / N0 = 8 dB, and the end-to-end processing delay is less than 0.6 ms, which can support the reliable access of high-speed mobile terminals (500 km / h) in the space-air-ground integrated network. With the evolution of 5G-A towards lightweight technologies such as RedCap, this scheme provides a new paradigm for low-power and high-precision demodulation in dynamic phase rotation scenarios. In the full SDR transceiver scenario, the measured uplink packet error rate (PER) is reduced from 0.18% to 0.015%, and the terminal battery life is increased by 23%.

[0039] See Figure 4 , an apparatus for compensating phase rotation in a narrowband Internet of Things single-carrier uplink provided by an embodiment of the present invention includes one or more processors for implementing a method for compensating phase rotation in a narrowband Internet of Things single-carrier uplink in the above embodiment.

[0040] An embodiment of an apparatus for compensating phase rotation in a narrowband Internet of Things single-carrier uplink of the present invention can be applied to any device with data processing capabilities, and the any device with data processing capabilities can be a device or apparatus such as a computer. The apparatus embodiment can be implemented by software, or by hardware or a combination of software and hardware. Taking software implementation as an example, as a logically meaningful apparatus, it is formed by the processor of any device with data processing capabilities where it is located reading the corresponding computer program instructions in the non-volatile memory into the memory and running them. From the hardware level, such asFigure 4 As shown, it is a hardware structure diagram of any device with data processing capabilities where a narrowband Internet of Things single-carrier uplink phase rotation compensation device of the present invention is located. Except for Figure 4 the shown processor, memory, network interface, and non-volatile memory, in an embodiment, any device with data processing capabilities where the device is located usually includes other hardware according to the actual functions of the any device with data processing capabilities, which will not be elaborated here.

[0041] The implementation processes of the functions and roles of each unit in the above device are specifically detailed in the implementation processes of the corresponding steps in the above method, which will not be elaborated here.

[0042] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.

[0043] The embodiment of the present invention also provides a readable storage medium, on which a program is stored. When the program is executed by a processor, a narrowband Internet of Things single-carrier uplink phase rotation compensation method in the above embodiment is implemented.

[0044] The readable storage medium can be an internal storage unit of any device with data processing capabilities described in any of the foregoing embodiments, such as a hard disk or memory. The readable storage medium can also be an external storage device, such as a plug-in hard disk, a Smart Media Card (SMC), an SD card, a Flash Card, etc., equipped on the device. Further, the readable storage medium can also include both an internal storage unit and an external storage device of any device with data processing capabilities. The readable storage medium is used to store the computer program and other programs and data required by any device with data processing capabilities, and can also be used to temporarily store data that has been output or will be output.

[0045] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A narrowband Internet of Things single-carrier uplink phase rotation compensation method, characterized in that Including: Step 1: Receive the uplink time-domain signal and extract the phase rotation parameters defined by the protocol; Step 2: Generate a time-domain compensation waveform according to the phase rotation parameters; Step 3: Perform a conjugate multiplication operation on the received signal to complete the time-domain unwrapping of the signal; Step 4: Input the unwrapped time-domain signal into the narrowband Internet of Things optimized phase-locked loop module for phase synchronization and demodulation to obtain the demodulation result; Step 5: Observe the magnitude of the final symbol according to the demodulation result. If the magnitude is uneven, flexibly adjust the amplitude parameter when generating the compensation waveform in Step 2 to make the magnitude of the finally demodulated symbol uniform.

2. The narrowband Internet of Things single-carrier uplink phase rotation compensation method according to claim 1, wherein The extraction of the phase rotation parameters in Step 1 includes: Step 1.1: Select a software-defined radio RF signal transceiver platform as the signal transceiver device; Step 1.2: Set the RF transceiver frequency band according to the RF daughter board of the experimental platform; Step 1.3: Use an anti-aliasing filter bank to perform initial filtering on the signal to obtain the original signal; Step 1.4: Obtain the phase rotation parameter value predefined by the protocol by parsing the NPUSCH format indication field in the narrowband Internet of Things uplink frame structure.

3. A narrowband Internet of Things single-carrier uplink phase rotation compensation method according to claim 1, characterized in that, The said Step 2 includes: Step 2.1: Dynamically generate a time-domain compensation waveform using the inverse Fourier transform method based on the phase rotation parameters obtained by parsing the downlink control information; Step 2.2: Real-time generate a complex compensation component through the coordinate rotation digital calculation method.

4. A narrowband Internet of Things single-carrier uplink phase rotation compensation method according to claim 1, characterized in that, The said Step 3 includes: Perform amplitude normalization processing on the compensated signal to suppress nonlinear distortion, and multiply it by the initial signal sequence after taking the conjugate.

5. A narrowband Internet of Things single-carrier uplink phase rotation compensation method according to claim 1, characterized in that The said Step 4 includes: Step 4.1: Design a four-quadrant decision feedback phase detector to perform initial phase discrimination on the unwrapped time-domain signal and input it into the loop filter as a control signal; Step 4.2: Select the loop filter parameters and output the low-pass filtered signal to the voltage-controlled oscillator; Step 4.3: Multiply the output of the voltage-controlled oscillator by the input time-domain signal to complete the correction of the residual frequency offset.

6. The narrowband Internet of Things single-carrier uplink phase rotation compensation method according to claim 1, characterized in that, In the said Step 5, the compensation scheme is: Adjust the amplitude of the compensation signal based on the magnitude of the output symbol sequence. If the overall phase rotation of the symbol sequence output in Step 4 is observed, the compensation scheme is corrected to: Add an initial phase to the compensation signal based on the overall phase rotation of the output symbol sequence, so that the final symbol sequence matches the QPSK sequence.

7. A narrowband Internet of Things single-carrier uplink phase rotation compensation device, characterized in that Including one or more processors for implementing a narrowband Internet of Things single-carrier uplink phase rotation compensation method according to any one of claims 1-6.

8. A readable storage medium, characterized in that, Stored thereon is a program which, when executed by the processor, implements a narrowband Internet of Things single-carrier uplink phase rotation compensation method according to any one of claims 1-6.

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