Method for manufacturing electronic device

Abstract

The invention provides a manufacturing method of an electronic device. The manufacturing method comprises the following steps: providing a plurality of semiconductor elements; performing a packaging process on the plurality of semiconductor elements to form a plurality of packaged semiconductor elements, wherein the packaging process comprises arranging a plurality of filling material layers on the side walls of the plurality of semiconductor elements respectively; a substrate is provided, the substrate comprises a plurality of working areas, and each working area comprises at least one first groove; and arranging the plurality of packaged semiconductor elements in the at least one first groove of the plurality of working areas in a fluid transfer manner.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing an electronic device, and more particularly to a method for manufacturing an electronic device including a fluid transfer process. Background Art

[0002] Electronic components can be transferred onto a target substrate by a mass transfer technique. However, in existing mass transfer techniques, when using a stamp transfer method to transfer electronic components, the randomness of the distribution of the electronic components on the target substrate may be insufficient, resulting in regional differences in the performance of the electronic components on the target substrate, that is, an uneven overall performance, which in turn leads to a decline in the performance of the product. On the other hand, the stamp transfer method may also have the problem of incomplete transfer of electronic components, thereby increasing the production cost. Therefore, how to improve the performance of an electronic device formed by a mass transfer technique or reduce the production cost of an electronic device formed by a mass transfer technique is one of the important issues in this field. Summary of the Invention

[0003] The object of the present invention is to provide a method for manufacturing an electronic device.

[0004] In some embodiments, the present invention provides a method for manufacturing an electronic device, including providing a plurality of semiconductor components; performing a packaging process on the plurality of semiconductor components to form a plurality of packaged semiconductor components; providing a substrate including a plurality of working areas, each of the plurality of working areas respectively including at least one first groove; and disposing the plurality of packaged semiconductor components in at least one first groove of the plurality of working areas in a fluid transfer manner, wherein the packaging process includes disposing a plurality of filling material layers on the sidewalls of each of the plurality of semiconductor components respectively.

[0005] In some embodiments, the present invention provides a method for manufacturing an electronic device, including providing a plurality of semiconductor components; performing a packaging process on the plurality of semiconductor components to form a plurality of packaged semiconductor components; providing a first substrate including a plurality of grooves; disposing the plurality of packaged semiconductor components in the plurality of grooves of the first substrate in a fluid transfer manner; providing a second substrate including a plurality of working areas; and transferring at least a part of the plurality of packaged semiconductor components from at least a part of the plurality of grooves of the first substrate to the plurality of working areas, wherein the packaging process includes disposing a plurality of filling material layers on the sidewalls of each of the plurality of semiconductor components respectively. Brief Description of the Drawings

[0006] Figure 1 It is a schematic flow chart of the method for manufacturing an electronic device according to the first embodiment of the present invention.

[0007] Figure 2Schematic diagram of the fluid transfer process of the first embodiment of the present invention.

[0008] Figure 3 Top view schematic diagram of the substrate and the electronic unit of the first embodiment of the present invention.

[0009] Figure 4 Schematic diagram of setting up a repair electronic unit in the first embodiment of the present invention.

[0010] Figure 5 Schematic diagram of setting up a repair electronic unit in a variant embodiment of the first embodiment of the present invention.

[0011] Figure 6 Top view schematic diagram of the substrate and the electronic unit after the repair process in the first embodiment of the present invention.

[0012] Figure 7 Flow schematic diagram of the manufacturing method of the electronic device in the second embodiment of the present invention.

[0013] Figure 8 Schematic diagram showing the transfer of electronic units from the first substrate using an imprint transfer method.

[0014] Figure 9 Schematic diagram of the fluid transfer process of the second embodiment of the present invention.

[0015] Figure 10 Schematic diagram of transferring electronic units from the second substrate to the third substrate in the second embodiment of the present invention.

[0016] Figure 11 Schematic diagram of transferring electronic units from the second substrate to the third substrate in a variant embodiment of the second embodiment of the present invention.

[0017] Figure 12 Cross-sectional schematic diagram of the electronic device in the second embodiment of the present invention.

[0018] Figure 13 Top view schematic diagram of the substrate and the electronic unit of the second embodiment of the present invention.

[0019] Figure 14 Flow schematic diagram of the manufacturing method of the electronic unit of the electronic device in an embodiment of the present invention.

[0020] Figure 15 Process schematic diagram of the electronic unit of the electronic device in an embodiment of the present invention.

[0021] Figure 16 Cross-sectional schematic diagram of the electronic unit of the electronic device in an embodiment of the present invention.

[0022] Figure 17A cross-sectional schematic view of an electronic unit of an electronic device according to another embodiment of the present invention.

[0023] Figure 18 A schematic diagram of a fluid transfer process according to a variant embodiment of the second embodiment of the present invention.

[0024] Figure 19 A schematic diagram of applying the electronic device of the present invention to a vehicle display.

[0025] Description of reference numerals: AE - auxiliary element; BK, BK1, BK2 - retaining wall structure; BP2, BP1, BP3, BP4, BP5, BP6 - bonding pad; BS, BS1, BS2, BS3, BS4, BS5, BS’ - substrate; CD - conductive layer; CL, CL1 - circuit layer; CR1 - first carrier; CR2 - second carrier; CR3, CR, CR’ - carrier; DEU1 - defective first electronic unit; DWR - defective working area; E1 - first electrode; E2 - second electrode; ED - electronic device; EU, EUA, EUB, EUC - electronic unit; EU1 - first electronic unit; EU2 - second electronic unit; F1 - first side; F2 - second side; FL - fluid; FM - filling material layer; LB - laser; LEL - light-emitting layer; M100, M200, M300 - manufacturing method; ML, ML’ - material layer; ML1 - first material layer; ML2 - second material layer; ML3 - third material layer; ML4 - fourth material layer; P1 - first pitch; P2 - second pitch; P3 - third pitch; PP - protrusion structure; PU - packaged semiconductor element; R1 - first groove; R2 - second groove; REU - repaired electronic unit; RS - groove; S1 - first semiconductor layer; S2 - second semiconductor layer; S102, S104, S106, S108, S202, S204, S206, S208, S210, S300, S302, S304, S306, S308 - step; SB, GB - substrate; SB1 - first substrate; SB2 - second substrate; SB3 - third substrate; SR, SR5 - surface; SR1 - first surface; SR2 - second surface; SR3 - third surface; SR4 - fourth surface; ST, A1 - area; SU - semiconductor element; SW, SW1, SW2 - sidewall; SWR - sub-working area; T1 - distance; TH - transfer head; TH1 - thickness; UR - user; VH - vehicle; W1 - width; WH - windshield; WR - working area; X, Y, Z - direction; A - A’, B - B’ - tangent; θ1, θ2 - included angle. Detailed description of the invention

[0026] The present invention can be understood by referring to the following detailed description and in conjunction with the accompanying drawings. It should be noted that, for the convenience of the reader's understanding and to simplify the drawings, only a part of the device is shown in the multiple drawings of the present invention, and the specific elements in the drawings are not drawn to actual scale. In addition, the number and size of each element in the drawings are only for illustration and are not used to limit the scope of the present invention.

[0027] Throughout the specification of the present invention and the appended claims, certain terms will be used to refer to specific elements. Those of ordinary skill in the art should understand that electronic device manufacturers may use different names to refer to the same element. The present invention is not intended to distinguish between elements that have the same function but different names.

[0028] In the specification and claims of the present invention, words such as "comprising" and "including" are open-ended terms and should therefore be interpreted as meaning "including but not limited to...".

[0029] It should be understood that when an element or film layer is said to be "disposed on" or "connected to" another element or film layer, it can be directly on or directly connected to this other element or film layer, or there may be intervening elements or film layers between the two (non-direct case). Conversely, when an element is said to be "directly" on another element or film layer or "directly connected to" another element or film layer, there are no intervening elements or film layers between the two. When an element or film layer is said to be "electrically connected" to another element or film layer, it can be interpreted as a direct electrical connection or a non-direct electrical connection. The electrical connections or couplings described in the present invention can refer to either direct connections or indirect connections. In the case of a direct connection, the endpoints of the components on two circuits are directly connected or connected to each other by a conductor segment. In the case of an indirect connection, there are switches, diodes, capacitors, inductors, resistors, other suitable components, or combinations of the above components between the endpoints of the components on two circuits, but not limited thereto.

[0030] Although terms such as "first", "second", "third",... can be used to describe various components, the components are not limited to these terms. These terms are only used to distinguish a single component in the specification from other components. The same terms may not be used in the claims, and the first, second, third,... may be replaced according to the order of the component declarations in the claims. Therefore, in the specification of the present invention, the first component may be the second component in the claims.

[0031] In the present invention, the measurement methods of thickness, length, and width can be obtained by measuring with an optical microscope, and the thickness or width can be measured from the cross-sectional image in an electron microscope, but not limited thereto.

[0032] In addition, there may be a certain error between any two values or directions to be compared. Terms such as "about", "equal to", "equivalent to" or "the same", "substantially" or "approximately" are generally interpreted as being within a range of plus or minus 20% of the given value, or within a range of plus or minus 10%, plus or minus 5%, plus or minus 3%, plus or minus 2%, plus or minus 1% or plus or minus 0.5% of the given value.

[0033] In addition, the expressions "the given range is from the first value to the second value" and "the given range falls within the range from the first value to the second value" mean that the given range includes the first value, the second value and other values therebetween.

[0034] If the first direction is perpendicular to the second direction, the angle between the first direction and the second direction may be between 80 degrees and 100 degrees; if the first direction is parallel to the second direction, the angle between the first direction and the second direction may be between 0 degrees and 10 degrees.

[0035] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the technical field to which the present invention pertains. It is understood that these terms, for example, when defined in a commonly used dictionary, should be interpreted as having a meaning consistent with the related art and the background or context of the present invention, and should not be interpreted in an idealized or overly formal manner, unless specifically defined in the embodiments of the present invention.

[0036] It should be noted that, without departing from the spirit of the present invention, the technical features in several different embodiments can be replaced, reorganized and mixed to complete other embodiments in the following exemplified embodiments.

[0037] The electronic device mentioned in the present invention may include a display device, a sensing device, a backlight device, an antenna device, a splicing device, or other suitable electronic devices, but is not limited thereto. The electronic device of the present invention may include any suitable device applied to the above devices. The electronic device may be a bendable, flexible, or stretchable electronic device. The display device may be applied to, for example, a laptop computer, a public display, a tiled display, a vehicle display, a touch display, a television, a monitor, a smartphone, a tablet computer, a light source module, a lighting device, or an electronic device applied to the above products, but is not limited thereto. The sensing device may include a biosensor, a touch sensor, a fingerprint sensor, other suitable sensors, or a combination of the above types of sensors. The antenna device may be a liquid crystal type antenna device or a non-liquid crystal type antenna device, such as including a liquid crystal antenna device, but is not limited thereto. The splicing device may include, for example, a display splicing device or an antenna splicing device, but is not limited thereto. The shape of the electronic device may be rectangular, circular, polygonal, a shape with curved edges, or other suitable shapes. The electronic device may include an electronic unit, where the electronic unit may include passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, sensors, etc. The diode may include a light emitting diode or a photodiode. The light emitting diode may include, for example, an organic light emitting diode (OLED) or an inorganic light emitting diode, and the inorganic light emitting diode may include, for example, a mini light emitting diode (mini LED), a micro light emitting diode (micro LED), or a quantum dot light emitting diode (quantum dot LED), but is not limited thereto. It should be noted that the electronic device of the present invention may be various combinations of the above devices, but is not limited thereto. The electronic device may have peripheral systems such as a driving system, a control system, a light source system, etc. to support the display device, the antenna device, the wearable device (such as including augmented reality or virtual reality), the vehicle-mounted device (such as including an automotive windshield), or the splicing device.

[0038] Please refer to Figures 14 to 16 , Figure 14 is a schematic flowchart of a manufacturing method of an electronic unit of an electronic device according to an embodiment of the present invention, Figure 15 is a schematic process diagram of an electronic unit of an electronic device according to an embodiment of the present invention, Figure 16 is a cross-sectional schematic diagram of an electronic unit of an electronic device according to an embodiment of the present invention. According to the present invention, the electronic unit of the electronic device (such as Figure 6 and Figure 13 the electronic device ED shown) (such as Figure 6 and Figure 13The illustrated electronic unit (EU) includes a packaged semiconductor element (PU). The packaged semiconductor element (PU) includes a semiconductor element (SU). The semiconductor element (SU) may refer to any suitable element including a semiconductor layer or formed by a semiconductor process. The semiconductor element (SU) may include any suitable element according to the type or use of the electronic device. For example, in one embodiment, the electronic device may include a display device, and the semiconductor element (SU) may include a light-emitting unit, where the light-emitting unit includes, for example, a light-emitting diode, but is not limited thereto. In some embodiments, the electronic device may include a sensing device, and the semiconductor element (SU) may include any suitable sensing unit, such as a photodiode, but is not limited thereto. Hereinafter, taking the semiconductor element (SU) including a light-emitting diode as an example, the manufacturing method of the electronic device will be described. Specifically, the packaged semiconductor element (PU) may be formed by performing a packaging process on the semiconductor element (SU). After forming the packaged semiconductor element (PU), the packaged semiconductor element (PU) may be transferred to a target substrate (such as Figure 6 the illustrated substrate (SB) or Figure 13 the illustrated third substrate (SB3)) to form an electronic device. In other words, a packaging process may be first performed on the semiconductor element to form the packaged semiconductor element (PU), and then the packaged semiconductor element (PU) may be transferred to the target substrate by a fluid transfer process to form an electronic device. According to this embodiment, the manufacturing method M300 of the packaged semiconductor element (PU) may include the following steps:

[0039] S300: Provide a plurality of semiconductor elements;

[0040] S302: Dispose a plurality of filler material layers on the sidewalls of each semiconductor element respectively;

[0041] S304: Dispose a first electrode on the first surface of each semiconductor element;

[0042] S306: Form a conductive layer on the sidewalls of each filler material layer;

[0043] S308: Dispose a second electrode on the second surface of each semiconductor element.

[0044] The content of each step of the manufacturing method M300 of the packaged semiconductor element (PU) will be described in detail below.

[0045] The manufacturing method M300 of the packaged semiconductor element (PU) includes first performing step S300 to provide a plurality of semiconductor elements (SU). In detail, as Figure 15As shown in the process (I), a substrate GB and a plurality of semiconductor elements SU disposed on the substrate GB can be provided first. The substrate GB can include a growth substrate, but is not limited thereto. For example, the semiconductor elements SU can be formed on the substrate GB by an epitaxial process. In some embodiments, the substrate GB can be used to carry the semiconductor elements SU or provide a supporting effect for the semiconductor elements SU. Then, the plurality of semiconductor elements SU can be transferred from the substrate GB to a carrier CR. In this embodiment, the plurality of semiconductor elements SU can be transferred from the substrate GB to the carrier CR by an imprint transfer method, but is not limited thereto. For example, the semiconductor elements SU can be picked up at a specific interval on the substrate GB, and the picked-up semiconductor elements SU can be transferred to the carrier CR such that there is the specific interval between two adjacent semiconductor elements SU on the carrier CR, which is beneficial for subsequent packaging processes of the semiconductor elements SU. In some embodiments, the semiconductor elements SU can be transferred from the substrate GB to the carrier CR by a laser transfer method. The carrier CR can include a substrate BS and a material layer ML disposed on the substrate BS, and the semiconductor elements SU can be attached to the substrate BS through the material layer ML. The substrate BS can include a rigid substrate or a flexible substrate. The rigid substrate includes, for example, glass, quartz, sapphire, ceramic, other suitable materials, or a combination of the above materials, and the flexible substrate includes, for example, polyimide (PI), polycarbonate (PC), polyethylene terephthalate (PET), other suitable materials, or a combination of the above materials, but is not limited thereto. The material layer ML can include any suitable material having temporary adhesiveness to the semiconductor elements SU to temporarily fix the semiconductor elements SU on the substrate BS. In this embodiment, the semiconductor elements SU can include light-emitting diodes, such as inorganic light-emitting diodes, but is not limited thereto. For example, the semiconductor elements SU can include a first semiconductor layer S1, a second semiconductor layer S2, and a light-emitting layer LEL disposed between the first semiconductor layer S1 and the second semiconductor layer S2. Specifically, the semiconductor element SU can include a structure formed by sequentially stacking the second semiconductor layer S2, the light-emitting layer LEL, and the first semiconductor layer S1 along the normal direction (i.e., direction Z) of the carrier CR, where the second semiconductor layer S2 can contact the material layer ML, but is not limited thereto. In some embodiments, the semiconductor element SU can include a structure formed by sequentially stacking the first semiconductor layer S1, the light-emitting layer LEL, and the second semiconductor layer S2 along the normal direction of the carrier CR, where the first semiconductor layer S1 can contact the material layer ML. The semiconductor element SU can also include other suitable film layers, such as an ohmic contact layer, and is not limited to the above film layers.The semiconductor element SU includes a first surface SR1 and a second surface SR2 opposite to the first surface SR1, wherein the first surface SR1 may refer to a surface of the semiconductor element SU away from the carrier CR, and the second surface SR2 may refer to a surface of the semiconductor element SU adjacent to the carrier CR, or a surface of the semiconductor element SU contacting the material layer ML. In the present embodiment, the first surface SR1 may be a surface of the first semiconductor layer S1, and the second surface SR2 may be a surface of the second semiconductor layer S2. It should be noted that, although. Figure 15 The process (I) only shows a structure in which one semiconductor device SU is transferred to the carrier CR, but the carrier CR may include a plurality of semiconductor devices SU transferred from the substrate GB.

[0046] After the plurality of semiconductor elements SU are transferred to the carrier CR, step S302 may be performed to respectively arrange a plurality of filling material layers FM on the sidewalls SW of each semiconductor element SU. Figure 15 As shown in the process (II), the semiconductor element SU may include a sidewall SW connected between the first surface SR1 and the second surface SR2, and the filling material layer FM may be disposed on the carrier CR and surround the sidewall SW of the semiconductor element SU. Figure 15 As shown in process (II), when the semiconductor element SU is observed from above, the filling material layer FM may surround the semiconductor element SU. The filling material layer FM may cover the sidewalls of the semiconductor element SU, but does not cover the first surface SR1 and the second surface SR2 of the semiconductor element SU. Specifically, the filling material layer FM may include a third surface SR3 and a fourth surface SR4 opposite to the third surface SR3, the third surface SR3 is adjacent to the first surface SR1 of the semiconductor element SU, and the fourth surface SR4 is adjacent to the second surface SR2 of the semiconductor element SU, wherein in the normal direction of the carrier CR, the third surface SR3 may be substantially aligned with the first surface SR1, and the fourth surface SR4 may be substantially aligned with the second surface SR2, but not limited thereto. The filling material layer FM may include any suitable material with high light transmittance, such as acrylic, siloxane, silica, other suitable materials or a combination of the above materials. In the present embodiment, the filler material layer FM may have a visible light transmittance greater than 90%.

[0047] According to this embodiment, Figure 15As shown in Process (II), when observing the filler material layer FM from a top view, the outer edges of the third surface SR3 and the fourth surface SR4 of the filler material layer FM can be circular or approximately circular (such as an ellipse, but not limited thereto). In this way, the packaged semiconductor element PU can have a circular contour in the top view direction of the electronic device ED. Specifically, the third surface SR3 (or the fourth surface SR4) has an annular shape, where the outer edge of the annular shape is circular or approximately circular, and the shape of the inner edge of the annular shape is the same as the shape of the semiconductor element SU. When observing the semiconductor element SU from a top view, the shape of the semiconductor element SU can include a rectangle, a circle, a polygon, an irregular shape, or other suitable shapes. For example, in this embodiment, when observing the semiconductor element SU from a top view, the shape of the semiconductor element SU can be a rectangle, but not limited thereto. The filler material layer FM further includes a side wall SW1 connected between the third surface SR3 and the fourth surface SR4. In some embodiments, the size (such as the area) of the third surface SR3 and the size of the fourth surface SR4 can be different. For example, the size of the third surface SR3 is smaller than the size of the fourth surface SR4, and the side wall SW1 may not be perpendicular to the third surface SR3 and the fourth surface SR4, as Figure 15 shown in Process (II). In some embodiments, the size of the third surface SR3 can be substantially the same as the size of the fourth surface SR4, and the side wall SW1 can be perpendicular to the third surface SR3 and the fourth surface SR4. According to the shape design of the filler material layer FM, a semiconductor element SU and the filler material layer FM surrounding the semiconductor element SU can form a disc structure (or a cylindrical structure).

[0048] The manufacturing method M300 of the packaged semiconductor element PU in this embodiment further includes step S304 of disposing a first electrode E1 on the first surface SR1 of each semiconductor element SU. Specifically, after transferring the semiconductor element SU to the carrier plate CR, the first electrode E1 can be disposed on the first surface SR1 of the semiconductor element SU away from the carrier plate CR. The first electrode E1 contacts the first surface SR1, that is, contacts the first semiconductor layer S1. The first electrode E1 can include any suitable conductive material, such as a metal material or a transparent conductive material. It should be noted that in some embodiments, after transferring the semiconductor element SU to the carrier plate CR, the first electrode E1 can be disposed first, and then the filler material layer FM can be disposed. In other embodiments, after transferring the semiconductor element SU to the carrier plate CR, the filler material layer FM can be disposed first, and then the first electrode E1 can be disposed.

[0049] The manufacturing method M300 of the packaged semiconductor element PU in this embodiment further includes step S306 of forming a conductive layer CD on the side wall SW1 of each filler material layer FM. Specifically, as Figure 15As shown in the process (II), after the filling material layer FM is provided, a conductive layer CD can be formed along the sidewall SW1 of the filling material layer FM. The conductive layer CD can be disposed around the sidewall SW1 of the filling material layer FM, thereby covering the sidewall SW1 of the filling material layer FM. In this embodiment, as Figure 15 As shown in the process (II), the conductive layer CD can further extend on the third surface SR3 of the filling material layer FM, but does not contact the first electrode E1 and the first semiconductor layer S1. In this case, when observing the conductive layer CD from a top view, a part of the conductive layer CD located on the third surface SR3 can have an annular structure, wherein the annular structure can expose the first electrode E1 and the first semiconductor layer S1. In some embodiments, the conductive layer CD may not extend on the third surface SR3 of the filling material layer FM or may not contact the third surface SR3. For example, one end of the conductive layer CD adjacent to the third surface SR3 can be substantially aligned with the third surface SR3. In addition, although Figure 15 the structure in which the conductive layer CD further extends on the carrier plate CR (or the material layer ML) is shown in the process (II), this embodiment is not limited thereto. In some embodiments, the conductive layer CD may not extend on the carrier plate CR.

[0050] According to the present invention, the conductive layer CD can include a highly reflective material, or the conductive layer CD can at least partially include a highly reflective material. For example, in some embodiments, the material of the conductive layer CD can be selected as a conductive material with high reflectivity, such as silver (Ag) or aluminum (Al), but not limited thereto. In some embodiments, the conductive layer CD can include a composite structure, wherein the composite structure includes a conductive material layer and a reflective material layer, and the reflective material layer is located between the conductive material layer and the sidewall SW1 of the filling material layer FM. The conductive material layer can include a metal material with high conductivity, such as gold (Au), copper (Cu), but not limited thereto. The reflective material layer can include any suitable element or film layer with high reflectivity, such as a distributed bragg reflector (DBR), but not limited thereto. By making the conductive layer CD highly reflective, the light-emitting effect of the packaged semiconductor element PU can be improved. It should be noted that in the manufacturing method M300, the step of forming the conductive layer CD (step S306) and the step of providing the first electrode E1 (step S304) can be performed in any order or simultaneously, and this embodiment is not limited thereto.

[0051] The manufacturing method M300 of the packaged semiconductor element PU of this embodiment further includes step S308 of providing a second electrode E2 on the second surface SR2 of each semiconductor element SU. Specifically, after forming Figure 15After the structure shown in the process (II), the structure can be transferred from the carrier CR to the carrier CR'. The carrier CR' may include a substrate BS' and a material layer ML'. The characteristics of the substrate BS' and the material layer ML' may refer to the descriptions of the above substrate BS and material layer ML, but are not limited thereto. Specifically, as Figure 15 shown in the process (III), after Figure 15 transferring the structure shown in the process (II) to the carrier CR', the structure can be disposed on the carrier CR' with the first electrode E1 (or the first surface SR1 of the semiconductor element SU) facing down. In this case, the second surface SR2 of the semiconductor element SU can face up, or can be away from the carrier CR'. The material layer ML' can contact the first electrode E1 and / or the conductive layer CD, but is not limited thereto. Then, a second electrode E2 can be disposed on the second surface SR2. Specifically, the second electrode E2 can be disposed on the second surface SR2 of the semiconductor element SU, the fourth surface SR4 of the filling material layer FM, and the conductive layer CD, and contact the second semiconductor layer S2 and the conductive layer CD. In this case, the second electrode E2 is electrically connected to the second semiconductor layer S2 and the conductive layer CD respectively, or the second electrode E2 is electrically connected between the second semiconductor layer S2 and the conductive layer CD. For example, in this embodiment, the second electrode E2 can be disposed entirely on the semiconductor element SU, the filling material layer FM, and the conductive layer CD, but is not limited thereto. In this case, the outer edge of the second electrode E2 can be circular or approximately circular in the normal direction of the carrier CR', depending on the shape of the filling material layer FM. Through the above structural design, the second semiconductor layer S2 can be electrically connected to the conductive layer CD through the second electrode E2. In other words, a part of the conductive layer CD extending on the third surface SR3 can serve as a bonding element of the second semiconductor layer S2 and is on the same side as the bonding element (i.e., the first electrode E1) of the first semiconductor layer S1. Thus, when the packaged semiconductor element PU is subsequently transferred to the target substrate, it is beneficial to bond the packaged semiconductor element PU to the target substrate. The second electrode E2 can include any suitable transparent conductive material, such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium oxide (IGO), but is not limited thereto. In some embodiments, the second electrode E2 can include a thin metal or a metal grid. For example, a very thin metal layer (e.g., a magnesium layer or a silver layer) can be formed, or a metal grid layer with light-transmitting openings can be formed by screen printing or other patterning processes to form the second electrode E2.

[0052] After setting the second electrode E2, the manufacturing method M300 of the packaged semiconductor element PU of this embodiment may further include setting an auxiliary element AE, where the auxiliary element AE may be set on the second electrode E2, or on the side of the second electrode E2 opposite to the semiconductor element SU, such that the second electrode E2 is located between the auxiliary element AE and the second semiconductor layer S2. After setting the auxiliary element AE, the packaged semiconductor element PU may be formed.

[0053] It should be noted that Figure 15 only an exemplary manufacturing schematic diagram of one packaged semiconductor element PU is shown, and other semiconductor elements SU transferred to the carrier substrate CR may be packaged in the same way to form the packaged semiconductor element PU. In addition, the manufacturing method of the packaged semiconductor element PU of this embodiment is not limited to the above steps, and may further include other suitable steps according to the structural design of the packaged semiconductor element PU.

[0054] As Figure 16 shown, the packaged semiconductor element PU of this embodiment may include a semiconductor element SU, a filler material layer FM disposed around the sidewall SW of the semiconductor element SU, a first electrode E1 and a second electrode E2 respectively disposed on the first surface SR1 and the second surface SR2 of the semiconductor element SU, and a conductive layer CD disposed around the sidewall SW1 of the filler material layer FM, where the second electrode E2 contacts the conductive layer CD to electrically connect the second semiconductor layer S2 to the conductive layer CD. The conductive layer CD may extend on the third surface SR3 of the filler material layer FM in addition to being disposed around the sidewall SW1. In this case, the packaged semiconductor element PU may have a vertical embedded flip chip structure. Specifically, the semiconductor element SU in the packaged semiconductor element PU may include a vertical type light emitting diode element and be embedded in the filler material layer FM. When the packaged semiconductor element PU is subsequently transferred to a target substrate to form an electronic device, the first semiconductor layer S1 and the second semiconductor layer S2 of the semiconductor element SU may be electrically connected to bonding pads (such as Figure 5 the bonding pad BP4 shown or Figure 12 the bonding pad BP6 shown) on the target substrate through the first electrode E1 and a part of the conductive layer CD (i.e., the part where the conductive layer CD extends on the third surface SR3) located on the same side of the semiconductor element SU as the first electrode E1, that is, the packaged semiconductor element PU may be bonded to the target substrate in a flip chip manner.

[0055] In a cross-sectional view of the packaged semiconductor element PU (such as Figure 16As shown, the encapsulated semiconductor component PU has a first side F1 and a second side F2 opposite to the first side F1, where the first side F1 is defined as the side where the first electrode E1 is located in the encapsulated semiconductor component PU, and the second side F2 is defined as the side where the second electrode E2 is located in the encapsulated semiconductor component PU. According to this embodiment, the first side F1 of the encapsulated semiconductor component PU may have a width W1, where the range of the width W1 may be from 10 micrometers (μm) to 50 μm (i.e., 10 μm ≤ W1 ≤ 50 μm), but not limited thereto. The width W1 may be defined as the maximum distance between the two ends of the first side F1 of the encapsulated semiconductor component PU in a cross-sectional view of the encapsulated semiconductor component PU. For example, in this embodiment, the width W1 may be the maximum distance between the two ends of the conductive layer CD located on the first side F1. In some embodiments, the range of the width W1 may be from 15 μm to 45 μm (i.e., 15 μm ≤ W1 ≤ 45 μm). In some embodiments, the range of the width W1 may be from 20 μm to 40 μm (i.e., 20 μm ≤ W1 ≤ 40 μm).

[0056] According to this embodiment, in a cross-sectional view of the encapsulated semiconductor component PU (such as Figure 16 As shown), the encapsulated semiconductor component PU may have a thickness TH1. The thickness TH1 may be defined as the maximum thickness of the encapsulated semiconductor component PU in its normal direction. For example, the thickness TH1 may be defined as the maximum distance between the surface of the second electrode E2 opposite to the semiconductor component SU and the surface of the first electrode E1 opposite to the semiconductor component SU (or the conductive layer CD) in the normal direction of the encapsulated semiconductor component PU. According to this embodiment, the range of the thickness TH1 may be from 10 μm to 50 μm (i.e., 10 μm ≤ TH1 ≤ 50 μm), but not limited thereto. In some embodiments, the range of the thickness TH1 may be from 15 μm to 45 μm (i.e., 15 μm ≤ TH1 ≤ 45 μm). In some embodiments, the range of the thickness TH1 may be from 20 μm to 40 μm (i.e., 20 μm ≤ TH1 ≤ 40 μm).

[0057] According to this embodiment, an included angle θ1 may exist between a part of the conductive layer CD extending on the third surface SR3 and another part of the conductive layer CD extending on the sidewall SW1. The included angle θ1 can also be regarded as the included angle between the third surface SR3 and the sidewall SW1. In other words, the value of the included angle θ1 can be determined by the shape design of the filler material layer FM. According to this embodiment, the range of the included angle θ1 can be from 90 degrees to 135 degrees (i.e., 90°≤θ1≤135°), but it is not limited thereto. When the included angle θ1 is 90 degrees, a part of the conductive layer CD extending on the third surface SR3 is perpendicular to another part of the conductive layer CD extending on the sidewall SW1, or rather, the third surface SR3 is perpendicular to the sidewall SW1. In some embodiments, the range of the included angle θ1 can be from 95 degrees to 130 degrees (i.e., 95°≤θ1≤130°). In some embodiments, the range of the included angle θ1 can be from 100 degrees to 125 degrees (i.e., 100°≤θ1≤125°). By making the value of the included angle θ1 fall within the above range, the light-emitting effect of the packaged semiconductor element PU can be improved.

[0058] Please refer to Figure 17 , Figure 17 is a cross-sectional schematic view of an electronic unit of an electronic device according to another embodiment of the present invention. One of the main differences between the packaged semiconductor element PU of this embodiment and the Figure 16 shown packaged semiconductor element PU lies in the setting position of the conductive layer CD. Specifically, as shown in Figure 17 , the conductive layer CD of the packaged semiconductor element PU of this embodiment may not be provided on the third surface SR3 of the filler material layer FM, or rather, does not extend on the third surface SR3. Specifically, the conductive layer CD may extend on the sidewall SW1 of the filler material layer FM and be generally aligned with the third surface SR3. In this case, the packaged semiconductor element PU may have a vertical embedded chip structure. Specifically, the semiconductor element SU may include a vertical type light-emitting diode element and be embedded in the filler material layer FM. In addition, in this embodiment, the first electrode E1 of the packaged semiconductor element PU may also extend on the third surface SR3 of the filler material layer FM, that is, the first electrode E1 can simultaneously contact the first surface SR1 of the semiconductor element SU (or the first semiconductor layer S1) and the third surface SR3 of the filler material layer FM. It should be noted that although Figure 17 the conductive layer CD contacts the second electrode E2 in , this embodiment is not limited thereto. In some embodiments, the conductive layer CD may not contact the second electrode E2, and the second electrode E2 may be electrically connected to a bonding pad on the target substrate through other traces (not shown).

[0059] According to the present invention, after forming the packaged semiconductor component PU through the above manufacturing method M300, the packaged semiconductor component PU can be transferred to a target substrate through a fluid transfer process to form an electronic device. In other words, a packaging process can be performed on the semiconductor component SU before the fluid transfer process of the semiconductor component SU. Since the semiconductor component SU in the present invention can include a vertical light-emitting diode component, the arrangement density of the semiconductor component SU on a substrate (such as a wafer) can be increased, thereby improving the substrate utilization rate. In addition, by performing a packaging process on the semiconductor component SU before the fluid transfer process of the semiconductor component SU to form the packaged semiconductor component PU, the bonding elements (i.e., the first electrode E1) of the first semiconductor layer S1 and the bonding elements (i.e., the part where the conductive layer CD extends on the third surface SR3) of the second semiconductor layer S2 in the semiconductor component SU can be located on the same side of the packaged semiconductor component PU, which is beneficial to bonding the packaged semiconductor component PU to the target substrate to form an electronic device. The steps of the fluid transfer process of the packaged semiconductor component PU will be described in detail below. It should be noted that the electronic unit EU (including the electronic unit EUA, the electronic unit EUB, the electronic unit EUC, the first electronic unit EU1, and the second electronic unit EU2) mentioned below can refer to any one of the packaged semiconductor components PU in the above embodiments, and the structure of the electronic unit EU shown in the following figure is only exemplary, and its structural details can be referred to Figure 16 , 17 and the relevant content above.

[0060] Please refer to Figures 1 to 6 , Figure 1 which is a schematic flowchart of the manufacturing method of the electronic device according to the first embodiment of the present invention, and Figures 2 to 6 shows a schematic diagram of the manufacturing method of the electronic device in this embodiment. Specifically, Figures 2 to 6 shows the transfer process of the packaged semiconductor component PU. According to this embodiment, the manufacturing method M100 of the electronic device ED (shown in Figure 6 ) can include the following steps:

[0061] S102: Provide a substrate, the substrate includes a plurality of working areas, and each working area respectively includes at least one first groove and at least one second groove;

[0062] S104: Arrange a plurality of first electronic units in at least one first groove of the plurality of working areas in a fluid transfer manner;

[0063] S106: Identify defective working areas from the plurality of working areas; and

[0064] S108: Arrange at least one repair electronic unit in at least one of the at least one second groove of the defective working area in a laser transfer manner.

[0065] The content of each step of the manufacturing method M100 of the electronic device ED will be described in detail below.

[0066] Please refer to Figure 2 and Figure 3 , Figure 2 which is a schematic diagram of the fluid transfer process of the first embodiment of the present invention, Figure 3 and which is a top view schematic diagram of the substrate and the electronic unit of the first embodiment of the present invention. In this embodiment, the manufacturing method M100 of the electronic device ED includes first performing step S102 to provide a substrate SB. The substrate SB may include a plurality of working regions WR, and each working region WR may respectively include at least one first groove R1 and at least one second groove R2. As Figure 2 and Figure 3 shown, the substrate SB may include a substrate BS and a circuit layer CL disposed on the substrate BS. The substrate BS may include a rigid substrate or a flexible substrate. The rigid substrate includes, for example, glass, quartz, sapphire, ceramic, other suitable materials, or a combination of the above materials, and the flexible substrate includes, for example, polyimide (PI), polycarbonate (PC), polyethylene terephthalate (PET), other suitable materials, or a combination of the above materials, but is not limited thereto. The circuit layer CL may include various wires, circuits, and electronic units (such as active components and / or passive components) applicable to the electronic device ED, but is not limited thereto. For example, the circuit layer CL may include a driving unit, where the driving unit may be electrically connected to the subsequently provided electronic unit to drive the electronic unit, but is not limited thereto. The circuit layer CL may include thin film transistor elements (TFTs), that is, may include components and / or film layers such as a semiconductor layer, a gate electrode, a source electrode, and a drain electrode, but is not limited thereto. The semiconductor layer may include silicon or a metal oxide, such as a low temperature polysilicon (LTPS) semiconductor or an amorphous silicon (a-Si) semiconductor, a metal oxide semiconductor, and the metal oxide semiconductor may be, for example, an indium gallium zinc oxide (IGZO) semiconductor, but is not limited thereto. It should be noted that the circuit layer CL may include any suitable components according to the use or type of the electronic device ED and is not limited to the above. In this embodiment, the substrate SB may be a complementary metal oxide semiconductor (CMOS) substrate or a thin film transistor substrate, but is not limited thereto.

[0067] In this embodiment, the working regions WR on the substrate SB may be arranged in a matrix, but the present invention is not limited thereto. The working region WR may include at least one first groove R1 and at least one second groove R2. For example, as Figure 3 shown, each working region WR may include three first grooves R1 and three second grooves R2, where the first grooves R1 may be arranged side by side in one direction (e.g., direction X), the second grooves R2 may also be arranged side by side in this direction, and one second groove R2 may be adjacent to one first groove R1. For example, one second groove R2 corresponds to one first groove R1, but is not limited thereto. It should be noted that in other embodiments, the number and arrangement of the first grooves R1 and the second grooves R2 in the working region WR may be adjusted according to the design of the electronic device ED, and are not limited to Figure 3 shown. Specifically, the substrate SB may further include a dam structure BK disposed on the circuit layer CL. The dam structure BK may be disposed on a side of the circuit layer CL opposite to the substrate BS. The dam structure BK may define the first groove R1 and the second groove R2. In detail, the dam structure BK may include a plurality of openings, and these openings may form the first groove R1 and the second groove R2. That is, the first groove R1 and the second groove R2 may be surrounded by the dam structure BK. The dam structure BK may include any suitable insulating material. According to this embodiment, in subsequent processes, electronic units will be disposed in the working region WR of the substrate SB, for example, may be disposed in the first groove R1 of the working region WR.

[0068] After providing the substrate SB, step S104 may be then performed to dispose a plurality of first electronic units EU1 in at least one first groove R1 of the plurality of working regions WR in a fluid transfer manner. Specifically, a carrier (not shown in the figure) may be first provided, and a plurality of first electronic units EU1 may be disposed on the carrier. The carrier here may include a wafer or any other suitable substrate capable of carrying the first electronic units EU1. Then, the first electronic units EU1 located on the carrier may be transferred to the substrate SB through a fluid transfer process, and the first electronic units EU1 may be disposed in the first groove R1 of the working region WR. In detail, as Figure 2As shown in the upper half of, the first electronic unit EU1 can be transferred from the carrier plate to the substrate SB through the fluid FL and enter the first groove R1, where the first electronic unit EU1 can be electrically connected to the circuit layer CL. Specifically, the circuit layer CL can include a plurality of bonding pads BP1 exposed by the first groove R1. When the first electronic unit EU1 enters the first groove R1, the bonding pad BP2 of the first electronic unit EU1 can contact the bonding pad BP1 of the circuit layer CL, thereby electrically connecting the first electronic unit EU1 to the circuit layer CL. In this embodiment, the bonding pad BP1 and the bonding pad BP2 can be bonded to each other through any suitable process, such as eutectic bonding, conductive film bonding, metal bonding, conductive paste bonding, or other suitable processes. Thus, the operation of the first electronic unit EU1 can be controlled through the circuit layer CL. It should be noted that Figure 2 and the positions of the bonding pads shown in the following figure are only exemplary. The positions of the bonding pads (or bonding elements) of the electronic unit EU (i.e., the packaged semiconductor element PU) can refer to Figure 16 , Figure 17 the shown structure and the relevant content above, and the positions of the bonding pads of the circuit layer CL can correspond to the positions of the bonding pads of the electronic unit EU. The first electronic unit EU1 can include an auxiliary element AE, where the auxiliary element AE can be a columnar structure provided on the side of the first electronic unit EU1 opposite to the bonding pad BP2, but is not limited thereto. During the transfer process of the first electronic unit EU1, the auxiliary element AE can assist in making the bonding pad BP2 of the first electronic unit EU1 face downward, or towards the substrate SB, so that the bonding pad BP2 contacts the bonding pad BP1. After completing the transfer process of the first electronic unit EU1, as Figure 2 shown in the lower half of and Figure 3 shown, the first electronic unit EU1 is disposed in the first groove R1 and electrically connected to the circuit layer CL, and the second groove R2 can be vacant or not provided with the first electronic unit EU1. Then, the auxiliary element AE can be removed.

[0069] In this embodiment, the first electronic unit EU1 can be disposed in the first groove R1 but not in the second groove R2 through a fluid transfer process. Specifically, by designing the shapes or sizes of the first groove R1 and the second groove R2 differently, and making the shape or size of the first electronic unit EU1 match that of the first groove R1, the effect that the first electronic unit EU1 is disposed in the first groove R1 but not in the second groove R2 can be achieved. In some embodiments, although not shown in the figure, the second groove R2 and the first groove R1 may have the same shape, and the size of the first groove R1 may be larger than that of the second groove R2. The "sizes of the first groove R1 and the second groove R2" here may be the areas of the first groove R1 and the second groove R2 in the top view direction (e.g., parallel to the Z direction) of the substrate SB or the volumes of the first groove R1 and the second groove R2, but are not limited thereto. The definition of "size" described below can refer to the above, so it will not be elaborated here. In addition, the size of the first electronic unit EU1 may be less than or equal to the size of the first groove R1 but larger than the size of the second groove R2. Therefore, the first electronic unit EU1 may not be disposed in the second groove R2. In some embodiments, although not shown in the figure, the first groove R1 and the second groove R2 may have different shapes, where the shape of the first electronic unit EU1 may match that of the first groove R1 but not match that of the second groove R2, so that the first electronic unit EU1 is disposed in the first groove R1 but not in the second groove R2. For example, in the top view direction of the substrate SB, the first groove R1 and the first electronic unit EU1 may have a circular contour, while the second groove R2 may have a rectangular contour, but are not limited thereto. It should be noted that the shape or size of the first electronic unit EU1 described above can be determined by the shape or size design of the filling material layer FM of the encapsulated semiconductor element PU.

[0070] In some embodiments, the electronic device ED may include a sensing device. In this case, the first electronic unit EU1 (or the semiconductor element SU) may include any suitable sensing unit, such as a photodiode, but not limited thereto. In some embodiments, the electronic device ED may include a display device. In this case, the first electronic unit EU1 (or the semiconductor element SU) may be a light-emitting unit, such as including a light-emitting diode, but not limited thereto. The light-emitting diode may include, for example, an organic light-emitting diode (OLED), a quantum dot light-emitting diode (QLED), an inorganic light-emitting diode (LED), any other suitable light-emitting element, or a combination of the above. The inorganic light-emitting diode may include, for example, a mini light-emitting diode (mini LED) or a micro light-emitting diode (micro LED), but not limited thereto. In some embodiments, the chip size of the light-emitting diode is about 300 micrometers (μm) to 10 millimeters (mm), the chip size of the mini light-emitting diode (mini LED) is about 100 micrometers to 300 micrometers, and the chip size of the micro light-emitting diode (micro LED) is about 1 micrometer to 100 micrometers, but not limited thereto. In some embodiments, the electronic device ED may include a self-emitting display device. In this case, the electronic device ED may include a display medium layer, where the display medium layer may include a light-emitting diode, but not limited thereto. In some embodiments, the electronic device ED may include a non-self-emitting display device. In this case, the electronic device ED may include a display medium layer, where the display medium layer may include liquid crystal, but not limited thereto. Some examples of the transfer process of the first electronic unit EU1 of the present embodiment will be described below with the electronic device ED as a display device as an example.

[0071] In some embodiments, the first electronic unit EU1 may include light-emitting units that emit light of the same color or wavelength, such as blue light-emitting units, but not limited thereto. In this case, these first electronic units EU1 can be transferred onto the substrate SB and disposed in the first groove R1 through a fluid transfer process to form Figure 3The structure shown. Next, a light conversion layer can be provided on the substrate SB to convert the color or wavelength of the light emitted by the first electronic unit EU1. For example, the first electronic unit EU1 can be an optical unit that emits blue light, and by providing the light conversion layer, part of the light emitted by the first electronic unit EU1 can be converted into green light or red light, but not limited thereto. The light conversion layer can be provided corresponding to the first electronic unit EU1, or can be provided corresponding to the first groove R1 and / or the second groove R2. In some embodiments, after the light conversion layer is provided, each working area WR can include three first grooves R1. One of the three first grooves R1 corresponds to a light conversion layer that converts light into a red light wavelength, another corresponds to a light conversion layer that converts light into a green light wavelength, and the other does not correspond to a light conversion layer, so that the first electronic units EU1 in the three first grooves R1 can emit red light, green light, and blue light respectively, and can mix into white light. In this case, one working area WR can be regarded as a pixel, and the three first grooves R1 in the working area WR can be regarded as sub-pixels respectively, but not limited thereto. It should be noted that the above-described setting method and type of the light conversion layer are only exemplary, and the present invention is not limited thereto.

[0072] In some embodiments, the first electronic unit EU1 may include light-emitting units that emit light of different colors or wavelengths. For example, the first electronic unit EU1 may include a blue light-emitting unit, a green light-emitting unit, and a red light-emitting unit, where the blue light-emitting unit, the green light-emitting unit, and the red light-emitting unit may be regarded as a pixel together, but not limited thereto. In some embodiments, each working area WR may include three first grooves R1, and a blue light-emitting unit, a green light-emitting unit, and a red light-emitting unit may be respectively disposed in the three first grooves R1. In this case, the blue light-emitting unit, the green light-emitting unit, and the red light-emitting unit may be transferred into the first grooves R1 of the substrate SB through three fluid transfer processes respectively. In some embodiments, the three first grooves R1 in each working area WR may respectively have a first dimension, a second dimension, and a third dimension, where the first dimension may be greater than the second dimension, and the second dimension may be greater than the third dimension. In the transfer process of the first electronic unit EU1, the light-emitting unit with the largest size among the blue light-emitting unit, the green light-emitting unit, and the red light-emitting unit may be transferred first, where the size of this kind of light-emitting unit may be less than or equal to the first dimension and greater than the second dimension and the third dimension, so that this kind of light-emitting unit can enter the first groove R1 with the first dimension and cannot enter the first grooves R1 with the second dimension and the third dimension. Then, the light-emitting unit with the second largest size among the blue light-emitting unit, the green light-emitting unit, and the red light-emitting unit may be transferred first, where the size of this kind of light-emitting unit may be less than or equal to the second dimension and greater than the third dimension, so that this kind of light-emitting unit can enter the first groove R1 with the second dimension and cannot enter the first groove R1 with the third dimension. After that, the light-emitting unit with the smallest size among the blue light-emitting unit, the green light-emitting unit, and the red light-emitting unit may be transferred again, where the size of this kind of light-emitting unit may be less than or equal to the third dimension, so that this kind of light-emitting unit can enter the first groove R1 with the third dimension. Through the above design, the blue light-emitting unit, the green light-emitting unit, and the red light-emitting unit can be disposed in the first grooves R1 through several fluid transfer processes, and a blue light-emitting unit, a green light-emitting unit, and a red light-emitting unit may be respectively disposed in the three first grooves R1 in each working area WR. It should be noted that the design of the first groove R1 is not limited to the above. In some embodiments, the three first grooves R1 in each working area WR may respectively have different shapes, and the blue light-emitting unit, the green light-emitting unit, and the red light-emitting unit may respectively have shapes matching one, another, and yet another of the three first grooves R1, so that light-emitting units of different colors can be disposed in the first grooves R1 corresponding to their shapes. It should be noted that the above fluid transfer process of the first electronic unit EU1 can be applied to any suitable embodiment where the first electronic unit EU1 includes different types of electronic components.

[0073] It should be noted that, depending on the design or use of the electronic device ED, the working area WR may include any number of first grooves R1 and second grooves R2, and the first grooves R1 and the second grooves R2 may be arranged in any suitable manner.

[0074] After the first electronic unit EU1 is transferred into the first groove R1 through a fluid transfer process, step S106 can then be performed to identify a defective working area from among the plurality of working areas. Specifically, a detection step can be performed on the first electronic unit EU1 in the first groove R1 to find defective first electronic units or first grooves R1 without the first electronic unit EU1 provided therein. When there are defective first electronic units or no first electronic unit EU1 is provided in the first groove R1 in a working area WR, that working area WR can be defined as a defective working area. In other words, at least one of the first grooves R1 in the defective working area does not have any first electronic unit provided therein or has defective first electronic units provided therein. The detection step of the first electronic unit EU1 can be performed in any suitable manner, such as by optical inspection through photoluminescence or electroluminescence, but is not limited thereto. Figure 6 Top view schematic diagram of a substrate and electronic units after the repair process according to the first embodiment of the present invention. For example, as Figure 6 shown, after the detection step of the first electronic unit EU1, four defective first electronic units DEU1 can be detected, and the working areas WR where the four defective first electronic units DEU1 are located are identified and defined as defective working areas DWR. Although Figure 6 not shown, in some embodiments, when at least one of the first grooves R1 in a working area WR is vacant, that working area WR is also regarded as a defective working area DWR.

[0075] After the defective working area DWR is identified, step S108 can then be performed to dispose at least one repair electronic unit in at least one of the at least one second groove in the defective working area by laser transfer. Specifically, as Figure 6 shown, after the defective working area DWR is identified, the repair electronic unit REU can be transferred into at least one of the second grooves R2 of those defective working areas DWR through a laser transfer process. In this embodiment, the second groove R2 in each working area WR can be respectively disposed adjacent to a first groove R1, but is not limited thereto. In this case, when disposing the repair electronic unit REU, the repair electronic unit REU can be disposed in the second groove R2 adjacent to the first groove R1 where the defective first electronic unit DEU1 is disposed, but is not limited thereto. For example, as Figure 6As shown, in a defective working area DWR, when the defective first electronic unit DEU1 is disposed in the first groove R1 in the middle, the repair electronic unit REU can be disposed in the second groove R2 in the middle in the defective working area DWR. In some embodiments, the repair electronic unit REU can be disposed in the second groove R2 adjacent to the first groove R1 where the first electronic unit EU1 is not disposed. In some embodiments, when a defective working area DWR includes a plurality of first grooves R1 provided with defective first electronic units DEU1, repair electronic units REU can be respectively disposed in the second grooves R2 adjacent to these first grooves R1. It should be noted that the above description of the setting position of the repair electronic unit REU is only exemplary, and the present invention is not limited thereto. Optionally, when the defective first electronic unit DEU1 is disposed in the first groove R1, the electrical connection path between the defective first electronic unit DEU1 and the driving unit can be truncated before or after step S108. The method of truncating the electrical connection path can include laser cutting or other suitable methods, and the present invention is not limited thereto. In some embodiments, the repair electronic unit REU can include a packaged semiconductor element PU, that is, the semiconductor element SU can be first subjected to a packaging process and then a repair process. In some embodiments, the repair electronic unit REU can include a semiconductor element SU, that is, the semiconductor element SU does not need to be subjected to a packaging process before the repair process.

[0076] Several variant embodiments of transferring the repair electronic unit by the laser transfer method in this embodiment will be described in detail below.

[0077] Please refer to Figure 4 , Figure 4 is a schematic diagram of setting a repair electronic unit according to the first embodiment of the present invention. In some embodiments, the step of disposing the repair electronic unit REU in at least one second groove R2 in the defective working area by the laser transfer method may first include providing a first carrier plate CR1, where the first carrier plate CR1 may include a plurality of second electronic units EU2. Specifically, the first carrier plate CR1 may include a substrate BS1 and a first material layer ML1 disposed on the substrate BS1, and the second electronic units EU2 may be attached to the substrate BS1 through the first material layer ML1. In this embodiment, the second electronic units EU2 can be disposed on the first carrier plate CR1 with their bonding pads BP3 facing the first material layer ML1. The material of the substrate BS1 can refer to the material of the above substrate BS, but is not limited thereto. The first material layer ML1 may include any suitable material that can react with laser light, such as an organic material that can react with laser light, but is not limited thereto. The above "the first material layer ML1 can react with laser light" may include situations where the first material layer ML1 is vaporized, peeled off from the substrate BS1, disappears, or generates gas after being irradiated by laser light, but is not limited thereto.

[0078] Next, at least one of the plurality of second electronic units EU2 can be irradiated with a laser LB, causing the second electronic unit EU2 to be transferred from the first carrier plate CR1 to a second carrier plate CR2. The second carrier plate CR2 may include a substrate BS2 and a second material layer ML2 disposed on the substrate BS2. The material of the substrate BS2 may refer to the material of the substrate BS described above, but is not limited thereto. The second material layer ML2 may include any suitable material that has temporary adhesiveness to the second electronic unit EU2. For example, the second material layer ML2 may include silicone, acrylic, resin, photo resin, or other suitable materials. Specifically, the first carrier plate CR1 can be positioned on the second carrier plate CR2, where the first material layer ML1 of the first carrier plate CR1 and the second material layer ML2 of the second carrier plate CR2 can face each other. Next, a part of the second electronic unit EU2 can be irradiated with a laser LB, where a part of the first material layer ML1 of the second electronic unit EU2 corresponding to this part can react with the laser LB and disappear, vaporize, or generate gas, such that this part of the second electronic unit EU2 can be detached from the first carrier plate CR1 and fall onto the second carrier plate CR2. Thus, the second electronic unit EU2 can be attached to the substrate BS2 through the second material layer ML2, or in other words, transferred to the second carrier plate CR2. In this case, the bonding pads BP3 of the second electronic unit EU2 can face upward, or in other words, the bonding pads BP3 can be away from the second material layer ML2. In this embodiment, when transferring the second electronic unit EU2 from the first carrier plate CR1 to the second carrier plate CR2, there may be a distance T1 between the substrate BS1 of the first carrier plate CR1 and the substrate BS2 of the second carrier plate CR2. According to this embodiment, the range of the distance T1 can be from 1 micrometer (μm) to 200 micrometers, but is not limited thereto. By making the distance T1 within the above range, the possibility of damage to the second electronic unit EU2 during the manufacturing process can be reduced.

[0079] After transferring a part of the second electronic unit EU2 to the second carrier CR2, the part of the second electronic unit EU2 can be transferred from the second carrier CR2 to at least one second groove R2 in the defective working area DWR of the substrate SB. Specifically, the second carrier CR2 can be positioned on the substrate SB, where the second electronic unit EU2 on the second carrier CR2 can correspond to the second groove R2 where the repair electronic unit REU is expected to be set. The second carrier CR2 can be placed with the second material layer ML2 facing the substrate SB, such that the bonding pads BP3 of the second electronic unit EU2 can face the second groove R2. Then, the second carrier CR2 can be moved towards the substrate SB, thereby making the bonding pads BP3 of the second electronic unit EU2 contact the bonding pads BP4 of the circuit layer CL of the substrate SB, and further electrically connecting the second electronic unit EU2 to the circuit layer CL. The bonding pads BP4 in the circuit layer CL can be set corresponding to the second groove R2 and can be exposed by the second groove R2. In this embodiment, the bonding pads BP3 and BP4 can be bonded to each other by any suitable process, such as eutectic bonding, conductive film bonding, metal-metal bonding, conductive paste bonding, or other suitable processes. After bonding the bonding pads BP3 and BP4, the second carrier CR2 can be removed, and the second electronic unit EU2 transferred to the second groove R2 can serve as the repair electronic unit REU. Thus, the process of transferring the repair electronic unit REU can be completed.

[0080] In this embodiment, when transferring the second electronic unit EU2 from the first carrier CR1 to the second carrier CR2, the irradiation position of the laser LB on the first carrier CR1, or rather, the second electronic unit EU2 irradiated by the laser LB, can be determined according to the position of the first groove R1 where the defective first electronic unit DEU1 is set or the first groove R1 where the first electronic unit EU1 is not set. Specifically, the position of the first groove R1 where the defective first electronic unit DEU1 is set or is vacant in the defective working area DWR can be confirmed first, and based on this, the position of the second groove R2 where the repair electronic unit REU is expected to be set can be confirmed. Then, the part of the second electronic unit EU2 irradiated by the laser LB can be determined according to the positions of these second grooves R2. Through the above design, the second electronic unit EU2 on the second carrier CR2 can correspond to the position of the second groove R2 where the repair electronic unit REU is expected to be set, and thus the transfer process of the repair electronic unit REU can be completed in one go.

[0081] Please refer to Figure 5 , Figure 5Schematic diagram of setting a repair electronic unit according to a variant embodiment of the first embodiment of the present invention. In some embodiments, the step of setting the repair electronic unit REU in at least one second groove R2 of the defective working area by laser transfer may first include providing a carrier plate CR3, where the carrier plate CR3 may include a plurality of second electronic units EU2. The carrier plate CR3 may include a substrate BS3 and a third material layer ML3 disposed on the substrate BS3, where the second electronic units EU2 may be attached to the substrate BS3 through the third material layer ML3. In this embodiment, the second electronic units EU2 may be set on the carrier plate CR3 in such a way that their bonding pads BP3 are away from the third material layer ML3. The material of the substrate BS3 may refer to the material of the above-mentioned substrate BS, but is not limited thereto. The third material layer ML3 may include any suitable material that can react with laser light. The material of the third material layer ML3 may, for example, refer to the material of the above-mentioned first material layer ML1, but is not limited thereto.

[0082] Next, a part of the second electronic unit EU2 can be irradiated with a laser LB, so that this part of the second electronic unit EU2 is transferred from the carrier plate CR3 to at least one of the second grooves R2 of the defective working area DWR of the substrate SB. Specifically, the carrier plate CR3 can be placed on the substrate SB, where the third material layer ML3 of the carrier plate CR3 can face the substrate SB, so that the bonding pads BP3 of the second electronic units EU2 can face the second grooves R2. Next, a part of the second electronic unit EU2 corresponding to the second groove R2 where the repair electronic unit REU is expected to be set can be irradiated with a laser LB. A part of the third material layer ML3 of the second electronic unit EU2 corresponding to this part can react with the laser LB and disappear, vaporize or generate gas, so that this part of the second electronic unit EU2 can be detached from the carrier plate CR3 and fall into the second groove R2 where the repair electronic unit REU is expected to be set, and the bonding pads BP3 of the second electronic units EU2 can contact the bonding pads BP4, thereby electrically connecting the second electronic units EU2 to the circuit layer CL. In this embodiment, the bonding pads BP3 and the bonding pads BP4 can be joined to each other through any suitable process, such as eutectic bonding, conductive film bonding, metal bonding, conductive paste bonding or other suitable processes. The second electronic unit EU2 transferred to the second groove R2 can be used as the repair electronic unit REU. In this way, the process of transferring the repair electronic unit REU can be completed. According to this embodiment, the position of the second groove R2 where the repair electronic unit REU is expected to be set can be confirmed first, and then, the part of the second electronic unit EU2 irradiated by the laser LB or the irradiation position of the laser LB on the carrier plate CR3 can be determined according to the positions of these second grooves R2.

[0083] According to this embodiment, the manufacturing method of the electronic device ED may first include transferring a first electronic unit onto the substrate SB through a fluid transfer process. In this way, the randomness of the distribution of the first electronic unit can be improved or the situation where the first electronic unit is wasted can be reduced. For example, in some embodiments, when the electronic device ED includes a display device, transferring the first electronic unit EU1 using a fluid transfer process can reduce the uneven brightness distribution of the electronic device ED. In addition, using a fluid transfer process can increase the proportion of the transferred first electronic unit EU1, thereby reducing the production cost. In addition, after transferring the first electronic unit EU1, the manufacturing method of the electronic device ED in this embodiment may further include transferring a repair electronic unit through a laser transfer process. Through the above processes, the yield of the electronic device ED can be improved.

[0084] After performing the above steps, the electronic device ED can be formed. In other words, the electronic device ED in this embodiment can be formed by sequentially performing the manufacturing method M300 and the manufacturing method M100. It should be noted that the components and / or film layers included in the electronic device ED are not limited to the above, but may include other suitable components and / or film layers according to the type of the electronic device ED. In addition, other steps can be inserted between any steps in the manufacturing method M100 according to requirements. Furthermore, the order of any steps in the manufacturing method M100 can be adjusted or deleted according to requirements.

[0085] The manufacturing method of the electronic device according to another embodiment of the present invention will be described in detail below.

[0086] Please refer to Figure 7 and Figures 9 to 13 , Figure 7 which is a schematic flow chart of the manufacturing method of the electronic device according to the second embodiment of the present invention, and Figures 9 to 13 shows a schematic diagram of the manufacturing method of the electronic device in this embodiment. Specifically, Figures 9 to 13 shows the transfer process of packaging the semiconductor element PU. According to this embodiment, the manufacturing method M200 of the electronic device ED may include the following steps:

[0087] S202: Provide a first substrate, where the first substrate includes a plurality of electronic units;

[0088] S204: Provide a second substrate, where the second substrate includes a plurality of grooves, and there is a first spacing between the plurality of grooves;

[0089] S206: Transfer a plurality of electronic units from the first substrate to the plurality of grooves of the second substrate in a fluid transfer manner;

[0090] S208: Provide a third substrate, where the third substrate includes a plurality of working areas, and there is a second spacing between the plurality of working areas; and

[0091] S210: Transfer at least a part of a plurality of electronic units from at least a part of a plurality of grooves of a second substrate to a plurality of working areas.

[0092] The content of each step of the manufacturing method M200 of the electronic device ED will be described in detail below.

[0093] Please refer to Figure 9 , Figure 9 which is a schematic diagram of the fluid transfer process of the second embodiment of the present invention. In this embodiment, the manufacturing method M200 of the electronic device ED may first include step S202 of providing a first substrate SB1, where the first substrate SB1 includes a plurality of electronic units EU. The first substrate SB1 may include any suitable substrate for carrying the electronic units EU, and the electronic units EU may be disposed on the first substrate SB1. The electronic units EU may be formed on the first substrate SB1, but not limited thereto. The first substrate SB1 may have any suitable shape. In this embodiment, the first substrate SB1 may be circular, but not limited thereto. For example, the first substrate SB1 of this embodiment may include a wafer, but not limited thereto. In some embodiments, the first substrate SB1 may be, for example, Figure 15 the carrier plate CR' shown in the figure, on which a plurality of electronic units EU (i.e., packaged semiconductor elements PU) are disposed.

[0094] Next, step S204 may be performed to provide a second substrate SB2, where the second substrate SB2 includes a plurality of grooves RS. The structural features of the second substrate SB2 may refer to the above-mentioned substrate SB, but not limited thereto. For example, the second substrate SB2 may include a base BS' and a retaining wall structure BK1 disposed on the base BS', where the base BS' may include a base and a circuit layer. In some embodiments, the base BS' may include a base but not include a circuit layer. The retaining wall structure BK1 may define the grooves RS, that is, the grooves RS may be surrounded by the retaining wall structure BK1. The second substrate SB2 may have any suitable shape. In this embodiment, the second substrate SB2 may be rectangular, but not limited thereto.

[0095] It should be noted that the above steps S202 and S204 may be performed in any order or may be performed simultaneously.

[0096] Next, step S206 can be performed to transfer multiple electronic units EU from the first substrate SB1 to multiple grooves RS of the second substrate SB2 in a fluid transfer manner. Specifically, the electronic units EU on the first substrate SB1 can be transferred to the second substrate SB2 through a fluid FL, where the electronic units EU can enter the multiple grooves RS of the second substrate SB2, thereby setting the electronic units EU in the grooves RS. In this embodiment, the electronic units EU can fill the grooves RS of the second substrate SB2, but this is not limiting. In this embodiment, the electronic units EU can be transferred from a substrate with one shape to a substrate with another shape. For example, they can be transferred from a circular substrate (the first substrate SB1) to a rectangular substrate (the second substrate SB2), but this is not limiting. The electronic units EU can include auxiliary elements AE, where the auxiliary elements AE can assist in orienting the bonding pads BP5 of the electronic units EU downward, or towards the second substrate SB2, during the transfer process of the electronic units EU. After the transfer process of the electronic units EU is completed, the auxiliary elements AE can be removed, as Figure 9 shown.

[0097] Please refer to Figure 8 , Figure 8 which shows a schematic diagram of transferring electronic units from the first substrate using an imprint transfer method. Specifically, if the imprint transfer method is used to transfer the electronic units EU on the first substrate SB1, due to the shape limitation of the imprint tool, a part of the electronic units EU on the first substrate SB1 may not be transferred by the imprint transfer method, resulting in some of the electronic units EU being wasted, thereby increasing the production cost. For example, Figure 8 shows a situation of transferring the electronic units EU using the imprint transfer method, where the imprint tool can pick up the electronic units EU within one area ST at a time and complete the transfer process of the electronic units EU through multiple pickups. After picking up the electronic units EU by the imprint tool, they can be transferred to the first groove R1 of the substrate SB. The details can be referred to above and will not be elaborated here. However, in this case, a part of the electronic units EU on the first substrate SB1 cannot be picked up by the imprint tool. For example, Figure 8 the electronic units EU in area A1 in cannot be transferred through the imprint transfer process. Thus, the electronic units EU in area A1 may be wasted and the production cost of the electronic device ED may increase.

[0098] In addition, in some embodiments, the electronic units EU disposed on different regions of the first substrate SB1 may be of the same type of electronic unit EU, but their specific characteristics may vary. The above-mentioned characteristic differences may be caused, for example, by the manufacturing process of the electronic unit EU, but are not limited thereto. Specifically, the electronic unit EU may include electronic unit EUA, electronic unit EUB, and electronic unit EUC, which are disposed on different regions of the first substrate SB1, where the electronic unit EUA, electronic unit EUB, and electronic unit EUC may be of the same type of electronic unit, but their specific characteristics may vary. For example, in some embodiments, the electronic unit EU may include a light-emitting unit, and the electronic unit EUA, electronic unit EUB, and electronic unit EUC may be light-emitting units of the same color, but the wavelengths of the light emitted by the electronic unit EUA, electronic unit EUB, and electronic unit EUC may vary. In this case, using an imprint transfer method to transfer the electronic unit EU may result in insufficient randomness in the distribution of the electronic unit EUA, electronic unit EUB, and electronic unit EUC with different specific characteristics, thereby affecting the performance of the electronic device ED. For example, as Figure 8 shown, after transferring the electronic unit EU to the substrate SB using an imprint transfer method, the electronic unit EUA, electronic unit EUB, and electronic unit EUC are not randomly arranged on the substrate SB. In this case, when the electronic device ED includes a display device, the electronic device ED may exhibit uneven brightness distribution, thereby affecting the display effect of the electronic device ED.

[0099] Return reference Figure 9 . On the other hand, according to the present embodiment, since the electronic unit EU on the first substrate SB1 can be transferred to the second substrate SB2 through a fluid transfer process, the electronic unit EU can move into the groove RS substantially through the fluid FL. Thus, the situation of waste of the electronic unit EU can be reduced. In other words, in the present embodiment, the electronic unit EU on a substrate with an arbitrary shape can be transferred to another substrate, and at the same time, the situation of waste of the electronic unit EU can be reduced. In addition, after transferring the electronic unit EU into the groove RS through the fluid FL, the electronic units EU (e.g., the above-mentioned electronic unit EUA, electronic unit EUB, and electronic unit EUC) on different regions of the first substrate SB1 can be randomly arranged on the second substrate SB2, or can be randomly disposed in the groove RS. Thus, when the electronic unit EU is subsequently transferred to the third substrate SB3, the electronic unit EUA, electronic unit EUB, and electronic unit EUC can be randomly distributed on the third substrate SB3 (as Figure 13 shown), thereby reducing the influence of the characteristic differences of the electronic unit EUA, electronic unit EUB, and electronic unit EUC on the performance of the electronic device ED. For example, when the electronic device ED includes a display device, the above design can improve the brightness uniformity of the electronic device ED.

[0100] Please refer to Figure 18 , Figure 18 It is a schematic diagram of a fluid transfer process of a variation of the second embodiment of the present invention. In this variation, the shape of the retaining wall structure BK1 can be determined according to the shape of the electronic unit EU. Specifically, as described above, the electronic unit EU may include a packaged semiconductor element PU, wherein the third surface SR3 of the filling material layer FM (not shown) of the packaged semiconductor element PU and the side wall SW1 may have an angle θ1. In this case, the retaining wall structure BK1 may have a surface SR5 away from the second substrate SB2 and a side wall SW2, and in the cross-sectional view of the retaining wall structure BK1, the surface SR5 of the retaining wall structure BK1 and the side wall SW2 may have an angle θ2, wherein the angle θ2 may be substantially the same as the angle θ1, but is not limited thereto. The range of the angle θ2 may refer to the range of the above-mentioned angle θ1. Through the shape design of the above-mentioned retaining wall structure BK1, the possibility of the electronic unit EU flipping during the transfer process can be reduced, thereby improving the process yield.

[0101] After the electronic unit EU is moved into the groove RS of the second substrate SB2, step S208 may be performed to provide a third substrate SB3, wherein the third substrate SB3 includes a plurality of working areas WR. The structural features of the third substrate SB3 may refer to the structural description of the above-mentioned substrate SB. Figures 10 to 12 As shown, the third substrate SB3 may include a base BS4, a circuit layer CL1 disposed on the base BS4, and a retaining wall structure BK2 disposed on the circuit layer CL1, wherein the retaining wall structure BK2 may define at least one first groove R1 and at least one second groove R2 (eg, Figure 13 The structural features of the substrate BS4, the circuit layer CL1 and the retaining wall structure BK2 can refer to the above-mentioned substrate BS, circuit layer CL and retaining wall structure BK respectively. Figure 13 As shown, the third substrate SB3 may include a plurality of working areas WR, wherein the working areas WR may be arranged in a matrix, but not limited thereto. Each working area WR of the third substrate SB3 may include at least one first groove R1 and at least one second groove R2, but not limited thereto.

[0102] Next, step S210 may be performed to transfer a portion of the plurality of electronic units EU from a portion of the plurality of grooves RS of the second substrate SB2 to a plurality of working regions WR. Specifically, a portion of the electronic units EU in the groove RS of the second substrate SB2 may be transferred to the first groove R1 in the working region WR of the third substrate SB3, so that the electronic units EU are disposed in the first groove R1. Several variations of the method of transferring the electronic units EU from the second substrate SB2 to the third substrate SB3 of this embodiment will be described in detail below.

[0103] Please refer to Figure 10 , Figure 10 which is a schematic diagram of transferring an electronic unit from a second substrate to a third substrate according to a second embodiment of the present invention. In some embodiments, the method of transferring an electronic unit EU from a second substrate SB2 to a third substrate SB3 may first include providing a carrier CR, where the carrier CR may include a substrate BS5 and a fourth material layer ML4 disposed on the substrate BS5. The material of the substrate BS5 may refer to the material of the above-mentioned substrate BS, but is not limited thereto. The fourth material layer ML4 may include any suitable material that can react with a laser. The material of the fourth material layer ML4 may, for example, refer to the material of the above-mentioned first material layer ML1, but is not limited thereto.

[0104] Next, a plurality of electronic units EU may be transferred from the recess RS to the carrier CR. Specifically, the carrier CR may be moved toward the second substrate SB2, and the fourth material layer ML4 of the carrier CR may be brought into contact with the electronic unit EU disposed in the recess RS (e.g., contacting the surface SR of the electronic unit EU opposite to the bonding pad BP5). In this way, the electronic unit EU may be attached to the substrate BS5 through the fourth material layer ML4, thereby transferring the electronic unit EU in the recess RS to the carrier CR. In this case, the bonding pad BP5 of the electronic unit EU may be on the side of the electronic unit EU opposite to the fourth material layer ML4.

[0105] Next, a part of the plurality of electronic units EU may be irradiated with a laser LB, so that the part of the electronic units EU is transferred from the carrier CR to the third substrate SB3, or rather to the working area WR of the third substrate SB3. Specifically, a part of the electronic units EU may be irradiated with a laser LB, and a part of the fourth material layer ML4 corresponding to the part of the electronic units EU may react with the laser LB and disappear, vaporize, or generate gas, such that the part of the electronic units EU may be detached from the carrier CR. In this embodiment, the part of the electronic units EU irradiated with the laser LB may correspond to the recess (i.e., the first recess R1) of the third substrate SB3, so that after the part of the electronic units EU is detached from the carrier CR, it may enter the first recess R1 in the third substrate SB3, thereby being disposed in the first recess R1 in the working area WR of the third substrate SB3. In this case, the bonding pad BP5 of the electronic unit EU facing the third substrate SB3 may contact the bonding pad BP6 exposed by the first recess R1 in the circuit layer CL1 of the third substrate SB3, thereby electrically connecting the electronic unit EU to the circuit layer CL1. After the electronic unit EU is transferred to the third substrate SB3, an electronic device ED may be formed. It should be noted that the electronic device ED may also include other suitable components and / or film layers, not limited to Figure 10 as shown.

[0106] Please refer to Figure 11 , Figure 11Schematic diagram of transferring an electronic unit from a second substrate to a third substrate, which is a variant embodiment of the second embodiment of the present invention. In some embodiments, the method of transferring an electronic unit EU from a second substrate SB2 to a third substrate SB3 may first include picking up a part of the electronic unit EU from a part of a recess RS. For example, a transfer head TH may be used to pick up a part of the electronic unit EU from a part of the recess RS of the second substrate SB2. Specifically, the transfer head TH may include a plurality of protrusion structures PP, where the protrusion structures PP may correspond to the electronic unit EU to be picked up. Then, the transfer head TH may be moved towards the second substrate SB2, and each protrusion structure PP may contact the surface SR of its corresponding electronic unit EU, thereby picking up its corresponding electronic unit EU. The pitch of the protrusion structures PP may be determined according to the pitch of the first recess R1 of the third substrate SB3, but is not limited thereto. In addition, Figure 11 The structural design of the transfer head TH shown and the method of picking up the electronic unit EU are only exemplary, and the present invention is not limited thereto.

[0107] Next, a part of the electronic unit EU picked up by the transfer head TH may be transferred to the third substrate SB3, or rather, to the working area WR of the third substrate SB3. Specifically, the protruding structures PP of the transfer head TH may first be made to correspond to the first recess R1 of the third substrate SB3, and then the transfer head TH may be moved towards the third substrate SB3, so that the electronic unit EU enters the first recess R1, and thus the electronic unit EU is disposed in the first recess R1 in the working area WR of the third substrate SB3. In this case, the bonding pad BP5 of the electronic unit EU facing the third substrate SB3 may contact the bonding pad BP6 of the circuit layer CL1 of the third substrate SB3, thereby electrically connecting the electronic unit EU to the circuit layer CL1. After the electronic unit EL is transferred to the third substrate SB3, an electronic device ED may be formed. It should be noted that the electronic device ED may further include other suitable components and / or film layers, not limited to Figure 11 as shown.

[0108] It should be noted that after the electronic unit EU is transferred to the working area WR of the third substrate SB3, a detection step and / or a step of setting and repairing the electronic unit may be selectively performed on the electronic unit EU. The details may refer to the content of the first embodiment above, so they will not be elaborated here.

[0109] Please refer to Figures 10 to 12 , Figure 12 which is a cross-sectional schematic diagram of the electronic device according to the second embodiment of the present invention. Specifically, Figure 10 and Figure 11 the electronic device ED shown may be Figure 13 a cross-sectional schematic diagram of the electronic device ED shown along the tangent A-A', and Figure 12The electronic device ED shown may be Figure 13 A schematic cross-sectional view of the electronic device ED shown along the tangent B-B'. According to this embodiment, as described above, when transferring the electronic unit EU from the second substrate SB2 to the third substrate SB3 to form the electronic device ED, only a part of the electronic unit EU on the second substrate SB2 may be transferred, but it is not limited thereto. In other words, the electronic unit EU in the electronic device ED may be a part of the electronic unit EU on the second substrate SB2. In this case, the electronic unit EU on the second substrate SB2 may be used in multiple transfer processes or, in other words, a single second substrate SB2 may be used to form multiple electronic devices ED. Specifically, the electronic unit EU on the first substrate SB1 may first be transferred to the second substrate SB2 through a fluid transfer process and may be arranged on the second substrate SB 2. Then a part of the electronic unit EU on the second substrate SB2 (e.g., through a laser transfer process or an imprint transfer process, but not limited thereto) may be transferred to the working area WR of the third substrate SB3. In some embodiments in the second substrate SB2, there may be a spacing between the transferred parts of the electronic unit EU, where the spacing may be determined according to the spacing of the first grooves R1 of the third substrate SB3 but is not limited thereto. In this case, the spacing of the grooves RS of the second substrate SB2 may be smaller than the spacing of the working area WR of the third substrate SB3. For example, Figure 10 and Figure 12 as shown, there may be a first spacing P1 between the grooves RS of the second substrate SB2, and there may be a second spacing P1 between the working areas WR of the third substrate SB3, where the second spacing P1 is greater than the first spacing P1. In the cross-sectional view of the second substrate SB2, the first spacing P1 may be defined as the distance between the same-side edges of two adjacent grooves RS. For example the first spacing P1 may be the distance between the left-side edges of two adjacent grooves RS, but is not limited thereto. In the cross-sectional view of the third substrate SB3 the second spacing P2 may be defined as the distance between the same-side edges of two adjacent working areas WR. For example, the second spacing P2 may be the distance between the left-side edges of two adjacent working areas WR, but is not limited thereto. In this embodiment the first spacing P1 may be the spacing between two adjacent grooves RS in the arrangement direction of the grooves RS and the second spacing P2 may be the spacing between two adjacent working areas WR in the same direction. For example, the first spacing P1 may be the spacing between two adjacent grooves RS in the direction X and the second spacing P2 may be the spacing between two adjacent working areas WR in the direction X, but is not limited thereto. In some embodiments the first spacing P1 may be the spacing between two adjacent grooves RS in the direction Y and the second spacing P2 may be the spacing between two adjacent working areas WR in the direction Y. In some embodiments the second spacing P2 may be an integer multiple of the first spacing P1 (i.e., P2 = n*P1, where n is a positive integer).

[0110] In some embodiments, as Figure 12 shown, each working area WR may include a plurality of sub-working areas SWR, where one sub-working area SWR may, for example, include a first groove R1 and / or a second groove R2 adjacent to the first groove R1. When the electronic device ED includes a display device, one sub-working area SWR may be regarded as a sub-pixel, but not limited thereto. In this case, there may be a third pitch P3 between the sub-working areas SWR in one working area WR. In a cross-sectional view of the third substrate SB3, the third pitch P3 may be defined as the distance between the same-side edges of two adjacent sub-working areas SWR. For example, the third pitch P3 may be the distance between the left-side edges of two adjacent sub-working areas SWR, but not limited thereto. The third pitch P3 may be defined in the same direction as the first pitch P1 and the second pitch P2. For example, the first pitch P1 may be the pitch between two adjacent grooves RS in the X direction, and the third pitch P3 may be the pitch between two adjacent sub-working areas SWR in the X direction. According to this embodiment, the third pitch P3 is greater than the first pitch P1. In addition, in some embodiments, the third pitch P3 may be an integer multiple of the first pitch P1 (i.e., P3 = n*P1, where n is a positive integer).

[0111] It should be noted that the electronic unit EU of the electronic device ED in this embodiment may be transferred to the third substrate SB3 through one or more transfer processes, and the present invention is not limited thereto. In some embodiments, the electronic unit EU may be transferred to the third substrate SB3 through one transfer process. In some embodiments, the electronic unit EU may include different types of electronic components (for example, the above-mentioned light-emitting units of different colors, but not limited thereto), and the electronic unit EU may be transferred to the third substrate SB3 through multiple transfer processes, so that different types of electronic components can be respectively transferred into their corresponding first grooves R1. Through the design of the above first pitch P1, second pitch P2, and third pitch P3, it is helpful to use a single second substrate SB2 for multiple transfer processes to form a plurality of electronic devices ED under various transfer processes of the electronic unit EU, thereby simplifying the process of the electronic device ED or reducing the production cost of the electronic device ED.

[0112] Please refer to Figure 19 , Figure 19 which is a schematic diagram of applying the electronic device of the present invention to a vehicle display. Specifically, as Figure 19 shown, the electronic device ED can be applied in a vehicle VH as a vehicle display. Specifically, the light emitted by the electronic device ED can be reflected by the windshield WH and enter the eyes of the user UR, and then be observed by the user. Figure 19 The electronic device ED shown in Figure 6The electronic device ED shown or Figure 13 The electronic device ED shown. According to this embodiment, since the electronic unit EU (not shown in the figure) in the electronic device ED includes a light-emitting diode element with a vertical embedded flip-chip structure or a vertical embedded chip structure, which has the advantages of high brightness, low power consumption, high contrast, wide viewing angle, etc., when the electronic device ED is used as a vehicle display, the driver can more quickly understand the information displayed by the electronic device ED through the windshield WH, thereby reducing the possibility of driving risks caused by the driver's line of sight transfer.

[0113] In summary, the present invention provides a manufacturing method of an electronic device, which includes transferring an electronic unit using a fluid transfer method and performing a repair process of the electronic unit using a laser transfer method. Therefore, the situation of waste of the electronic unit can be reduced, or the yield of the electronic device can be improved. In addition, the present invention also provides a manufacturing method of an electronic device, which includes transferring an electronic unit to a substrate using a fluid transfer method and then transferring a part of the electronic unit on the substrate to another substrate. Therefore, the situation of waste of the electronic unit can be reduced, or the manufacturing process of the electronic device can be simplified or the production cost of the electronic device can be reduced. Furthermore, the manufacturing method of the electronic device of the present invention further includes performing a packaging process on a semiconductor element before the fluid transfer process to form a packaged semiconductor element, which is beneficial to bonding the packaged semiconductor element on a target substrate during the fluid transfer process in the case where the semiconductor element includes a vertical embedded flip-chip structure or a vertical embedded chip structure.

[0114] The above are only the embodiments of the present invention and are not intended to limit the present invention. For those of ordinary skill in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A manufacturing method of an electronic device, characterized in that, Comprising: Providing a plurality of semiconductor elements; Performing a packaging process on the plurality of semiconductor elements to form a plurality of packaged semiconductor elements, the packaging process comprising: Respectively disposing a plurality of filler material layers on sidewalls of each of the plurality of semiconductor elements; Providing a substrate, the substrate comprising a plurality of working areas, each of the plurality of working areas respectively comprising at least one first groove; and Disposing the plurality of packaged semiconductor elements in the at least one first groove of the plurality of working areas in a fluid transfer manner.

2. The manufacturing method according to claim 1, characterized in that, Each of the plurality of working areas further comprises at least one second groove.

3. The manufacturing method according to claim 2, wherein Further comprising the following steps: Identifying a defective working area from the plurality of working areas, wherein at least one of the at least one first groove in the defective working area is not provided with any packaged semiconductor element or is provided with a defective packaged semiconductor element; And Disposing at least one repair packaged semiconductor element in at least one of the at least one second groove of the defective working area.

4. The manufacturing method according to claim 1, wherein, The packaging process further comprises: Disposing a first electrode on a first surface of each of the plurality of semiconductor elements; Disposing a conductive layer on sidewalls of each of the plurality of filler material layers; and Disposing a second electrode on a second surface of each of the plurality of semiconductor elements, wherein the second surface is opposite to the first surface.

5. The manufacturing method according to claim 4, characterized in that, In each of the plurality of packaged semiconductor elements, the conductive layer contacts the second electrode.

6. The manufacturing method according to claim 4, characterized in that, Each of the plurality of filler material layers comprises a third surface and a fourth surface opposite to the third surface, the third surface being adjacent to the first surface, the fourth surface being adjacent to the second surface, and the second electrode extending on the fourth surface.

7. The manufacturing method according to claim 6, characterized in that, The conductive layer extends on the third surface.

8. The manufacturing method according to claim 1, wherein In a top view direction of the electronic device, the plurality of packaged semiconductor elements have a circular profile.

9. A manufacturing method of an electronic device, characterized in that, Comprising the following steps: Providing a plurality of semiconductor elements; Performing a packaging process on the plurality of semiconductor elements to form a plurality of packaged semiconductor elements, the packaging process comprising: Respectively disposing a plurality of filler material layers on sidewalls of each of the plurality of semiconductor elements; Providing a first substrate, the first substrate comprising a plurality of grooves; Disposing the plurality of packaged semiconductor elements in the plurality of grooves of the first substrate in a fluid transfer manner; Providing a second substrate, the second substrate comprising a plurality of working areas; and Transferring at least a portion of the plurality of packaged semiconductor elements from at least a portion of the plurality of grooves of the first substrate to the plurality of working areas.

10. The manufacturing method according to claim 9, characterized in that, There is a first spacing between the plurality of grooves, there is a second spacing between the plurality of working areas, and the second spacing is greater than the first spacing.

11. The manufacturing method according to claim 9, characterized in that, The packaging process further comprises: Disposing a first electrode on a first surface of each of the plurality of semiconductor elements; Disposing a conductive layer on sidewalls of each of the plurality of filler material layers; and Disposing a second electrode on a second surface of each of the plurality of semiconductor elements, wherein the second surface is opposite to the first surface.

12. The manufacturing method according to claim 11, characterized in that, In each of the plurality of encapsulated semiconductor elements, the conductive layer contacts the second electrode.

Images