Method for reducing VCO coupling and electronic device supporting the same
The signal detection module recognizes the abnormality of the VCO output signal and adjusts the second VCO frequency, which solves the signal interference problem caused by VCO coupling, improves communication quality and efficiency, supports high-frequency band communication and realizes miniaturization of equipment.
Patent Information
- Application Number
- CN202380085426.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-01-13
- Filing Date
- 2023-12-12
- Publication Date
- 2025-07-18
AI Technical Summary
In electronic devices, as the frequency bands expand and components increase, coupling problems between VCOs lead to signal interference and performance degradation, especially in high-frequency band communications, affecting communication quality and efficiency.
The abnormality of the VCO output signal is identified by the signal detection module, and the RF circuit is controlled to change the operating frequency of the second VCO based on the recognition result, thereby reducing the coupling between the VCOs.
It effectively reduces the VCO coupling effect, prevents pseudo-signal and local oscillator leakage, improves the sensitivity and throughput of communication, supports communication in higher frequency bands, and further miniaturizes electronic devices.
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Figure CN120345189A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a method for reducing VCO coupling and an electronic device supporting the method. Background Art
[0002] With the development of mobile communication technology, multifunctional portable terminals have become very popular. To meet the growing demand for wireless traffic, people are vigorously researching and developing 5G communication systems. To achieve higher data transmission rates, 5G communication systems are implemented not only in the frequency bands used by 3G and Long-Term Evolution (LTE) communication systems, but also in ultra-high frequency bands.
[0003] For example, to mitigate path loss in the millimeter wave band and increase the propagation distance of radio waves, 5G communication systems consider adopting the following technologies: beamforming, massive multiple-input multiple-output (MIMO), full-dimensional MIMO (FD-MIMO), array antennas, analog beamforming, and massive antennas.
[0004] Wireless communication systems are constantly evolving to support higher data rates to meet the continuously growing demand for wireless data traffic. An electronic device can transmit and receive signals with 4G frequencies, 5G sub-6 frequencies, and 3 GHz to 5 GHz frequencies to enhance network access and data transmission rates.
[0005] The radio frequency front end (RFFE) and RF circuits of an electronic device can include more components to support carrier aggregation (CA) and E-UTRA New Radio Dual Connectivity (ENDC). Due to the increase in the size of the electronic device battery, the space for arranging RFFE and RF circuit components is gradually reduced. Summary of the Invention
[0006] Solution
[0007] According to an embodiment of the present disclosure, an electronic device may include an RF circuit and a communication processor operably connected to the RF circuit. The RF circuit of the electronic device may be configured to include at least one receiving circuit, at least one transmitting circuit, a first VCO, a second VCO, and a signal detection module electrically connected to the first VCO. The communication processor of the electronic device may be configured to control the RF circuit to change the operating frequency of the second VCO based on identifying whether a signal output by the first VCO is an abnormal signal.
[0008] According to an embodiment of the present disclosure, a method of operating an electronic device may include: detecting or identifying a signal output from a first VCO included in an RF circuit included in the electronic device through a signal detection module included in the RF circuit. The method of operating the electronic device may include: identifying whether the signal is an abnormal signal based on the intensity of the detected or identified signal (e.g., identifying the detected signal as normal or abnormal). The method of operating the electronic device may include: based on identifying that the detected or identified signal is an abnormal signal, controlling the RF circuit to change the operating frequency of a second VCO included in the RF circuit.
[0009] According to an embodiment of the present disclosure, in a non-transitory storage medium storing instructions, when these instructions are executed by at least one circuit of an electronic device, the electronic device may be caused to perform at least one operation. The at least one operation may include: identifying, through a signal detection module included in an RF circuit of the electronic device, a signal output from a first VCO in the RF circuit. The at least one operation may include: identifying whether the identified signal is an abnormal signal based on the intensity of the identified signal. The at least one operation may include: based on identifying that the identified signal is an abnormal signal, controlling the RF circuit to change the operating frequency of a second VCO included in the RF circuit.
[0010] Embodiments of the present disclosure are not limited thereto, and those skilled in the art will easily understand other purposes through the following detailed description in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 A block diagram of an electronic device in a network environment according to an embodiment of the present disclosure is shown; Figure 2a A block diagram of an electronic device supporting traditional network communication and 5G network communication according to an embodiment of the present disclosure is shown; Figure 2b A block diagram of an electronic device supporting traditional network communication and 5G network communication according to an embodiment of the present disclosure is shown; Figure 3 A block diagram of an electronic device according to an embodiment of the present disclosure is shown; Figure 4 A block diagram of an RFIC according to an embodiment of the present disclosure is shown; Figure 5 A schematic diagram of each component included in an RFIC according to an embodiment of the present disclosure is shown; Figure 6a 、 Figure 6b and Figure 6c A schematic diagram of an example of coupling between VCOs according to an embodiment of the present disclosure is shown; Figure 7Shows a block diagram of a signal detection module according to an embodiment of the present disclosure; Figure 8 Shows an operation flowchart for changing the operating frequency of a VCO of an electronic device according to an embodiment of the present disclosure; Figure 9 Shows an operation flowchart for an electronic device to change the operating frequency of a VCO based on the strength of a signal received through a receiving circuit according to an embodiment of the present disclosure; Figure 10 Shows an operation flowchart for an electronic device to change the operating frequency of a VCO based on an identification look-up table according to an embodiment of the present disclosure; Figure 11 Shows an operation flowchart for an electronic device to change a reference clock based on an identification look-up table according to an embodiment of the present disclosure. Detailed implementation
[0012] Figure 1 Shows a block diagram of an electronic device 101 in a network environment 100 according to an embodiment of the present disclosure.
[0013] Refer to Figure 1 , the electronic device 101 in the network environment 100 may communicate with at least one of an electronic device 102 through a first network 198 (e.g., a short-range wireless communication network), or an electronic device 104 or a server 108 through a second network 199 (e.g., a long-range wireless communication network). According to an embodiment, the electronic device 101 may communicate with the electronic device 104 through the server 108. According to an embodiment, the electronic device 101 may include a processor 120, a memory 130, an input module 150, a sound output module 155, a display module 160, an audio module 170, a sensor module 176, an interface 177, a connection terminal 178, a haptic module 179, a camera module 180, a power management module 188, a battery 189, a communication module 190, a subscriber identification module (SIM) 196, or an antenna module 197. In an embodiment, at least one component (e.g., the connection terminal 178) may be omitted from the electronic device 101, or one or more other components may be added to the electronic device 101. According to an embodiment, some components (e.g., the sensor module 176, the camera module 180, or the antenna module 197) may be integrated into a single component (e.g., the display module 160).
[0014] The processor 120 may execute, for example, software (e.g., program 140) to control at least one other component (e.g., a hardware or software component) of the electronic device 101 coupled to the processor 120, and may perform various data processing or computations. According to one embodiment, as at least a part of the data processing or computation, the processor 120 may store commands or data received from another component (e.g., the sensor module 176 or the communication module 190) in the volatile memory 132, process the commands or data stored in the volatile memory 132, and store the resulting data in the non-volatile memory 134. According to an embodiment, the processor 120 may include a main processor 121 (e.g., a central processing unit (CPU) or an application processor (AP)), or an auxiliary processor 123 (e.g., a graphics processing unit (GPU), a neural processing unit (NPU), an image signal processor (ISP), a sensor hub processor, or a communication processor (CP)), and the auxiliary processor 123 may operate independently of or in combination with the main processor 121. For example, when the electronic device 101 includes the main processor 121 and the auxiliary processor 123, the auxiliary processor 123 may be configured to consume less power than the main processor 121, or be used for a specific function. The auxiliary processor 123 may be implemented separately from the main processor 121, or as part of the main processor 121.
[0015] When the main processor 121 is in an inactive (e.g., sleep) state, the auxiliary processor 123 may control at least some functions or states related to at least one of the components of the electronic device 101 (e.g., the display module 160, the sensor module 176, or the communication module 190) instead of the main processor 121; or when the main processor 121 is in an active state (e.g., executing an application), the auxiliary processor 123 may control these functions or states together with the main processor 121. According to an embodiment, the auxiliary processor 123 (e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., the camera module 180 or the communication module 190) related to the function of the auxiliary processor 123. According to an embodiment, the auxiliary processor 123 (e.g., a neural processing unit) may include a hardware structure for artificial intelligence model processing. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, by the electronic device 101 that executes artificial intelligence, or by a separate server (e.g., the server 108). The learning algorithm may include, but is not limited to, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning. The artificial intelligence model may include multiple neural network layers. The neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q network, or a combination of two or more of them, but is not limited thereto. The artificial intelligence model may additionally or alternatively include a software structure in addition to the hardware structure.
[0016] The memory 130 may store various data used by at least one component of the electronic device 101 (e.g., the processor 120 or the sensor module 176). The various data may include, for example, software (e.g., the program 140) and input data or output data of commands related thereto. The memory 130 may include a volatile memory 132 or a non-volatile memory 134.
[0017] The program 140 may be stored in the memory 130 as software, and may include, for example, an operating system (OS) 142, middleware 144, or an application 146.
[0018] The input module 150 may receive commands or data to be used by other components of the electronic device 101 (e.g., the processor 120) from outside the electronic device 101 (e.g., a user). The input module 150 may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus).
[0019] The sound output module 155 may output a sound signal to the outside of the electronic device 101. The sound output module 155 may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as playing multimedia or playing a recording. The receiver may be used for receiving an incoming call. According to an embodiment, the receiver may be implemented separately from the speaker or as a part of the speaker.
[0020] The display module 160 may visually provide information to the outside of the electronic device 101 (e.g., to a user). The display 160 may include, for example, a display screen, a holographic device, or a projector, as well as a control circuit for controlling a corresponding one of the display screen, the holographic device, and the projector. According to an embodiment, the display 160 may include a touch sensor configured to detect a touch or a pressure sensor configured to measure the intensity of a force generated by the touch.
[0021] The audio module 170 may convert sound into an electrical signal and vice versa. According to an embodiment, the audio module 170 may obtain sound through the input module 150, or output sound through the sound output module 155 or through headphones of an external electronic device (e.g., electronic device 102) directly (e.g., wired) or wirelessly coupled to the electronic device 101.
[0022] The sensor module 176 may detect an operating state of the electronic device 101 (e.g., power or temperature) or an environmental state outside the electronic device 101 (e.g., a state of a user), and then generate an electrical signal or a data value corresponding to the detected state. According to an embodiment, the sensor module 176 may include, for example, a gesture sensor, a gyro sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.
[0023] The interface 177 may support one or more specified protocols for coupling the electronic device 101 directly (e.g., wired) or wirelessly to an external electronic device (e.g., electronic device 102). According to an embodiment, the interface 177 may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, or an audio interface.
[0024] The connection terminal 178 may include a connector through which the electronic device 101 may be physically connected to an external electronic device (e.g., electronic device 102). According to an embodiment, the connection terminal 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).
[0025] The haptic module 179 may convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus, which a user may perceive through touch or kinesthesia. According to an embodiment, the haptic module 179 may include, for example, a motor, a piezoelectric element, or an electrical stimulator.
[0026] The camera module 180 may capture a still image or a moving image. According to an embodiment, the camera module 180 may include one or more lenses, an image sensor, an image signal processor, or a flash.
[0027] The power management module 188 may manage the power provided to the electronic device 101. According to an embodiment, the power management module 188 may be implemented, for example, as at least a part of a power management integrated circuit (PMIC).
[0028] The battery 189 may supply power to at least one component of the electronic device 101. According to an embodiment, the battery 189 may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.
[0029] The communication module 190 may support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device 101 and an external electronic device (e.g., the electronic device 102, the electronic device 104, or the server 108), and communicate through the established communication channel. The communication module 190 may include one or more communication processors, which may operate independently of the processor 120 (e.g., an application processor (AP)) and support direct (e.g., wired) communication or wireless communication. According to an embodiment, the communication module 190 may include a wireless communication module 192 (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 194 (e.g., a local area network (LAN) communication module or a power line communication (PLC) module). A corresponding one of these communication modules may communicate with the external electronic device 104 through a first network 198 (e.g., a short-range communication network such as Bluetooth, Wi-Fi Direct, or Infrared Data Association (IrDA)) or a second network 199 (e.g., a long-range communication network such as a traditional cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a local area network (LAN) or a wide area network (WAN))). These different types of communication modules may be implemented as a single component (e.g., a single chip) or as multiple components separated from each other (e.g., multiple chips). The wireless communication module 192 may identify or authenticate the electronic device 101 in a communication network (such as the first network 198 or the second network 199) using user information (e.g., an International Mobile Subscriber Identity (IMSI)) stored in the user identification module 196.
[0030] The wireless communication module 192 may support 5G networks and next-generation communication technologies after 4G networks, such as New Radio (NR) access technology. The NR access technology may support enhanced mobile broadband (eMBB), massive machine type communication (mMTC), or ultra-reliable low-latency communication (URLLC). The wireless communication module 192 may support high frequency bands (such as millimeter wave bands) to achieve, for example, high data transfer rates. The wireless communication module 192 may support various technologies for ensuring performance in high frequency bands, such as beamforming, massive multiple-input multiple-output (massive MIMO), full-dimensional MIMO (FD-MIMO), array antennas, analog beamforming, or massive antennas. The wireless communication module 192 may support various requirements specified in the electronic device 101, an external electronic device (such as the electronic device 104), or a network system (such as the second network 199). According to an embodiment, the wireless communication module 192 may support a peak data rate (such as 20 Gbps or higher) for implementing eMBB, a loss coverage (such as 164 dB or lower) for implementing mMTC, or a user plane latency (such as 0.5 ms or lower for both downlink (DL) and uplink (UL), or 1 ms or lower for round trip) for implementing URLLC.
[0031] The antenna module 197 may transmit signals to the outside (such as an external electronic device) or receive signals from the outside. According to an embodiment, the antenna module 197 may include at least one antenna formed of a conductor or a conductive pattern formed on a substrate (such as a printed circuit board (PCB)). In an embodiment, the antenna module 197 may include a plurality of antennas (such as an antenna array). In this case, for example, the communication module 190 may select at least one antenna suitable for a communication scheme used in a communication network (such as the first network 198 or the second network 199) from among the plurality of antennas. Signals or power may then be transmitted or received between the communication module 190 and the external electronic device through the selected at least one antenna. According to an embodiment, other parts (such as a radio frequency integrated circuit (RFIC)) other than the radiator may be further formed as part of the antenna module 197.
[0032] According to an embodiment, the antenna module 197 may form a millimeter wave antenna module. According to an embodiment, the millimeter wave antenna module may include a printed circuit board, an RFIC disposed on the first surface (such as the bottom surface) of the printed circuit board or adjacent to the first surface and capable of supporting a specified high frequency band (such as a millimeter wave band), and a plurality of antennas (such as an array antenna) disposed on the second surface (such as the top surface or side surface) of the printed circuit board or adjacent to the second surface and capable of transmitting or receiving signals of the specified high frequency band.
[0033] At least some of the above components may be coupled to each other and transmit signals (such as commands or data) to each other through an inter-peripheral communication scheme (such as a bus, general-purpose input / output (GPIO), serial peripheral interface (SPI), or mobile industry processor interface (MIPI)).
[0034] According to an embodiment, instructions or data may be transmitted between the electronic device 101 and the external electronic device 104 through the server 108 coupled to the second network 199. Each of the external electronic devices 102 or 104 may be a device of the same or different type as the electronic device 101. According to an embodiment, all or part of the operations performed on the electronic device 101 may be performed on one or more of the external electronic devices 102, 104, or 108. For example, if the electronic device 101 needs to automatically perform a certain function or service, or perform the function or service in response to a request from a user or another device, the electronic device 101 may request one or more external electronic devices to perform at least a part of the function or service instead of performing it itself, or additionally request one or more external electronic devices to perform at least a part of the function or service in addition to performing it itself. One or more external electronic devices receiving the request may perform at least a part of the requested function or service, or perform additional functions or additional services related to the request, and send the execution result to the electronic device 101. The electronic device 101 may provide it as at least a part of the reply to the request with or without further processing of the result. For this purpose, technologies such as cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing may be used. The electronic device 101 may use, for example, distributed computing or mobile edge computing to provide ultra-low latency services. In another embodiment, the external electronic device 104 may include an Internet of Things (IoT) device. The server 108 may be an intelligent server using machine learning and / or neural networks. According to an embodiment, the external electronic device 104 or the server 108 may be included in the second network 199. The electronic device 101 may be applied to intelligent services (such as smart home, smart city, smart car, or healthcare) based on 5G communication technology or IoT-related technology.
[0035] Figure 2a An electronic device supporting traditional network communication and 5G network communication according to an embodiment of the present disclosure is shown. Figure 2b An electronic device supporting traditional network communication and 5G network communication according to another embodiment of the present disclosure is shown.
[0036] Refer to Figure 2a, the electronic device 101 may include a first communication processor 212, a second communication processor 214, a first radio frequency integrated circuit (RFIC) 222, a second RFIC 224, a third RFIC 226, a fourth RFIC 228, a first radio frequency front end (RFFE) 232, a second RFFE 234, a first antenna module 242, a second antenna module 244, a third antenna module 246, and an antenna 248. The electronic device 101 may further include a processor 120 and a memory 130. The second network 199 may include a first cellular network 292 and a second cellular network 294. According to an embodiment, the electronic device 101 may further include Figure 1 at least one of the components in, and the second network 199 may further include at least one other network. According to an embodiment, the first communication processor 212, the second communication processor 214, the first RFIC 222, the second RFIC 224, the fourth RFIC 228, the first RFFE 232, and the second RFFE 234 may form at least a part of the wireless communication module 192. According to another embodiment, the fourth RFIC 228 may be omitted or be part of the third RFIC 226.
[0037] The first communication processor 212 may establish a communication channel for a frequency band for wireless communication with the first cellular network 292, or may support legacy network communication through the established communication channel. According to an embodiment, the first cellular network may be a legacy network including a second generation (2G), third generation (3G), fourth generation (4G), or long term evolution (LTE) network. The second communication processor 214 may establish a communication channel for a designated frequency band (e.g., from about 6 GHz to about 60 GHz) in a frequency band for wireless communication with the second cellular network 294, or may support fifth generation (5G) network communication through the established communication channel. According to an embodiment, the second cellular network 294 may be a 5G network defined by the 3rd Generation Partnership Project (3GPP). Additionally, according to an embodiment, the first CP 212 or the second CP 214 may establish a communication channel for another designated frequency band (e.g., about 6 GHz or lower) in a frequency band for wireless communication with the second cellular network 294, or may support fifth generation (5G) network communication through the established communication channel.
[0038] The first communication processor 212 can transmit and receive data with the second communication processor 214. For example, data classified for transmission via the second cellular network 294 can be changed to be transmitted via the first cellular network 292. In this case, the first communication processor 212 can receive the transmission data from the second communication processor 214. For example, the first communication processor 212 and the second communication processor 214 can exchange packet data information and control information through an inter-processor interface 213. The inter-processor interface 213 can be implemented as, for example, a Universal Asynchronous Receiver / Transmitter (UART) (such as a High-Speed UART (HS-UART)) or a Peripheral Component Interconnect Express (PCIe) interface, but is not limited thereto. The first communication processor 212 and the second communication processor 214 can exchange packet data information and control information using, for example, shared memory. The first communication processor 212 and the second communication processor 214 can transmit and receive various types of information to and from each other, such as sensing information, information about output intensity, and resource block (RB) allocation information.
[0039] According to an implementation, the first communication processor 212 may not be directly connected to the second communication processor 214. In this case, the first communication processor 212 can transmit and receive data with the second communication processor 214 through a processor 120 (such as an application processor). For example, the first communication processor 212 and the second communication processor 214 can transmit and receive data with the processor 120 (such as an application processor) through an HS-UART interface or a PCIe interface, and the type of the interface is not limited thereto. The first communication processor 212 and the second communication processor 214 can use a shared memory to exchange control information and packet data information with the processor 120 (such as an application processor).
[0040] According to an embodiment, the first communication processor 212 and the second communication processor 214 can be implemented as a single chip or a single package. According to an embodiment, the first communication processor 212 or the second communication processor 214, together with the processor 120, the auxiliary processor 123, or the communication module 190, can be formed in a single chip or a single package. For example, as Figure 2b shown, the communication processor 440 can support all functions required for communicating with the first cellular network 292 and the second cellular network 294.
[0041] During transmission, the first RFIC 222 can convert the baseband signal generated by the first communication processor 212 into a radio frequency (RF) signal with a frequency range from approximately 700 MHz to approximately 3 GHz, which is used by the first cellular network 292 (e.g., a legacy network). During reception, the RF signal can be acquired from the first cellular network 292 (e.g., a legacy network) through an antenna (e.g., the first antenna module 242) and preprocessed through the RFFE (e.g., the first RFFE 232). The first RFIC 222 can convert the preprocessed RF signal into a baseband signal that the first communication processor 212 can process.
[0042] During transmission, the second RFIC 224 can convert the baseband signal generated by the first CP 212 or the second CP 214 into an RF signal in the Sub 6 band (e.g., approximately 6 GHz or lower) (hereinafter referred to as the "5G Sub 6 RF signal"), which is used by the second cellular network 294 (e.g., a 5G network). During reception, the 5G Sub 6 RF signal can be acquired from the second cellular network 294 (e.g., a 5G network) through an antenna (e.g., the second antenna module 244) and preprocessed through the RFFE (e.g., the second RFFE 234). The second RFIC 224 can convert the preprocessed 5G Sub6 RF signal into a baseband signal that the corresponding processor in the first communication processor 212 and the second communication processor 214 can process.
[0043] The third RFIC 226 can convert the baseband signal generated by the second CP 214 into an RF signal in the 5G Above 6 band (e.g., from approximately 6 GHz to approximately 60 GHz) (hereinafter referred to as the "5G Above 6 RF signal"), which is used by the second cellular network 294 (e.g., a 5G network). During reception, the 5G Above 6 RF signal can be acquired from the second cellular network 294 (e.g., a 5G network) through an antenna (e.g., antenna 248) and preprocessed through the third RFFE 236. The third RFIC 226 can convert the preprocessed 5G Above 6 RF signal into a baseband signal that the second communication processor 214 can process. According to an embodiment, the third RFFE 236 can be formed as part of the third RFIC 226.
[0044] According to an embodiment, the electronic device 101 may include the fourth RFIC 228 alone or as at least a part of the third RFIC 226. In this case, the fourth RFIC 228 may convert a baseband signal generated by the second communication processor 214 into an RF signal in an intermediate frequency band (e.g., from about 9 GHz to about 11 GHz) (hereinafter referred to as an “IF signal”) and transmit the IF signal to the third RFIC 226. The third RFIC 226 may convert the IF signal into a 5G Above 6 RF signal. In reception, the 5G Above 6 RF signal may be received from the second cellular network 294 (e.g., a 5G network) through an antenna (e.g., antenna 248) and converted into an IF signal by the third RFIC 226. The fourth RFIC 228 may convert the IF signal into a baseband signal that the second communication processor 214 can process.
[0045] According to an embodiment, the first RFIC 222 and the second RFIC 224 may be implemented as at least a part of a single chip or a single package. According to an embodiment, when Figure 2a the first RFIC 222 and the second RFIC 224 in FIG. 2a or 2b are implemented as a single chip or a single package, they may be implemented as an integrated RFIC. In this case, the integrated RFIC is connected to the first RFFE 232 and the second RFFE 234 to convert a baseband signal into a signal in a frequency band supported by the first RFFE 232 and / or the second RFFE 234 and may transmit the converted signal to one of the first RFFE 232 and the second RFFE 234. According to an embodiment, the first RFFE 232 and the second RFFE 234 may be implemented as at least a part of a single chip or a single package. According to an embodiment, at least one of the first antenna module 242 or the second antenna module 244 may be omitted or combined with the other antenna module to process multi-band RF signals.
[0046] According to an embodiment, the third RFIC 226 and the antenna 248 may be disposed on the same substrate to form the third antenna module 246. For example, the wireless communication module 192 or the processor 120 may be disposed on a first substrate (e.g., a main printed circuit board (PCB)). In this case, the third RFIC 226 and the antenna 248 may be respectively disposed on one area (e.g., the bottom) and another area (e.g., the top) of a second substrate (e.g., a sub-PCB), thereby forming the third antenna module 246, where the second substrate is provided separately from the first substrate. Placing the third RFIC 226 and the antenna 248 on the same substrate may shorten the transmission line length therebetween. This may reduce the loss (e.g., attenuation) of signals in the high frequency band (e.g., from about 6 GHz to about 60 GHz) for 5G network communication due to the transmission line. Accordingly, the electronic device 101 may improve the communication quality with the second cellular network 294 (e.g., a 5G network).
[0047] According to an embodiment, the antenna 248 may be formed as an antenna array including a plurality of antenna elements available for beamforming. In this case, the third RFIC 226 may include a plurality of phase shifters 238 corresponding to the plurality of antenna elements, as part of the third RFFE 236. During transmission, the plurality of phase shifters 238 may change the phase of the 5G Above 6 RF signals to be transmitted to the outside of the electronic device 101 (e.g., a 5G network base station) through their respective corresponding antenna elements. During reception, the plurality of phase shifters 238 may change the phase of the 5G Above 6 RF signals received from the outside through their respective corresponding antenna elements to the same or substantially the same phase. This enables the electronic device 101 to perform transmission or reception through beamforming with the outside.
[0048] The second cellular network 294 (e.g., a 5G network) may operate independently of the first cellular network 292 (e.g., a traditional network) (e.g., as a stand-alone network (SA)), or may operate in connection with the first cellular network 292 (e.g., as a non-stand-alone network (NSA)). For example, the 5G network may have an access network (e.g., a 5G radio access network (RAN) or a next-generation RAN (NG RAN)), but may not have a core network (e.g., a next-generation core network (NGC)). In this case, after accessing the 5G network access network, the electronic device 101 may access an external network (e.g., the Internet) under the control of the core network of the traditional network (e.g., an evolved packet core network (EPC)). Protocol information for communicating with the traditional network (e.g., LTE protocol information) or protocol information for communicating with the 5G network (e.g., new radio (NR) protocol information) may be stored in the memory 230 and may be accessed by other components (e.g., the processor 120, the first communication processor 212, or the second communication processor 214).
[0049] Figure 3 FIG. shows a block diagram of an electronic device according to an embodiment of the present disclosure.
[0050] According to an embodiment, the electronic device 101 may include at least one antenna module 340, at least one RFFE 330 electrically connected to the at least one antenna module 340, at least one RFIC 320 electrically connected to the at least one RFFE 330, and a communication processor 310 operably connected to the at least one RFIC 320.
[0051] In an embodiment, the antenna module 340 may be included in at least one of the antenna module 197 ( Figure 1 ), the first antenna module 242 ( Figure 2a ), the second antenna module 244 ( Figure 2a ), or the third antenna module 246 ( Figure 2a ).
[0052] In an embodiment, the RFFE 330 may be included in at least one of the first RFFE 232, the second RFFE 234, or the third RFFE 236 of Figure 2a . The RFFE 330 may include at least one power amplifier (PA) 331, at least one low noise amplifier (LNA) 333, a duplexer 335 electrically connected to the PA 331 and the LNA 333, and a coupler 337 electrically connected to the duplexer 335. The PA 331 may amplify a signal output from the transmission circuit 321 of the RFIC 320. The signal amplified by the PA 331 may be transmitted to the duplexer 335. The LNA 333 may amplify a signal passing through the duplexer 335. The signal amplified by the LNA 333 may be transmitted to the reception circuit 323 of the RFIC 320. The signal amplified by the PA 331 may pass through the duplexer 335. The signal amplified by the PA 331 may be transmitted to the antenna module 340 through the duplexer 335 and the coupler 337. A signal received by the antenna module 340 may pass through the duplexer 335. The received signal may be transmitted to the LNA 333 through the coupler 337 and the duplexer 335. When the signal amplified by the PA 331 passes through the coupler 337, a feedback signal may be generated. The feedback signal generated by the coupler 337 may be transmitted to the feedback circuit 325 of the RFIC 320.
[0053] In an embodiment, the RFIC 320 may be included in Figure 2ain at least one of the first RFIC 222, the second RFIC 224, the third RFIC 226, or the fourth RFIC 228. The RFIC 320 may be configured to include at least one transmitting circuit 321, at least one receiving circuit 323, and at least one feedback circuit 325. The RFIC 320 may be electrically connected to the communication processor 310 via a data signal line 311 and a control signal line 313. The RFIC 320 may transmit and receive data with the communication processor 310 via the data signal line 311. The RFIC 320 may receive a control signal from the communication processor 310 via the control signal line 313. For example, the RFIC 320 may receive, via the control signal line 313, a control signal from the communication processor 310 for controlling at least one of the transmitting circuit 321, the receiving circuit 323, or the feedback circuit 325. The transmitting circuit 321 may generate an RF signal based on a digital signal received from the communication processor 310. The receiving circuit 323 may generate a digital signal to be transmitted to the communication processor 310 based on an RF signal received via the antenna module 340. The feedback circuit 325 may generate a signal for detecting the transmission power of the antenna module 340 based on a signal received from the coupler 337.
[0054] In an embodiment, the communication processor 310 may control an overall operation for reducing coupling between voltage controlled oscillators (hereinafter referred to as “VCOs”). In an embodiment, the communication processor 310 may be included in at least one of Figure 1 the processor 120 of Figure 2a the first communication processor 212, the second communication processor 214, or Figure 2b the integrated communication processor 260 of Figures 4 to 11 The operations performed by the communication processor 310 for reducing VCO coupling will be described below with reference to
[0055] Although Figure 3 FIG. shows that the electronic device 101 includes the communication processor 310, the RFIC 320, the RFFE 330, and / or the antenna module 340, the present disclosure is not limited thereto. For example, the electronic device 101 may further include Figure 1 at least one component shown in
[0056] Figure 4 FIG. shows a block diagram of an RFIC according to an embodiment of the present disclosure.
[0057] In an embodiment, the RFIC 320 (e.g., the first RFIC 222, the second RFIC 224, the third RFIC 226, the fourth RFIC 228, or Figure 3At least one of the RFICs 320) may be configured to include at least one transmit circuit 321, at least one receive circuit 323, at least one transmit VCO 401 electrically connected to the at least one transmit circuit 321, at least one receive VCO 403 electrically connected to the at least one receive circuit 323, and a signal detection module 411 electrically connected to the receive VCO 403.
[0058] In an embodiment, the RFIC 320 may be configured to include one or more VCOs to transmit and receive signals based on one or more frequency combinations, but is not limited thereto Figure 4 The case shown. The electronic device 101 may support carrier aggregation (CA) or EN-DC based on the operation of one or more VCOs. In an embodiment, one VCO may be configured to be electrically connected to eight receive circuits 323. In an embodiment, one receive circuit 323 may be configured to be electrically connected to two or more VCOs. In an embodiment, as the size of the elements included in the RFIC 320 decreases, the distance between the VCOs may decrease. When the VCOs are placed close to each other, coupling may occur because the VCOs include inductors. For example, coupling 421 may occur between the transmit VCO 401 and the receive VCO 403. In an embodiment, the electronic device 101 (e.g., the communication processor 310) may identify whether the signal output from the receive VCO 403 is an abnormal signal based on the operation of the signal detection module 411. The electronic device 101 may control the RFIC 320 to reduce the coupling between the VCOs based on identifying that the signal output from the receive VCO 403 is an abnormal signal. For example, the electronic device 101 may control the RFIC 320 to change the operating frequency of the transmit VCO 401. The operation of the electronic device 101 controlling the RFIC 320 will be described below with reference to Figures 5 to 11 The operation of the electronic device 101 controlling the RFIC 320 will be described. In an embodiment, the electronic device 101 may control the RF circuit to activate the signal detection module 411 based on identifying that the transmit circuit 321 is operating. Based on identifying that the transmit circuit 321 is operating stably, the electronic device 101 may control the RF circuit to deactivate the signal detection module 411. For example, the electronic device 101 may control the signal detection module 411 to turn off after the frequency of the transmit circuit 321 is locked. Based on identifying that the frequency of the transmit circuit 321 is locked, the electronic device 101 may control the signal detection module 411 to turn off. By controlling the activation or deactivation of the signal detection module 411, the electronic device 101 may reduce unnecessary current consumption of the signal detection module 411.
[0059] In an embodiment of the present disclosure, the transmit VCO 401 and / or the receive VCO 403 may be referred to as the "first VCO" and / or the "second VCO". In the present disclosure, the first VCO or the second VCO is not limited to the transmit VCO 401 or the receive VCO 403. In an embodiment, the electronic device 101 may control the RFIC 320 such that the coupling 421 between the transmit VCO 401 and the receive VCO 403 is reduced. In an embodiment, the electronic device 101 may control at least one RFIC of the electronic device 101 (e.g., Figure 2a and Figure 2b the first RFIC 222, the second RFIC 224, the third RFIC 226, the fourth RFIC 228 in Figure 4 or at least one of the RFIC 320 in
[0060] Figure 5 to reduce the coupling between different transmit VCOs. The electronic device 101 may control the RFIC 320 to reduce the coupling between different receive VCOs.
[0061] In an embodiment, the transmit circuit 321 included in the RFIC 320 (e.g., Figure 2a the first RFIC 222, the second RFIC 224, the third RFIC 226, the fourth RFIC 228 in Figure 3 the RFIC 320 in Figure 4 or at least one of the RFIC 320 in
[0062] In an embodiment, the receiving circuit 323 included in the RFIC 320 may be configured to include an LNA, mixers 524a and 524b, transimpedance amplifiers (TIAs) 523a and 523b, low-pass filters (LPFs) 522a and 522b, and analog-to-digital converters (ADCs) 521a and 521b. The LNA may amplify an RF signal received through an antenna module (e.g., Figure 3 the antenna module 340 in
[0063] ). The mixers 524a and 524b may convert the RF signal into a baseband signal. The TIAs 523a and 523b may convert the current signals output from the mixers 524a and 524b into voltage signals. The LPFs 522a and 522b may attenuate the noise of the ambient frequency band of the signal received in the baseband. The ADCs 521a and 521b may convert the analog signals output from the LPFs 522a and 522b into digital signals. In an embodiment, the receiving VCO 403 included in the RFIC 320 may be configured to include a LOIQ 551 and a phase-locked loop (PLL) 560. The LOIQ 551 may be configured to include a signal generator and a frequency divider for generating IQ signals. For example, the frequency divider may include a 1 / 2 frequency divider and / or a 1 / 4 frequency divider. The PLL 560 may include a buffer 564, a phase comparator 562, an LPF 561, and a 1 / N frequency divider 563. The buffer 564 may increase the signal strength of the reference clock Ref CLK. The phase comparator 562 may adjust the frequency based on the frequency comparison result. The LPF 561 may reduce the phase noise based on the filtering of the signal. The 1 / N frequency divider 563 may identify the signal output from the receiving VCO 403.
[0064] In an embodiment, the transmit VCO 401 included in the RFIC 320 may be configured to include an LOIQ 531 and a PLL 540. The LOIQ 531 may be configured to include a signal generator and a frequency divider for generating IQ signals. For example, the frequency divider may include a 1 / 2 frequency divider and / or a 1 / 4 frequency divider. The PLL 540 may include a buffer 525, at least one frequency divider 544a and 544b, a phase comparator 542, an LPF 541, and a 1 / N frequency divider 543. The buffer 525 may increase the signal strength of the reference clock. At least one of the frequency dividers 544a and 544b may change the reference clock. At least one of the frequency dividers 544a and 544b may include a 1 / 2 frequency divider 544a and / or a 2 / 3 frequency divider 544b. In an embodiment, the 1 / 2 frequency divider 544a and the 2 / 3 frequency divider 544b may be connected in parallel. In an embodiment, a bypass path 545 may be connected in parallel with the 1 / 2 frequency divider 544a and the 2 / 3 frequency divider 544b. When frequency division is not required, the electronic device 101 may control the RFIC 320 such that the signal is transmitted through the bypass path 545. For example, when there is no signal interference caused by VCO coupling, the electronic device 101 may control the RFIC 320 such that the signal is transmitted to the bypass path 545. In an embodiment, the situation where the signal is transmitted through the bypass path 545 may be referred to as "bypass mode". The phase comparator 542 may adjust the frequency based on the frequency comparison result. The LPF 541 may reduce phase noise based on filtering of the signal. The 1 / N frequency divider 543 may identify the signal output from the transmit VCO 401. In an embodiment, the transmit VCO 401 may be configured to operate at twice the target frequency. For example, the transmit VCO 401 may output a signal of 4.2 GHz such that the electronic device 101 transmits a signal of 2.1 GHz in the B1 band.
[0065] In an embodiment, the signal detection module 411 included in the RFIC 320 may be configured to include a 1 / N frequency divider 573, an LPF 572, or an ADC 571. The 1 / N frequency divider 573 may convert the RF signal into a baseband signal. The LPF 572 may output only the signal in the frequency band corresponding to the receiving circuit 323. The LPF 572 may be further configured to include a VGA, but is not limited thereto. The VGA may adjust the power of the signal output from the LPF 572. The ADC 571 may convert the analog signal output from the LPF 572 into a digital signal. The electronic device 101 (e.g., the communication processor 310) may identify the quality of the LO signal output from the LOIQ 551 of the receive VCO 403 and input the signal to the receiving circuit 323 based on the operation of the signal detection module 411.
[0066] According to one aspect of the present disclosure, an electronic device is provided, which includes a memory storing instructions, a radio frequency (RF) circuit, and a communication processor operably connected to the memory and the RF circuit. The RF circuit may include a first voltage-controlled oscillator (VCO), a second VCO, and a signal detection module electrically connected to the first VCO and configured to detect (or identify) a signal output from the first VCO. The RF circuit may further include a receiving circuit (e.g., Rx chain) and / or a transmitting circuit (e.g., Tx chain). The first VCO may be a receiving VCO electrically connected to the receiving circuit of the RF circuit. The second VCO may be a transmitting VCO electrically connected to the transmitting circuit of the RF circuit.
[0067] When the instructions stored in the memory are executed by the communication processor, preferably, the electronic device may be configured to control the RF circuit to change the operating frequency of the second VCO based on identifying that the signal output from the first VCO is an abnormal signal (when the signal strength of the signal output from the first VCO detected by the signal detection module is less than a reference value).
[0068] The first VCO may include a LOIQ (i.e., local oscillator in-phase / quadrature generator). The signal detection module may be electrically connected to the LOIQ of the first VCO. Alternatively or additionally, the second VCO may include a LOIQ.
[0069] The LOIQ may include a generator for forming IQ signals and may optionally include a frequency divider. The transmitting and / or receiving circuit may be configured to analyze or process IQ signals or I / Q data, i.e., the in-phase and quadrature components of an electrical signal.
[0070] The signal detection module may be implemented as a local oscillator (LO) signal quality detection module. For example, the role of the LO signal quality detection module may be to check the quality of the LO signal transmitted from the first VCO (e.g., through its LOIQ) to the receiving circuit.
[0071] The signal detection module may include a frequency divider electrically connected to the first VCO, a low-pass filter electrically connected to the frequency divider, and an analog-to-digital converter (ADC) electrically connected to the low-pass filter. Preferably, a variable gain amplifier may be electrically connected to the low-pass filter. In this case, the ADC may be electrically connected to the variable gain amplifier. The variable gain amplifier may adjust the power deficiency so that the signal can reach the ADC correctly. The ADC may be in a terminal position, i.e., it may be the final ADC.
[0072] Preferably, the electronic device may further include a third VCO. At this time, the signal detection module may include a mixer, which is electrically connected to the first VCO (such as its LOIQ) and the third VCO (preferably the LOIQ of the third VCO). The low-pass filter may be electrically connected to the mixer, and the ADC may be electrically connected to the low-pass filter. Optionally, the variable gain amplifier may be electrically connected to the low-pass filter, and the ADC may be electrically connected to the variable gain amplifier.
[0073] Preferably, the signal detection module may be electrically connected to the LOIQ of the first VCO. In this case, more preferably, when the instruction is executed by the communication processor, the electronic device uses the signal detection module to detect the signal output from the LOIQ of the first VCO, and based on the recognition of the intensity of the detected signal (for example, the signal output from the LOIQ of the first VCO detected by the signal detection module is less than the reference value), to identify whether the detected signal is an abnormal signal, and when it is identified that the detected signal is an abnormal signal, control the RF circuit to change the operating frequency of the second VCO.
[0074] Preferably, when the instruction is executed by the communication processor, the electronic device may identify the intensity of the detected signal based on the signal-to-interference-plus-noise ratio (SINR) of the detected signal. SINR is an example of identifying the signal intensity, and other metrics may also be used as alternatives or supplements.
[0075] Preferably, the second VCO may include a phase-locked loop (PLL). The PLL may include a buffer for receiving a reference clock, at least one frequency divider electrically connected to the buffer, a phase comparator electrically connected to the at least one frequency divider, and a low-pass filter electrically connected to the phase comparator. At least one frequency divider of the PLL may be implemented as one or more frequency dividers connected in parallel between the buffer and the phase comparator.
[0076] When the RF circuit includes the receiving circuit or the at least one receiving circuit, preferably, when the instruction is executed by the communication processor, the electronic device controls at least one frequency divider of the PLL of the second VCO to change the reference clock of the second VCO based on the recognition that the detected signal is an abnormal signal, and / or when it is recognized that the signal intensity received through the receiving circuit is less than the reference value, control the RF circuit to change the operating frequency of the second VCO.
[0077] Alternatively or additionally, when the RF circuit includes a receiving circuit, when the instruction is executed by the communication processor, it may be configured to make the electronic device control the RF circuit to change the operating frequency of the second VCO based on the recognition that the SINR of the signal received through the receiving circuit is less than the reference value.
[0078] Further alternatively or additionally, when the RF circuit includes a receiving circuit, the instructions, when executed by the communication processor, can be configured to cause the electronic device to control the RF circuit to change the operating frequency of the second VCO based on identifying that a reference signal received power (RSRP) of a signal received by the receiving circuit is greater than or equal to a reference value.
[0079] In particular, it is conceivable to simultaneously identify the SINR and RSRP of the signal received by the receiving circuit, and control the RF circuit to change the operating frequency of the second VCO based on identifying that the RSRP of the signal received by the receiving circuit is greater than or equal to the reference value and the SINR is less than the reference value. In other words, if the SINR is low (although the RSRP is high), the operating frequency of the second VCO (e.g., the receiving VCO) will be changed.
[0080] In an embodiment, when the instructions are executed by a communication processor, the electronic device may identify a lookup table associated with an operating frequency combination of the electronic device based on identifying that the detected signal is an abnormal signal, control the RF circuit to change the operating frequency of the second VCO based on identifying that the operating frequency combination is a first frequency combination, and control at least one divider of the PLL of the second VCO to change the reference clock of the second VCO based on identifying that the operating frequency combination is the second frequency combination and / or is not the first frequency combination.
[0081] When the RF circuit includes the transmitting circuit or at least one transmitting circuit, preferably, when the instruction is executed by the communication processor, the electronic device controls the RF circuit to start the signal detection module based on identifying that the transmitting circuit is running, and / or controls the RF circuit to shut down the signal detection module based on identifying that the frequency of the transmitting circuit is locked.
[0082] Figure 6a , Figure 6b and Figure 6c A schematic diagram showing an example of coupling between VCOs according to an embodiment of the present disclosure is shown.
[0083] Reference Figure 6a , which shows the frequency band where coupling occurs between the B3 transmit VCO and the B3 receive VCO. Figure 6a, the B3 transmit VCO can output a signal 601 of 3484 MHz for a target frequency of 1742 MHz. In an embodiment, the reference clock of the B3 transmit VCO can be 36 MHz (Δf). In an embodiment, due to the operation of the 1 / N divider inside the PLL, spur signals, i.e., signals in unexpected frequency bands, may be generated in the VCO output. A spur signal refers to an unwanted signal generated in a frequency band other than the frequency to be output. For example, five times the frequency of the reference clock and the operating frequency of the B3 transmit VCO may form a spur signal 603 of 3664 MHz. In an embodiment, the B3 receive VCO can output a signal 611 of 3674 MHz for a target frequency of 1837 MHz. Since there is a frequency difference (Δf1) of about 20 MHz or less in bandwidth between the output signal of the B3 receive VCO and the spur signal of the B3 transmit VCO, coupling may occur between the B3 transmit VCO and the B3 receive VCO.
[0084] Referring to Figure 6b , which shows the frequency band where coupling occurs between the B28 receive VCO and the B20 receive VCO. Referring to Figure 6b , the B28 receive VCO can output a signal 621 of 3100 MHz for a target frequency of 775 MHz. In an embodiment, the reference clock of the B28 receive VCO can be 36 MHz (Δf). Three times the frequency of the reference clock and the operating frequency of the B20 receive VCO may form a spur signal 623 of 3208 MHz. In an embodiment, the B20 receive VCO can output a signal 631 of 3204 MHz for a target frequency of 801 MHz, which is four times the target frequency. Since there is a frequency difference (Δf2) of about 20 MHz or less in bandwidth between the output signal of the B20 receive VCO and the spur signal of the B28 receive VCO, coupling may occur between the B28 receive VCO and the B20 receive VCO.
[0085] Referring to Figure 6c , which shows the frequency band where coupling occurs between the B3 receive VCO and the N78 receive VCO due to LO leakage in the EN-DC combination. Referring to Figure 6c , the B3 receive VCO can output a signal 641 of 3674 MHz for a target frequency of 1837 MHz. In an embodiment, the N78 receive VCO can output a signal 651 of 7260 MHz for a signal 653 of a target frequency of 3630 MHz, which is twice the target frequency. Since there is a frequency difference (Δf3) of about 100 MHz or less in bandwidth between the frequency of the output signal of the B3 receive VCO and the target frequency of the N78 receive VCO, coupling may occur between the B3 receive VCO and the N78 receive VCO.
[0086] Figure 7 A block diagram of a signal detection module according to an embodiment of the present disclosure is shown.
[0087] In an embodiment, the signal detection module 411 may be configured to include a mixer 713, an LPF 712, or an ADC 711. When the signal detection module 411 is configured to include a mixer 713 instead of Figure 5 the 1 / N frequency divider in the signal detection module 411 (e.g., Figure 5 the frequency divider 573 in Figure 3 ), the RFIC (e.g., Figure 3 the RFIC 320 in
[0088] Figure 8 An operation flowchart 800 for changing the operating frequency of the VCO of an electronic device according to an embodiment of the present disclosure is shown.
[0089] Referring to Figure 8 , in operation 801, in an embodiment, an electronic device ( Figure 1 the electronic device 101 in Figure 1 ), such as ( Figure 2a the processor 120 in Figure 2b ), the first communication processor 212, the second communication processor 214, Figure 3 the integrated communication processor 260 in Figure 4 ), or at least one of the communication processors 310 in Figure 4 Figure 5 ), may identify a signal output from the first VCO. For example, the electronic device 101 may identify a signal output from the LOIQ (e.g., the LOIQ 551 in
[0090] In operation 803, in an embodiment, the electronic device 101 may identify whether the identified signal is an abnormal signal. In an embodiment, the electronic device 101 may identify the strength of the identified signal based on the signal-to-interference-plus-noise ratio (SINR) output from the LOIQ 551. When the SINR is less than a reference value, the electronic device 101 may identify the signal as an abnormal signal. The reference value for identifying an abnormal signal may vary according to the embodiment and is not limited to a specific value.
[0091] In operation 805, in an embodiment, the electronic device 101 may change the operating frequency of the second VCO. For example, the electronic device 101 may control the change of the operating frequency of the transmitting VCO (such as Figure 4 the transmitting VCO 401 in) based on identifying that the signal output from the LOIQ 551 is an abnormal signal. The electronic device 101 may control the change of the operating frequency of the transmitting VCO 401 based on selecting an operating frequency different from the frequency band where coupling occurs.
[0092] Figure 9 FIG. 900 is a flowchart showing an operation of an electronic device changing the VCO operating frequency based on the strength of a signal received through a receiving circuit according to an embodiment of the present disclosure.
[0093] Referring to Figure 9 , in operation 901, in an embodiment, the electronic device ( Figure 1 the electronic device 101 in) (for example, Figure 1 the processor 120 in, Figure 2a the first communication processor 212, the second communication processor 214 in, Figure 2b the integrated communication processor 260 in or Figure 3 at least one of the communication processors 310 in) may identify the signal output from the first VCO. For example, the electronic device 101 may identify the signal output from the LOIQ (such as Figure 4 the signal detection module 411 in) of the receiving VCO (such as Figure 4 the receiving VCO 403 in) based on the signal detection module (for example, Figure 5 the LOIQ 551 in). Since operation 901 is at least partially the same or similar to operation 801, the same description will not be repeated Figure 8 in.
[0094] In operation 903, in an embodiment, the electronic device 101 may identify whether the identified signal is an abnormal signal. Since operation 903 is at least partially the same or similar to operation 803, the same description will not be repeated Figure 8 in.
[0095] In operation 905, in an embodiment, the electronic device 101 may change the reference clock. In an embodiment, the electronic device 101 may change the reference clock based on a frequency divider (such as Figure 5 the 1 / 2 frequency divider 544a and / or the 2 / 3 frequency divider 544b in) such that the operating frequency of the transmitting VCO (such as Figure 4 the transmitting VCO 401 in) is adjacent to an even multiple frequency of the operating frequency of the receiving VCO 403.
[0096] In operation 907, in an embodiment, the electronic device 101 may identify whether the signal strength received through a receiving circuit (e.g., Figure 4 the receiving circuit 323 in is less than a reference value. For example, the electronic device 101 may identify whether the SINR of the signal received through the receiving circuit 323 is less than the reference value.
[0097] In an embodiment, the electronic device 101 may identify the signal-to-interference-plus-noise ratio (SINR) and the reference signal received power (RSRP) of the signal received through the receiving circuit 323. The electronic device 101 may identify whether the RSRP of the signal is greater than or equal to the reference value, and whether the SINR of the signal is less than the reference value. The electronic device 101 may identify whether the transmission channel and / or the receiving channel of the RF signal is good based on the identified RSRP value. For example, the electronic device 101 may identify that the transmission channel and / or the receiving channel of the RF signal is good based on the identified RSRP value being equal to or greater than the reference value. The electronic device 101 may identify that VCO coupling has occurred based on the identified RSRP of the signal received through the receiving circuit 323 being equal to or greater than the reference value and the SINR of the received signal being less than the reference value.
[0098] In operation 909, in an embodiment, the electronic device 101 may change the operating frequency of the second VCO. For example, the electronic device 101 may change the operating frequency of the transmit VCO 401 based on the condition of operation 907 being satisfied. Since operation 909 is at least partially the same as or similar to operation 805, the same description in Figure 8 will not be repeated.
[0099] Figure 10 FIG. 1000 shows an operation flowchart for changing the VCO operating frequency based on identifying a lookup table according to an embodiment of the present disclosure.
[0100] Referring to Figure 10 , in operation 1001, in an embodiment, the electronic device ( Figure 1 101 in Figure 1 e.g., the processor 120 in Figure 2a the first communication processor 212, the second communication processor 214 in Figure 2b the integrated communication processor 260 in Figure 3 or at least one of the communication processors 310 in can identify the signal output from the first VCO. Since operation 1001 is at least partially the same as or similar to operation 801, the same description in Figure 8 will not be repeated.
[0101] In operation 1003, in an embodiment, the electronic device 101 may identify whether the identified signal is an abnormal signal. Since operation 1003 is at least partially the same as or similar to operation 803, the same description will not be repeated. Figure 8 Same description in
[0102] In operation 1005, in an embodiment, the electronic device 101 may identify a look-up table. In an embodiment, the electronic device 101 may identify a look-up table (LUT) associated with the operating frequency combination of the electronic device based on identifying that the identified signal is an abnormal signal. For example, the look-up table may be stored in the electronic device 101.
[0103] In operation 1007, in an embodiment, the electronic device 101 may change the operating frequency of the second VCO. The electronic device 101 may control at least one RFIC (such as Figure 2a the first RFIC 222, the second RFIC 224, the third RFIC 226, the fourth RFIC 228 in Figure 3 or at least one of the RFIC 320 in Figure 4 to change the operating frequency of the transmit VCO (such as
[0104] Figure 11 the transmit VCO 401 in
[0105] based on identifying that the operating frequency combination is the first frequency combination stored in the look-up table. Figure 11 Referring to Figure 1 , in operation 1101, in an embodiment, the electronic device ( Figure 1 101 in Figure 2a such as the processor 120 in Figure 2b the first communication processor 212, the second communication processor 214 in Figure 3 the integrated communication processor 260 in Figure 8 or at least one of the communication processors 310 in
[0106] Figure 8 Same description in
[0107]
[0107] In operation 1105, in an embodiment, the electronic device 101 may identify a look-up table. Since operation 1105 is at least partially the same as or similar to operation 1005, the same description will not be repeated. Figure 10 in the same description.
[0108] In operation 1107, in an embodiment, the electronic device 101 may change the reference clock. The electronic device 101 may control at least one frequency divider (e.g., the 1 / 2 frequency divider 544a and / or the 2 / 3 frequency divider 544b in Figure 5 e.g., the PLL 540 in Figure 5 to change the reference clock of the transmit VCO (e.g., the transmit VCO 401 in Figure 4 based on identifying that the operating frequency combination is the second frequency combination.
[0109] The electronic device 101 may control at least one of the frequency dividers 544a and 544b of the PLL 540 to change the reference clock of the transmit VCO 401 for the remaining combinations based on identifying that the operating frequency combination is not the first frequency combination.
[0110] According to another aspect of the present disclosure, a method of operating an electronic device is provided, which may include the following operations: detecting (or identifying) a signal output from a first VCO included in an RF circuit of the electronic device by a signal detection module included in the RF circuit; identifying whether the detected signal is an abnormal signal based on identifying the intensity of the detected signal; and controlling the RF circuit to change the operating frequency of a second VCO included in the RF circuit based on identifying that the detected signal is an abnormal signal (when the intensity of the detected signal is less than a reference value).
[0111] Preferably, the method may further include: controlling at least one frequency divider included in a PLL of the second VCO to change the reference clock of the second VCO based on identifying that the identified signal is an abnormal signal; and controlling the RF circuit to change the operating frequency of the second VCO based on identifying that the intensity of a signal received through a receiving circuit of the RF circuit is less than a reference value.
[0112] Preferably, the method may further include: identifying a look-up table associated with the operating frequency combination of the electronic device based on identifying that the identified signal is an abnormal signal; controlling the RF circuit to change the operating frequency of the second VCO based on identifying that the operating frequency combination is the first frequency combination; and controlling at least one frequency divider included in a PLL of the second VCO to change the reference clock of the second VCO based on identifying that the operating frequency combination is the second frequency combination and / or identifying that the operating frequency combination is not the first frequency combination.
[0113] Preferably, the method may further include: controlling the RF circuit to activate the signal detection module based on the recognition that the transmitting circuit included in the RF circuit is operating; and / or controlling the RF circuit to deactivate the signal detection module based on the recognition that the frequency of the transmitting circuit included in the RF circuit is locked. In this way, the signal detection module or the LO signal quality detection module can be activated and / or deactivated during specific protocol scenarios (such as a locking operation) to minimize current consumption.
[0114] The electronic device disclosed herein may be configured to perform any operation according to the method of the present disclosure. Similarly, the method may relate to any function disclosed for the components of the electronic device. In addition, the operations and / or functions described with respect to the method or the electronic device are equally applicable to the instructions stored in the non-transitory storage medium.
[0115] The electronic device and the method are used to reduce the VCO coupling effect, and in particular, can prevent spurious signals and / or local oscillator leakage from entering the receiving circuit or Rx chain that is coupled or can be coupled to the first VCO. This can prevent a decrease in sensitivity and throughput. When the VCO coupling effect is reduced, the VCOs can be placed closer together, thereby enabling more efficient use of the space in the electronic device and achieving further miniaturization.
[0116] According to an embodiment of the present disclosure, an electronic device (such as Figure 1 the electronic device 101 therein) may be configured to include at least one RFFE (such as Figure 2a and Figure 2b the first RFFE 232, the second RFFE 234, the third RFFE 236, and the RFFE 330 therein), an RF circuit electrically connected to the at least one RFFE 232, 234, 236, and 330, and a communication processor (such as Figure 1 the processor 120 therein, Figure 2a the first communication processor 212 or the second communication processor 214 therein, Figure 2b the integrated communication processor 260 therein, or Figure 3 the communication processor 310 therein) operably connected to the at least one RFFE 232, 234, 236, and 330 and the RF circuit. The RF circuit of the electronic device 101 may be configured to include at least one receiving circuit (such as Figure 4 the receiving circuit 323 therein), at least one transmitting circuit (such as Figure 4 the transmitting circuit 321 therein), a first VCO, a second VCO, and a signal detection module electrically connected to the first VCO (such as Figure 4in the signal detection module 411). The communication processors 120, 212, 214, 260, or 310 of the electronic device 101 may be configured to control the RF circuit to change the operating frequency of the second VCO based on identifying whether the signal output by the first VCO is an abnormal signal.
[0117] In an embodiment, the signal detection module 411 of the electronic device 101 may be configured to include a frequency divider (such as Figure 5 the 1 / N frequency divider 573 in Figure 5 electrically connected to the LOIQ of the LOIQ 551 in Figure 5 ), a low-pass filter electrically connected to the frequency divider 573, a variable gain amplifier electrically connected to the low-pass filter, and an analog-to-digital converter (ADC) (such as
[0118] the ADC 571 in Figure 7 In an embodiment, the electronic device 101 may be further configured to include a third VCO (such as Figure 7 the additional VCO 720 in Figure 7 ). The signal detection module 411 of the electronic device 101 may be configured to include a mixer (such as Figure 7 the mixer 713 in
[0119] electrically connected to the LOIQ 551 of the first VCO and the LOIQ (such as
[0120] the LOIQ 721 in
[0121] of the third VCO 720), a low-pass filter electrically connected to the mixer 713, a variable gain amplifier electrically connected to the low-pass filter, and an ADC (such as Figure 5in the PLL 540). The PLL 540 can be configured to include a buffer (e.g., Figure 5 the buffer 525 in Figure 5 ), for receiving a reference clock, at least one frequency divider (e.g., Figure 5 the 1 / 2 frequency divider 544a or the 2 / 3 frequency divider 544b in Figure 5 ) electrically connected to the buffer 525, a phase comparator (e.g.,
[0122] the phase comparator 542 in
[0123] ) electrically connected to the at least one frequency divider 544a and 544b, and a low-pass filter (e.g.,
[0124] the low-pass filter 541 in
[0125] ) electrically connected to the phase comparator 542.
[0122] In an embodiment, at least one of the frequency dividers 544a and 544b of the PLL 540 of the electronic device 101 can be one or more frequency dividers 544a and 544b connected in parallel between the buffer 525 and the phase comparator 542.
[0123] In an embodiment, the communication processors 120, 212, 214, 260, or 310 of the electronic device 101 can also be configured to identify a signal output from the LOIQ of the first VCO. In an embodiment, the communication processors 120, 212, 214, 260, or 310 of the electronic device 101 can also be configured to identify whether the identified signal is an abnormal signal based on identifying the intensity of the identified signal. In an embodiment, the communication processors 120, 212, 214, 260, or 310 of the electronic device 101 can also be configured to control at least one of the frequency dividers 544a and 544b of the PLL 540 to change the reference clock of the second VCO based on identifying that the identified signal is an abnormal signal. In an embodiment, the communication processors 120, 212, 214, 260, or 310 of the electronic device 101 can also be configured to control the RF circuit to change the operating frequency of the second VCO based on identifying that the signal strength received through the receiving circuit 403 is less than a reference value.
[0124] In an embodiment, the communication processors 120, 212, 214, 260, or 310 of the electronic device 101 can also be configured to control the RF circuit to change the operating frequency of the second VCO based on identifying that the SINR of the signal received through the receiving circuit 403 is less than a reference value.
[0125] In an embodiment, the communication processors 120, 212, 214, 260, or 310 of the electronic device 101 can be configured to identify the SINR and RSRP of the signal received through the receiving circuit 403. In an embodiment, the communication processors 120, 212, 214, 260, or 310 of the electronic device 101 can also be configured to control the RF circuit to change the operating frequency of the second VCO based on identifying that the RSRP of the signal is greater than or equal to a reference value and / or the SINR of the signal is less than a reference value.
[0126] In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to identify a signal output from the LOIQ of the first VCO. In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to identify whether the identified signal is an abnormal signal based on identifying the intensity of the identified signal. In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to identify a look-up table associated with the operating frequency combination of the electronic device 101 based on identifying that the identified signal is an abnormal signal. In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to control the RF circuit to change the operating frequency of the second VCO based on identifying that the operating frequency combination is the first frequency combination. In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to control at least one of the frequency dividers 544a and 544b of the PLL 540 to change the reference clock of the second VCO based on identifying that the operating frequency combination is the second frequency combination.
[0127] In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to identify a signal output from the LOIQ of the first VCO. In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to identify whether the identified signal is an abnormal signal based on identifying the intensity of the identified signal. In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to identify a look-up table associated with the operating frequency combination of the electronic device 101 based on identifying that the identified signal is an abnormal signal. In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to control the RF circuit to change the operating frequency of the second VCO based on identifying that the operating frequency combination is the first frequency combination. In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to control at least one of the frequency dividers 544a and 544b of the PLL 540 to change the reference clock of the second VCO based on identifying that the operating frequency combination is not the first frequency combination.
[0128] In an embodiment, the communication processor 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to control the RF circuit to activate the signal detection module 411 based on identifying that the transmitting circuit 321 is operating.
[0129] In an embodiment, the communication processors 120, 212, 214, 260, or 310 of the electronic device 101 may also be configured to control the RF circuit off-signal detection module 411 based on identifying that the frequency of the transmission circuit 321 is locked.
[0130] According to an embodiment of the present disclosure, a method of operating an electronic device 101 may include: identifying, by a signal detection module 411 included in the RF circuit of the electronic device 101, a signal output from a first VCO of the RF circuit. The method of operating the electronic device 101 may include: identifying whether the identified signal is an abnormal signal based on identifying the intensity of the identified signal. The method of operating the electronic device 101 may include: controlling the RF circuit to change the operating frequency of a second VCO in the RF circuit based on identifying that the identified signal is an abnormal signal.
[0131] In an embodiment, the method of operating the electronic device 101 may further include: controlling at least one of the frequency dividers 544a and 544b included in the PLL 540 of the second VCO to change the reference clock of the second VCO based on identifying that the identified signal is an abnormal signal. In an embodiment, the method of operating the electronic device 101 may further include: controlling the RF circuit to change the operating frequency of the second VCO based on identifying that the intensity of a signal received through a receiving circuit 323 included in the RF circuit is less than a reference value.
[0132] In an embodiment, the method of operating the electronic device 101 may further include: identifying a look-up table associated with the operating frequency combination of the electronic device 101 based on identifying that the identified signal is an abnormal signal. In an embodiment, the operating method may further include: controlling the RF circuit to change the operating frequency of the second VCO based on identifying that the operating frequency combination is a first frequency combination. The method of operating the electronic device 101 may further include: controlling at least one of the frequency dividers 544a and 544b included in the PLL 540 of the second VCO to change the reference clock of the second VCO based on identifying that the operating frequency combination is a second frequency combination.
[0133] In an embodiment, the method of operating the electronic device 101 may further include: identifying a look-up table associated with the operating frequency combination of the electronic device 101 based on identifying that the identified signal is an abnormal signal. In an embodiment, the operating method may further include: controlling the RF circuit to change the operating frequency of the second VCO based on identifying that the operating frequency combination is a first frequency combination. The method of operating the electronic device 101 may further include: controlling at least one of the frequency dividers 544a and 544b included in the PLL 540 of the second VCO to change the reference clock of the second VCO based on identifying that the operating frequency combination is not a first frequency combination.
[0134] In an embodiment, the method of operating the electronic device 101 may further include: controlling the RF circuit to start the signal detection module 411 based on recognizing that the transmission circuit 321 included in the RF circuit is operating.
[0135] In an embodiment, the method of operating the electronic device 101 may further include: controlling the RF circuit to turn off the signal detection module 411 based on recognizing that the frequency of the transmission circuit 321 included in the RF circuit is locked.
[0136] The electronic device according to an embodiment of the present disclosure may be one of various types of electronic devices. The electronic device may include, for example, a portable communication device (such as a smart phone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a household appliance. According to an embodiment of the present disclosure, the electronic device is not limited to the above devices.
[0137] It should be understood that the various embodiments of the present disclosure and the terms used therein are not intended to limit the technical features described herein to a specific embodiment, but include various changes, equivalents, or alternatives to the corresponding embodiments. Regarding the description of the drawings, like reference numerals may be used to refer to like or related elements. It should be understood that unless the relevant context clearly indicates otherwise, the singular form of a noun corresponding to an item may include one or more of such things. As used herein, each of the phrases such as "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" may include all possible combinations of the items listed together in the corresponding phrase. As used herein, terms such as "first" and "second" may be used only to simply distinguish the corresponding components from another component, without limiting other aspects of these components (such as importance or order). It should be understood that if an element (such as a first element) is referred to as "coupled to" or "connected to" another element (such as a second element), whether or not the terms "operably" or "communicatively" are used, it means that the element can be directly (such as wired), wirelessly, or through a third element coupled to the other element.
[0138] As used herein, the term "module" may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with other terms (such as "logic", "logic block", "component", or "circuit"). A module may be a single integral component, or the smallest unit or a part thereof suitable for performing one or more functions. For example, according to an embodiment, a module may be implemented in the form of an application specific integrated circuit (ASIC).
[0139] Embodiments of the present disclosure may be implemented as software (e.g., program 140), which includes one or more instructions stored in a machine-readable storage medium (e.g., internal memory 136 or external memory 138) of a machine (e.g., electronic device 101). For example, a processor (e.g., processor 120) of a machine (e.g., electronic device 101) may call at least one of the one or more instructions stored in the storage medium and, under the control of the processor, execute the instruction with or without using one or more other components. This enables the machine to perform at least one function according to the at least one instruction called. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, the term "non-transitory" only means that the storage medium is a tangible device and does not include signals (e.g., electromagnetic waves), but this term does not distinguish whether the data is stored semi-permanently or temporarily in the storage medium.
[0140] According to an embodiment, the method of the embodiments of the present disclosure may be included in and provided with a computer program product. The computer program product may be traded between a buyer and a seller as a commodity. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or distributed online through an application store (e.g., Play Store TM ), (for example, downloaded or uploaded), or directly distributed between two user devices (e.g., smartphones). If distributed online, at least a part of the computer program product may be temporarily generated or at least temporarily stored in a machine-readable storage medium, such as the memory of a manufacturer's server, the memory of an application store's server, or the memory of a relay server.
[0141] According to an embodiment, each of the above components (e.g., a module or a program) may include a single entity or multiple entities. Some of the multiple entities may be respectively provided in different components. According to an embodiment, one or more of the above components may be omitted, or one or more other components may be added. Alternatively or further, multiple components (e.g., modules or programs) may be integrated into a single component. In this case, according to various embodiments, the integrated component may still execute one or more functions of each of the multiple components in the same or similar manner as the corresponding one of the multiple components before integration. According to various embodiments, the operations performed by a module, a program, or other components may be executed sequentially, in parallel, repeatedly, or heuristically, or one or more operations may be executed in a different order, or one or more operations may be omitted, or one or more other operations may be added.
[0142] In addition, the data structures used in the embodiments of the present disclosure can be recorded in a computer-readable recording medium in various ways. The computer-readable recording medium includes storage media such as magnetic storage media (e.g., ROM, floppy disks, or hard disks) or optical reading media (e.g., CD-ROMs or DVDs).
[0143] The exemplary embodiments of the present disclosure have been described above. The above embodiments are merely examples, and those of ordinary skill in the art can understand that various changes can be made without departing from the scope of the present invention. Therefore, the disclosed embodiments should be considered illustrative rather than restrictive. The scope of the present invention is pointed out by the claims, rather than the above description. All differences within the equivalent scope should be construed as being included in the present invention.
Claims
1. An electronic device (101) includes: A memory (130) storing instructions; A radio frequency (RF) circuit; And A communication processor (310) operably connected to the memory (130) and the RF circuit, Wherein, the RF circuit includes: A first voltage controlled oscillator (VCO) (403); A second VCO (401); and A signal detection module (411) electrically connected to the first VCO (403), the signal detection module (411) being configured to detect a signal output from the first VCO (403), and Wherein, when the instructions are executed by the communication processor (310), the electronic device (101) is caused to: Based on identifying that a signal output from the first VCO (403) is an abnormal signal, control the RF circuit to change the operating frequency of the second VCO (401), wherein when the intensity of the signal output from the first VCO (403) detected by the signal detection module (411) is less than a reference value, it is identified that the signal output from the first VCO (403) is an abnormal signal.
2. The electronic device (101) according to claim 1, wherein, The signal detection module (411) includes: A frequency divider (573) electrically connected to the first VCO (403), preferably electrically connected to the LOIQ (551) of the first VCO (403); A low-pass filter (572) electrically connected to the frequency divider (573); Optionally, a variable gain amplifier electrically connected to the low-pass filter (572); and An analog-to-digital converter (ADC) (571) electrically connected to the low-pass filter (572), or electrically connected to the variable gain amplifier when the variable gain amplifier is present.
3. The electronic device (101) according to claim 1 or 2, further includes: A third VCO (720), Wherein, the signal detection module (411) includes: A mixer (713) electrically connected to the first VCO (403) and the third VCO (720), preferably electrically connected to the LOIQ (551) of the first VCO (403) and the LOIQ (721) of the third VCO (720); A low-pass filter (712) electrically connected to the mixer (713); Optionally, a variable gain amplifier electrically connected to the low-pass filter (712); and An ADC (711) electrically connected to the low-pass filter (712), or electrically connected to the variable gain amplifier when the variable gain amplifier is present.
4. The electronic device (101) according to any one of claims 1 to 3, wherein, The signal detection module (411) is electrically connected to the LOIQ (551) of the first VCO (403), and when the instructions are executed by the communication processor (310), the electronic device (101) is caused to: Use the signal detection module (411) to detect a signal output from the LOIQ (551) of the first VCO (403); Identifying whether the detected signal is an abnormal signal based on identifying the intensity of the signal output from the LOIQ (551) of the first VCO (403); And When it is identified that the detected signal is abnormal, controlling the RF circuit to change the operating frequency of the second VCO (401).
5. The electronic device (101) according to any one of claims 1 to 4, wherein, When the instruction is executed by the communication processor (310), the electronic device (101) is caused to: Identify the intensity of the detected signal based on identifying the signal-to-interference-plus-noise ratio (SINR) of the detected signal.
6. The electronic device (101) according to any one of claims 1 to 5, wherein, The second VCO (401) includes a phase-locked loop PLL (540), and Wherein, the PLL (540) includes: A buffer (525) for receiving a reference clock; At least one frequency divider (544a, 544b) electrically connected to the buffer (525); A phase comparator (542) electrically connected to the at least one frequency divider (544a, 544b); and A low-pass filter (541) electrically connected to the phase comparator (542), Wherein, optionally, the at least one frequency divider (544a, 544b) of the PLL (540) is one or more frequency dividers (544a, 544b) connected in parallel between the buffer (525) and the phase comparator (542).
7. The electronic device (101) according to any one of claims 1 to 6, wherein, The RF circuit further includes a receiving circuit (323), and when the instruction is executed by the communication processor (310), the electronic device (101) is caused to: Based on identifying that the detected signal is abnormal, control at least one frequency divider (544a, 544b) of the PLL (540) of the second VCO (401) to change the reference clock of the second VCO (401); And When it is identified that the intensity of the signal received through the receiving circuit (323) is less than a reference value, control the RF circuit to change the operating frequency of the second VCO (401).
8. The electronic device (101) according to any one of claims 1 to 7, wherein, The RF circuit further includes a receiving circuit (323), and when the instruction is executed by the communication processor (310), the electronic device (101) is caused to: Based on identifying that the signal-to-interference-plus-noise ratio SINR of the signal received through the receiving circuit (323) is less than a reference value, control the RF circuit to change the operating frequency of the second VCO (401).
9. The electronic device (101) according to any one of claims 1 to 8, wherein, The RF circuit further includes a receiving circuit (323), and when the instruction is executed by the communication processor (310), the electronic device (101) is caused to: Based on identifying that the reference signal received power RSRP of the signal received through the receiving circuit (323) is greater than or equal to a reference value, control the RF circuit to change the operating frequency of the second VCO (401).
10. The electronic device (101) according to any one of claims 1 to 9, wherein, When the instruction is executed by the communication processor (310), the electronic device (101) is caused to: Based on identifying that the detected signal is abnormal, identify a look-up table associated with the operating frequency combination of the electronic device (101); Based on identifying that the operating frequency combination is the first frequency combination, controlling the RF circuit to change the operating frequency of the second VCO (401); and Based on identifying at least one of the following, controlling at least one frequency divider (544a, 544b) of the PLL (540) of the second VCO (401) to change the reference clock of the second VCO (401): The operating frequency combination is the second frequency combination; or The operating frequency combination is not the first frequency combination.
11. The electronic device (101) according to any one of claims 1 to 10 further includes at least one transmitting circuit (321), and wherein, When executed by the communication processor (310), the instructions cause the electronic device (101) to control the RF circuit to perform at least one of the following: Based on identifying that the transmitting circuit is operating, starting the signal detection module (411); or Based on identifying that the frequency of the transmitting circuit is locked, turning off the signal detection module (411).
12. A method of operating an electronic device, the method comprising: Detecting, by a signal detection module included in an RF circuit of the electronic device, a signal output from a first VCO of the RF circuit; When the intensity of the detected signal is less than a reference value, identifying whether the detected signal is an abnormal signal based on identifying the intensity of the detected signal; And Based on identifying that the detected signal is abnormal, controlling the RF circuit to change the operating frequency of a second VCO included in the RF circuit.
13. The method according to claim 12, further comprising: Based on identifying that the identified signal is abnormal, controlling at least one frequency divider included in a PLL of the second VCO to change the reference clock of the second VCO; And Based on identifying that the intensity of a signal received through a receiving circuit included in the RF circuit is less than a reference value, controlling the RF circuit to change the operating frequency of the second VCO.
14. The method according to claim 12 or 13, further comprising: Based on identifying that the identified signal is abnormal, identifying a look-up table associated with the operating frequency combination of the electronic device; Based on identifying that the operating frequency combination is the first frequency combination, controlling the RF circuit to change the operating frequency of the second VCO; and Based on identifying at least one of the following, controlling at least one frequency divider included in a PLL of the second VCO to change the reference clock of the second VCO: Identifying that the operating frequency combination is the second frequency combination; or Identifying that the operating frequency combination is not the first frequency combination.
15. A computer-readable storage medium having instructions recorded thereon, which when executed by at least one processor of an electronic device, cause the electronic device to perform at least one operation, the operation including: Detecting, by a signal detection module included in an RF circuit of the electronic device, a signal output from a first VCO in the RF circuit; When the intensity of the detected signal is less than a reference value, identifying whether the detected signal is an abnormal signal based on identifying the intensity of the detected signal; And Based on identifying the detected signal anomaly, control the RF circuit to change the operating frequency of a second VCO included in the RF circuit.