Signal conversion device suitable for feeder automation terminal test

Abstract

The invention discloses a signal conversion device suitable for a feeder automation terminal test, which adopts an ARM + FPGA structure as a controller, adopts a Darlington type amplification circuit for signal conversion, adopts a parallel connection mode to disperse output current so as to control heating of a single power tube, has a self-zero-setting function, and has the advantages of simple structure, low cost and high reliability. The device is especially suitable for signal conversion of distribution network electronic feeder terminal testing.

Description

Technical Field

[0001] The present invention belongs to the technical field of power grid current measurement. More specifically, it relates to a signal conversion device applicable to the test of feeder automation terminals, especially the signal conversion for the test of distribution network electronic feeder terminals. Background Art

[0002] The feeder terminal unit (FTU) of distribution automation is an intelligent terminal device installed in the distribution substation or on the feeder. As an important part of the distribution automation terminal, it is an important device for realizing the construction of the Internet of Things. According to the relevant requirements of State Grid operation and maintenance, all distribution network terminals accessing the network need to be detected. The rated secondary voltage of conventional equipment accessing the network is 100V and the current is 5A. While for the electronic feeder terminal, the nominal input value of the small-signal phase voltage is 3.25V AC and the zero-sequence voltage is 6.5V AC as the rated input (most use this rated value, and other rated parameter situations are not excluded). After the ratio calculation, the analog test secondary value or the primary voltage value is displayed. The nominal input value of the current is 1V AC small-signal voltage and the zero-sequence current is 0.2V AC as the rated input. The corresponding rated current is calculated by the ratio and the analog test secondary value or the primary current value is displayed. The device has the advantages of convenient installation and wiring, easy expansion and networking, strong reliability, high measurement accuracy, etc. Thus, it economically and practically realizes distribution network automation.

[0003] At present, for the detection of electronic feeder terminals, the degree of automation is low and the detection process is numerous. Under the premise of a large number of equipment accessing the network, it often causes the delay of the on-site progress of the equipment, and there are also potential safety hazards caused by numerous processes.

[0004] In the prior art, the conventional test method for electronic distribution automation terminals adds quantities through a conventional relay protection tester. For the conventional test method, a large amount of data needs to be converted and the accuracy needs to be calculated, resulting in a significant reduction in test efficiency, safety and reliability, and closed-loop testing cannot be carried out. At the same time, due to the small-signal input of the electronic feeder terminal, it is impossible to automatically test it with existing equipment. After the introduction of testing in the conversion device of the electronic distribution automation terminal of the present invention, the current testing difficulties will be solved. Summary of the Invention

[0005] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a signal conversion device applicable to the test of feeder automation terminals, so as to effectively integrate the metropolitan area network and the access network, and at the same time have the performance of scalability, high flexibility and low cost.

[0006] To achieve the above-mentioned invention purpose, a signal conversion device applicable to the test of feeder automation terminals of the present invention is characterized by including:

[0007] Mainframe: Composed of a main CPU, a large-capacity storage unit, a control bus, and a data bus, it realizes test function management, transient test signal reception and organization, steady-state test signal generation, test process control, synchronization control, and test result analysis;

[0008] D / A conversion board: Converts digital test signals into analog test signals;

[0009] Analog output board: Composed of multiple broadband amplifiers, it realizes analog quantity transformation with a wide frequency band and a wide linear range;

[0010] A / D conversion board: Realizes analog signal sampling for analysis and correction.

[0011] The invention purpose of the present invention is realized as follows:

[0012] A signal conversion device applicable to feeder automation terminal testing of the present invention uses an ARM+FPGA structure as a controller, adopts a Darlington amplifier circuit for signal conversion, simultaneously uses a parallel connection method to disperse the output current to control the heat generation of a single power transistor, and has a self-zeroing function, which is especially applicable to signal conversion in the testing of distribution network electronic feeder terminals.

[0013] Meanwhile, a signal conversion device applicable to feeder automation terminal testing of the present invention also has the following

[0014] Beneficial effects:

[0015] (1) The present invention is applicable to signal conversion in the testing of distribution network feeder automation terminals, and has the advantages of small volume, simple installation and disassembly, high conversion accuracy, and low cost.

[0016] (2) Small zero drift, reducing the interference caused by errors.

[0017] (3) The present invention proposes a solution for amplifier zero offset and drift combining hardware and software, which can not only avoid the problem of limited output voltage caused by internal processing methods, but also solve the problem of low frequency band of external hardware direct compensation. At the same time, due to the adoption of the hardware-software combination method, it can well coordinate the work of hardware and software without affecting the original good performance of the system, and greatly improve the zero adjustment accuracy. Description of the Drawings

[0018] Figure 1 is the architecture diagram of the specific implementation manner of a signal conversion device applicable to feeder automation terminal testing of the present invention;

[0019] Figure 2 is the circuit diagram of the Darlington emitter follower push-pull output;

[0020] Figure 3It is the Darlington push-pull output parallel structure diagram;

[0021] Figure 4 It is the self-zeroing basic framework diagram;

[0022] Figure 5 It is the self-zeroing control logic diagram. Specific implementation manners

[0023] The specific implementation manners of the present invention will be described below in conjunction with the accompanying drawings so that those skilled in the art can better understand the present invention. It should be particularly noted that in the following description, when the detailed descriptions of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.

[0024] Embodiment

[0025] In this embodiment, the test conversion device of the electronic distribution automation feeder terminal system outputs the rated value of the phase voltage of 100V AC through the distribution automation automatic test platform, and the converted small signal is input to the electronic distribution automation feeder terminal at 3.25V AC; the distribution automation automatic test platform outputs the rated value of the zero-sequence voltage of 100V AC, and the converted small signal is input to the electronic distribution automation feeder terminal at 6.5V AC. The distribution automation automatic test platform outputs the rated value of the phase current of 5A AC, and the converted small signal is input to the electronic distribution automation feeder terminal at 1V AC. The distribution automation automatic test platform outputs the rated value of the zero-sequence current of 5A AC, and the converted small signal is input to the electronic distribution automation feeder terminal at 0.2V AC. During the conversion process, the loop should be improved and optimized, and the automatic adjustment system should be analyzed by using analog quantities and small signal feedback comparison. In addition, high-precision low-drift resistors are selected to improve the output accuracy. Through the original distribution automation automatic test platform, the test conversion device of the electronic distribution automation feeder terminal system designed by the existing technical solution can be sent to the platform master station for comparison and analysis through the original 104 protocol, and can also be effectively adjusted under the condition of rated parameter changes to adapt to various rated parameters. In this way, the uploaded value of the electronic distribution automation feeder terminal is configured, and the test of the electronic distribution automation feeder terminal is completed through the parameter configuration of the automatic test platform.

[0026] The test conversion device of the electronic distribution automation feeder terminal system can not only perform the rated parameter tests of the inherent phase voltage of 3.25V, zero-sequence voltage of 6.5V, phase current of 1V, and zero-sequence current of 0.2V of the electronic distribution automation feeder terminal. It can also be adjusted to test other rated parameters. For example, if the phase voltage becomes 5V and the phase current becomes 2V, such a method can also be used for testing.

[0027] The research and development of the analog quantity and small-signal feedback acquisition comparison analysis automatic regulation system device is to connect the output of the automatic test platform of the distribution automation feeder terminal to the analog quantity sampling standard meter during testing. The analog quantity sampling standard meter identifies the sampling value T1. After the analog quantity passes through the analog quantity sampling standard meter, a modified circuit is set up. The modified circuit is connected to the small-signal sampling standard meter. The small-signal sampling standard meter transmits the sampled small signal (small-signal sampling value T2) back to the analog quantity sampling standard meter. Then, the analog quantity (T3) after the small-signal ratio conversion is compared and analyzed with the sampling value (T1) of the analog quantity standard meter. After the analysis, the high-precision low-temperature-drift adjustable resistor is adjusted according to the feedback acquisition situation. Finally, the test is carried out by connecting the end of the small-signal sampling standard meter to the electronic distribution automation feeder terminal.

[0028] To achieve the required functions, the present invention designs a signal conversion device suitable for feeder automation terminal testing. As Figure 1 shown, it includes functional modules such as a control host, a D / A conversion board, an analog quantity output board, an A / D sampling board, and a signal input interface board. The external notebook computer is used to complete the necessary hardware parameter configuration and result display, providing a man-machine interface for the test system.

[0029] The functions of each hardware module are as follows:

[0030] Host: Composed of a main CPU, a large-capacity storage unit, a control bus, and a data bus, it realizes functions such as test function management, transient test signal reception and organization, steady-state test signal generation, test process control, synchronization control, and test result analysis.

[0031] D / A conversion board: Converts digital test signals into analog test signals. It can realize the conversion of multiple current signals and voltage signals at high speed, high precision, and wide linear range.

[0032] Analog quantity output board: Composed of multiple broadband amplifiers, it realizes analog quantity transformation with a wide frequency band and wide linear range.

[0033] Input interface board: Can receive data frames, or 104 data frames, or analog quantity inputs, and complete time calibration.

[0034] A / D conversion board: Realizes analog signal feedback acquisition, and is used for analysis and correction and sensor model analysis.

[0035] Notebook computer: An external device. Completes the corresponding test configuration and result data analysis.

[0036] The system control board mainly realizes communication with the control host, test data conversion, and control functions. The system control board consists of an FPGA control baseboard and an ARM backplane. The ARM backplane is the data channel between the control host and the FPGA control board. The test data sent by the host is transmitted to the FPGA via the backplane. At the same time, the FPGA returns the time stamp to the host through the backplane to complete the time calibration function of the system.

[0037] The FPGA on the baseboard is the control core of the entire system. The system uses a Cyclone III FPGA EP3C40F484I6N to complete all control and adjustment functions. EP3C40F484I6N has 40K logic resources, and the I / O rate can reach 200MHz. It is a powerful and low-cost field-programmable control chip. Gigabit Ethernet ports, 100Mbps Ethernet ports with time marking functions, and dual-rate high-speed storage functions are designed around the FPGA on the baseboard.

[0038] The gigabit Ethernet port is used to realize the access of high-speed data frames. The MAC is implemented by the internal controller of the FPGA, and together with the external PHYTER chip KSZ9021, it constitutes a complete Ethernet link; DP83640 is a 100Mbps Ethernet PHY chip that conforms to the 1588 precise time transceiver function. It completes the basic function of receiving IEC 61850-9-2 data frames and returning time marks to the control host.

[0039] The on-board storage system is completed by MT47H64M16 DDR2 SDRAM to perform the necessary six-channel test data storage function. The maximum rate of the DDR2 storage chip can reach 800MHz, and the storage capacity is 128MB, which can fully meet the test requirements.

[0040] The D / A conversion function is the core function of the control board, which is jointly realized by the 16-bit high-speed DAC chip AD768 and the post-stage operational amplifier AD811. The highest conversion rate that AD768 can reach is 30Mbps. In the test, according to the characteristics of the simulation data and the requirements of the software platform analysis function, the DAC conversion rate is designed to be 5Mbps.

[0041] A total of 100 amplitude / frequency experiments are carried out on the DAC output of the system control board to investigate the output accuracy and linearity at different amplitudes and frequencies. The experiment shows that the DAC output can ensure an output error of 0.01mV after coefficient correction, with high output accuracy. The system control board uses a closed-loop regulation method to adjust the zero drift of the output, and adjusts the zero drift of the DAC output by adjusting the resistance value of the high-precision sampling resistor. The zero drift of the DAC output can be controlled below 1mV.

[0042] In the design of power amplifiers, an important application of the Darlington structure is to construct a push - pull output stage to make up for the deficiency of the relatively small h - parameter of the power transistor in a simple push - pull output stage. The power transistor in the output stage is the key for the power amplifier to exhibit the load - driving ability, because all the current on the load comes from the power transistor, and the load obtains energy from the power supply through the power transistor. FE The structure shown in the figure is a Darlington emitter - follower push - pull output circuit, which is a typical application case of Darlington connection in a push - pull output stage. As can be seen from

[0043] Figure 2 the figure, this structure is mainly composed of a bias circuit and a group of emitter - follower Darlington circuits, and this group of emitter - follower Darlington circuits together form a push - pull output stage. Figure 2 As can be known, this structure is mainly composed of a bias circuit and a group of emitter - follower Darlington circuits, and this group of emitter - follower Darlington circuits together build a push - pull output stage.

[0044] The V - BE of the transistor can be considered as a definite constant value (generally 0.6V - 0.7V for silicon materials, approximately 0.3V for germanium materials). At the same time, ignoring the tiny base current, the voltage V - CE across the collector and emitter of Tr1 can be uniquely determined by R1 and R2. The specific mathematical relationship is: BE The V - BE of the transistor can be considered as a definite constant value (generally 0.6V - 0.7V for silicon materials, approximately 0.3V for germanium materials). At the same time, ignoring the tiny base current, the voltage V - CE across the collector and emitter of Tr1 can be uniquely determined by R1 and R2. The specific mathematical relationship is: CE can be determined by R A and R B alone, and the specific mathematical relationship is:

[0045]

[0046] According to the above description, the transistor Tr1 and the resistors R A , R B together constitute a bias voltage source, that is, the bias circuit in the figure. Let the voltage of the bias voltage source be V - B, then V - B is equal to V - BE. bias , then V bias is equal to V CE .

[0047] Tr2 and Tr4 form one path of Darlington connection, Tr3 and Tr5 form another path of Darlington connection, and they together form the upper and lower bridge arms of the push - pull output stage. Figure 2 In the figure, R is a current - limiting resistor, and its function is to limit the static operating current of the output stage to prevent excessive static current from causing excessive static power consumption of the amplifier. Excessive static power consumption of the amplifier will not only cause serious heating of the amplifier, but also affect the power supply utilization rate of the amplifier. According to the connection relationship in the figure, the static current I0 of the output stage can be uniquely determined by the bias circuit and the V - BE of Tr2, Tr3, Tr4, and Tr5. The relationship formula is as follows: BE The static current I0 of the output stage can be uniquely determined by the bias circuit and the V - BE of Tr2, Tr3, Tr4, and Tr5. The relationship formula is as follows:

[0048] I0 = (V bias - 4V BE ) / 2R

[0049] When the collector current of a power transistor reaches more than 1 / 3 of the maximum rated current, a large amount of current flows through the collector, and the current amplification factor h FE will decrease sharply in multiples. So what adverse effects will the sharp decrease of h FE bring to the amplifier design? When the collector current changes, the current amplification factor of the emitter follower also changes accordingly. As a result, the saturation between the emitter and the collector is reached earlier than the design expected value, and saturation distortion occurs in the amplifier output.

[0050] Therefore, the appropriate range of the collector current when a single power transistor works is around 1 / 3 of the maximum rated current of the collector, and it cannot be too large. The present invention adopts Figure 3 a method to disperse the output current in a parallel connection manner to control the heat generation of a single power transistor. Among them, R B is the base current limiting resistor for balancing the parallel-connected power transistors. If there is no such base current limiting resistor R B , when the temperature of Tr1 is higher than that of Tr3 and the collector current of Tr1 increases, the heat generation of Tr1 will increase and the temperature will rise. As a result, the collector current of Tr1 will further increase. In such a cycle, the collector current of Tr1 will become very large. However, the load connected to the amplifier output does not change, and the total output current remains unchanged. The increased part of the collector current of Tr1 is the reduced part of the collector current of Tr3. In this way, while the collector current of Tr1 becomes larger, the collector current of Tr3 will become smaller. In the extreme case, it is equivalent to only Tr1 working, so the function of sharing the current in parallel cannot be achieved.

[0051] The self-zeroing basic framework is as Figure 4 shown. This system can be divided into two parts: the waveform generation channel and the output zero drift and temperature drift adjustment loop (zero adjustment loop). The working principle of the waveform generation channel is as follows: The host computer sends the required test waveform data to the peripheral memory of the controller, and then the controller reads the waveform data in the peripheral memory and converts it into the input data of the signal D / A. The signal D / A generates the required small signal waveform, and then the high-frequency noise is filtered by the low-pass filter and amplified by the high-gain amplifier to obtain the final voltage output test signal with a wide amplitude range.

[0052] According to the configuration of the A / D and the acquisition input circuit, when the input of the acquisition circuit is connected to the output of the amplifier, the digital quantity of the analog signal U A obtained by the A / D is:

[0053]

[0054] Among them, V REFis the reference voltage of the A / D converter, PGA is the A / D variable gain setting parameter, and b1 is the number of bits of the A / D. When the input of the acquisition circuit is shorted (grounded), the digital quantity of the signal obtained by the A / D is actually the bias voltage U of the bias circuit B corresponding digital quantity, that is:

[0055]

[0056] U A can be regarded as the analog quantity U of the zero-drift signal at the output of the amplifier Z and the bias voltage U B superposition, that is:

[0057] U A =U Z +U B

[0058] Therefore, the A / D digital quantity corresponding to the actual zero-drift analog signal at the output of the amplifier is:

[0059]

[0060] According to the output voltage range of the preamplifier of the zero-adjusting D / A and the gain of the amplifier, the voltage output range of the amplifier k corresponding to the b2-bit data of the zero-adjusting D / A can be obtained. The digital quantity corresponding to the zero drift of the amplifier in the D / A is:

[0061]

[0062] Therefore, the relational expression of the zero-drift quantity at the output of the amplifier corresponding to the digital quantities of the feedback A / D and the zero-adjusting D / A can be obtained as:

[0063]

[0064] By establishing a zero-drift regulator in the FPGA according to the above relational expression, the zero-adjusting work can be realized. The self-zero-adjusting control logic is as Figure 5 shown. The working principle of the zero-adjusting loop is: before the start of the test work and during the working interval, the zero-adjusting function is started. The controller controls the signal D / A and the zero-adjusting D / A to make their outputs zero. The total output drift of the system is obtained at the output end of the amplifier. The signal of the total output is sampled back by the feedback A / D, and the digital signal of the total output drift is obtained in the controller. The correction signal is obtained through calculation and processing and sent to the zero-adjusting D / A to make the total output zero. However, since there is a long period of time from power-on to temperature stabilization in the system, there is a large temperature drift during this period. The zero-adjusting needs to be carried out dynamically until the temperature is stabilized and then the test work is carried out.

[0065] Although the above-described illustrative embodiments of the present invention have been described to facilitate understanding of the present invention by those skilled in the art, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention defined and determined by the appended claims, these changes are obvious, and all inventions made using the concept of the present invention are within the scope of protection.

Claims

1. A signal conversion device used for feeder automation terminal testing, characterized in that Including: Host computer: Composed of a main CPU, a large-capacity storage unit, a control bus, and a data bus, it realizes test function management, transient test signal reception and organization, steady-state test signal generation, test process control, synchronization control, and test result analysis; D / A conversion board: Converts digital test signals into analog test signals; Analog output board: Composed of multiple wideband amplifiers, it realizes analog quantity transformation with a wide frequency band and a wide linear range; A / D conversion board: Realizes analog signal sampling for analysis and correction.

2. The signal conversion device according to claim 1, wherein The said wideband amplifier adopts a Darlington structure, with the output stages in parallel and having a self-zeroing function.

3. The signal conversion device according to claim 1, characterized in that The said D / A conversion board has a self-zeroing function, and its implementation method is as follows: The host computer sends the required test waveform data to the peripheral memory of the controller, and then the controller reads the waveform data in the peripheral memory and converts it into the input data of the signal D / A. The signal D / A generates the required small-signal waveform, and then the high-frequency noise is filtered out by a low-pass filter and amplified by a high-gain amplifier to obtain the final voltage output test signal with a wide amplitude range.

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