Preparation method of low-loss photonic device

Through the coordinated regulation of wet etching and secondary deposition processes and high-temperature annealing treatment, the sidewall morphology of the photonic device is optimized, and the problem of difficult control of the surface roughness of the photonic device is solved, and the preparation of photonic devices with low loss and high performance is achieved.

CN120352980APending Publication Date: 2025-07-22ZHEJIANG UNIV
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Patent Information

Application Number
CN202510529277.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-25
Publication Date
2025-07-22

AI Technical Summary

Technical Problem

During the preparation process of existing photonic devices, the surface roughness is difficult to accurately control, resulting in a degradation of optical performance. Especially in compact photonic integrated circuits, the nano-scale perturbation of the sidewall of the waveguide significantly affects the effective refractive index distribution and pattern locality, increasing the loss and scattering effects.

Method used

The coordinated regulation of wet etching and secondary deposition processes is adopted to reduce the micron-scale surface roughness generated by dry etching through chemical corrosion, and promote internal reconstruction of the film through high-temperature annealing. Combined with low-pressure chemical vapor deposition and other processes, the morphology of the device sidewall is optimized to ensure the consistency of the material in front and back.

Benefits of technology

Without changing the device size, the surface roughness is significantly reduced, the unit loss of waveguide is reduced by 97%, the quality factor of the micro-ring resonator is increased by 135%, the performance retention rate is up to 100%, and the production efficiency is high.

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Abstract

The invention provides a preparation method of a low-loss photonic device. The morphology of the side wall of the device is optimized based on a collaborative process of wet etching and secondary deposition of a core layer. The method comprises the following steps: firstly, finishing main body structure processing on the photonic device, then, carrying out fine processing on the side wall by adopting a wet etching technology, and effectively reducing micron-sized surface roughness generated by dry etching through a chemical corrosion effect; then, uniformly growing a core layer film on the surface of the device to eliminate film performance discreteness caused by process fluctuation and reduce roughness; and finally, the internal reconstruction of the core layer film is promoted through a thermal activation effect of a high-temperature annealing treatment process, so that the compactness of the film is improved by about 30%, and the surface roughness is reduced to a sub-nanometer level.
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Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to a method for fabricating a low-loss photonic device. Background Art

[0002] At present, the transistor size has approached the physical limit, but people's demand for high data capacity and high-speed communication is increasing day by day. Therefore, on-chip optical interconnection technology has come into people's view. Optical interconnection technology is a kind of optical communication technology that uses laser beams to transmit data instead of electronic semiconductor signals and is a new generation of technology for developing and integrating optical devices using existing semiconductor processes. Compared with traditional electrical transmission, optical interconnection technology breaks the limitations of traditional electrical interconnection in terms of transmission speed, bandwidth, power consumption, and cost by virtue of characteristics such as strong anti-interference ability, low latency, low loss, and large bandwidth. Photonic devices include devices such as optical waveguides, grating couplers, microring resonators, and beam splitters. These devices can achieve functions such as efficient information reception, information processing, and information transmission through mutual combination and collaborative work.

[0003] The roughness of the surface of a photonic device is one of the core parameters determining its optical performance, and its essential influence stems from the mode coupling distortion and energy dissipation caused by the surface scattering effect. In the dry etching process, the lattice damage and anisotropic etching characteristics caused by ion bombardment will lead to the formation of a periodic undulating structure with a sub-wavelength order on the sidewall of the waveguide. This non-uniform interface will trigger the evanescent field leakage of the guided wave mode, and through the Bragg scattering mechanism, it will have an asymmetric energy coupling with the radiation mode, ultimately manifested as the intrinsic transmission loss of the device. Especially in a compact photonic integrated circuit, when the cross-sectional size of the waveguide is close to the optical wavelength order, the nanoscale perturbation of the surface topography will significantly change the effective refractive index distribution, resulting in the degradation of mode localization.

[0004] In a photonic integration system, the size of the optical waveguide (including width, thickness, and geometric shape) is an important parameter determining the optical performance of the device and the system compatibility. These size parameters directly affect the propagation mode of the optical waveguide: too small a size may lead to mode overlap and cause crosstalk between modes; too large a size will enhance the loss and scattering effect. Once the device size is determined, any adjustment will not only damage the matching with upstream and downstream components (such as light sources, detectors, coupling structures, etc.), but may also lead to a significant increase in cost due to process reconstruction. Therefore, on the premise of not changing the device size, precise control of the surface roughness becomes the key to improving performance - a slight roughness on the surface or sidewall of the waveguide will significantly increase the Rayleigh scattering loss, resulting in a decline in the overall performance of the device. Summary of the Invention

[0005] The present invention provides a method for fabricating a low-loss photonic device. Without changing the device size, this method significantly reduces the surface roughness, thereby greatly reducing the loss of the silicon nitride optical waveguide.

[0006] Specifically, the present invention optimizes the sidewall topography of the device through the synergistic process of wet etching and secondary deposition of the core layer. First, the main structure of the photonic device is processed, and then the sidewalls are refined by wet etching technology. Through chemical etching, the micron-scale surface roughness generated by dry etching is effectively reduced. Immediately afterwards, a core layer thin film is uniformly grown on the device surface to eliminate the discreteness of the film performance caused by process fluctuations and reduce the roughness. Finally, through the thermal activation effect of the high-temperature annealing treatment process, the internal reconstruction of the core layer thin film is promoted, and the film density is improved.

[0007] Although wet etching and secondary deposition can reduce the roughness to a certain extent, in the process of fabricating photonic devices, the single use of wet etching or secondary thin film deposition process is likely to cause the key structure size to deviate from the design target value, thereby leading to the deterioration of optical performance. In particular, wet etching is prone to over-etching, resulting in uncontrollable deviations of key parameters such as waveguide width or grating period. Although simply relying on secondary deposition can supplement the material thickness, it cannot effectively correct the substrate topography error, and the density of interface defect states is relatively high, resulting in a decrease in carrier transport efficiency. The present invention realizes the synergistic regulation of wet etching and secondary deposition processes. On the one hand, it utilizes the global topography correction ability of the etching process, and on the other hand, it realizes nanoscale size compensation and surface roughness optimization through the deposition process. At the same time, using the process of wet etching first and then secondary deposition can ensure the consistency of the material before and after. Taking Si3N4 as an example, wet etching can break the originally dense Si3N4 lattice on the surface, forming broken bonds such as N- and Si-, so that these broken bonds can be connected to the chemical bonds in the newly deposited thin film during secondary deposition, making it easier for the two to combine into a whole, thus ensuring the consistency of the material before and after. And combined with annealing treatment to promote interface atom reconstruction and stress release, finally, the synchronous improvement of the device structure accuracy and optoelectronic performance is achieved.

[0008] The technical solution adopted by the present invention specifically includes the following steps: (1) Form an initial structure of a photonic device on a substrate; (2) Perform wet etching on the initial structure of the photonic device; (3) Secondarily deposit a core layer thin film of the photonic device on the surface of the structure after wet etching to compensate for the size deviation caused by etching; (4) Perform annealing treatment.

[0009] Further, the photonic device in step (1) is one of an optical waveguide, a grating coupler, a multimode interference coupler, a microring resonator, a photodetector, and an optical modulator.

[0010] Further, the etching solution used in the wet etching in step (2) is a phosphoric acid solution or a hydrofluoric acid solution.

[0011] Further, the thickness of the wet etching in step (2) is 1 nm - 500 nm.

[0012] Further, the secondary deposition process in step (3) is one of low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, molecular beam epitaxy, and magnetron sputtering.

[0013] Further, the annealing treatment in step (4) is carried out in a mixed atmosphere of nitrogen, oxygen, hydrogen, or inert gas.

[0014] In some embodiments of the present invention, the initial structure of the silicon nitride optical device can be obtained through the following steps: (1.1) Grow a silicon dioxide undercladding on the silicon substrate using plasma-enhanced chemical vapor deposition; (1.2) Deposit a silicon nitride thin film using low-pressure plasma chemical vapor deposition; (1.3) Complete the pattern transfer using photolithography and etching methods, and transfer the optical waveguide pattern on the mask plate to the photoresist; (1.4) Etch the silicon nitride thin film using an inductively coupled plasma etching system to obtain the silicon nitride optical device.

[0015] The photolithography and etching method described in step 1.3 is as follows: First, grow a hard mask, then spin-coat the photoresist, and perform photolithography using ARF lithography technology.

[0016] Further, the method for fabricating the silicon nitride optical device into a low-loss photonic device is as follows: (1) Wet-etch the silicon nitride optical device using an acid solution; the acid solution is an 85% hot phosphoric acid solution at 180 °C; (2) Grow a silicon nitride thin film with the same thickness as the wet etching using low-pressure plasma chemical vapor deposition; (3) Perform a two-hour high-temperature annealing at 1150 °C in an oxygen atmosphere; (4) Grow a silicon dioxide overcladding using plasma-enhanced chemical vapor deposition; (5) Polish the deposited overcladding silicon dioxide using chemical mechanical planarization.

[0017] The beneficial technical effects of the present invention are as follows: (1) Without changing the device size, significantly reduce the surface roughness; the waveguide unit loss is reduced by 97%, the quality factor of the micro-ring resonator is increased by 135%, and the performance retention rate reaches 100%.

[0018] (2) By only supplementing wet etching - deposition of ±10 nm, the above low-loss device can be obtained, which has higher production efficiency compared to a single process. Description of the Drawings

[0019] Figure 1 is a flowchart of a preparation method provided by the present invention; Figure 2 is a process schematic diagram provided by an embodiment of the present invention; Figure 3 are the test data of the photonic waveguide without optimizing the process of the present invention; Figure 4 are the test data of the photonic waveguide after optimizing the process according to the embodiment of the present invention. Specific embodiments

[0020] The following embodiments are used to further illustrate the present invention, and the purpose is to explain the present invention rather than limit the scope of the present invention. Unless otherwise specified, the following uses parts by weight and weight percentages.

[0021] The raw materials used in the present invention are all conventional commercially available products unless otherwise specified; the methods used in the present invention are all conventional methods in the art unless otherwise specified.

[0022] The following further illustrates the embodiments of the present invention through multiple embodiments.

[0023] It should be clear that the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work belong to the scope protected by the present application.

[0024] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0025] Those skilled in the art should know that the main device structures of the following embodiments and comparative examples are the same, and the waveguide unit loss is only affected by the single factor of the side roughness. Therefore, in the following embodiments, the side roughness cannot be directly characterized, and those skilled in the art can undoubtedly estimate the side roughness through the waveguide unit loss.

[0026] Embodiment 1 Step 1, prepare a silicon substrate and perform chemical cleaning, such as Figure 2-1 ; Step 2, use plasma-enhanced chemical vapor deposition on the prepared silicon substrate to grow a 4.5 μm thick silicon dioxide undercladding, such as Figure 2-2As shown by 101 in [reference]. In this step, preparing the silica undercladding using plasma-enhanced chemical vapor deposition (PECVD) has a higher growth efficiency and faster speed compared to thermal oxidation; the refractive index of silicon nitride is approximately 2.1, significantly higher than 1.45 of silica, and the large refractive index difference between the two can effectively confine the optical signal to propagate in the core silicon waveguide.

[0027] Step three, deposit a 300 nm silicon nitride thin film on the grown 4.5 μm silica using low-pressure plasma chemical vapor deposition, as Figure 2-3 shown by 102 in [reference]. In this step, the silicon nitride thin film deposited by low-pressure plasma chemical vapor deposition (LPCVD) is denser and has a lower N-H bond content compared to that deposited by PECVD, thus improving the performance of silicon nitride optical devices.

[0028] Step four, grow the hard mask.

[0029] Step five, spin-coat photoresist and perform photolithography using ARF lithography technology to transfer the optical waveguide pattern on the mask plate to the photoresist, as Figure 2-4 shown by 103 in [reference]. In this step, the ARF lithography technology uses a 193 nm wavelength light source, has higher lithography accuracy, and smaller sidewall roughness of the photoresist.

[0030] Step six, etch the silicon nitride thin film using an inductively coupled plasma etching system to obtain the silicon nitride optical waveguide, as Figure 2 shown in Figure -5. After testing, the waveguide unit loss is 1.8 dB / cm, and the quality factor of the microring resonator is 209525.

[0031] Step seven, ashing and removing the residual photoresist and hard mask.

[0032] Step eight, wet-etch the silicon nitride optical device with an 85% hot phosphoric acid solution at 180 °C for 10 nm.

[0033] Step nine, deposit another 10 nm silicon nitride thin film using low-pressure plasma chemical vapor deposition with the same parameters as in step three, as Figure 2 shown by 104 in Figure -6. In this step, the parameters for the secondary growth of silicon nitride are kept the same as the first growth to ensure the uniformity of device properties and reduce the influence of process fluctuations; the depth of the wet etching is precisely matched to the thickness of the secondary growth of silicon nitride, minimizing the interference of size changes on device performance.

[0034] Step ten, perform a two-hour high-temperature annealing at 1150 °C in an oxygen atmosphere. In this step, the high-temperature annealing process in an oxygen atmosphere can reduce the N-H bonds in silicon nitride, enhance the film densification, and at the same time repair the broken bonds caused by etching, reducing defect states and absorption losses.

[0035] Step eleven, use plasma enhanced chemical vapor deposition with the same parameters as in step two to grow a 2.5-μm-thick silica upper cladding, as shown in 105 of Figure 2 -7.

[0036] Step twelve, use chemical mechanical planarization to grind the deposited upper cladding silica flat and control its thickness to be 2 μm above the silicon nitride thin film, as shown in 105 of Figure 2 -8.

[0037] Through the above steps, the final low-loss silicon nitride optical waveguide is obtained. After calculation, the waveguide unit loss is reduced from 1.8 dB / cm to 0.04 dB / cm, greatly reducing the loss of the silicon nitride optical waveguide. The quality factor of the microring resonator reaches 470,000, and the retention rate is 100%. Comparative example 1 The difference from Example 1 is that there is only wet etching and no secondary deposition. Etching depth Waveguide unit loss Micro-ring resonator quality factor 1 5 nm 1.26 dB / cm 203694 2 10 nm 1.14 dB / cm 184963 3 20 nm 1.29 dB / cm 113658 Comparative example 2 The difference from Example 1 is that there is only secondary deposition. Deposition thickness Waveguide unit loss Micro-ring resonator quality factor 1 5 nm 0.98 dB / cm 173175 2 10 nm 0.93 dB / cm 156254 3 20 nm 0.95 dB / cm 127436 Example 2 Step one, prepare a silicon-on-insulator substrate and perform chemical cleaning; Step two, grow a hard mask.

[0038] Step three, spin-coat photoresist and use ARF lithography technology for lithography to transfer the optical waveguide pattern on the mask plate to the photoresist. In this step, the ARF lithography technology uses a 193-nm wavelength light source, which has higher lithography accuracy and smaller sidewall roughness of the photoresist.

[0039] Step four, use an inductively coupled plasma etching system to etch silicon to obtain a silicon optical waveguide.

[0040] Step five, ashing and removing the residual photoresist and hard mask.

[0041] Step six, wet-etch the silicon optical device with a mixed solution of nitric acid and hydrofluoric acid for 10 nm.

[0042] Step seven, use epitaxy to regrow a 10-nm-thick single-crystalline silicon layer again. In this step, the depth of wet etching is precisely matched with the thickness of the secondary-grown single-crystalline silicon, minimizing the interference of size changes on the device performance.

[0043] Step eight, perform high-temperature annealing in a hydrogen gas atmosphere. In this step, the high-temperature annealing process in a hydrogen atmosphere can activate the silicon atoms on the surface of the silicon optical device, and the silicon atoms automatically move in the direction of lower potential energy, thereby reducing the surface roughness.

[0044] Step 9: Grow a 2.5-μm-thick silica upper cladding using chemical vapor deposition.

[0045] Step 10: Polish the deposited upper cladding silica using chemical mechanical planarization and control its thickness to be 2 μm above the silicon nitride thin film.

[0046] Example 3 Step 1: Prepare a silicon-on-insulator substrate and perform chemical cleaning; Step 2: Grow a hard mask.

[0047] Step 3: Spin-coat photoresist and perform photolithography using ARF lithography technology to transfer the optical waveguide pattern on the mask plate to the photoresist. In this step, the ARF lithography technology uses a 193-nm wavelength light source, which has higher lithography accuracy and smaller sidewall roughness of the photoresist.

[0048] Step 4: Etch silicon using an inductively coupled plasma etching system to obtain a silicon optical waveguide.

[0049] Step 5: Ash and remove the residual photoresist and hard mask.

[0050] Step 6: Wet-etch the silicon optical device by 1 nm using a mixed solution of nitric acid and hydrofluoric acid.

[0051] Step 7: Regrow a 1-nm-thick single-crystalline silicon layer using epitaxy. In this step, the depth of the wet etching is precisely matched to the thickness of the secondary-grown single-crystalline silicon to minimize the interference of size changes on the device performance.

[0052] Step 8: Perform high-temperature annealing in a hydrogen atmosphere. In this step, the high-temperature annealing process in a hydrogen atmosphere can activate the silicon atoms on the surface of the silicon optical device, and the silicon atoms automatically move in the direction of lower potential energy, thereby reducing the surface roughness.

[0053] Step 9: Grow a 2.5-μm-thick silica upper cladding using chemical vapor deposition.

[0054] Step 10: Polish the deposited upper cladding silica using chemical mechanical planarization and control its thickness to be 2 μm above the silicon nitride thin film.

[0055] Example 4 Step 1: Prepare a silicon-on-insulator substrate and perform chemical cleaning; Step 2: Grow a hard mask.

[0056] Step 3: Spin-coat photoresist and perform photolithography using ARF photolithography technology to transfer the optical waveguide pattern on the mask to the photoresist. In this step, the ARF photolithography technology uses a 193nm wavelength light source, which has higher photolithography precision and smaller sidewall roughness of the photoresist.

[0057] Step 4: Etch silicon using an inductively coupled plasma etching system to obtain a silicon optical waveguide.

[0058] Step 5: Ash and remove the residual photoresist and hard mask.

[0059] Step 6: Wet-etch the silicon optical device with a mixed solution of nitric acid and hydrofluoric acid for 500nm.

[0060] Step 7: Regrow a 500 nm layer of single-crystalline silicon using the epitaxial method. In this step, the depth of the wet etching is precisely matched with the thickness of the second-grown single-crystalline silicon to minimize the interference of dimensional changes on the device performance.

[0061] Step 8: Perform high-temperature annealing in a hydrogen atmosphere. In this step, the high-temperature annealing process in a hydrogen atmosphere can activate the silicon atoms on the surface of the silicon optical device, and the silicon atoms automatically move towards the direction of lower potential energy, thereby reducing the surface roughness.

[0062] Step 9: Grow a 2.5μm silica upper cladding using chemical vapor deposition.

[0063] Step 10: Polish the deposited upper cladding silica using chemical mechanical planarization and control its thickness to be 2μm above the silicon nitride film.

[0064] The above embodiments have detailed the structure, features, and effects of the present invention. The above are only the preferred embodiments of the present invention. Any changes made according to the concept of the present invention, or equivalent embodiments modified into equivalent changes, still within the scope covered by the specification, shall fall within the protection scope of the present invention.

Claims

1. A preparation method of a low-loss photonic device, characterized in that, It has the following steps: (1) Form an initial structure of a photonic device on a substrate; (2) Perform wet etching on the initial structure of the photonic device; (3) Secondarily deposit a thin film of the core layer of the photonic device on the surface of the structure after wet etching to compensate for the size deviation caused by etching and at the same time reduce the surface roughness of the structure; (4) Perform annealing treatment.

2. The preparation method according to claim 1, wherein The photonic device in step (1) is one or more of an optical waveguide, a grating coupler, a multimode interference coupler, a microring resonator, a photodetector, and an optical modulator.

3. The preparation method according to claim 1, characterized in that, The etching solution used for the wet etching in step (2) includes a phosphoric acid solution and a hydrofluoric acid solution.

4. The preparation method according to claim 1, characterized in that, The thickness of the wet etching in step (2) is 1 nm - 500 nm.

5. The preparation method according to claim 1, characterized in that, The method of the secondary deposition in step (3) is one of low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, molecular beam epitaxy, and magnetron sputtering.

6. The preparation method according to claim 1, characterized in that, The annealing treatment in step (4) is carried out in a mixed atmosphere of nitrogen, oxygen, hydrogen, or an inert gas.

7. The method for preparing a low-loss photonic device according to claim 1, wherein The annealing treatment in step (4) includes ordinary thermal annealing and rapid thermal annealing.

Citation Information

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