P-NiO / N-Ga2O3 heterojunction diode with NiO field limiting ring and floating field plate composite terminal structure and preparation method of P-NiO / N-Ga2O3 heterojunction diode

Abstract

The invention provides a P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and floating field plate composite terminal structure and a preparation method of the P-NiO / N-Ga2O3 heterojunction diode. Comprising a cathode metal layer, a highly-doped N-type Ga2O3 substrate, a lowly-doped N-type Ga2O3 epitaxial layer, an oxide dielectric layer, a P-type NiO layer, a plurality of NiO field limiting rings, anode metal, an anode field plate, a plurality of floating metal field plates and a passivation layer which are sequentially stacked from bottom to top. According to the technical scheme, the terminal structure suitable for the Ga2O3 power device is provided, so that the Ga2O3 power device has high breakdown voltage. The core of the invention lies in that by means of the NiO field limiting ring and floating field plate composite terminal structure, the breakdown voltage of the device is obviously improved, and meanwhile, the dependence on the processing technology is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of power semiconductors, and particularly to a P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting rings and floating field plates and a preparation method thereof. Background Art

[0002] The emergence of new technologies such as electric vehicles, high-voltage smart grids, and 5G communications has put forward higher requirements for the performance of power devices. As an emerging ultra-wide bandgap semiconductor material, Ga2O3 has the greatest advantage of its ultra-wide bandgap width and a critical breakdown field strength as high as 8 MV / cm. Compared with the third-generation semiconductors, the Baliga figure of merit of Ga2O3 is 10 times that of SiC and 4 times that of GaN. This means that under the same breakdown voltage, Ga2O3 power devices can achieve smaller on-resistance and smaller switching losses. In addition, it is easy to grow low-cost, large-size single-crystal substrates, and it has good stability in extremely harsh environments such as high temperature and high radiation. Therefore, the Ga2O3 material has become the research focus and hotspot of new power electronic devices.

[0003] Although great research progress has been made in Ga2O3 materials and power devices, there are still some challenges. One is that Ga2O3 diodes have problems such as curvature effect and edge electric field concentration, and cannot give full play to the advantage of the high critical breakdown field strength of the material. The other is that Ga2O3 diodes are highly dependent on the processing technology (that is, small changes in the terminal structure parameters will have a great impact on the device performance. For example, in the field limiting ring structure, the optimal ring spacing is usually less than 1 μm), so the process requirements are relatively high. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting rings and floating field plates and a preparation method thereof, aiming to provide a terminal structure suitable for Ga2O3 power devices so that Ga2O3 power devices have a higher breakdown voltage. The core of the present invention is to significantly improve the breakdown voltage of the device by means of the composite terminal structure of NiO field limiting rings and floating field plates, and at the same time reduce the dependence on the processing technology.

[0005] To achieve the above object, the present invention adopts the following technical solution: A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting rings and floating field plates, comprising a cathode metal layer, a highly doped N-type Ga2O3 substrate, a low-doped N-type Ga2O3 epitaxial layer, an oxide dielectric layer, a P-type NiO layer, a plurality of NiO field limiting rings, an anode metal and an anode field plate, a plurality of floating metal field plates, and a passivation layer, which are stacked in sequence from bottom to top; The described cathode metal layer is deposited on the lower surface of a highly doped N-type Ga2O3 substrate to form an ohmic contact; the oxide dielectric layer is evenly distributed on a partial surface of the lightly doped N-type Ga2O3 epitaxial layer (all partial surfaces mentioned in this invention refer to non-total surfaces), forming the dielectric of the field plate structure; the P-type NiO layer and several NiO field limit rings constitute the first combination part; the first combination part is evenly distributed on a partial surface of the lightly doped N-type Ga2O3 epitaxial layer and forms an alternating distribution structure with the oxide dielectric layer; the anode metal and the anode field plate cover the entire surface of the P-type NiO layer and a partial surface of the oxide dielectric layer to form a field plate structure; several floating metal field plates are evenly distributed on a partial surface of the oxide dielectric layer and the entire surface of the NiO field limit rings, constituting the second combination part to form a floating field plate structure; the passivation layer covers the entire surfaces of the oxide dielectric layer and several floating metal field plates and a partial surface of the anode metal and the anode field plate to protect the terminal structure.

[0006] In a preferred embodiment, the first combination part and the oxide dielectric layer show a periodic distribution of ABAB... on the lightly doped N-type Ga2O3 epitaxial layer, where A represents the first combination part, B represents the oxide dielectric layer, and the side walls of the first combination part and the oxide dielectric layer are closely attached to form a P-NiO / N-Ga2O3 heterojunction PN junction and NiO field limit rings.

[0007] In a preferred embodiment, the materials for preparing the cathode metal layer include at least one of Ti, Ni, Ag, and Au, and the total thickness of the cathode metal layer is 200 - 500 nm.

[0008] In a preferred embodiment, the thickness of the highly doped N-type Ga2O3 substrate is 50 - 650 μm, and the doping concentration is 10 18 -10 20 cm -3 , and the doping elements are at least one of Si and Sn; the thickness of the lightly doped N-type Ga2O3 epitaxial layer is 10 - 20 μm, and the doping concentration is 10 16 -10 17 cm -3 , and the doping elements are at least one of Si and Sn.

[0009] In a preferred embodiment, the materials for preparing the oxide dielectric layer include at least one of SiO2, Al2O3, and Si3N4, the thickness of the oxide dielectric layer is 600 - 800 nm, the length W1 of the oxide dielectric layer is 6 - 10 μm, and the spacing of the oxide dielectric layer is 5 - 10 μm.

[0010] In a preferred embodiment, the thickness of the first combination part is 400 - 600 nm, and the P-type carrier concentration is 10 17 -10 18 cm -3 ; wherein the length of the P-type NiO layer is 100 - 500 μm, the length of the NiO field limiting ring is 5 - 10 μm, the spacing W1 is 6 - 10 μm, and the number is 4 - 8, forming an alternating distribution structure with the oxide dielectric layer.

[0011] It should be particularly noted that the length range of the NiO field limiting ring is the same as the spacing range of the oxide dielectric layer, and the spacing range of the NiO field limiting ring is the same as the length range of the oxide dielectric layer. This is because the NiO field limiting ring and the oxide dielectric layer are alternately distributed. The length of NiO is also the spacing of the dielectric layer, and the spacing of NiO is also the length of the dielectric layer; in the same embodiment, the selected length of the NiO field limiting ring should be equal to the spacing of the oxide dielectric layer, and the selected spacing of the NiO field limiting ring should be equal to the length of the dielectric layer.

[0012] In a preferred embodiment, the materials for preparing the anode metal and the anode field plate include at least one of Ni, Mo, W, Pt, Al, Au, and Ag. The length of the anode metal is 100 - 500 μm, and the length L of the anode field plate fp is 4 - 8 μm.

[0013] It should be particularly noted that the length of the anode metal is the same as the length range of the P-type NiO layer. In the same embodiment, the selected length of the anode metal should be equal to the length of the P-type NiO dielectric layer.

[0014] In a preferred embodiment, the materials for preparing the floating metal field plate include at least one of Ni, Mo, W, Pt, Al, Au, and Ag. The length of the floating metal field plate is 4 - 8 μm, and the number of the floating metal field plates is 4 - 8.

[0015] It should be particularly noted that since the NiO field limiting ring and the floating metal field plate are configured in groups in terms of structure, in the same embodiment, the selected number of the NiO field limiting rings should be the same as the number of the floating metal field plates.

[0016] In a preferred embodiment, the materials for preparing the passivation layer include polyimide (PI), Si3N4, SiO2, and SU-8 photoresist, and the thickness of the passivation layer is 5 - 10 μm.

[0017] The present invention also provides a method for preparing a P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate, and prepares the P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate, including the following steps: Step 1: Perform pretreatment on the highly doped N-type Ga2O3 substrate to remove surface particles and stains; Step 2: Deposit a low-doped N-type Ga2O3 epitaxial layer on the upper surface of the pretreated highly doped N-type Ga2O3 substrate; Step 3: Deposit an oxide layer on the upper surface of the low-doped N-type Ga2O3 epitaxial layer; Step 4: Etch the oxide deposited in Step 3 through a standard photolithography process to form an oxide dielectric layer; Step 5: Deposit a layer of P-type NiO on the upper surface of the etched sample, where a part of the NiO is deposited on the oxide dielectric layer and another part of the NiO is deposited on the low-doped N-type Ga2O3 epitaxial layer; Step 6: Etch the NiO deposited in Step 5 through a standard photolithography process until the NiO on the oxide dielectric layer is completely removed, forming a P-type NiO layer and several NiO field limiting rings; Step 7: Deposit a layer of metal on the sample surface, and form an anode metal, an anode field plate and several floating metal field plates through a standard lift-off process; Step 8: Deposit a cathode metal layer on the lower surface of the highly doped N-type Ga2O3 substrate; Step 9: Deposit a layer of oxide on the upper surface of the sample, and form a passivation layer through a standard photolithography process.

[0018] More specifically, in Step 2, a hydride vapor phase epitaxy or metal organic chemical vapor deposition (MOCVD) process can be used to grow a low-doped N-type Ga2O3 epitaxial layer on the upper surface of the pretreated highly doped N-type Ga2O3 substrate, but it is not limited thereto.

[0019] More specifically, in Steps 7 and 8, one or more methods of sputtering processes including magnetron sputtering, thermal evaporation, and electron beam evaporation can be used to deposit the metal layer, but it is not limited thereto.

[0020] More specifically, when the passivation layer material in Step 9 is selected as PI, a standard PI photoresist lithography process can be used to form the passivation layer.

[0021] Compared with the prior art, the present invention has the following beneficial effects: A floating field plate field limiting ring composite terminal structure is introduced into the Ga2O3 power device. With the help of several NiO field limiting ring terminals, when the device breaks down in reverse, the depletion region extends to the ends of each field limiting ring, and the electric field distribution is more uniform. With the help of the field plate structure (including the anode field plate and several floating field plates), a low potential is introduced to attract the electric field lines to extend to the area covered by the field plates, alleviating the electric field concentration effect at the main junction and the ends of the NiO field limiting rings, further optimizing the electric field distribution, and improving the device breakdown voltage. In particular, several floating field plates are laid on the oxide dielectric layer between adjacent NiO field limiting rings, so that the device obtains a higher breakdown voltage when the spacing between the NiO field limiting rings is larger, reducing the device's dependence on the process size. That is to say, combining the NiO field limiting ring structure with the floating field plate structure can enable the Ga2O3 power device provided by the present invention to still have a high breakdown voltage when the spacing of the field limiting rings is relatively wide, thus simplifying the device process. Compared with other P-NiO / N-Ga2O3 heterojunction diodes, the preparation process of this device is simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 FIG. is a schematic structural diagram of a P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and a floating field plate composite terminal structure according to a preferred embodiment; Figure 2 FIG. is a specific process preparation diagram of a P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and a floating field plate composite terminal structure according to a preferred embodiment; Figure 3 FIG. is a comparison diagram of the surface electric field distribution of a P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and a floating field plate composite terminal structure and a P-NiO / N-Ga2O3 heterojunction diode with only a NiO field limiting ring structure at a reverse voltage of 3000 V according to a preferred embodiment; Figure 4 FIG. is a schematic diagram showing the change of the breakdown voltage of a P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and a floating field plate composite terminal structure and a P-NiO / N-Ga2O3 heterojunction diode with only a NiO field limiting ring structure with the spacing of the field limiting rings; DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0024] The present invention provides a Ga2O3 power device with a NiO field limiting ring and a floating field plate composite terminal structure and a preparation method thereof. To make the purpose, technical solution and effect of the present invention clearer and more definite, the present invention will be further described in detail below. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0025] It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present application belongs. The terms used in the description of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0026] Terms used herein such as "vertical direction", "horizontal", "upper", "lower", "left", "right" and similar expressions are only for illustrative purposes and do not represent the only embodiments.

[0027] In the present invention, unless otherwise clearly specified and defined, the first feature being "above", "over" and "on" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature has a higher horizontal height than the second feature. The first feature being "under", "below" and "beneath" the second feature may be that the first feature is directly below or obliquely below the second feature, or simply means that the first feature has a lower horizontal height than the second feature.

[0028] If there are descriptions involving "first", "second", etc. in the embodiments of the present invention, such descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features.

[0029] A P-NiO / N-Ga2O3 heterojunction diode having a composite terminal structure of a NiO field limiting ring and a floating field plate, refer to Figures 1-4 , which includes a cathode metal layer 1, a highly doped N-type Ga2O3 substrate 2, a low-doped N-type Ga2O3 epitaxial layer 3, an oxide dielectric layer 4, a P-type NiO layer 51, several NiO field limiting rings 52, an anode metal and an anode field plate 61, several floating metal field plates 62, and a passivation layer 7, which are stacked in sequence from bottom to top. The P-type NiO layer 51 and several NiO field limiting rings 52 form a first combination part 5; the first combination part 5 is equally spaced and distributed on a part of the surface of the low-doped N-type Ga2O3 epitaxial layer 3 and forms an alternating distribution structure with the oxide dielectric layer 4; the anode metal and the anode field plate 61 cover the entire surface of the P-type NiO layer 51 and a part of the surface of the oxide dielectric layer 4, and several floating metal field plates 62 are equally spaced and distributed on a part of the surface of the oxide dielectric layer 4 and the entire surface of the NiO field limiting rings 52, and the anode metal and the anode field plate 61 and the floating metal field plates 62 form a second combination part 6; Refer to Figure 2, the present invention prepares a P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate, and the following embodiments are given: In this embodiment, the material of the cathode metal layer 1 is selected as Ni / Au, and the thickness is 50 / 250 nm (where the Ni metal layer is at the bottom with a thickness of 20 nm, and the Au metal layer is on the top with a thickness of 250 nm).

[0030] In this embodiment, the thickness of the highly doped N-type Ga2O3 substrate 2 is 500 μm, and the doping concentration is 1×10 18 cm -3 .

[0031] In this embodiment, the thickness of the lowly doped N-type Ga2O3 substrate 3 is 10 μm, and the doping concentration is 1.2×10 16 cm -3 .

[0032] In this embodiment, the material of the oxide dielectric layer 4 is selected as SiO2, the thickness is 600 nm, the length W1 is 6 μm, and the spacing is 5 μm.

[0033] In this embodiment, the thickness of the P-type NiO layer 51 and several NiO field limiting rings 52 is 400 nm, and the P-type carrier concentration is 7.6×10 17 cm -3 ; where the length of the P-type NiO layer 51 is 180 μm, the length of the NiO field limiting ring 52 is 5 μm, the spacing W1 is 6 μm, and the number is 4.

[0034] In this embodiment, the material of the anode metal and anode field plate 61 is selected as Ni / Au, the thickness is 50 / 250 nm (where the Ni metal layer is at the bottom with a thickness of 20 nm, and the Au metal layer is on the top with a thickness of 250 nm), where the length of the anode metal is 180 μm, and the length L of the anode field plate fp is 5 μm.

[0035] In this embodiment, the material of several floating metal field plates 62 is selected as Ni / Au, the thickness is 50 / 250 nm (where the Ni metal layer is at the bottom with a thickness of 20 nm, and the Au metal layer is on the top with a thickness of 250 nm), the length of the floating field plate is 5 μm, and the number of the floating field plates is 4.

[0036] In this embodiment, the material of the passivation layer 7 is selected as Si3N4, and the thickness is 5 μm.

[0037] The preparation method is as follows: Step 1: A highly doped N-type Ga2O3 substrate with a thickness of 500 μm and an N-type doping concentration of 1×10 18 cm -3The Sn-doped Ga2O3 substrate is pretreated to remove surface particles and stains.

[0038] Step 2: Use the MOCVD process to epitaxially grow a low-doped N-type Ga2O3 epitaxial layer 3 with a thickness of 10 μm and an N-type doping concentration of 1.2×10 16 cm -3 on the upper surface of the cleaned Sn-doped Ga2O3 substrate.

[0039] Step 3: Use the PECVD process to deposit SiO2 with a thickness of 600 nm on the upper surface of the low-doped N-type Ga2O3 epitaxial layer 3.

[0040] Step 4: Etch the oxide deposited in Step 3 through the standard photolithography process to form the SiO2 dielectric layer 4.

[0041] Step 5: Use the magnetron sputtering process to deposit a P-type NiO layer with a thickness of 400 nm and a doping concentration of 7.6×10 17 cm -3 on the upper surface of the etched sample (where a part of the NiO is deposited on the SiO2 dielectric layer and another part of the NiO is deposited on the low-doped N-type Ga2O3 epitaxial layer 3).

[0042] Step 6: Etch the NiO deposited in Step 5 through the standard photolithography process until the NiO on the SiO2 dielectric layer 4 is completely removed, forming the P-type NiO layer 51 and several NiO field limit rings 52.

[0043] Step 7: Use the electron beam evaporation process to deposit Ni / Au metal with a thickness of 50 / 250 nm on the upper surface of the sample, and then form the anode metal and anode field plate 61 with good ohmic contact and several floating metal field plates 62 through the standard lift-off process.

[0044] Step 8: Use the electron beam evaporation process to deposit Ni / Au with a thickness of 50 / 250 nm on the lower surface of the N-type Ga2O3 substrate 2 to form the cathode metal layer 1 with ohmic contact.

[0045] Step 9: Use the PECVD process to deposit SiO2 with a thickness of 3 μm on the upper surface of the sample, and form the SiO2 passivation layer 7 through the standard lift-off process.

[0046] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention belongs, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should all be regarded as belonging to the protection scope of the present invention.

[0047] Working principle of the present invention: First, through a number of NiO field limiting rings, when the device breaks down in reverse, the depletion region expands to each field limiting ring in turn, and a new peak electric field is introduced at the end of the NiO field limiting ring, forming a stepped decreasing potential distribution (that is, the peak electric field at the main junction is still the highest, and as the distance from the main junction increases, the peak electric field at the end of the NiO field limiting ring gradually decreases). Each NiO field limiting ring shares part of the voltage, making the electric field distribution uniform and alleviating the curvature effect of the Ga2O3 diode. Secondly, by extending the anode metal, anode field plates are formed on both sides of the main junction, attracting the electric field lines to extend to the area covered by the anode field plates, further alleviating the peak electric field at the main junction. Finally, a floating field plate is introduced above each NiO field limiting ring (that is, the floating field plate corresponds to the NiO field limiting ring one by one and floats above the dielectric layer), forming a potential transition region between adjacent NiO field limiting rings, improving the continuity of the electric field distribution and making the electric field distribution more uniform. In particular, extending the length of the field plate can increase the optimal spacing of the NiO field limiting rings, reducing the dependence of the device on the processing size. That is to say, combining the NiO field limiting ring structure with the floating field plate structure can enable the Ga2O3-based device provided by the present invention to still have a high breakdown voltage when the spacing of the field limiting rings is relatively wide, thus simplifying the device process.

[0048] Figure 2 The specific process flow of the P-NiO / N-Ga2O3 heterojunction diode with the NiO field limiting ring structure and the floating field plate field limiting ring structure in the present invention is given. The process flow of this structure is simple, and the process feasibility is reflected in that: in step 5, the P-type NiO layer deposited by magnetron sputtering completely covers the upper surface of the lightly doped N-type Ga2O3 epitaxial layer 3, preventing the subsequent etching process from damaging the lightly doped N-type Ga2O3 epitaxial layer 3. In step 8, the anode metal layer deposited by electron beam evaporation completely covers the upper surface of the P-type NiO layer 51 and several NiO field limiting rings 52, preventing the subsequent stripping process from damaging the P-type NiO layer 51.

[0049] Figure 3 The comparison diagram of the surface electric field distribution of the P-NiO / N-Ga2O3 heterojunction diode with the NiO field limiting ring structure and the floating field plate field limiting ring structure in the present invention at a reverse voltage of 3000 V is given. It should be particularly noted that due to the left-right symmetry of the terminal structure of the device, in order to improve the calculation efficiency and optimize the finite element mesh resource allocation, this simulation uses a semi-symmetric model (that is, only the right half of the structure is retained) for analysis. From Figure 3It can be seen that a new peak electric field is introduced at the end of the heterojunction diode loop with a field limiting ring structure, but the peak electric field at the main junction is still high (the peak electric field is as high as 10 MV, exceeding the critical breakdown electric field of the Ga2O3 material), and the surface electric field distribution is uneven. After introducing the field plate structure (including the anode field plate and the floating field plate), the peak electric field at the main junction is greatly reduced, a new peak electric field appears at the end of the field plate, and it is almost flush with the peak electric field at the end of the field limiting ring. The surface electric field distribution is uniform, greatly improving the breakdown voltage resistance of the heterojunction diode.

[0050] Figure 4 Figure 4 shows a schematic diagram of the breakdown voltage resistance of the P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring structure and a floating field plate field limiting ring structure in the present invention varying with the field limiting ring spacing. It can be seen from Figure 4 Figure 4 that for the heterojunction diode device with only the NiO field limiting ring structure, the breakdown voltage resistance decreases with the increase of the ring spacing. The optimal ring spacing is 0.5 μm, and at this time the reverse breakdown voltage is 3300 V. When the ring spacing > 3 μm (corresponding to the points in the gray area), the breakdown voltage resistance of the device will be lower than 80% of the maximum breakdown voltage (V br max). Therefore, when preparing high breakdown voltage resistance devices, the selectable size parameters of the NiO field limiting ring structure are less, and it is more dependent on the processing size. For the heterojunction diode device with the floating field plate field limiting ring structure, the breakdown voltage resistance decreases with the increase of the ring spacing and then tends to saturate. The maximum reverse breakdown voltage is 5400 V, which is 134% higher than that of the heterojunction diode without the terminal structure. And when the ring spacing > 2 μm, the breakdown voltage resistance of the device is always greater than 80% of the maximum breakdown voltage, with a lower dependence on the processing size and more flexible selection of process parameters.

Claims

1. A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate, characterized in that, It includes a cathode metal layer (1), a highly doped N-type Ga2O3 substrate (2), a low-doped N-type Ga2O3 epitaxial layer (3), an oxide dielectric layer (4), a P-type NiO layer (51), several NiO field limit rings (52), an anode metal and an anode field plate (61), several floating metal field plates (62), and a passivation layer (7) which are stacked in sequence from bottom to top; The cathode metal layer (1) is deposited on the lower surface of the highly doped N-type Ga2O3 substrate (2); the oxide dielectric layer (4) is evenly distributed on a part of the surface of the low-doped N-type Ga2O3 epitaxial layer (3); the P-type NiO layer (51) and several NiO field limit rings (52) form a first combination part (5); the first combination part (5) is evenly distributed on a part of the surface of the low-doped N-type Ga2O3 epitaxial layer (3) and forms an alternating distribution structure with the oxide dielectric layer (4); the anode metal and the anode field plate (61) cover the entire surface of the P-type NiO layer (51) and a part of the surface of the oxide dielectric layer (4), and several floating metal field plates (62) are evenly distributed on a part of the surface of the oxide dielectric layer (4) and the entire surface of the NiO field limit ring (52) to form a second combination part (6); the passivation layer (7) covers the entire surface of the oxide dielectric layer (4) and several floating metal field plates (62) and a part of the surface of the anode metal and the anode field plate (61).

2. A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate according to claim 1, characterized in that, The first combination part (5) and the oxide dielectric layer (4) show a periodic distribution of ABAB... on the low-doped N-type Ga2O3 epitaxial layer (3), where A represents the first combination part (5) and B represents the oxide dielectric layer (4), and the side walls of the first combination part (5) and the oxide dielectric layer (4) are closely attached.

3. A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate according to claim 1, characterized in that, The material for preparing the cathode metal layer (1) includes at least one of Ti, Ni, Ag, and Au, and the total thickness of the cathode metal layer (1) is 200 - 500 nm.

4. A P-NiO / N-Ga2O3 heterojunction diode having a composite terminal structure of a NiO field limiting ring and a floating field plate according to claim 1, characterized in that, The thickness of the highly doped N-type Ga2O3 substrate (2) is 50 - 650 μm, and the doping concentration is 10 18 -10 20 cm -3 ; the thickness of the lightly doped N-type Ga2O3 epitaxial layer (3) is 10 - 20 μm, and the doping concentration is 10 16 -10 17 cm -3 .

5. A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate according to claim 1, characterized in that, The material for preparing the oxide dielectric layer (4) includes at least one of SiO2, Al2O3, and Si3N4. The thickness of the oxide dielectric layer (4) is 600 - 800 nm, the length W1 of the oxide dielectric layer (4) is 6 - 10 μm, and the spacing of the oxide dielectric layer (4) is 5 - 10 μm.

6. A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate according to claim 1, characterized in that, The thickness of the first combination part (5) is 400 - 600 nm, and the P-type carrier concentration is 10 17 -10 18 cm -3 ; among them, the length of the P-type NiO layer (51) is 100 - 500 μm, the length of the NiO field limiting ring (52) is 5 - 10 μm, the spacing W1 is 6 - 10 μm, and the number is 4 - 8, forming an alternating distribution structure with the oxide dielectric layer (4).

7. A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate according to claim 1, characterized in that, The materials for preparing the anode metal and the anode field plate (61) include at least one of Ni, Mo, W, Pt, Al, Au, and Ag. The length of the anode metal is 100 - 500 μm, and the length L of the anode field plate fp is 4 - 8 μm.

8. A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate according to claim 1, characterized in that, The material for preparing the floating metal field plate (62) includes at least one of Ni, Mo, W, Pt, Al, Au, and Ag. The length of the floating metal field plate is 4 - 8 μm, and the number of floating metal field plates is 4 - 8.

9. A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate according to claim 1, characterized in that, The material for preparing the passivation layer (7) includes polyimide (PI), Si3N4, SiO2, and SU-8 glue, and the thickness of the passivation layer (7) is 5 - 10 μm.

10. A preparation method of a P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting ring and floating field plate, characterized in that, A P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limit rings and floating field plates as described in any one of the above claims 1 - 9 is prepared, including the following steps: Step 1: Pretreat the highly doped N-type Ga2O3 substrate (2) to remove surface particles and stains; Step 2: Deposit a low-doped N-type Ga2O3 epitaxial layer (3) on the upper surface of the pretreated highly doped N-type Ga2O3 substrate (2); Step 3: Deposit a layer of oxide on the upper surface of the low-doped N-type Ga2O3 epitaxial layer (3); Step 4: Etch the oxide deposited in Step 3 through a standard photolithography process to form an oxide dielectric layer (4); Step 5: Deposit a layer of P-type NiO on the upper surface of the etched sample, where a part of the NiO is deposited on the oxide dielectric layer (4) and another part of the NiO is deposited on the low-doped N-type Ga2O3 epitaxial layer (3); Step 6: Etch the NiO deposited in Step 5 through a standard photolithography process until the NiO on the oxide dielectric layer (4) is completely removed, forming a P-type NiO layer (51) and several NiO field limit rings (52); Step 7: Deposit a layer of metal on the sample surface and form an anode metal, anode field plate (61) and several floating metal field plates (62) through a standard lift-off process; Step 8: Deposit a cathode metal layer (1) on the lower surface of the highly doped N-type Ga2O3 substrate (2); Step 9: Deposit a layer of oxide on the upper surface of the sample and form a passivation layer (7) through a standard photolithography process.

Images