Semiconductor device

Abstract

One embodiment of the present invention provides a micro transistor. The semiconductor device includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer, at least one of the first conductive layer and the second conductive layer including two conductive layers including metals different from each other, the upper conductive layer of the two conductive layers covers at least a part of the top surface and at least a part of the side surface of the lower conductive layer, the first insulating layer is located on the first conductive layer, and the second conductive layer is located on the first insulating layer. The semiconductor layer is in contact with a top surface of the first conductive layer, a top surface and a side surface of the second conductive layer, and a side surface of the first insulating layer, the second insulating layer is located on the semiconductor layer, and the third conductive layer is located on the second insulating layer and overlaps the semiconductor layer across the second insulating layer.

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device and a method for manufacturing the same. One aspect of the present invention relates to a transistor and a method for manufacturing the same. One aspect of the present invention relates to a display device including a semiconductor device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. As an example of the technical field of one aspect of the present invention, there can be cited a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, an electronic device, a lighting device, an input device (e.g., a touch sensor), an input / output device (e.g., a touch panel), a driving method of the above devices, or a manufacturing method of the above devices.

[0003] In the present specification and the like, a semiconductor device refers to a device that utilizes semiconductor characteristics, a circuit including semiconductor elements (transistors, diodes, photodiodes, etc.), and a device including such a circuit. In addition, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. For example, as an example of a semiconductor device, there are an integrated circuit, a chip including an integrated circuit, and an electronic component in which a chip is housed in a package. In addition, sometimes a storage device, a display device, a light-emitting device, a lighting device, and an electronic device, etc. themselves are semiconductor devices, or include semiconductor devices. Background Art

[0004] Semiconductor devices including transistors are widely used in electronic devices. For example, by reducing the occupied area of transistors in a display device, the pixel size can be reduced to achieve high definition. Therefore, there is a need for miniaturization of transistors.

[0005] As devices that require high-definition display devices, for example, the development of devices for virtual reality (VR: Virtual Reality), augmented reality (AR: Augmented Reality), substitutional reality (SR: Substitutional Reality), or mixed reality (MR: Mixed Reality) is very active.

[0006] As a display device, for example, a light-emitting device including an organic EL (Electro Luminescence) element or a light-emitting diode (LED) is developed.

[0007] Patent Document 1 discloses a high-definition display device using an organic EL element. [Prior Art Documents] [Patent Documents]

[0008] [Patent Document 1] International Patent Application Publication No. WO 2016 / 038508 Summary of the Invention Technical Problem to be Solved by the Invention

[0009] One of the objects of one embodiment of the present invention is to provide a fine transistor. Another object of one embodiment of the present invention is to provide a transistor with a small channel length. Another object of one embodiment of the present invention is to provide a transistor with a large on-state current. Another object of one embodiment of the present invention is to provide a transistor with good electrical characteristics. Another object of one embodiment of the present invention is to provide a semiconductor device with a small occupied area. Another object of one embodiment of the present invention is to provide a semiconductor device with a low wiring resistance. Another object of one embodiment of the present invention is to provide a semiconductor device or a display device with low power consumption. Another object of one embodiment of the present invention is to provide a transistor, a semiconductor device, or a display device with high reliability. Another object of one embodiment of the present invention is to provide a display device that is easily high-definition. Another object of one embodiment of the present invention is to provide a manufacturing method of a semiconductor device or a display device with high productivity. Another object of one embodiment of the present invention is to provide a novel transistor, semiconductor device, display device, and their manufacturing methods.

[0010] Note that the description of these objects does not preclude the existence of other objects. One embodiment of the present invention does not need to achieve all of the above objects. Other objects than the above can be extracted from the description of the specification, drawings, and claims. Means for Solving the Technical Problem

[0011] One embodiment of the present invention is a semiconductor device including a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is located on the first conductive layer, the second conductive layer is located on the first insulating layer, the second conductive layer includes a fourth conductive layer and a fifth conductive layer, the fourth conductive layer and the fifth conductive layer contain different metals from each other, the fifth conductive layer covers at least a part of the top surface and at least a part of the side surface of the fourth conductive layer, the semiconductor layer is in contact with the top surface of the first conductive layer, the top surface and the side surface of the fifth conductive layer, and the side surface of the first insulating layer, the second insulating layer is located on the semiconductor layer, and the third conductive layer is located on the second insulating layer and overlaps with the semiconductor layer with the second insulating layer interposed therebetween.

[0012] In addition, one aspect of the present invention is a semiconductor device including a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is located on the first conductive layer and has a first opening. The second conductive layer is located on the first insulating layer and has a second opening overlapping the first opening. The second conductive layer includes a fourth conductive layer and a fifth conductive layer. The fourth conductive layer and the fifth conductive layer contain different metals from each other. The fifth conductive layer covers at least a part of the top surface and at least a part of the side surface of the fourth conductive layer. The semiconductor layer is in contact with the top surface of the first conductive layer through the first opening and the second opening, and is in contact with each of the top surface of the fifth conductive layer, the side surface in the second opening, and the side surface in the first opening of the first insulating layer. The second insulating layer is located on the semiconductor layer, and the third conductive layer is located on the second insulating layer and overlaps the semiconductor layer with the second insulating layer interposed therebetween.

[0013] The fourth conductive layer may also have a third opening. Preferably, in a plan view, the fifth conductive layer has the second opening inside the third opening.

[0014] Preferably, the first conductive layer includes a sixth conductive layer and a seventh conductive layer. The sixth conductive layer and the seventh conductive layer contain different metals from each other, and the seventh conductive layer covers at least a part of the top surface and at least a part of the side surface of the sixth conductive layer.

[0015] Preferably, the semiconductor layer contains a metal oxide in a channel formation region. The fifth conductive layer includes a first oxide conductor layer, the seventh conductive layer includes a second oxide conductor layer, and the semiconductor layer is in contact with the first oxide conductor layer and the second oxide conductor layer.

[0016] Preferably, the conductivity of the fourth conductive layer is higher than that of the fifth conductive layer, and the conductivity of the sixth conductive layer is higher than that of the seventh conductive layer.

[0017] Preferably, the first conductive layer includes an eighth conductive layer. The sixth conductive layer is located on the eighth conductive layer, and outside the end of the sixth conductive layer, the seventh conductive layer is in contact with the eighth conductive layer.

[0018] Preferably, the second conductive layer includes a ninth conductive layer. The fourth conductive layer is located on the ninth conductive layer, and outside the end of the fourth conductive layer, the fifth conductive layer is in contact with the ninth conductive layer.

[0019] Preferably, the fifth conductive layer includes a first metal layer and a first metal oxide layer on the first metal layer. The first metal layer and the first metal oxide layer contain the same metal. The first metal layer is electrically connected to the semiconductor layer through the first metal oxide layer. The seventh conductive layer includes a second metal layer and a second metal oxide layer on the second metal layer. The second metal layer and the second metal oxide layer contain the same metal. And the second metal layer is electrically connected to the semiconductor layer through the second metal oxide layer.

[0020] Preferably, the sixth conductive layer includes an eighth conductive layer and a ninth conductive layer on the eighth conductive layer, and the top surface shape of the eighth conductive layer is the same as or substantially the same as the top surface shape of the ninth conductive layer.

[0021] Preferably, the fourth conductive layer includes a tenth conductive layer and an eleventh conductive layer on the tenth conductive layer, and the top surface shape of the eleventh conductive layer is the same as or substantially the same as the top surface shape of the tenth conductive layer.

[0022] Preferably, the first insulating layer includes a first layer containing nitrogen and silicon on the first conductive layer, a second layer containing oxygen and silicon on the first layer, and a third layer containing nitrogen and silicon on the second layer.

[0023] Preferably, the first insulating layer includes a fourth layer between the first conductive layer and the first layer and a fifth layer on the third layer. The fourth layer has a region with a higher hydrogen content than the first layer, and the fifth layer has a region with a higher hydrogen content than the third layer. Advantages of the Invention

[0024] According to one aspect of the present invention, a fine transistor can be provided. Additionally, according to one aspect of the present invention, a transistor with a small channel length can be provided. Additionally, according to one aspect of the present invention, a transistor with a large on-state current can be provided. Additionally, according to one aspect of the present invention, a transistor with good electrical characteristics can be provided. Additionally, according to one aspect of the present invention, a semiconductor device with a small occupied area can be provided. Additionally, according to one aspect of the present invention, a semiconductor device with a low wiring resistance can be provided. Additionally, according to one aspect of the present invention, a semiconductor device or a display device with low power consumption can be provided. Additionally, according to one aspect of the present invention, a highly reliable transistor, semiconductor device, or display device can be provided. Additionally, according to one aspect of the present invention, a display device that can be easily high-definition can be provided. Additionally, according to one aspect of the present invention, a manufacturing method of a semiconductor device or a display device with high productivity can be provided. Additionally, according to one aspect of the present invention, a novel transistor, semiconductor device, display device, and their manufacturing methods can be provided.

[0025] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of the above effects. Effects other than the above can be extracted from the descriptions in the specification, the drawings, and the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1A is a top view showing an example of a semiconductor device. Figure 1B and Figure 1C is a cross-sectional view showing an example of a semiconductor device. Figure 2A is a top view showing an example of a semiconductor device. Figure 2B is a cross-sectional view showing an example of a semiconductor device. Figures 3A to 3C is a cross-sectional view showing an example of a semiconductor device. Figure 4A and Figure 4B is a cross-sectional view showing an example of a semiconductor device. Figures 5A to 5C is a cross-sectional view showing an example of a semiconductor device. Figures 6A to 6C is a cross-sectional view showing an example of a semiconductor device. Figures 7A to 7C is a cross-sectional view showing an example of a semiconductor device. Figure 8A and Figure 8B is a cross-sectional view showing an example of a semiconductor device. Figure 9A is a top view showing an example of a semiconductor device. Figure 9B and Figure 9C is a cross-sectional view showing an example of a semiconductor device. Figure 10A is a top view showing an example of a semiconductor device. Figure 10B and Figure 10C is a cross-sectional view showing an example of a semiconductor device. Figure 11A and Figure 11B is a cross-sectional view showing an example of a semiconductor device. Figure 12A is a cross-sectional view showing an example of a semiconductor device. Figure 12B is a top view showing an example of a semiconductor device. Figures 13A to 13I is a circuit diagram showing an example of a semiconductor device. Figure 14A and Figure 14B is a cross-sectional view showing an example of a semiconductor device. Figure 15AIt is a top view showing an example of a semiconductor device. Figure 15B It is a cross-sectional view showing an example of a semiconductor device. Figure 16A It is a top view showing an example of a semiconductor device. Figure 16B It is a cross-sectional view showing an example of a semiconductor device. Figure 17A It is a top view showing an example of a semiconductor device. Figure 17B It is a cross-sectional view showing an example of a semiconductor device. Figure 18A It is a top view showing an example of a semiconductor device. Figure 18B It is a cross-sectional view showing an example of a semiconductor device. Figures 19A to 19D It is a cross-sectional view showing an example of a manufacturing method of a semiconductor device. Figures 20A to 20C It is a cross-sectional view showing an example of a manufacturing method of a semiconductor device. Figure 21A and Figure 21B It is a cross-sectional view showing an example of a manufacturing method of a semiconductor device. Figure 22 It is a perspective view showing an example of a display device. Figure 23A and Figure 23B It is a cross-sectional view showing an example of a display device. Figure 24 It is a cross-sectional view showing an example of a display device. Figures 25A to 25C It is a cross-sectional view showing an example of a display device. Figure 26A and Figure 26B It is a cross-sectional view showing an example of a display device. Figure 27 It is a cross-sectional view showing an example of a display device. Figures 28A to 28D It is a diagram showing an example of an electronic device. Figures 29A to 29F It is a diagram showing an example of an electronic device. Figures 30A to 30G It is a diagram showing an example of an electronic device. Figures 31A to 31C It is a cross-sectional STEM image of the sample of Example 1. Figure 32 It is a graph showing the Id-Vg characteristics and field-effect mobility of the transistor of Example 1. Figure 33 It is a graph showing the Id-Vg characteristics and field-effect mobility of the transistor of Example 1. Figure 34 It is a graph showing the Id-Vg characteristics and field-effect mobility of the transistor of Example 1. Figure 35 It is a graph showing the Id-Vg characteristics and field-effect mobility of the transistor of Example 2. Modes for Carrying Out the Invention

[0027] The embodiments will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and it is easily understood by those of ordinary skill in the art that its modes and details can be changed into various forms without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited only to the content described in the embodiments shown below.

[0028] Note that in the inventive structures described below, the same reference numerals are used in different drawings to denote the same parts or parts having the same functions, and repeated descriptions are omitted. In addition, when denoting parts having the same functions, the same hatching is sometimes used without particularly attaching reference numerals.

[0029] In addition, for ease of understanding, the positions, sizes, ranges, etc. of the respective components shown in the drawings do not represent their actual positions, sizes, ranges, etc. Therefore, the disclosed invention is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings.

[0030] Note that in this specification and the like, for convenience, ordinal numbers such as "first" and "second" are added, and they do not limit the number of components or the order of components (for example, the process order or the stacking order). In addition, the ordinal numbers attached to a component in a part of this specification may sometimes be inconsistent with the ordinal numbers attached to the same component in other parts of this specification or in the claims.

[0031] In addition, depending on the situation or state, "film" and "layer" can be interchanged with each other. For example, "conductive layer" can be changed to "conductive film". In addition, "insulating film" can be changed to "insulating layer".

[0032] A transistor is a type of semiconductor device, and can perform functions such as amplifying current or voltage, and switching operations for controlling conduction or non-conduction. The transistors in this specification include IGFETs (Insulated Gate Field Effect Transistors) and thin film transistors (TFTs: Thin Film Transistors).

[0033] In addition, in cases where transistors with different polarities are used or the direction of current flow in the circuit changes, etc., the functions of the "source" and "drain" may sometimes be swapped with each other. Therefore, in this specification, the "source" and "drain" can be used interchangeably.

[0034] In this specification, etc., "electrically connected" includes cases where connection is made through "elements having a certain electrical effect". Here, there are no particular restrictions on the "elements having a certain electrical effect" as long as they can transmit and receive electrical signals between the connection targets. For example, the "elements having a certain electrical effect" include switching elements such as transistors, resistance elements, coils, and other elements having various functions, in addition to electrodes or wirings.

[0035] In addition, in this specification, etc., in the absence of special instructions, the off-state current refers to the leakage current between the source and the drain when the transistor is in the off state (also referred to as the non-conducting state, cut-off state). In the absence of special instructions, in an n-channel transistor, the off state refers to the state where the voltage V between the gate and the source gs is lower than the threshold voltage V th (in a p-channel transistor, V gs is higher than V th ).

[0036] In this specification, etc., always-on refers to the state where a channel exists and current flows through the transistor even when no voltage is applied to the gate. In addition, always-off refers to the state where no current flows through the transistor when no potential is applied to the gate or when a ground potential is supplied to the gate.

[0037] In this specification, etc., "the top surface shapes are substantially the same" means that at least a part of the edges of each layer in the stack overlap. For example, it includes cases where the upper layer and the lower layer are processed by the same mask pattern or a part of the same mask pattern. However, in reality, there are cases where the edges do not overlap, and sometimes the upper layer is inside the lower layer or the upper layer is outside the lower layer. Such cases can also be said to have "the top surface shapes substantially the same". When the top surface shapes are the same or substantially the same, it can also be said that the ends are aligned or substantially aligned.

[0038] In this specification, etc., the "top surface shape of a component" refers to the contour shape of the component when viewed from a plane (also referred to as a top view). In addition, "when viewed from a plane" refers to the case of viewing from the normal direction of the surface of the formation surface of the component or the support (e.g., substrate) on which the component is formed.

[0039] In this specification and the like, a conical shape means a shape in which at least a part of the side surface of a constituent element is inclined with respect to a substrate surface or a surface to be formed. For example, a region having an angle (also referred to as a cone angle) formed by the inclined side surface and the substrate surface or the surface to be formed that is greater than 0 degrees and less than 90 degrees is preferred. Here, the side surface, the substrate surface, and the surface to be formed of the constituent element do not necessarily have to be completely flat, and may be an approximately planar shape having a minute curvature or an approximately planar shape having fine irregularities.

[0040] Note that in this specification and the like, an oxynitride means a material having a higher oxygen content than nitrogen content in its composition. A nitride oxide means a material having a higher nitrogen content than oxygen content in its composition.

[0041] For example, the contents of elements such as hydrogen, oxygen, and nitrogen can be analyzed by secondary ion mass spectrometry (SIMS) or X-ray photoelectron spectroscopy (XPS). When the content rate of the target element is high (for example, 0.5 atomic% or more or 1 atomic% or more), XPS is suitable. On the other hand, when the content rate of the target element is low (for example, 0.5 atomic% or less or 1 atomic% or less), SIMS is suitable. When comparing the element contents, it is more preferable to perform a combined analysis using both analysis techniques of SIMS and XPS.

[0042] In this specification and the like, when there is a description of "A is in contact with B", at least a part of A is in contact with B. Therefore, for example, it can be rephrased as A includes a region in contact with B.

[0043] In this specification and the like, when there is a description of "A is located on B", at least a part of A is located on B. Therefore, for example, it can be rephrased as A includes a region located on B.

[0044] In this specification and the like, when there is a description of "A overlaps with B", at least a part of A overlaps with B. Therefore, for example, it can be rephrased as A includes a region overlapping with B.

[0045] In this specification and the like, a device manufactured using a metal mask or an FMM (Fine Metal Mask, high-precision metal mask) is sometimes referred to as a device having an MM (Metal Mask) structure. In addition, in this specification and the like, a device not manufactured using a metal mask or an FMM is sometimes referred to as a device having an MML (MetalMask Less) structure.

[0046] In this specification and the like, a structure in which light-emitting layers are separately formed in light-emitting elements (also referred to as light-emitting devices) having different light-emitting wavelengths is sometimes referred to as an SBS (Side By Side) structure. Since the SBS structure allows the materials and structures to be optimized for each light-emitting element, the degree of freedom in the selection of materials and structures is increased, and it becomes easy to improve the luminance and reliability.

[0047] In this specification and the like, holes or electrons are sometimes referred to as "carriers". Specifically, a hole injection layer or an electron injection layer is sometimes referred to as a "carrier injection layer", a hole transport layer or an electron transport layer is sometimes referred to as a "carrier transport layer", and a hole blocking layer or an electron blocking layer is sometimes referred to as a "carrier blocking layer". Note that it is sometimes impossible to clearly distinguish the above-mentioned carrier injection layer, carrier transport layer, and carrier blocking layer. In addition, sometimes one layer has the functions of two or three of the carrier injection layer, carrier transport layer, and carrier blocking layer.

[0048] In this specification and the like, a light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer. Here, as the layers (also referred to as functional layers) included in the EL layer, there can be mentioned a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer), and a carrier blocking layer (hole blocking layer and electron blocking layer). In this specification and the like, a light-receiving element (also referred to as a light-receiving device) includes at least an active layer serving as a photoelectric conversion layer between a pair of electrodes. In this specification and the like, sometimes one of the pair of electrodes is denoted as a pixel electrode, and the other is denoted as a common electrode.

[0049] In this specification and the like, a sacrificial layer (which may also be referred to as a mask layer) is at least located above the light-emitting layer (more specifically, the layer that is processed into an island shape among the layers constituting the EL layer), and has a function of protecting the light-emitting layer in the manufacturing process.

[0050] In this specification and the like, disconnection refers to a phenomenon in which a layer, film, or electrode is disconnected due to the shape of the formation surface (for example, a step, etc.).

[0051] (Embodiment 1) In this embodiment, a semiconductor device according to one aspect of the present invention will be described with reference to FIGS. 1 to 18.

[0052] A semiconductor device according to one aspect of the present invention includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer.

[0053] The first insulating layer is located on the first conductive layer, and the second conductive layer is located on the first insulating layer. The oxide semiconductor layer is in contact with the top surface and side surfaces of the first conductive layer, the top surface and side surfaces of the second conductive layer, and the side surface of the first insulating layer. The second insulating layer is located on the semiconductor layer. The third conductive layer is located on the second insulating layer and overlaps with the semiconductor layer with the second insulating layer therebetween.

[0054] The second insulating layer is used as a gate insulating layer. The third conductive layer is used as a gate electrode of the transistor.

[0055] The first insulating layer may also include a first opening reaching the first conductive layer. The second conductive layer may also include a second opening overlapping with the first opening. At this time, the third conductive layer preferably overlaps with the semiconductor layer with the second insulating layer therebetween at a position overlapping with the first opening and the second opening.

[0056] In the transistor according to one embodiment of the present invention, the heights of the positions of the source electrode and the drain electrode are different, and the current flowing through the semiconductor layer flows in the height direction. That is to say, it can be said that the channel length direction has a component in the height direction (longitudinal direction), so the transistor according to one embodiment of the present invention can be called a VFET (Vertical Field Effect Transistor), a longitudinal transistor, a longitudinal channel transistor, a longitudinal channel type transistor, etc.

[0057] Since the source electrode, the semiconductor layer, and the drain electrode can be overlapped and arranged, the occupied area of the transistor according to one embodiment of the present invention can be made much smaller than that of a so-called planar transistor in which the semiconductor layer is arranged in a planar shape.

[0058] The first conductive layer is used as one of the source electrode and the drain electrode of the transistor. The first conductive layer preferably includes a fourth conductive layer and a fifth conductive layer on the fourth conductive layer. The fourth conductive layer and the fifth conductive layer contain different metals. The fifth conductive layer covers at least a part of the top surface and at least a part of the side surface of the fourth conductive layer. At this time, the semiconductor layer preferably contacts the top surface of the fifth conductive layer. The fourth conductive layer is electrically connected to the semiconductor layer through the fifth conductive layer. In other words, the fourth conductive layer is electrically connected to the semiconductor layer through the fifth conductive layer.

[0059] The second conductive layer is used as the other of the source electrode and the drain electrode of the transistor. The second conductive layer preferably includes a sixth conductive layer and a seventh conductive layer on the sixth conductive layer. The sixth conductive layer and the seventh conductive layer contain different metals. The seventh conductive layer covers at least a part of the top surface and at least a part of the side surface of the sixth conductive layer. At this time, the semiconductor layer preferably contacts the top surface and the side surface of the seventh conductive layer. The sixth conductive layer is electrically connected to the semiconductor layer through the seventh conductive layer. In other words, the sixth conductive layer is electrically connected to the semiconductor layer through the seventh conductive layer.

[0060] Both the source electrode and the drain electrode have portions in contact with the semiconductor layer. For example, when a metal oxide is used for the semiconductor layer, as the portions of the source electrode and the drain electrode in contact with the semiconductor layer, it is preferable to use a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, or a conductive metal oxide (also referred to as an oxide conductor (OC: Oxide Conductor)). On the other hand, the source electrode or the drain electrode is sometimes used as a wiring. Therefore, it is preferable to use a material with higher conductivity than an oxide conductor, such as a metal, an alloy, or a nitride thereof. In addition, copper can be cited as a material with low resistance and suitable for use as a wiring and an electrode of a transistor. However, when copper diffuses into the semiconductor layer, it may have a negative impact on the characteristics of the transistor.

[0061] Then, in one embodiment of the present invention, at least one of the source electrode and the drain electrode has a stacked structure of two or more layers covering the top surface and the side surface of the first layer. By using a conductive material with a low contact resistance with the semiconductor layer as the uppermost layer in contact with the semiconductor layer among the electrodes and using a conductive material with high conductivity as the conductive layer covered by the uppermost layer, a transistor with high reliability and high on-state current can be realized.

[0062] Since the semiconductor layer is located on the first conductive layer and the second conductive layer, it can be said that the transistor of one embodiment of the present invention is a bottom-contact type transistor. In the manufacture of the transistor of one embodiment of the present invention, the semiconductor layer can be deposited after the manufacture of the second conductive layer (for example, after processing the film that will become the second conductive layer or after forming the second opening). Therefore, damage to the semiconductor layer can be suppressed. In addition, the processes of forming the first opening and the second opening can be performed continuously (excluding deposition processes and the like in between). Therefore, the formation of the openings is relatively easy, so it is preferable.

[0063] In addition, a groove (slit) can be provided instead of each of the first opening and the second opening.

[0064] [Transistor 100] Figure 1A and Figure 2A shows a top view of the transistor 100. Figure 2A is different from Figure 1A in that: the diameter D143 and the channel width W100 are shown, while the opening 145 and the dotted line B1 - B2 are not shown. In Figure 1A and Figure 2A the description of the insulating layer is omitted. Note that the description of some constituent elements is also omitted in other top views.

[0065] Figure 1B and Figure 2B are cross-sectional views along the dotted line A1 - A2 in Figure 1A and Figure 2A respectively.Figure 2B It can also be said that Figure 1B is an enlarged view. In Figure 1B the openings 141, 143, 145 are shown, and in Figure 2B the diameter D143, the channel width W100, the channel length L100, the thickness T110, and the angle θ110 are shown. Other components are common between Figure 1B and Figure 2B Figure 1C is a cross-sectional view along the dash-dotted line B1 - B2 in Figure 1A

[0066] The transistor 100 is provided on the substrate 102. The transistor 100 includes a conductive layer 112a (conductive layer 182a and conductive layer 122a), an insulating layer 110 (insulating layer 110b, insulating layer 110c, and insulating layer 110d), a semiconductor layer 108, a conductive layer 112b (conductive layer 182b and conductive layer 122b), an insulating layer 106, and a conductive layer 104. Each layer constituting the transistor 100 may have a single-layer structure or a stacked structure. Note that the insulating layer 110 may not be included in the components of the transistor 100. That is, a semiconductor device according to one aspect of the present invention includes the transistor 100 and the insulating layer 110.

[0067] In the present embodiment, the case where an oxide semiconductor is used in the semiconductor layer 108 is mainly described as an example.

[0068] The conductive layer 112a is provided on the substrate 102. The conductive layer 112a is used as one of the source electrode and the drain electrode of the transistor 100. The conductive layer 112a includes the conductive layer 182a and the conductive layer 122a. As Figure 1C shown, the conductive layer 122a is provided in contact with the top surface and the side surface of the conductive layer 182a and covering the top surface and the side surface. The conductive layer 122a is in contact with the semiconductor layer 108.

[0069] The insulating layer 110 is located on the substrate 102 and the conductive layer 112a. The insulating layer 110 is in contact with the conductive layer 112a. An opening 141 reaching the conductive layer 112a is provided in the insulating layer 110.

[0070] The insulating layer 110 has a stacked structure of the insulating layer 110b on the substrate 102 and the conductive layer 112a, the insulating layer 110c on the insulating layer 110b, and the insulating layer 110d on the insulating layer 110c.

[0071] The conductive layer 112b is located on the insulating layer 110. An opening 143 overlapping the opening 141 is provided in the conductive layer 112b. The conductive layer 112b is used as the other of the source electrode and the drain electrode of the transistor 100. The conductive layer 112b includes the conductive layer 182b and the conductive layer 122b. As​​Figure 1B and Figure 1C As shown, the conductive layer 122b is provided in a manner of contacting with and covering the top surface and the side surface of the conductive layer 182b. The conductive layer 122b is in contact with the semiconductor layer 108. The conductive layer 182b includes an opening 145. In a plan view, the opening 141 and the opening 143 are both located inside the opening 145 provided in the conductive layer 182b.

[0072] The semiconductor layer 108 is in contact with the top surface of the conductive layer 112a, the side surface of the insulating layer 110, and the top surface and side surface of the conductive layer 112b. More specifically, the semiconductor layer 108 is in contact with the top surface of the conductive layer 122a, the side surface of the insulating layer 110, and the top surface and side surface of the conductive layer 122b. The semiconductor layer 108 is provided in a manner in contact with the end portion on the side of the opening 141 in the insulating layer 110 (it can also be said that the side surface in the opening 141 of the insulating layer 110, the side wall of the opening 141) and the end portion on the side of the opening 143 in the conductive layer 112b (it can also be said that the side surface in the opening 143 of the conductive layer 112b, the side wall of the opening 143). The semiconductor layer 108 is in contact with the conductive layer 112a through the opening 141 and the opening 143.

[0073] The insulating layer 106 is located on the insulating layer 110, the semiconductor layer 108, and the conductive layer 112b. The insulating layer 106 is provided along the sidewalls of the opening 141 and the sidewalls of the opening 143 via the semiconductor layer 108. The insulating layer 106 serves as a gate insulating layer of the transistor 100 (also referred to as a first gate insulating layer).

[0074] The conductive layer 104 is located on the insulating layer 106. The conductive layer 104 overlaps with the semiconductor layer 108 via the insulating layer 106 in the opening 141 and the opening 143. The conductive layer 104 serves as a gate electrode of the transistor 100 (also referred to as a first gate electrode).

[0075] The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can all be used as wirings, and the transistor 100 can be provided in a region where these wirings overlap. That is, in a circuit including the transistor 100 and the wirings, the occupied area of the transistor 100 and the wirings can be reduced. Therefore, the occupied area of the circuit can be reduced to realize a small semiconductor device.

[0076] For example, when a semiconductor device according to one embodiment of the present invention is used in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be realized. In addition, for example, when a semiconductor device according to one embodiment of the present invention is used in a drive circuit (for example, one or both of a gate line drive circuit and a source line drive circuit) of a display device, the area occupied by the drive circuit can be reduced, so a display device with a narrow frame can be realized.

[0077] Reference Figure 2A and Figure 2B explain the channel length, channel width, etc. of the transistor 100.

[0078] In the semiconductor layer 108, the region in contact with the conductive layer 112a is used as one of the source region and the drain region, and the region in contact with the conductive layer 112b is used as the other of the source region and the drain region, and a region serving as a channel formation region is included between the source region and the drain region.

[0079] Figure 2B The channel length L100 of the transistor 100 is indicated by a double arrow with a dotted line in Figure 2B . It can be said that the channel length L100 is the shortest distance between the portion in contact with the insulating layer 110b and the portion in contact with the insulating layer 110d in the semiconductor layer 108 when viewed from the cross section.

[0080] The channel length L100 of the transistor 100 corresponds to the length of the side surface on the opening 141 side of the insulating layer 110c when viewed from the cross section. That is, the channel length L100 is determined by the thickness T110 of the insulating layer 110c and the angle θ110 formed by the side surface on the opening 141 side of the insulating layer 110c and the formed surface of the insulating layer 110c (here, the top surface of the insulating layer 110b). Therefore, for example, the channel length L100 can be set to a value smaller than the limit resolution of the exposure apparatus, and a fine transistor can be realized. Specifically, a transistor with an extremely small channel length that cannot be realized in an exposure apparatus used in mass production of conventional flat panel displays (for example, the minimum line width is about 2 μm or 1.5 μm) can be realized. In addition, a transistor with a channel length less than 10 nm can be realized even in a state where an extremely expensive exposure apparatus used in the most advanced LSI technology is not used.

[0081] The channel length L100 can be, for example, 5 nm or more, 7 nm or more, or 10 nm or more and less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less. For example, the channel length L100 can be set to 100 nm or more and 1 μm or less.

[0082] By reducing the channel length L100, the on-state current of the transistor 100 can be increased. By using the transistor 100, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, a small semiconductor device can be realized. For example, when a semiconductor device of one embodiment of the present invention is used in a large display device or a high-definition display device, the signal delay of each wiring can be reduced when the number of wirings increases, thereby suppressing display unevenness. In addition, since the area occupied by the circuit can be reduced, the frame of the display device can be reduced.

[0083] By adjusting the thickness T110 and the angle θ110 of the insulating layer 110c, the channel length L100 can be controlled. Figure 2B In FIG. 1 , a double-pointed arrow indicates a thickness T110 of the insulating layer 110 c .

[0084] The thickness T110 of the insulating layer 110c can be, for example, greater than 10 nm, greater than 50 nm, greater than 100 nm, greater than 150 nm, greater than 200 nm, greater than 300 nm, greater than 400 nm or greater than 500 nm and less than 3.0 μm, less than 2.5 μm, less than 2.0 μm, less than 1.5 μm, less than 1.2 μm, or less than 1.0 μm.

[0085] The side surface of the opening 141 of the insulating layer 110c preferably has a vertical shape or a tapered shape. The angle θ110 formed by the side surface of the opening 141 of the insulating layer 110c and the formed surface of the insulating layer 110c (here, the top surface of the insulating layer 110b) is preferably less than 90 degrees. By reducing the angle θ110, the coverage of the layer (for example, the semiconductor layer 108) provided on the insulating layer 110c can be improved. In addition, the smaller the angle θ110 is, the larger the channel length L100 can be, and the larger the angle θ110 is, the smaller the channel length L100 can be. Figure 1B , Figure 1C and Figure 2B An example is shown in which the side surface of the insulating layer 110 c on the opening 141 side has a tapered shape (the angle θ110 is smaller than 90 degrees). Figure 3A and Figure 3B An example is shown in which the side surface of the insulating layer 110 c on the opening 141 side has a vertical shape (angle θ110 is 90 degrees).

[0086] The angle θ110 may be, for example, greater than 30 degrees, greater than 35 degrees, greater than 40 degrees, greater than 45 degrees, greater than 50 degrees, greater than 55 degrees, greater than 60 degrees, greater than 65 degrees, or greater than 70 degrees and less than 90 degrees, less than 85 degrees, or less than 80 degrees. In addition, the angle θ110 may be less than 75 degrees, less than 70 degrees, less than 65 degrees, or less than 60 degrees.

[0087] When the angle θ110 is 80 degrees or more and 90 degrees or less, it is preferable to form a film covering the insulating layer 110 by a deposition method with high coverage. For example, it is preferable to form the conductive layer 104 by CVD method, and form the insulating layer 106 and the semiconductor layer 108 by ALD method. In addition, for example, it is preferable to form the conductive layer 104, the insulating layer 106 and the semiconductor layer 108 by ALD method. In addition, when the above angle θ110 is 60 degrees or more and 85 degrees or less, a film covering the insulating layer 110 can also be formed by a deposition method with higher productivity. For example, it is preferable to form the semiconductor layer 108 by sputtering method.

[0088] Note that here, the angle θ110 is set with respect to the insulating layer 110c, but it can also be set with respect to the entire insulating layer 110. That is to say, the angle θ110 can also be the angle formed by the side surface on the opening 141 side of the insulating layer 110 and the surface on which the insulating layer 110 is formed (here, the top surface of the conductive layer 112a).

[0089] In addition, when the channel formation region includes the region in the semiconductor layer 108 that contacts the insulating layer 110b and the region that contacts the insulating layer 110d, it can be said that the channel length L100 is the shortest distance between the portion of the semiconductor layer 108 that contacts the conductive layer 112a and the portion that contacts the conductive layer 112b when viewed from the cross section. In addition, the channel length L100 corresponds to the sum of the lengths of the side surfaces on the opening 141 side of the insulating layers 110b, 110c, and 110d when viewed from the cross section.

[0090] In Figure 2A and Figure 2B a double-headed arrow with a double-dashed line indicates the diameter D143 of the opening 143. Figure 2A An example is shown in which the top surface shapes of the opening 141 and the opening 143 are circular with a diameter D143. At this time, the channel width W100 of the transistor 100 is the same as the circumference of this circle. That is to say, the channel width W100 is π×D143. Thus, when the top surface shapes of the opening 141 and the opening 143 are circular, a transistor with a smaller channel width can be realized compared with using other shapes.

[0091] Note that the diameter of opening 141 and the diameter of opening 143 are sometimes different. Additionally, both the diameter of opening 141 and the diameter of opening 143 sometimes vary in the depth direction. As the diameter of opening 141, for example, the average value of the diameter at the highest position, the diameter at the lowest position, and the diameter at the midpoint position of the insulating layer 110 (or insulating layer 110c) when viewed from the cross-section can be used. Alternatively, as the diameter of opening 141, for example, any one of the diameter at the highest position, the diameter at the lowest position, and the diameter at the midpoint position of the insulating layer 110 (or insulating layer 110c) when viewed from the cross-section can also be used. Similarly, as the diameter of opening 143, for example, any one of the diameter at the highest position, the diameter at the lowest position, and the diameter at the midpoint position of the conductive layer 112b when viewed from the cross-section or the average value of these three can be used.

[0092] When forming opening 143 by photolithography, the diameter D143 of opening 143 is above the limit resolution of the exposure apparatus. The diameter D143 can be, for example, 20 nm or more, 50 nm or more, 100 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more and less than 5.0 μm, 4.5 μm or less, 4.0 μm or less, 3.5 μm or less, 3.0 μm or less, 2.5 μm or less, 2.0 μm or less, 1.5 μm or less, or 1.0 μm or less.

[0093] There is no limitation on the top surface shape of opening 141 and opening 143. For example, it can be circular, elliptical, triangular, quadrangular (including rectangle, rhombus, square), pentagonal, star-shaped polygon, etc., or a shape in which the corners of these polygons are rounded. The polygon can also be a concave polygon (a polygon with at least one interior angle exceeding 180 degrees) or a convex polygon (a polygon with all interior angles less than 180 degrees). As Figure 1A shown, etc., it is preferable that the top surface shapes of both opening 141 and opening 143 are circular. By making the top surface shape of the opening circular, the processing accuracy when forming the opening can be improved, and a fine opening can be formed. Note that in this specification, etc., a circle is not limited to a perfect circle.

[0094] In this specification, etc., the top surface shape of opening 141 refers to the shape of the top surface end portion on the opening 141 side of the insulating layer 110. Additionally, the top surface shape of opening 143 refers to the shape of the bottom surface end portion on the opening 143 side of the conductive layer 112b.

[0095] As Figure 1A shown, etc., the top surface shape of opening 141 and the top surface shape of opening 143 can be made the same or substantially the same. At this time, as Figure 1B and Figure 1CAs shown in the figure, the bottom end portion on the opening 143 side of the conductive layer 112b and the top end portion on the opening 141 side of the insulating layer 110 are preferably aligned or substantially aligned. The bottom surface of the conductive layer 112b refers to the surface on the insulating layer 110 side. The top surface of the insulating layer 110 refers to the surface on the conductive layer 112b side.

[0096] In addition, the top surface shape of the opening 141 and the top surface shape of the opening 143 may also be different (refer to the transistor 100C described later ( Figure 9A etc.)). Further, when the top surface shapes of the opening 141 and the opening 143 are circular, the opening 141 and the opening 143 may or may not be concentric.

[0097] [Conductive layer 112a, Conductive layer 112b] The conductive layer 112a includes a conductive layer 182a and a conductive layer 122a on the conductive layer 182a. The conductive layer 182a and the conductive layer 122a contain different metals from each other. The conductive layer 182a is electrically connected to the semiconductor layer 108 through the conductive layer 122a. The portion of the conductive layer 112a that contacts the semiconductor layer 108 is preferably provided with the conductive layer 122a.

[0098] Similarly, the conductive layer 112b includes a conductive layer 182b and a conductive layer 122b on the conductive layer 182b. The conductive layer 182b and the conductive layer 122b contain different metals from each other. The conductive layer 182b is electrically connected to the semiconductor layer 108 through the conductive layer 122b. The portion of the conductive layer 112b that contacts the semiconductor layer 108 is preferably provided with the conductive layer 122b.

[0099] The conductive layer 122a and the conductive layer 122b are preferably made of a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, or an oxide conductor. Thereby, an increase in the contact resistance between the conductive layer 112a or the conductive layer 112b and the semiconductor layer 108 can be suppressed.

[0100] Examples of the conductive material that is not easily oxidized or the conductive material that maintains a low resistance even when oxidized include titanium, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel.

[0101] As the oxide conductor, indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide (also denoted as IZO (registered trademark)), In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (ITO containing silicon, also called ITSO), zinc oxide added with gallium, and In-Ga-Zn oxide can be cited, for example. In particular, a conductive oxide containing indium is preferably used because of its high conductivity.

[0102] Oxygen vacancies are formed in the metal oxide having semiconductor characteristics, and hydrogen is added to the oxygen vacancies to form donor energy levels near the conduction band. As a result, the conductivity of the metal oxide increases and it becomes a conductor. The metal oxide that becomes a conductor can be called an oxide conductor.

[0103] The conductive layer 122a and the conductive layer 122b can use the same material or different materials.

[0104] The conductive layer 122a and the conductive layer 122b can each adopt a single-layer structure or a laminated structure. In addition, when the conductive layer 122a or the conductive layer 122b has a laminated structure, a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, or an oxide conductor is preferably used as the layer in contact with the semiconductor layer 108, and various conductive materials can be used as other layers. That is to say, the materials that can be used for the conductive layer 182a and the conductive layer 182b described later can also be used for the layers constituting the conductive layer 122a and the conductive layer 122b.

[0105] The conductive layer 182a is preferably made of a material having higher conductivity than the conductive layer 122a (it can also be said to be a material having a high conductivity or a low resistivity). Similarly, the conductive layer 182b is preferably made of a material having higher conductivity than the conductive layer 122b. Thereby, the conductive layer 112a and the conductive layer 112b can be formed into layers suitable for use as wirings.

[0106] As the materials that can be used for the conductive layer 182a and the conductive layer 182b, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, and alloys containing one or more of the above metals can be cited. By using a conductive layer containing a metal or an alloy, the wiring resistance can be reduced. A low-resistance conductive material containing one or more of copper, silver, gold, and aluminum can be appropriately used for the conductive layer 182a and the conductive layer 182b. Among them, copper or aluminum has particular advantages in mass productivity and is therefore preferred.

[0107] As the conductive layers 182a and 182b, a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta or Ti) can also be used. By using the Cu-X alloy film, it can be processed by a wet etching process, thereby suppressing the manufacturing cost.

[0108] The conductive layer 182a and the conductive layer 182b can use the same material or different materials.

[0109] The conductive layer 182a and the conductive layer 182b can each adopt a single-layer structure or a laminated structure. When the conductive layer 182a or the conductive layer 182b has a laminated structure, a material with higher conductivity than the conductive layer 122a or the conductive layer 122b can be used as at least one layer, and various conductive materials can be used as other layers. That is to say, the materials that can be used for the conductive layer 122a and the conductive layer 122b can also be used for the layers constituting the conductive layer 182a and the conductive layer 182b.

[0110] As described above, for the conductive layer 112a and the conductive layer 112b, preferably, a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, or an oxide conductor is used for the layer in contact with the semiconductor layer 108, and a material with higher conductivity than the material used for the layer in contact with the semiconductor layer 108 is preferably used for at least one of the other layers. Thereby, it is possible to suppress the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b from becoming high. In addition, the wiring resistance of the conductive layer 112a and the conductive layer 112b can be reduced.

[0111] Regarding the specific structures of the conductive layer 112a and the conductive layer 112b, for example, preferably, a metal film is used as the conductive layer 182a and the conductive layer 182b respectively, and an oxide conductor film is used as the conductive layer 122a and the conductive layer 122b respectively. Examples of the metal film include a single-layer structure of a tungsten film, a single-layer structure of a titanium film, a single-layer structure of a copper film, a two-layer structure of a titanium film and an aluminum film, and a three-layer structure of a titanium film, an aluminum film and a titanium film. Examples of the oxide conductor film include a single-layer structure of an In-Zn oxide film, a single-layer structure of an ITO film, and a single-layer structure of an ITSO film.

[0112] [Conductive layer 104] The conductive layer 104 may have a single-layer structure or a stacked structure of two or more layers. As materials that can be used for the conductive layer 104, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, and alloys containing one or more of the above metals as components can be cited. A low-resistance conductive material containing one or more of copper, silver, gold, and aluminum can be appropriately used for the conductive layer 104. Among them, copper or aluminum is particularly advantageous in terms of mass productivity and is therefore preferred.

[0113] The conductive layer 104 may use an oxide conductor. As oxide conductors, for example, indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (ITSO), zinc oxide doped with gallium, and In-Ga-Zn oxide can be cited. In particular, a conductive oxide containing indium is preferably used because of its high conductivity.

[0114] As the conductive layer 104, a stacked structure of a conductive film containing the above oxide conductor (metal oxide) and a conductive film containing a metal or alloy can also be adopted. By using a conductive film containing a metal or alloy, the wiring resistance can be reduced.

[0115] As the conductive layer 104, a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can also be applied. By using a Cu-X alloy film, it can be processed by a wet etching process, thereby suppressing the manufacturing cost.

[0116] As the conductive layer 104, for example, a three-layer stacked structure of a titanium film, an aluminum film, and a titanium film is preferably used.

[0117] [Insulating layer 110] The insulating layer 110 may have a single-layer structure or a stacked structure, and preferably has a stacked structure of three or more layers.

[0118] For each layer constituting the insulating layer 110, an inorganic insulating film is preferably used. As inorganic insulating films, for example, oxide insulating films, nitride insulating films, oxynitride insulating films, and nitrogen oxide insulating films can be cited. As oxide insulating films, for example, silicon oxide films, aluminum oxide films, magnesium oxide films, gallium oxide films, germanium oxide films, yttrium oxide films, zirconium oxide films, lanthanum oxide films, neodymium oxide films, hafnium oxide films, tantalum oxide films, cerium oxide films, gallium zinc oxide films, and hafnium aluminum oxide films can be cited. As nitride insulating films, for example, silicon nitride films and aluminum nitride films can be cited. As oxynitride insulating films, for example, silicon oxynitride films, aluminum oxynitride films, gallium oxynitride films, yttrium oxynitride films, and hafnium oxynitride films can be cited. As nitrogen oxide insulating films, for example, silicon nitrogen oxide films and aluminum nitrogen oxide films can be cited.

[0119] The insulating layer 110 includes a portion in contact with the semiconductor layer 108. When an oxide semiconductor is used as the semiconductor layer 108, in order to improve the interface characteristics between the semiconductor layer 108 and the insulating layer 110, it is preferable to use an oxide in at least a part of the portion of the insulating layer 110 in contact with the semiconductor layer 108. Specifically, it is preferable to use an oxide in the portion of the insulating layer 110 in contact with the channel formation region of the semiconductor layer 108. The channel formation region is a high-resistance region with a low carrier concentration. It can be said that the channel formation region is of i-type (intrinsic) or substantially i-type.

[0120] As the insulating layer 110c in contact with the channel formation region of the semiconductor layer 108, a layer containing oxygen is preferably used. The insulating layer 110c preferably includes a region having a higher oxygen content than one or both of the insulating layer 110b and the insulating layer 110d.

[0121] The insulating layer 110c preferably uses any one or more of the above-mentioned oxide insulating films and oxynitride insulating films. Specifically, the insulating layer 110c preferably uses one or both of a silicon oxide film and a silicon oxynitride film. When the insulating layer 110c is a layer having a high oxygen content, an i-type region is likely to be formed in the region of the semiconductor layer 108 in contact with the insulating layer 110c and in the vicinity thereof.

[0122] The insulating layer 110c more preferably uses a film that releases oxygen by heating. Due to the heat applied in the manufacturing process of the transistor 100, the insulating layer 110c releases oxygen, so that oxygen can be supplied to the semiconductor layer 108. By supplying oxygen from the insulating layer 110c to the semiconductor layer 108, particularly to the channel formation region of the semiconductor layer 108, oxygen vacancies in the semiconductor layer 108 can be reduced, and a transistor having good electrical characteristics and high reliability can be realized.

[0123] For example, by performing a heat treatment in an oxygen-containing atmosphere or a plasma treatment in an oxygen-containing atmosphere, oxygen can be supplied to the insulating layer 110c. In addition, an oxide film can be deposited on the top surface of the insulating layer 110c by sputtering in an oxygen atmosphere to supply oxygen. Then, the oxide film can be removed. In Embodiment 2, an example of performing a nitrous oxide (N2O) plasma treatment and depositing a metal oxide layer 149 to supply oxygen to the insulating layer 110c will be shown.

[0124] The insulating layer 110c is preferably formed by a deposition method such as a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method. In particular, when using the sputtering method, hydrogen does not need to be used as a deposition gas, so that a film with an extremely low hydrogen content can be realized. Therefore, it is possible to suppress the supply of hydrogen to the semiconductor layer 108 and stabilize the electrical characteristics of the transistor 100.

[0125] The insulating layers 110b and 110d preferably use films that do not easily diffuse oxygen. Thereby, it is possible to prevent oxygen in the insulating layer 110c from passing through the insulating layer 110b and permeating to the substrate 102 side due to heating and passing through the insulating layer 110d and permeating to the conductive layer 112b and the insulating layer 106 side. In other words, by sandwiching the insulating layer 110c with the insulating layers 110b and 110d that do not easily diffuse oxygen above and below, the oxygen in the insulating layer 110c can be sealed. Thereby, oxygen can be effectively supplied to the semiconductor layer 108.

[0126] In addition, the insulating layers 110b and 110d preferably use films that do not easily diffuse hydrogen. Thereby, it is possible to suppress hydrogen from diffusing from the outside of the transistor through the insulating layer 110b or the insulating layer 110d into the semiconductor layer 108.

[0127] The insulating layers 110b and 110d preferably use any one or more of the above-mentioned oxidation insulating films, nitride insulating films, oxynitride insulating films, and nitroxide insulating films. Specifically, the insulating layers 110b and 110d preferably use any one or more of a silicon nitride film, a silicon oxynitride film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, an aluminum nitride film, a hafnium oxide film, and a hafnium aluminum oxide film.

[0128] The insulating layers 110b and 110d preferably use any one or more of the above-mentioned nitride insulating films and oxynitride insulating films. Specifically, the insulating layers 110b and 110d preferably use one or both of a silicon nitride film and a silicon oxynitride film.

[0129] The silicon nitride film and the silicon oxynitride film can realize films that rarely release impurities (for example, water and hydrogen) themselves and do not easily allow oxygen and hydrogen to permeate, so they can be suitably used as the insulating layers 110b and 110d.

[0130] The insulating layers 110b and 110d can also use the above-mentioned aluminum-containing films, for example. For example, both the insulating layers 110b and 110d use an aluminum oxide film. The hydrogen content of the aluminum oxide film is lower than that of the silicon nitride film, so it is preferred.

[0131] The thicknesses of the insulating layers 110b and 110d are preferably 5 nm or more and 150 nm or less, more preferably 5 nm or more and 100 nm or less, more preferably 5 nm or more and 70 nm or less, more preferably 10 nm or more and 70 nm or less, more preferably 10 nm or more and 50 nm or less, and more preferably 20 nm or more and 50 nm or less. By setting the thicknesses of the insulating layers 110b and 110d within the above ranges, oxygen vacancies in the semiconductor layer 108, particularly in the channel formation region, can be reduced. Note that the thicknesses of the insulating layers 110b and 110d may be the same or different.

[0132] For example, preferably, the insulating layers 110b and 110d are made of a silicon nitride film or a silicon oxynitride film, and the insulating layer 110c is made of a silicon oxide film or a silicon oxynitride film.

[0133] [Semiconductor layer 108] The semiconductor layer 108 contains a metal oxide (also referred to as an oxide semiconductor) that exhibits semiconductor characteristics.

[0134] There is no particular limitation on the crystallinity of the semiconductor material used for the semiconductor layer 108, and an amorphous semiconductor, a single crystal semiconductor, or a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in a part thereof) can be used. When a single crystal semiconductor or a semiconductor having crystallinity is used, deterioration of the transistor characteristics can be suppressed, which is therefore preferred.

[0135] The band gap of the metal oxide used for the semiconductor layer 108 is preferably 2.0 eV or more, and more preferably 2.5 eV or more.

[0136] Examples of the metal oxide that can be used for the semiconductor layer 108 include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably contains at least indium or zinc. In addition, the metal oxide preferably contains two or three of indium, element M, and zinc. Element M is a metal element or a metalloid element having a high bond energy with oxygen, for example, a metal element or a metalloid element having a higher bond energy with oxygen than indium. Specific examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. Element M contained in the metal oxide is preferably any one or more of the above elements, more preferably one or more of aluminum, gallium, tin, and yttrium, and further preferably gallium. Note that in this specification and the like, metal elements and metalloid elements are sometimes collectively referred to as "metal elements", and the "metal elements" described in this specification and the like sometimes include metalloid elements.

[0137] The semiconductor layer 108 can be, for example, indium zinc oxide (In-Zn oxide, also denoted as IZO (registered trademark)), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, also denoted as GZO), aluminum zinc oxide (Al-Zn oxide, also denoted as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also denoted as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also denoted as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also denoted as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also denoted as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also denoted as IGAZO, IGZAO or IAGZO), etc. Alternatively, indium tin oxide containing silicon, gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc. can be used.

[0138] When the ratio of the number of indium atoms to the sum of the number of atoms of all metal elements in the metal oxide is increased, the field-effect mobility of the transistor can be increased. In addition, a transistor with a large on-state current can be realized.

[0139] Note that the metal oxide can also replace indium or contain one or more metal elements with a large period number in the periodic table in addition to indium. There is a tendency that the larger the orbital overlap of the metal element, the greater the carrier conduction in the metal oxide. Therefore, by including a metal element with a large period number, the field-effect mobility of the transistor can sometimes be increased. As the metal element with a large period number, metal elements belonging to the 5th period and metal elements belonging to the 6th period, etc. can be cited. Specifically, as the metal element, yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium, etc. can be cited. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0140] In addition, the metal oxide can also contain one or more non-metal elements. When the metal oxide contains a non-metal element, sometimes the carrier concentration increases or the bandgap becomes narrow, etc., and the field-effect mobility of the transistor can be increased. As the non-metal element, for example, carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen, etc. can be cited.

[0141] In addition, when the ratio of the number of zinc atoms to the sum of the number of atoms of all metal elements in the metal oxide is increased, the metal oxide has high crystallinity, and diffusion of impurities in the metal oxide can be suppressed. Therefore, variations in the electrical characteristics of the transistor are suppressed, and reliability can be improved.

[0142] In addition, when the ratio of the number of atoms of element M to the sum of the number of atoms of all metal elements in the metal oxide is increased, formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, generation of carriers due to oxygen vacancies is suppressed, and a transistor with a small off-state current can be formed. In addition, variations in the electrical characteristics of the transistor are suppressed, and reliability can be improved.

[0143] The electrical characteristics and reliability of the transistor vary depending on the composition of the metal oxide used for the semiconductor layer 108. Therefore, by varying the composition of the metal oxide according to the required electrical characteristics and reliability of the transistor, a semiconductor device having both excellent electrical characteristics and high reliability can be realized.

[0144] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of M. Examples of the atomic ratios of the metal elements of such an In-M-Zn oxide include In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:3, In:M:Zn = 3:1:1, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:3, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5:1:8, In:M:Zn = 6:1:6, In:M:Zn = 5:2:5, and compositions in the vicinity thereof. In addition, the vicinity of the composition includes a range of ±30% of the desired atomic ratio. By increasing the atomic ratio of indium in the metal oxide, the on-state current or field-effect mobility of the transistor can be increased.

[0145] In addition, the atomic ratio of In in the In-M-Zn oxide may be less than the atomic ratio of M. Examples of the atomic ratios of the metal elements of such an In-M-Zn oxide include In:M:Zn = 1:3:2, In:M:Zn = 1:3:3, In:M:Zn = 1:3:4, and compositions in the vicinity thereof. By increasing the ratio of the number of atoms of M in the metal oxide, generation of oxygen vacancies can be suppressed.

[0146] Note that when a plurality of metal elements are included as element M, the total of the atomic ratios of the metal elements may be the atomic ratio of element M.

[0147] In this specification and the like, the ratio of the number of indium atoms to the sum of the number of atoms of all the contained metal elements is sometimes referred to as the indium content rate. The same applies to other metal elements.

[0148] The metal oxide can be appropriately formed by a sputtering method or an atomic layer deposition (ALD: Atomic Layer Deposition) method. Note that when the metal oxide is formed by the sputtering method, the composition of the deposited metal oxide may sometimes be different from that of the target material. In particular, the zinc content rate in the deposited metal oxide sometimes decreases to about 50% of the target material.

[0149] The semiconductor layer 108 can also have a stacked structure including two or more metal oxide layers. The compositions of the two or more metal oxide layers included in the semiconductor layer 108 can also be the same or substantially the same as each other. By adopting a stacked structure of metal oxide layers having the same composition, for example, it can be formed using the same sputtering target, and thus the manufacturing cost can be reduced.

[0150] The compositions of the two or more metal oxide layers included in the semiconductor layer 108 can also be different from each other. For example, a stacked structure of a first metal oxide layer having a composition of In:M:Zn = 1:3:4 [atomic ratio] or around it and a second metal oxide layer having a composition of In:M:Zn = 1:1:1 [atomic ratio] or around it provided on the first metal oxide layer can be appropriately used. In addition, gallium, aluminum, or tin is particularly preferably used as the element M. For example, a stacked structure selected from any one of indium oxide, indium gallium oxide, and IGZO and any one of IAZO, IAGZO, and ITZO (registered trademark) can be used.

[0151] The semiconductor layer 108 preferably includes a metal oxide layer having crystallinity. As the structure of the metal oxide having crystallinity, for example, a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, and a nano-crystal (nc) structure can be cited. By using a metal oxide layer having crystallinity for the semiconductor layer 108, the density of defect states in the semiconductor layer 108 can be reduced, and thus a highly reliable semiconductor device can be realized.

[0152] The higher the crystallinity of the metal oxide layer for the semiconductor layer 108, the more the density of defect states in the semiconductor layer 108 can be reduced. On the other hand, by using a metal oxide layer having low crystallinity, a transistor capable of flowing a large current can be realized.

[0153] When forming a metal oxide layer by sputtering, the higher the substrate temperature (the temperature of the stage) during formation, the more likely it is to form a metal oxide layer with high crystallinity. In addition, the higher the flow ratio of oxygen gas to the total flow rate of the deposition gas used during formation (hereinafter also referred to as the oxygen flow ratio), the more likely it is to form a metal oxide layer with high crystallinity.

[0154] The semiconductor layer 108 may also have a stacked structure of two or more metal oxide layers with different crystallinities. For example, it may have a stacked structure of a first metal oxide layer and a second metal oxide layer provided on the first metal oxide layer, and the second metal oxide layer may include a region with higher crystallinity than the first metal oxide layer. Or, the second metal oxide layer may include a region with lower crystallinity than the first metal oxide layer. At this time, the compositions of the first metal oxide layer and the second metal oxide layer may be different, the same, or substantially the same.

[0155] The thickness of the semiconductor layer 108 is preferably 3 nm or more and 200 nm or less, more preferably 3 nm or more and 100 nm or less, more preferably 5 nm or more and 100 nm or less, more preferably 10 nm or more and 100 nm or less, more preferably 10 nm or more and 70 nm or less, more preferably 15 nm or more and 70 nm or less, more preferably 15 nm or more and 50 nm or less, more preferably 20 nm or more and 50 nm or less.

[0156] When an oxide semiconductor is used for the semiconductor layer 108, sometimes hydrogen in the oxide semiconductor reacts with oxygen bonded to metal atoms to become water, forming oxygen vacancies (V O ) in the oxide semiconductor. Furthermore, sometimes hydrogen enters the defects in the oxygen vacancies (hereinafter denoted as V O H) and is used as a donor to generate electrons as carriers. In addition, sometimes due to a part of hydrogen bonding to oxygen bonded to metal atoms, electrons as carriers are generated. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to be always on (that is, the threshold voltage is negative). In addition, since hydrogen in the oxide semiconductor is easily mobile due to the action of heat, electric field, etc., when the oxide semiconductor contains a large amount of hydrogen, it may lead to a reduction in the reliability of the transistor.

[0157] When an oxide semiconductor is used as the semiconductor layer 108, it is preferable to minimize V O H in the semiconductor layer 108 to make it highly pure intrinsic or substantially highly pure intrinsic. In order to obtain such an oxide semiconductor in which V O H is sufficiently reduced, it is important to remove impurities such as water and hydrogen in the oxide semiconductor (sometimes referred to as dehydration and dehydrogenation treatment); and supply oxygen to the oxide semiconductor to repair oxygen vacancies. By making V OAn oxide semiconductor in which impurities such as H are sufficiently reduced is used for a channel formation region of a transistor, and stable electrical characteristics can be imparted. Note that a process of supplying oxygen to the oxide semiconductor to repair oxygen vacancies is sometimes referred to as an oxidation treatment.

[0158] When an oxide semiconductor is used as the semiconductor layer 108, the carrier concentration of the oxide semiconductor in the region preferably used as the channel formation region is 1×10 18 cm -3 Hereinafter, it is more preferably less than 1×10 17 cm -3 , still more preferably less than 1×10 16 cm -3 ; even more preferably, it is less than 1×10 13 cm -3 ; still more preferably, it is less than 1×10 12 cm -3 . There is no particular limitation on the lower limit value of the carrier concentration of the oxide semiconductor in the region used as the channel formation region. For example, it can be set to 1×10 -9 cm -3 .

[0159] Compared with a transistor using amorphous silicon, the field-effect mobility of a transistor using an oxide semiconductor (hereinafter referred to as an OS transistor) is very high. In addition, the off-state current of the OS transistor is extremely small, and the charge stored in a capacitor connected in series with the transistor can be maintained for a long period of time. In addition, by using an OS transistor, the power consumption of a semiconductor device can be reduced.

[0160] The change in electrical characteristics of the OS transistor caused by irradiation with radiation is small, that is, the tolerance to radiation is high. Therefore, it can be suitably used even in an environment where radiation may be incident. The OS transistor can also be said to have high reliability for radiation. For example, the OS transistor can be suitably used for a pixel circuit of an X-ray flat panel detector. In addition, the OS transistor can be suitably used for a semiconductor device used in outer space. Examples of radiation include electromagnetic radiation (for example, X-rays and γ-rays) and particle radiation (for example, α-rays, β-rays, proton radiation, and neutron radiation).

[0161] As other semiconductor materials that can be used for the semiconductor layer 108, for example, a semiconductor composed of a single element or a compound semiconductor can be cited. Examples of the semiconductor composed of a single element include silicon and germanium. Examples of the compound semiconductor include gallium arsenide and silicon germanium. In addition, as the compound semiconductor, for example, an organic semiconductor and a nitride semiconductor can be cited. Note that the above-mentioned oxide semiconductor is also one kind of compound semiconductor. In addition, these semiconductor materials may contain impurities as dopants.

[0162] Examples of silicon that can be used for the semiconductor layer 108 include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polycrystalline silicon (LTPS: Low Temperature Poly Silicon).

[0163] A transistor using amorphous silicon for the semiconductor layer 108 can be formed on a large glass substrate and manufactured at low cost. A transistor using polycrystalline silicon for the semiconductor layer 108 has a high field effect mobility and can operate at high speed. In addition, a transistor using microcrystalline silicon for the semiconductor layer 108 has a higher field effect mobility than a transistor using amorphous silicon and can operate at high speed.

[0164] The semiconductor layer 108 may also include a layered material used as a semiconductor. The layered material is a general term for a group of materials having a layered crystal structure. The layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked by bonds weaker than covalent bonds and ionic bonds such as van der Waals bonds. The layered material has high conductivity in the unit layer, that is, has high two-dimensional conductivity. By using a material that is used as a semiconductor and has high two-dimensional conductivity for the channel formation region, a transistor with a large on-state current can be provided.

[0165] Examples of the above-mentioned layered materials include graphene, silicene, chalcogenides, etc. Chalcogenides are compounds containing chalcogen elements (elements belonging to Group 16). In addition, examples of chalcogenides include transition metal chalcogenides, Group 13 chalcogenides, etc. Specific examples of transition metal chalcogenides that can be used as the semiconductor layer of a transistor include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically ZrSe2), etc.

[0166] [Insulating layer 106] The insulating layer 106 may have a single-layer structure or a stacked structure of two or more layers. The insulating layer 106 preferably includes one or more inorganic insulating films. Examples of the inorganic insulating films include oxide insulating films, nitride insulating films, oxynitride insulating films, and oxynitrogen insulating films. Specific examples of these inorganic insulating films are as described above.

[0167] The insulating layer 106 has a portion in contact with the semiconductor layer 108. When the semiconductor layer 108 uses an oxide semiconductor, it is preferable that at least the film of the insulating layer 106 in contact with the semiconductor layer 108 uses the above-mentioned oxidation insulating film or oxynitride insulating film. In addition, it is more preferable that the insulating layer 106 uses a film that releases oxygen by heating.

[0168] Specifically, when the insulating layer 106 has a single-layer structure, it is preferable that the insulating layer 106 uses a silicon oxide film or a silicon oxynitride film.

[0169] In addition, the insulating layer 106 may have a stacked structure of an oxidation insulating film or an oxynitride insulating film in contact with the semiconductor layer 108 and a nitride insulating film or a oxynitride insulating film in contact with the conductive layer 104. As the oxidation insulating film or the oxynitride insulating film, for example, it is preferable to use a silicon oxide film or a silicon oxynitride film. As the nitride insulating film or the oxynitride insulating film, it is preferable to use a silicon nitride film or a silicon oxynitride film.

[0170] The silicon nitride film and the silicon oxynitride film have the characteristics of rarely releasing impurities (for example, water and hydrogen) themselves and being not easily permeable to oxygen and hydrogen, so they can be suitably used as the insulating layer 106. Since the diffusion of impurities from the insulating layer 106 to the semiconductor layer 108 is suppressed, good electrical characteristics of the transistor can be achieved and the reliability can be improved.

[0171] Note that in a micro transistor, when the thickness of the gate insulating layer is small, the leakage current sometimes increases. By using a material with a relatively high dielectric constant (also called a high-k material) for the gate insulating layer, it is possible to achieve a lower voltage during transistor operation while maintaining the physical thickness. As the high-k materials that can be used for the insulating layer 106, for example, gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium can be cited.

[0172] [Substrate 102] Although there is no particular limitation on the material of the substrate 102, it is at least necessary to have heat resistance capable of withstanding subsequent heat treatment. For example, a single-crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or a resin substrate can be used as the substrate 102. In addition, semiconductor elements may be provided on the substrate 102. Note that the shapes of the semiconductor substrate and the insulating substrate can be circular or angular.

[0173] As the substrate 102, a flexible substrate may also be used, and transistors 100 and the like may be directly formed on the flexible substrate. Alternatively, a release layer may be provided between the substrate 102 and the transistors 100 and the like. The release layer can be used when a part or all of a semiconductor device is manufactured on the release layer and then separated from the substrate 102 and transferred to another substrate. At this time, the transistors 100 and the like can also be transferred to a substrate with low heat resistance or a flexible substrate.

[0174] [Modification examples of transistor 100] Figure 3C Figs. 4 to 12 show modification examples of transistor 100.

[0175] In the semiconductor device according to one embodiment of the present invention, at least one of the conductive layer 112a and the conductive layer 112b has a laminated structure of two or more layers in which a second layer (conductive layer 122a or conductive layer 122b) covers the top surface and the side surfaces of a first layer (conductive layer 182a or conductive layer 182b).

[0176] For example, as Figure 3C shown, the conductive layer 122a may be in contact with the top surface of the conductive layer 182a and not in contact with the side surfaces. Thus, the conductive layer 122a and the conductive layer 182a can be formed by processing using the same mask pattern. Thus, a reduction in manufacturing processes and costs can be achieved. At this time, it can be said that the top surface shapes of the conductive layer 122a and the conductive layer 182a are the same or substantially the same, and it can also be said that the ends are aligned or substantially aligned.

[0177] [Transistor 100A] Figure 4A And Figure 4B are cross-sectional views of transistor 100A. Note that the top view of transistor 100A is the same as that of transistor 100, so reference can be made to Figure 1A .

[0178] The difference between transistor 100A and transistor 100 is that both the conductive layer 112a and the conductive layer 112b have a three-layer structure.

[0179] The conductive layer 112a in transistor 100A includes a conductive layer 184a, a conductive layer 182a on the conductive layer 184a, and a conductive layer 122a on the conductive layer 182a. As Figure 4BAs shown, the end portions of the conductive layer 182a and the end portions of the conductive layer 122a are located on the conductive layer 184a. The conductive layer 122a is arranged in such a manner that it contacts and covers the top surface and the side surfaces of the conductive layer 182a. The conductive layer 122a is in contact with the semiconductor layer 108. The conductive layer 122a contacts the top surface of the conductive layer 184a outside the end portion of the conductive layer 182a. That is to say, it can also be said that the conductive layer 182a is surrounded by the conductive layer 184a and the conductive layer 122a on the top surface, side surfaces, and bottom surface.

[0180] Depending on the material of the conductive layer 182a, there may be low adhesion to the surface to be formed (here, the substrate 102), resulting in a reduction in the manufacturing yield of the semiconductor device. Therefore, it is preferable to provide a conductive layer 184a with higher adhesion to the substrate than the conductive layer 182a.

[0181] For example, preferably, ITSO is used as the conductive layer 184a, copper is used as the conductive layer 182a, and ITSO is used as the conductive layer 122a. The adhesion between the glass substrate and the ITSO film is higher than the adhesion between the glass substrate and the copper film. In addition, since the conductive layer 184a and the conductive layer 122a can be processed in the same process, a significant increase in the manufacturing process can be prevented and the manufacturing yield of the semiconductor device can be improved.

[0182] The conductive layer 112b in the transistor 100A includes a conductive layer 184b, a conductive layer 182b on the conductive layer 184b, and a conductive layer 122b on the conductive layer 182b. As Figure 4B shown, the end portions of the conductive layer 182b and the end portions of the conductive layer 122b are located on the conductive layer 184b. The conductive layer 122b is arranged in such a manner that it contacts and covers the top surface and the side surfaces of the conductive layer 182b. The conductive layer 122b and the conductive layer 184b are in contact with the semiconductor layer 108. The conductive layer 122b contacts the top surface of the conductive layer 184b outside the end portion of the conductive layer 182b. That is to say, it can also be said that the conductive layer 182b is surrounded by the conductive layer 184b and the conductive layer 122b on the top surface, side surfaces, and bottom surface.

[0183] By using copper as the conductive layer 182b, the wiring resistance of the conductive layer 112b can be reduced, so it is preferable. However, when copper diffuses into the insulating layer 110 or even the semiconductor layer 108, it may have a negative impact on the characteristics of the transistor. Thus, by providing the conductive layer 184b, the diffusion of copper from the conductive layer 182b into the insulating layer 110 or even the semiconductor layer 108 can be suppressed.

[0184] For example, preferably, ITSO is used as the conductive layer 184b, copper is used as the conductive layer 182b, and ITSO is used as the conductive layer 122b. Since the conductive layers 184b and 122b can be processed in the same process, a significant increase in the manufacturing process can be prevented and the reliability of the transistor can be improved.

[0185] In a semiconductor device according to an aspect of the present invention, at least one of the conductive layer 112a and the conductive layer 112b has a laminated structure of two or more layers in which a second layer (the conductive layer 122a or the conductive layer 122b) covers the top surface and the side surface of a first layer (the conductive layer 182a or the conductive layer 182b).

[0186] Next, examples of combinations of the conductive layer 112a and the conductive layer 112b are shown with reference to FIGS. 5 to 7.

[0187] Figure 5A An example in which the conductive layer 112a has a two-layer structure and the conductive layer 112b has a single-layer structure is shown. Figure 5B An example in which the conductive layer 112a has a two-layer structure and the conductive layer 112b has a three-layer structure is shown. Figure 5C An example in which the conductive layer 112a has a single-layer structure and the conductive layer 112b has a two-layer structure is shown. Figure 6A An example in which the conductive layer 112a has a three-layer structure and the conductive layer 112b has a two-layer structure is shown. Figure 6B An example in which the conductive layer 112a has a three-layer structure and the conductive layer 112b has a single-layer structure is shown. Figure 6C An example in which the conductive layer 112a has a single-layer structure and the conductive layer 112b has a three-layer structure is shown.

[0188] For the conductive layer 112a having a single-layer structure, a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, or an oxide conductor is preferably used. Specifically, ITSO is preferably used. Thereby, an increase in the contact resistance between the conductive layer 112a and the semiconductor layer 108 can be suppressed.

[0189] Examples of the structure of the conductive layer 112a having a two-layer structure can be referred to the description of the transistor 100 (FIGS. 1 to 3).

[0190] Examples of the structure of the conductive layer 112a having a three-layer structure can be referred to the description of the transistor 100A ( Figure 4A and Figure 4B ).

[0191] For the conductive layer 112b having a single-layer structure, a conductive material that is not easily oxidized, a conductive material that maintains a low resistance even when oxidized, or an oxide conductor is preferably used. Specifically, ITSO is preferably used. Thereby, an increase in the contact resistance between the conductive layer 112b and the semiconductor layer 108 can be suppressed.

[0192] For an example of the structure of the two-layer conductive layer 112b, reference can be made to the description of the transistor 100 (Figs. 1 to 3).

[0193] For an example of the structure of the three-layer conductive layer 112b, reference can be made to the description of the transistor 100A ( Figure 4A and Figure 4B ).

[0194] In addition, the conductive layer 182b may not include the opening 145. When viewed in cross-section, as Figure 1B and Figure 1C show, the conductive layer 182b may exist on both the left and right sides of the opening 143. As Figure 7A shows, the conductive layer 182b may exist on only one of the left and right sides of the opening 143. Figure 7A An example is shown in which the end of the conductive layer 182b is located on the right side of the opening 143 and the conductive layer 182b does not exist on the left side of the opening 143.

[0195] As Figure 7B shows, the conductive layer 112a may also include the conductive layer 186a. In addition, the conductive layer 112b may also include the conductive layer 186b.

[0196] Preferably, the conductive layer 122a is a metal layer, the conductive layer 186a is a metal oxide layer, and the conductive layer 122a and the conductive layer 186a contain the same metal as each other. For example, through one or both of the deposition process of the semiconductor layer 108 and the heating process performed in a state where the conductive layer 122a is in contact with the semiconductor layer 108, a part of the conductive layer 122a is oxidized, thereby forming the conductive layer 186a as a metal oxide layer. In addition, an oxidation treatment may be performed after the formation of the conductive layer 122a to oxidize a part of the conductive layer 122a to form the conductive layer 186a as a metal oxide layer.

[0197] The conductive layer 186a is located between the conductive layer 122a and the semiconductor layer 108. It can also be said that the conductive layer 186a covers a part of the top surface of the conductive layer 122a.

[0198] Similarly, preferably, the conductive layer 122b is a metal layer, the conductive layer 186b is a metal oxide layer, and the conductive layer 122b and the conductive layer 186b contain the same metal as each other. For example, through one or both of the deposition process of the semiconductor layer 108 and the heating process performed in a state where the conductive layer 122b is in contact with the semiconductor layer 108, a part of the conductive layer 122b is oxidized, thereby forming the conductive layer 186b as a metal oxide layer. Alternatively, an oxidation treatment may be performed after forming the conductive layer 122b to oxidize a part of the conductive layer 122b to form the conductive layer 186b as a metal oxide layer.

[0199] The conductive layer 186b is located between the conductive layer 122b and the semiconductor layer 108. It can also be said that the conductive layer 186b covers the top surface and the side surface of the conductive layer 122b.

[0200] Preferably, the conductive layers 122a, 122b, 186a, and 186b all contain titanium. Thereby, the high conductivity of the conductive layers 122a and 122b can be maintained, and an increase in contact resistance caused by the formation of the conductive layers 186a and 186b can be suppressed.

[0201] For example, the conductive layer 182a may adopt a single-layer structure of an aluminum film, a single-layer structure of a tungsten film, or a laminated structure of a titanium film and an aluminum film. The conductive layer 122a may adopt a titanium film, and the conductive layer 186a may adopt a titanium oxide film. Similarly, the conductive layer 182b may adopt a single-layer structure of an aluminum film, a single-layer structure of a tungsten film, or a laminated structure of a titanium film and an aluminum film. The conductive layer 122b may adopt a titanium film, and the conductive layer 186b may adopt a titanium oxide film.

[0202] In addition, each of the conductive layers 122a and 122b includes a portion in contact with the insulating layer 110. In Figure 7B the conductive layer 122a is in contact with the insulating layer 110b, and the conductive layer 122b is in contact with the insulating layer 110d. Preferably, each of the insulating layers 110b and 110d uses a nitride. Specifically, silicon nitride or silicon oxynitride is preferably used. Thereby, the formation of oxides between the conductive layer 122a or the conductive layer 122b and the insulating layer 110 can be suppressed, and an increase in the resistance of the conductive layers 112a and 112b can be suppressed. In addition, when titanium is used as the conductive layers 122a and 112b, from the viewpoint of adhesion, the conductive layers 122a and 112b preferably contact silicon nitride or silicon oxynitride as compared with silicon oxide and silicon oxynitride.

[0203] In addition, when the insulating layer 110b is made of a nitride, a metal nitride layer is sometimes formed between the conductive layer 122a and the insulating layer 110b. Similarly, when the insulating layer 110d is made of a nitride, a metal nitride layer is sometimes formed between the conductive layer 122b and the insulating layer 110d. Therefore, it is preferable that the conductive layer 122a and the conductive layer 112b be made of a metal that maintains a low resistance even when it is a nitride. For example, when the conductive layer 122a and the conductive layer 112b are made of titanium, a titanium nitride layer is formed as the metal nitride layer, so this is preferable.

[0204] Figure 7C An example in which the conductive layer 182a has a two-layer structure is shown. When the conductive layer 182a has a stacked structure, it is preferable that at least two layers be formed by processing with the same mask pattern. Thereby, reduction of manufacturing processes and costs can be achieved. At this time, it can be said that the top surface shapes of two or more layers constituting the conductive layer 182a are the same or substantially the same, and it can also be said that the ends are aligned or substantially aligned.

[0205] [Transistor 100B] Figure 8A and Figure 8B is a cross-sectional view of the transistor 100B. Note that the top view of the transistor 100B is the same as the top view of the transistor 100, so reference can be made to Figure 1A .

[0206] An example in which the insulating layer 110 has a three-layer structure is shown in the transistor 100, and an example in which the insulating layer 110 has a five-layer structure is shown in the transistor 100B. Specifically, Figure 8A and Figure 8B the insulating layer 110 shown has a stacked structure of a substrate 102, an insulating layer 110a on the conductive layer 112a, an insulating layer 110b on the insulating layer 110a, an insulating layer 110c on the insulating layer 110b, an insulating layer 110d on the insulating layer 110c, and an insulating layer 110e on the insulating layer 110d.

[0207] There are regions (bias regions) in the semiconductor layer 108 where it is difficult to apply a gate electric field. The insulating layer 110a is preferably provided in contact with this bias region.

[0208] The insulating layer 110a includes a region with a higher hydrogen content than the insulating layer 110b. In addition, the insulating layer 110a preferably includes a region with a higher hydrogen content than the insulating layer 110d.

[0209] When the resistance of the bias region is high, the field-effect mobility of the transistor sometimes decreases. When the insulating layer 110a is a layer with a high hydrogen content, the resistance of the region in the semiconductor layer 108 that contacts the insulating layer 110a and its vicinity can be reduced (refer to Figure 8AThe two lower regions 108n) shown. Thereby, a decrease in the field-effect mobility due to the bias region can be suppressed.

[0210] The insulating layer 110a is preferably a layer that releases hydrogen by heating. Due to the heat applied in the manufacturing process of the transistor 100B, the insulating layer 110a releases hydrogen, so hydrogen can be supplied to the semiconductor layer 108. By supplying hydrogen to the bias region of the semiconductor layer 108, the resistance of the bias region can be reduced and a decrease in the field-effect mobility can be suppressed.

[0211] Similarly, the insulating layer 110e includes a region with a higher hydrogen content than the insulating layer 110d. In addition, the insulating layer 110e preferably includes a region with a higher hydrogen content than the insulating layer 110b.

[0212] When the insulating layer 110e is a layer with a high hydrogen content, the region in the semiconductor layer 108 that contacts the insulating layer 110e and its vicinity can be made to have a low resistance (refer to Figure 8A the two upper regions 108n) shown.

[0213] The insulating layer 110e is preferably a layer that releases hydrogen by heating. By the heat applied in the process of manufacturing the transistor 100B, the insulating layer 110e releases hydrogen, and hydrogen can be supplied to the semiconductor layer 108. Thereby, a low-resistance region can be formed near the region in the semiconductor layer 108 that contacts the conductive layer 112b.

[0214] In the semiconductor layer 108 of the transistor 100B, a region that contacts the insulating layer 110a and serves as a low-resistance region is provided between the region that contacts the conductive layer 112a and the region that contacts the insulating layer 110c and is an i-type region. Here, when the conductive layer 112a is used as the drain electrode and the conductive layer 112b is used as the source electrode, it can also be said that the semiconductor layer 108 includes a low-resistance region between the region that contacts the drain electrode and the channel formation region. Thereby, a high electric field is not easily generated near the drain region, and generation of hot carriers can be suppressed, and thus transistor degradation can be suppressed.

[0215] Similarly, in the semiconductor layer 108 of the transistor 100B, a region that contacts the insulating layer 110e and serves as a low-resistance region is provided between the region that contacts the conductive layer 112b and the region that contacts the insulating layer 110c and is an i-type region. Here, when the conductive layer 112a is used as the source electrode and the conductive layer 112b is used as the drain electrode, it can also be said that the semiconductor layer 108 includes a low-resistance region between the region that contacts the drain electrode and the channel formation region. Thereby, a high electric field is not easily generated near the drain region, and generation of hot carriers can be suppressed, and thus transistor degradation can be suppressed.

[0216] Thus, the transistor according to one embodiment of the present invention can have high reliability even when the conductive layer 112a or the conductive layer 112b is a drain electrode. Therefore, the design freedom of the semiconductor device can be improved.

[0217] The hydrogen content of the insulating layer 110b is lower than that of the insulating layer 110a. The hydrogen content of the insulating layer 110d is lower than that of the insulating layer 110e. Therefore, hydrogen diffusion from the insulating layer 110b or the insulating layer 110d to the insulating layer 110c and the region (the region to be converted to the i-type) in the semiconductor layer 108 where a sufficient gate electric field is applied can be suppressed.

[0218] As described above, the insulating layer 110b and the insulating layer 110d preferably use a film that does not easily diffuse hydrogen. Thereby, hydrogen diffusion from the insulating layer 110a through the insulating layer 110b to the semiconductor layer 108 can be suppressed. In addition, hydrogen diffusion from the insulating layer 110e through the insulating layer 110d to the semiconductor layer 108 can be suppressed.

[0219] The insulating layer 110a and the insulating layer 110e preferably use any one or more of the above-mentioned oxide insulating films, nitride insulating films, oxynitride insulating films, and nitroxide insulating films. Specifically, the insulating layer 110a and the insulating layer 110e preferably use any one or more of silicon nitride films, silicon oxynitride films, oxynitride silicon films, aluminum oxide films, aluminum oxynitride films, aluminum nitride films, hafnium oxide films, and hafnium aluminum oxide films.

[0220] The insulating layer 110a and the insulating layer 110e preferably use any one or more of the above-mentioned nitride insulating films and oxynitride insulating films. Specifically, the insulating layer 110a and the insulating layer 110e preferably use one or both of a silicon nitride film and a silicon oxynitride film.

[0221] By changing the deposition conditions of the silicon nitride film and the silicon oxynitride film (for example, any one or more of the power during deposition (power density during deposition), the pressure during deposition, the deposition gas type, the deposition gas flow ratio, the deposition temperature, and the distance between the substrate and the electrode), the amount of hydrogen released by heating can be adjusted. Therefore, the silicon nitride film and the silicon oxynitride film can be suitably used as the insulating layer 110a and the insulating layer 110e. In addition, the silicon nitride film and the silicon oxynitride film can also be suitably used as the insulating layer 110b and the insulating layer 110d.

[0222] For example, by depositing the insulating layer under conditions where the flow rate ratio of NH3 gas relative to the total flow rate of the deposition gas is high, the hydrogen content in the insulating layer can be increased. As a result, the amount of hydrogen released by heating in the insulating layer can be increased. On the other hand, by depositing the insulating layer under conditions where the flow rate ratio of NH3 gas relative to the total flow rate of the deposition gas is low or without using NH3 gas as the deposition gas, the amount of hydrogen released by heating in the insulating layer can be reduced. For example, the insulating layer 110a is preferably deposited under conditions where the flow rate ratio of NH3 gas relative to the total flow rate of the deposition gas is higher than that of the insulating layer 110b. Additionally, for example, the insulating layer 110e is preferably deposited under conditions where the flow rate ratio of NH3 gas relative to the total flow rate of the deposition gas is higher than that of the insulating layer 110d.

[0223] For example, by depositing the insulating layer under conditions of low power density, the hydrogen content in the insulating layer can be increased. For example, the insulating layer 110a is preferably deposited under conditions where the power density is less than that of the insulating layer 110b. Additionally, for example, the insulating layer 110e is preferably deposited under conditions where the power density is less than that of the insulating layer 110d.

[0224] In the semiconductor layer 108, preferably, the resistance of the region in contact with the insulating layer 110b is higher than that of the region in contact with the insulating layer 110a and lower than that of the region in contact with the insulating layer 110c. In the semiconductor layer 108, the region in contact with the insulating layer 110b can be an n - type region or an n - region. In the semiconductor layer 108, the oxygen supplied from the insulating layer 110c reaches not only the region in contact with the insulating layer 110c but also the region in contact with the insulating layer 110b and its vicinity. Similarly, in the semiconductor layer 108, the hydrogen supplied from the insulating layer 110a reaches not only the region in contact with the insulating layer 110a but also the region in contact with the insulating layer 110b and its vicinity. Here, when the insulating layer 110a is not provided, the region in contact with the insulating layer 110b in the semiconductor layer 108 and its vicinity are supplied with oxygen through the insulating layer 110c and have a relatively high resistance. In the semiconductor layer 108, when a high-resistance region is included between the channel formation region and the region in contact with the drain electrode, the on-state current of the transistor will decrease. On the other hand, when the insulating layer 110a with a high hydrogen content is provided, by supplying hydrogen, the high-resistivity of the region in contact with the insulating layer 110b in the semiconductor layer 108 and its vicinity can be suppressed, thereby suppressing the decrease in the on-state current of the transistor, which is therefore preferable.

[0225] For example, preferably, the insulating layer 110a, the insulating layer 110b, the insulating layer 110d, and the insulating layer 110e use a silicon nitride film or a silicon oxynitride film, and the insulating layer 110c uses a silicon oxide film or a silicon oxynitride film.

[0226] For example, preferably, the insulating layer 110a and the insulating layer 110e are made of a silicon nitride film or a silicon oxynitride film, the insulating layer 110b and the insulating layer 110d are made of an aluminum oxide film, and the insulating layer 110c is made of a silicon oxide film or a silicon oxynitride film.

[0227] Accordingly, by disposing the semiconductor layer 108 in contact with the insulating layers 110a to 110e, the channel formation region in the semiconductor layer 108 can be disposed at a position where a sufficient gate electric field is applied. In addition, the resistance of the bias region in the semiconductor layer 108 can be reduced. Therefore, a decrease in the field effect mobility of the transistor can be suppressed, and good electrical characteristics can be obtained.

[0228] A region in contact with the insulating layer 110 is provided between the region of the semiconductor layer 108 in contact with the conductive layer 112a and the region in contact with the conductive layer 112b. The insulating layer 110 has the following structure: the insulating layer 110c is sandwiched between the insulating layer 110b and the insulating layer 110d with a low hydrogen content above and below, and the three-layer structure is sandwiched between the insulating layer 110a and the insulating layer 110e with a high hydrogen content above and below. That is, the insulating layer 110 has a symmetric structure with respect to a line perpendicular to the up-down direction (stacking direction). Accordingly, the semiconductor layer 108 can have an appropriate carrier concentration distribution in the channel length direction. Thereby, the transistor can have good electrical characteristics and high reliability.

[0229] The hydrogen content is less than the main components constituting the insulating layer (for example, nitrogen and silicon in the silicon nitride layer), and therefore, the hydrogen content of the insulating layers 110a, 110b, 110d, and 110e is preferably compared by SIMS analysis.

[0230] Even if the insulating layer 110a and the insulating layer 110b use layers with the same main components (for example, both are silicon nitride layers), they can sometimes be distinguished by cross-sectional observation. For example, in the transmitted electron (TE) image of a scanning transmission electron microscope (STEM: Scanning Transmission Electron Microscopy), the brightness of the insulating layer 110a is observed to be higher than that of the insulating layer 110b. Similarly, even if the insulating layer 110d and the insulating layer 110e use layers with the same main components, they can sometimes be distinguished by cross-sectional observation. For example, in the TE image of STEM, the brightness of the insulating layer 110e is observed to be higher than that of the insulating layer 110d.

[0231] As Figure 8AAs shown, the shortest distance T1 from the top surface of the conductive layer 112a to the portion of the semiconductor layer 108 in contact with the insulating layer 110c is longer than the shortest distance T2 from the top surface of the conductive layer 112a to the bottom surface of the conductive layer 104. Additionally, it can be said that when viewed in cross-section, the bottom surface of the conductive layer 104 inside the opening 141 is located on the lower side (substrate 102 side) compared to the portion of the semiconductor layer 108 in contact with the insulating layer 110c. Thus, a gate electric field can be surely applied to the channel formation region of the semiconductor layer 108, and the electrical characteristics of the transistor can be improved.

[0232] It can be said that the shortest distance T1 is determined by the sum of the thicknesses of the insulating layer 110a and the insulating layer 110b, and the shortest distance T2 is determined by the sum of the thicknesses of the semiconductor layer 108 and the insulating layer 106. Therefore, it can be said that the sum of the thicknesses of the insulating layer 110a and the insulating layer 110b is preferably larger than the sum of the thicknesses of the semiconductor layer 108 and the insulating layer 106. The shortest distance T1 is preferably 0.5 times or more, more preferably 1.0 times or more, and further preferably more than 1.0 times the shortest distance T2.

[0233] The thickness of the insulating layer 110a can be determined within the range where the relationship between the shortest distances T1 and T2 holds. The thicknesses of the insulating layer 110a and the insulating layer 110e are preferably 10 nm or more and 200 nm or less, more preferably 20 nm or more and 150 nm or less, and further preferably 50 nm or more and 100 nm or less. Note that the thicknesses of the insulating layer 110a and the insulating layer 110e can be the same or different.

[0234] Refer to Figure 8A The channel length, channel width, etc. of the transistor 100B are described. Note that the description of the same content as that of the transistor 100 may sometimes be omitted.

[0235] In the semiconductor layer 108, the regions in contact with the insulating layer 110a and the insulating layer 110e are respectively used as low-resistance regions (also referred to as n + -type regions or n +Region), the region in contact with the insulating layer 110c is used as a channel formation region. In the semiconductor layer 108, the resistance of the region in contact with the insulating layer 110b is sometimes higher than that of the region in contact with the insulating layer 110a and lower than that of the region in contact with the insulating layer 110c. In the semiconductor layer 108, the resistance of the region in contact with the insulating layer 110d is sometimes higher than that of the region in contact with the insulating layer 110e and lower than that of the region in contact with the insulating layer 110c. In the present embodiment, the region in contact with the insulating layer 110b and the region in contact with the insulating layer 110d in the semiconductor layer 108 are described as not being included in the channel formation region, but these regions may also be included in the channel formation region. Alternatively, the region in contact with the insulating layer 110b and the region in contact with the insulating layer 110d in the semiconductor layer 108 may be referred to as low-resistance regions. The low-resistance regions may also be used as source regions or drain regions.

[0236] Figure 8A In the figure, the channel length L100 of the transistor 100B is indicated by a double-headed dashed arrow. It can be said that the channel length L100 is the shortest distance between the portion of the semiconductor layer 108 in contact with the insulating layer 110b and the portion in contact with the insulating layer 110d when viewed in cross-section.

[0237] By adjusting the thickness T110 and the angle θ110 of the insulating layer 110c, the channel length L100 can be controlled. In Figure 8A the figure, the thickness T110 of the insulating layer 110c is indicated by a double-headed dotted arrow.

[0238] In addition, when the channel formation region includes the region in contact with the insulating layer 110b and the region in contact with the insulating layer 110d in the semiconductor layer 108, it can be said that the channel length L100 is the shortest distance between the portion of the semiconductor layer 108 in contact with the insulating layer 110a and the portion in contact with the insulating layer 110e when viewed in cross-section. In addition, the channel length L100 corresponds to the sum of the lengths of the sides on the opening 141 side of the insulating layers 110b, 110c, and 110d when viewed in cross-section.

[0239] In Figure 8A the figure, the diameter D143 of the opening 143 is indicated by a double-headed dashed-dotted arrow. Figure 1A An example is shown in which the top surface shapes of the opening 141 and the opening 143 are circular with a diameter D143. At this time, the channel width W100 of the transistor 100B coincides with the circumference of this circle.

[0240] The channel length L100, the thickness T110, the angle θ110, the diameter D143, and the channel width W100 can be referred to the above description.

[0241] [Transistor 100C] Figure 9AShows a top view of transistor 100C. Figure 9B is a sectional view taken along Figure 9A the dash-dotted line A1 - A2 in Figure 9C is a sectional view taken along Figure 9A the dash-dotted line B1 - B2 in

[0242] The main difference between transistor 100C and transistor 100B is that, when viewed from above, opening 143 is larger than opening 141.

[0243] The end of the opening 143 side of the conductive layer 112b is located outside the end of the opening 141 side of the insulating layer 110.

[0244] The semiconductor layer 108 contacts the top and side surfaces of the conductive layer 112b, the top and side surfaces of the insulating layer 110d, the side surface of the insulating layer 110c, the side surface of the insulating layer 110b, the side surface of the insulating layer 110a, and the top surface of the conductive layer 112a.

[0245] [Transistor 100D] Figure 10A Shows a top view of transistor 100D. Figure 10B is a sectional view taken along Figure 10A the dash-dotted line A1 - A2 in Figure 10C is a sectional view taken along Figure 10A the dash-dotted line B1 - B2 in

[0246] The difference between transistor 100D and transistor 100B is that the semiconductor layer 108 contacts the side surface of the conductive layer 112b that does not face the opening 143 (the opposite side of the opening 143).

[0247] There are no particular restrictions on the top surface shape and size of the semiconductor layer 108 and the conductive layer 112b. The end of the semiconductor layer 108 can be aligned with the end of the conductive layer 112b, can be located inside the end of the conductive layer 112b, or can be located outside the end of the conductive layer 112b.

[0248] As Figure 10B shown, the semiconductor layer 108 of transistor 100D covers the side surface of the conductive layer 112b that does not face the opening 143. The end of the semiconductor layer 108 is located outside the end of the conductive layer 112b and contacts on the insulating layer 110. Additionally, the Figure 10C left end in Figure 10C of the semiconductor layer 108 covers the end of the conductive layer 112b and contacts on the insulating layer 110. Additionally, the

[0249] [Transistor 100E] Figure 11Ais a cross-sectional view of transistor 100E.

[0250] The transistor 100E is mainly different from the transistor 100B in that: a conductive layer 103 is included on the conductive layer 112 a ; and the insulating layer 110 has a six-layer structure.

[0251] Conductive layer 103 is located on insulating layer 110b. Conductive layer 112a and conductive layer 103 are electrically insulated from each other by insulating layer 110a and insulating layer 110b. An opening is provided at a position of conductive layer 103 that overlaps conductive layer 112a.

[0252] In addition, the conductive layer 103 may be electrically connected to the conductive layer 112a. For example, the conductive layer 112a and the conductive layer 103 may be in contact with each other through openings provided in the insulating layer 110a and the insulating layer 110b. Alternatively, the conductive layer 103 may be provided on and in contact with the conductive layer 112a without providing the insulating layer 110a and the insulating layer 110b. In this case, the insulating layer 110 preferably includes at least the insulating layers 110f, 110c, and 110d, and more preferably includes the insulating layer 110e.

[0253] The insulating layer 110 includes an insulating layer 110a on the conductive layer 112a, an insulating layer 110b on the insulating layer 110a, an insulating layer 110f on the insulating layer 110b and the conductive layer 103, an insulating layer 110c on the insulating layer 110f, an insulating layer 110d on the insulating layer 110c, and an insulating layer 110e on the insulating layer 110d.

[0254] The insulating layer 110f covers the top surface and the side surfaces of the conductive layer 103. The insulating layer 110f is provided so as to cover a part of the opening of the conductive layer 103. The insulating layer 110f is in contact with the insulating layer 110b through the opening.

[0255] The insulating layer 110f preferably has the same structure as the insulating layers 110b and 110d. Specifically, the insulating layer 110f preferably uses a film in which oxygen is not easily diffused. Also, the insulating layer 110f preferably uses a film in which hydrogen is not easily diffused.

[0256] In the transistor 100E, the semiconductor layer 108 has a region that overlaps with the conductive layer 104 via the insulating layer 106 and overlaps with the conductive layer 103 via a portion of the insulating layer 110 (particularly, the insulating layer 110f and the insulating layer 110c). In other words, the semiconductor layer 108 has a region that is sandwiched between the conductive layer 104 and the conductive layer 103 via the insulating layer 106 and a portion of the insulating layer 110 (particularly, the insulating layer 110f and the insulating layer 110c).

[0257] The conductive layer 103 is used as the back gate electrode of the transistor 100E. In addition, a part of the insulating layer 110 is used as the back gate insulating layer of the transistor 100E.

[0258] By having a back gate electrode in the transistor 100E, the potential of the back gate side (also referred to as the back channel) of the semiconductor layer 108 can be fixed. Therefore, the saturation in the Id-Vd characteristics of the transistor 100E can be improved.

[0259] In this specification and the like, the case where the current change in the saturation region of the Id-Vd characteristics of a transistor is small (the slope is small) is sometimes expressed as "high saturation".

[0260] In addition, since the transistor 100E has a back gate electrode, the back channel potential of the semiconductor layer 108 can be fixed, and the negative shift of the threshold voltage can be suppressed. As a result, a normally-off (i.e., the threshold voltage is positive) transistor can be realized.

[0261] Figure 11A An example in which the thickness of the insulating layer 110b is uniform in any part is shown. Note that the thickness of the insulating layer 110b may be different in the region overlapping the conductive layer 103 and the region not overlapping the conductive layer 103. For example, when processing the film that will become the conductive layer 103, sometimes a part of the region of the insulating layer 110b that does not overlap the conductive layer 103 is removed, and its thickness is reduced.

[0262] In the semiconductor layer 108, the region in contact with the conductive layer 112a is used as one of the source region and the drain region, and the region in contact with the conductive layer 112b is used as the other of the source region and the drain region. In addition, in the semiconductor layer 108, the regions in contact with the insulating layer 110a and the insulating layer 110e are used as low-resistance regions. In the semiconductor layer 108, at least the region in contact with the insulating layer 110c is used as the channel formation region. In the description of this embodiment, the regions of the semiconductor layer 108 in contact with the insulating layers 110b, 110d, and 110f are not included in the channel formation region, but this region may also be included in the channel formation region.

[0263] Figure 11A The channel length L100 of the transistor 100E is shown by a double arrow of a dotted line. The channel length L100 can be said to be the shortest distance between the part in contact with the insulating layer 110f and the part in contact with the insulating layer 110d in the semiconductor layer 108 when viewed from the cross section.

[0264] Generally, when the channel length is small, the saturation in the Id-Vd characteristics of a transistor tends to decrease, but since the transistor 100E includes a back gate, high saturation can be achieved.

[0265] The preferred numerical ranges of the channel length L100, the thickness T110, and the angle θ110 are as described above.

[0266] The thickness T103 of the conductive layer 103 is preferably more than 0.5 times, more preferably more than 1.0 times, and further preferably more than 1.0 times the channel length L100. Thereby, the region in the semiconductor layer 108 that overlaps the conductive layer 104 with the insulating layer 106 interposed therebetween and overlaps the conductive layer 103 with the insulating layer 110 interposed therebetween can be enlarged. Therefore, the electric field of the back channel of the semiconductor layer 108 can be controlled more reliably.

[0267] The transistor 100E has a region in which a conductive layer 103, an insulating layer 110, a semiconductor layer 108, an insulating layer 106, and a conductive layer 104 are stacked in this order in one direction, and no other layers are included therebetween. As this direction, a direction perpendicular to the channel length L100 can be cited. By enlarging this region, the electric field of the back channel of the semiconductor layer 108 can be controlled more reliably.

[0268] The shortest distance L1 between the conductive layer 103 and the semiconductor layer 108 is preferably smaller than the channel length L100, more preferably 0.5 times or less, and further preferably 0.1 times or less. The closer the distance between the conductive layer 103 and the semiconductor layer 108, the more the saturation in the Id-Vd characteristics of the transistor 100E can be improved.

[0269] Note that when viewed in cross section, sometimes the shortest distances between the conductive layer 103 and the semiconductor layer 108 on the left and right sides of the opening of the insulating layer 110 are different. In this case, it is preferable that the distance L1 on at least one of the left and right sides of the opening satisfies the above range, and more preferably, the distances L1 on both the left and right sides of the opening satisfy the above range. In any cross section, the shortest distance between the conductive layer 103 on the left side of the opening and the semiconductor layer 108 is preferably 50% or more and 150% or less, more preferably 30% or more and 130% or less, and further preferably 10% or more and 110% or less of the shortest distance on the right side of the opening.

[0270] As Figure 11A shown, the channel length L100 is sometimes affected by the thickness T103 of the conductive layer 103 according to the shortest distance L1 between the conductive layer 103 and the semiconductor layer 108.

[0271] The channel length L100 of the transistor 100E corresponds to the length of the side surface on the opening side of the insulating layer 110c when viewed in cross section. When the distance between the conductive layer 103 and the semiconductor layer 108 is close (that is, the distance L1 is shortened), sometimes affected by the thickness of the conductive layer 103, the channel length L100 becomes longer. Therefore, the channel length L100 can also be 1 time or more, 1.5 times or more, or 2 times or more the thickness T110.

[0272] The conductive layer 103 may have a single-layer structure or a stacked structure of two or more layers. The conductive layer 103 may use the materials that can be used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104.

[0273] [Transistor 100F] Figure 11B is a cross-sectional view of the transistor 100F.

[0274] The transistor 100F is different from the transistor 100E in that the insulating layer 110 has an eight-layer structure.

[0275] The insulating layer 110 includes an insulating layer 110a on the conductive layer 112a, an insulating layer 110b on the insulating layer 110a, an insulating layer 110c1 on the insulating layer 110b, an insulating layer 110f1 on the insulating layer 110c1, an insulating layer 110f2 on the insulating layer 110f1 and the conductive layer 103, an insulating layer 110c2 on the insulating layer 110f2, an insulating layer 110d on the insulating layer 110c2, and an insulating layer 110e on the insulating layer 110d.

[0276] Both the insulating layer 110c1 and the insulating layer 110c2 may use the same structure as the structure that can be used for the insulating layer 110c. Specifically, both the insulating layer 110c1 and the insulating layer 110c2 preferably use an oxygen-containing layer and preferably have a region with a higher oxygen content than at least one of the insulating layers 110a, 110b, 110d, 110e, 110f1, 110f2.

[0277] Both the insulating layer 110f1 and the insulating layer 110f2 may use the same structure as the structure that can be used for the insulating layer 110f. Specifically, both the insulating layer 110f1 and the insulating layer 110f2 preferably use a film with low oxygen diffusivity. In addition, both the insulating layer 110f1 and the insulating layer 110f2 preferably use a film with low hydrogen diffusivity.

[0278] The insulating layers 110a, 110b, 110d, 110e may all use the above structure.

[0279] In Figure 11B , the channel length L100 may be the shortest distance between the portion of the semiconductor layer 108 in contact with the insulating layer 110b and the portion in contact with the insulating layer 110d.

[0280] By adopting such a structure, the structure of the insulating layer 110 can be a vertically symmetric structure with respect to the conductive layer 103. In addition, since oxygen can be supplied to the semiconductor layer 108 from both the insulating layers 110c1 and 110c2, the transistor characteristics can be improved.

[0281] [Transistor 100G] Figure 12A is a cross-sectional view of the XZ plane of the transistor 100G, Figure 12B is a cross-sectional view of the XY plane of the transistor 100G.

[0282] The transistor 100G includes an oxide semiconductor layer 470, an insulating layer 430, a conductive layer 420, a wiring 440S, and a wiring 440D. The insulating layer 430 is used as a gate insulating layer, the conductive layer 420 is used as a gate electrode, the wiring 440S is used as a source electrode, and the wiring 440D is used as a drain electrode.

[0283] The wiring 440S includes a conductive layer 182S and a conductive layer 122S on the conductive layer 182S. The conductive layer 122S is disposed in contact with and covering the top surface and the side surfaces of the conductive layer 182S. The conductive layer 122S is in contact with the oxide semiconductor layer 470.

[0284] The wiring 440D includes a conductive layer 182D and a conductive layer 122D on the conductive layer 182D. The conductive layer 122D is disposed in contact with and covering the top surface and the side surfaces of the conductive layer 182D. The conductive layer 122D is in contact with the oxide semiconductor layer 470.

[0285] Regarding the materials that can be used for each layer, reference can be made to the description of the transistor 100. Specifically, the oxide semiconductor layer 470 corresponds to the semiconductor layer 108, the insulating layer 430 corresponds to the insulating layer 106, the conductive layer 420 corresponds to the conductive layer 104, and the wirings 440S and 440D correspond to the conductive layers 112a and 112b.

[0286] An opening 490 reaching the insulating layer 460 is provided in the insulating layer 480. The top surface of the opening 490 has a substantially circular columnar shape. By adopting such a structure, miniaturization or high integration of the transistor 100G can be achieved. In addition, the side surface of the opening 490 is preferably perpendicular to the top surface of the insulating layer 480.

[0287] The oxide semiconductor layer 470 has an annular shape. Specifically, in the opening 490, there are regions in contact with the side surfaces of the wiring 440S, regions in contact with the side surfaces of the wiring 440D, and regions in contact with the side surface of the insulating layer 480. Here, the oxide semiconductor layer 470 is not in contact with the top surfaces of the wiring 440S and the wiring 440D. The oxide semiconductor layer 470 having such a shape can be formed, for example, by processing using anisotropic etching.

[0288] The insulating layer 430 is disposed so as to cover at least a part of the opening 490. The conductive layer 420 is disposed so that at least a part of it is located in the opening 490. Note that although Figure 12AAn example in which the conductive layer 420 is provided in a manner embedded in the opening 490 is shown, but it may also be provided along the side wall of the opening 490 as in the case of the conductive layer 104.

[0289] As Figure 12A shown, the oxide semiconductor layer 470 includes a region 470i, a region 470na on the region 470i, and a region 470nb on the region 470i.

[0290] The region 470na is a region in the oxide semiconductor layer 470 that contacts the wiring 440S. At least a part of the region 470na is used as a source region of the transistor 100G. The region 470nb is a region in the oxide semiconductor layer 470 that contacts the wiring 440D. At least a part of the region 470nb is used as a drain region of the transistor 100G.

[0291] At least a part of the region 470i is used as a channel formation region of the transistor 100G. In addition, it can also be said that the channel formation region of the transistor 100G is located in a region that contacts the insulating layer 480 or a region near it in the oxide semiconductor layer 470.

[0292] As described above, a channel formation region, a source region, and a drain region can be formed in the opening 490. Therefore, compared with a conventional transistor in which a channel formation region, a source region, and a drain region are separately provided in the XY plane, the occupied area of the transistor 100G can be reduced. As a result, the pixel density can be increased.

[0293] As Figure 12B shown, the widths H of the wiring 440S and the wiring 440D are smaller than the maximum width D of the opening 490. At this time, the circumferential direction of the opening 490 corresponds to the channel length direction of the transistor 100G. Here, since the oxide semiconductor layer 470 has an annular shape, there are two current paths (i.e., channels) from the wiring 440S to the wiring 440D. In addition, the oxide semiconductor layer 470 does not necessarily have to have an annular shape, and a structure that contacts both the wiring 440S and the wiring 440D can also be adopted.

[0294] The channel length can be controlled according to the shape and size of the opening 490. For example, when it is desired to increase the channel length, the perimeter of the opening 490 is extended. Note that, in this embodiment, an example is shown in which the shape of the opening 490 when viewed from the plane is circular, but the present invention is not limited thereto. For example, in addition to a circle, the shape of the opening 490 when viewed from the plane may also be an ellipse, a quadrangle with rounded corners, or the like. Further, it may be a regular polygon such as an equilateral triangle, a square, a regular pentagon, or a polygon other than a regular polygon. In addition, when an indented polygon such as a star-shaped polygon having at least one interior angle exceeding 180 degrees is employed, the channel width can be increased. Further, an ellipse, a polygon with rounded corners, a closed curve combining a straight line and a curve, or the like may also be employed. At this time, the maximum width of the opening 490 can be appropriately calculated according to the shape of the uppermost part of the opening 490. For example, when the shape of the opening when viewed from the plane is a square or a rectangle, the maximum width of the opening 490 can be the diagonal length of the uppermost part of the opening 490.

[0295] In addition, as Figure 12A shown, the height of the oxide semiconductor layer 470 is the channel width W of the transistor 100G. Therefore, the channel width W of the transistor 100G can be controlled according to the thickness of the insulating layer 480. For example, the channel width of the transistor 100G can have a very fine structure below the exposure limit of photolithography (for example, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less and 1 nm or more or 5 nm or more).

[0296] The above transistors 100 to 100F are all transistors capable of making the channel length extremely small and the channel width large, and can achieve a high on-state current. On the other hand, the transistor 100G is a transistor capable of making the channel width extremely small and the channel length large, can achieve an appropriate on-state current, and is easy to design. The transistor 100G can be made a part of the manufacturing processes of the transistors 100 to 100F and can be manufactured separately on the same substrate. For example, in a display device, the transistor 100G can be used as a driving transistor for controlling the current flowing through a light-emitting element, and any one of the transistors 100 to 100F can be used as a transistor having a switching function.

[0297] [Specific examples of semiconductor devices] FIG. 13 shows a circuit diagram of a semiconductor device according to one embodiment of the present invention. FIGS. 14 to 18 show a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. Hereinafter, as the transistors included in the semiconductor device according to one embodiment of the present invention, the transistor 100 or the transistor 100B will be mainly described as an example. The semiconductor device according to one embodiment of the present invention is not limited thereto, and may include any one or more of the above-described transistor 100A and transistors 100C to 100G.

[0298] A semiconductor device according to one embodiment of the present invention includes at least two transistors, and any one of a gate, a source, and a drain of one transistor is electrically connected to any one of a gate, a source, and a drain of another transistor.

[0299] For example, Figure 13A the semiconductor device shown includes a transistor 100 and a transistor 200. One of the source and the drain of the transistor 200 is electrically connected to the gate of the transistor 100.

[0300] Note that Figures 13A to 13C each of the transistors shown is an n-channel transistor, but one embodiment of the present invention is not limited thereto. One or both of the transistor 100 (100B) and the transistor 200 (200B) may also be a p-channel transistor.

[0301] [Semiconductor device 10] Figure 14A and Figure 14B is a cross-sectional view of the semiconductor device 10. The semiconductor device 10 includes a transistor 100 and a transistor 150. In the semiconductor device 10, any one of a gate, a source, and a drain of the transistor 100 can be electrically connected to any one of a gate, a source, and a drain of the transistor 150.

[0302] The transistor 100 is provided on the substrate 102. Since the transistor 100 has the above-described structure, detailed description thereof is omitted (see FIGS. 1 to 2).

[0303] The transistor 150 includes a conductive layer 120, an insulating layer 121, a semiconductor layer 108a, an insulating layer 106, a conductive layer 107a, a conductive layer 107b, and a conductive layer 104a. Each layer constituting the transistor 150 may have a single-layer structure or a stacked-layer structure.

[0304] The conductive layer 120 is used as the back gate electrode of the transistor 150. Here, the back gate electrode of the transistor 150 can also be formed using the same material and process as the conductive layer 112a. Thereby, the manufacturing process of the semiconductor device 10 can be reduced. On the other hand, the conductive layer 120 provided on the insulating layer 110 is closer to the semiconductor layer 108a than the conductive layer that can be manufactured by the same process as the conductive layer 112a. Thus, it is easy to apply an electric field to the semiconductor layer 108a, and good electrical characteristics can be obtained. Note that the transistor 150 may not include a back gate electrode.

[0305] An insulating layer 121 is provided so as to cover the top surface and side surfaces of the conductive layer 120. The insulating layer 121 is used as the back gate insulating layer of the transistor 150. Since the insulating layer 121 is a layer in contact with the channel formation region of the semiconductor layer 108a, it is preferably an insulating layer containing oxygen. The insulating layer 121 can use, for example, a material suitably used for the insulating layer 110c.

[0306] A semiconductor layer 108a is provided on the insulating layer 121. The semiconductor layer 108a has a region overlapping with the conductive layer 120 with the insulating layer 121 therebetween.

[0307] Figure 14A An example where the end portion of the semiconductor layer 108a is located on the top surface of the insulating layer 121 is shown, Figure 14B An example where the semiconductor layer 108a covers the top surface and side surfaces of the insulating layer 121 is shown.

[0308] The semiconductor layer 108a can be formed using the same material and process as the semiconductor layer 108.

[0309] Here, the semiconductor layer 108 and the semiconductor layer 108a can use the same material or different materials. In addition, the semiconductor layer 108 and the semiconductor layer 108a can also use materials having different compositions from each other. For example, both the semiconductor layer 108 and the semiconductor layer 108a can use In-Ga-Zn oxide having the same composition. Alternatively, both the semiconductor layer 108 and the semiconductor layer 108a can use In-Ga-Zn oxide, and the ratio of the number of indium atoms in the In-Ga-Zn oxide of one side is larger than that of the other side. In addition, one of the semiconductor layer 108 and the semiconductor layer 108a can use In-Ga-Zn oxide while the other uses In-Zn oxide.

[0310] An insulating layer 106 is provided so as to cover the insulating layer 121 and the semiconductor layer 108a. The insulating layer 106 is used as the gate insulating layer of the transistor 150.

[0311] A conductive layer 104a is provided on the insulating layer 106. The conductive layer 104a includes a region overlapping with the semiconductor layer 108a with the insulating layer 106 therebetween. The conductive layer 104a is used as the gate electrode of the transistor 150. The conductive layer 104a can be formed using the same material and process as the conductive layer 104.

[0312] In Figure 14A , an insulating layer 195 is provided to cover the conductive layer 104a, and a conductive layer 107a and a conductive layer 107b are provided on the insulating layer 195. The conductive layer 107a and the conductive layer 107b are in contact with the semiconductor layer 108a through openings provided in the insulating layer 106 and the insulating layer 195.

[0313] Figure 14B An example is shown in which the conductive layer 107a and the conductive layer 107b are formed using the same material and process as the conductive layer 104a and the conductive layer 104. The conductive layer 107a and the conductive layer 107b are respectively in contact with the semiconductor layer 108a through openings provided in the insulating layer 106.

[0314] One of the conductive layer 107a and the conductive layer 107b is used as the source electrode of the transistor 150, and the other is used as the drain electrode.

[0315] The insulating layer 195 is used as a protective layer. The insulating layer 195 preferably uses a material in which impurities do not easily diffuse. By providing the insulating layer 195, it is possible to effectively suppress the diffusion of impurities from the outside into the transistor, thereby improving the reliability of the semiconductor device. Examples of impurities include water and hydrogen. For example, the insulating layer 195 includes one or both of an inorganic insulating layer and an organic insulating layer. The insulating layer 195 may also have a laminated structure of an inorganic insulating layer and an organic insulating layer.

[0316] As the inorganic insulating film that can be used for the insulating layer 195, for example, an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitrogen oxide insulating film can be cited. Specific examples of these inorganic insulating films have been cited in the description of the insulating layer 110. More specifically, the insulating layer 195 can use one or more of silicon nitride, silicon oxynitride, oxynitride silicon, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminum oxide. For example, one or more of an acrylic resin and a polyimide resin can be used for the insulating layer 195 as an organic material.

[0317] The conductive layer 104a can also be connected to the conductive layer 120 through openings provided in the insulating layer 106 and the insulating layer 110. Thereby, the gate and the back gate are supplied with the same potential, and the current that can flow when the transistor 150 is in the on state can be increased. In addition, the current flowing when the transistor 150 is in the off state can also be reduced.

[0318] The conductive layer 104a and the conductive layer 120 may also not be electrically connected. For example, a constant potential may be supplied to the back gate and a signal for driving the transistor 150 may be supplied to the gate. Thus, the potential supplied to the back gate can control the threshold voltage when driving the transistor 150.

[0319] In addition, the conductive layer 107a or the conductive layer 107b may also be connected to the conductive layer 120 through openings provided in the insulating layer 106 and the insulating layer 110. By supplying the same potential to the source and the back gate, the back-channel potential is stabilized, and the saturation of the Id-Vd characteristics of the transistor can be improved.

[0320] The transistor 150 is a so-called top-gate type transistor having a gate electrode above the semiconductor layer 108a. For example, by using the conductive layer 104a serving as a gate electrode as a mask and adding impurity elements to the semiconductor layer 108a, source regions and drain regions can be formed in a self-aligned manner. The transistor 150 can be said to be a TGSA (Top Gate Self-Aligned) type transistor.

[0321] The transistor 150 can control the channel length by the width of the conductive layer 104a in the channel length direction. Thus, the channel length of the transistor 150 is a value above the limit resolution of the exposure apparatus used in the manufacture of the transistor. By increasing the channel length, a transistor with high saturation characteristics can be realized.

[0322] In the manufacture of the semiconductor device 10, the transistor 100 with a small channel length and the transistor 150 with a large channel length can share a part of the processes and be formed on the same substrate. For example, by applying the transistor 100 to a transistor that requires a large on-state current and applying the transistor 150 to a transistor that requires high saturation characteristics, a high-performance semiconductor device can be realized.

[0323] [Semiconductor device 10A] Figure 13B A circuit diagram showing the semiconductor device 10A is shown. Figure 15A A top view showing the semiconductor device 10A is shown. Figure 15B Is along Figure 15A The cross-sectional view of the dotted line A1-A2 in

[0324] The semiconductor device 10A includes a transistor 100B and a transistor 200B. Another one of the source and the drain of the transistor 200B is electrically connected to another one of the source and the drain of the transistor 100B.

[0325] Both the transistor 100B and the transistor 200B are formed on the substrate 102.

[0326] Since the transistor 100B has the structure described above, the detailed description is omitted (see FIG. 8).

[0327] The transistor 200B includes a conductive layer 112c (conductive layers 182c and 122c), an insulating layer 110 (insulating layers 110a, 110b, 110c, 110d, 110e), a semiconductor layer 108a, a conductive layer 112b (conductive layers 182b and 122b), an insulating layer 106, and a conductive layer 104a.

[0328] The conductive layer 112c is used as one of the source and drain electrodes of the transistor 200B. The conductive layer 112c can be formed using the same material and the same process as the conductive layer 112a.

[0329] The semiconductor layer 108a can be formed using the same material in the same process as the semiconductor layer 108. Alternatively, the semiconductor layer 108 and the semiconductor layer 108a can also be formed using different materials in different processes. The structure of the semiconductor layer 108 and the semiconductor layer 108a can also refer to the description of the semiconductor layer in the semiconductor device 10.

[0330] The conductive layer 112b is used as the other of the source and drain electrodes of the transistor 100B and is also used as the other of the source and drain electrodes of the transistor 200B. When the transistor 100B and the transistor 200B share the conductive layer 112b, the occupied area of the semiconductor device can be reduced.

[0331] The conductive layer 104a is used as the gate electrode of the transistor 200B. The conductive layer 104a can be formed using the same material and the same process as the conductive layer 104.

[0332] The shapes and sizes (diameters, etc.) of the openings 141 and 141a provided in the insulating layer 110 can be the same or different. Similarly, the shapes and sizes (diameters, etc.) of the openings 143 and 143a provided in the conductive layer 112b can be the same or different.

[0333] [Semiconductor device 10B] Figure 13C Shows the circuit diagram of the semiconductor device 10B. Figure 16A Shows the top view of the semiconductor device 10B. Figure 16B Is along Figure 16A The cross-sectional view taken along the dash-dot line A1 - A2 in

[0334] The semiconductor device 10B includes a transistor 100B and a transistor 200B. One of the source and drain electrodes of the transistor 200B is electrically connected to one of the source and drain electrodes of the transistor 100B.

[0335] Both the transistor 100B and the transistor 200B are formed on the substrate 102.

[0336] Since the transistor 100B has the structure described above, detailed description thereof is omitted.

[0337] The transistor 200B includes a conductive layer 112c (conductive layers 182c and 122c), an insulating layer 110 (insulating layers 110a, 110b, 110c, 110d, 110e), a semiconductor layer 108a, a conductive layer 112a (conductive layers 182a and 122a), an insulating layer 106, and a conductive layer 104a.

[0338] The conductive layer 112c is used as one of the source electrode and the drain electrode of the transistor 200B. The conductive layer 112c can be formed using the same material and the same process as the conductive layer 112b.

[0339] The conductive layer 112a is used as the other of the source electrode and the drain electrode of the transistor 100B and is also used as the other of the source electrode and the drain electrode of the transistor 200B. When the conductive layer 112a is shared by the transistor 100B and the transistor 200B, the occupied area of the semiconductor device can be reduced.

[0340] The conductive layer 104a is used as the gate electrode of the transistor 200B. The conductive layer 104a can be formed using the same material and the same process as the conductive layer 104.

[0341] The shapes and sizes (such as diameters) of the openings 141 and 141a provided in the insulating layer 110 can be either the same or different. Similarly, the shapes and sizes (such as diameters) of the opening 143 provided in the conductive layer 112b and the opening 143a provided in the conductive layer 112c can be either the same or different.

[0342] [Semiconductor device 10C] Figure 13D A circuit diagram of the semiconductor device 10C is shown. Figure 17A A top view of the semiconductor device 10C is shown. Figure 17B is along Figure 17A a cross-sectional view taken along the dash-dotted line A1 - A2 in

[0343] The semiconductor device 10C includes a transistor 100B and a transistor 250. One of the source and drain electrodes of the transistor 250 is electrically connected to one of the source and drain electrodes of the transistor 100B.

[0344] Note that Figures 13D to 13HThe transistor 100B shown is an n-channel transistor and the transistor 250 is a p-type transistor, but one aspect of the present invention is not limited thereto. The transistor 100B and the transistor 250 may both be n-channel transistors or p-channel transistors. Additionally, the transistor 100B may be a p-channel transistor and the transistor 250 may be an n-channel transistor.

[0345] Both the transistor 100B and the transistor 250 are provided on the substrate 102.

[0346] The semiconductor device 10C includes a conductive layer 259 on the substrate 102, an insulating layer 252 on the substrate and the conductive layer 259, and a semiconductor layer 253 on the insulating layer 252. Additionally, an insulating layer 254 is included on the insulating layer 252 and the semiconductor layer 253, and a conductive layer 255 is included on the insulating layer 254. The semiconductor layer 253 and the conductive layer 255 have an overlapping region with each other.

[0347] Additionally, an insulating layer 256 is included on the insulating layer 254 and the conductive layer 255. Additionally, an opening 257a is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping with a part of the semiconductor layer 253. Additionally, an opening 257b is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping with another part of the semiconductor layer 253.

[0348] Additionally, a conductive layer 258a is provided on the insulating layer 256 and inside the opening 257a, and a conductive layer 258b is provided on the insulating layer 256 and inside the opening 257b. The conductive layer 258a is electrically connected to the semiconductor layer 253 in the opening 257a. Additionally, the conductive layer 258b is electrically connected to the semiconductor layer 253 in the opening 257b.

[0349] The semiconductor layer 253 has a drain region 253a, a channel formation region 253b, and a source region 253c. In the semiconductor layer 253, the region overlapping with the conductive layer 255 is used as the channel formation region 253b. The drain region 253a is electrically connected to the conductive layer 258a, and the source region 253c is electrically connected to the conductive layer 258b.

[0350] Additionally, an insulating layer 110 (insulating layers 110a, 110b, 110c, 110d, 110e) is provided on the insulating layer 256, the conductive layer 258a, and the conductive layer 258b, and a conductive layer 112b is provided on the insulating layer 110.

[0351] Additionally, an opening 146 ( Figure 17A ) is provided in the conductive layer 112b and the insulating layer 110 in a region overlapping with a part of the conductive layer 258a. Additionally, a semiconductor layer 108 is included inside the opening 146.

[0352] In addition, an insulating layer 106 is included over the insulating layer 110, the conductive layer 112b, and the semiconductor layer 108, and a conductive layer 104 is included over the insulating layer 106. In addition, an insulating layer 195 is included over the insulating layer 106 and the conductive layer 104.

[0353] The conductive layer 259 is used as a back gate electrode of the transistor 250. Therefore, the conductive layer 259 preferably overlaps with the channel formation region 253b and extends beyond the ends of the channel formation region 253b. In other words, the conductive layer 259 is preferably larger than the channel formation region 253b. In addition, the conductive layer 259 preferably extends beyond the ends of the semiconductor layer 253. In other words, the conductive layer 259 is preferably larger than the semiconductor layer 253.

[0354] The back gate electrode is arranged so as to sandwich the channel formation region of the semiconductor layer with the gate electrode. In addition, by changing the potential of the back gate electrode, the threshold voltage of the transistor can be changed. The potential of the back gate electrode can be a ground potential or any potential.

[0355] The back gate electrode is formed using a conductive layer and can function in the same manner as the gate electrode. For example, the potential of the back gate electrode can be made the same as the potential of the gate electrode.

[0356] The back gate electrode can be formed using the same materials and methods as the gate electrode, the source electrode, the drain electrode, etc. In addition, since the gate electrode and the back gate electrode are conductive layers, they have the function of preventing the electric field generated outside the transistor from affecting the semiconductor layer forming the channel (especially the electric field shielding function against static electricity). That is, it is possible to prevent the electrical characteristics of the transistor from changing due to the influence of an external electric field such as static electricity. In addition, by providing the back gate electrode, the change amount of the threshold voltage of the transistor before and after the BT (Bias Temperature) stress test can be reduced. By providing the back gate electrode, the non-uniformity of the characteristics of the transistor is reduced, and the reliability of the semiconductor device including the transistor can be improved.

[0357] The semiconductor layer 253 is used as the semiconductor layer for forming the channel of the transistor 250, the insulating layer 254 is used as the gate insulating layer, and the conductive layer 255 is used as the gate electrode. In addition, the conductive layer 258a is used as the drain electrode of the transistor 250, and the conductive layer 258b is used as the source electrode.

[0358] Similar to the transistor 100B, an OS transistor can also be used as the transistor 250.

[0359] Here, the semiconductor layer 108 and the semiconductor layer 253 can use the same material or different materials. The structures of the semiconductor layer 108 and the semiconductor layer 253 can refer to the description of the semiconductor layer 108 and the semiconductor layer 108a in the semiconductor device 10.

[0360] In addition, as the transistor 250, a transistor using silicon for the channel formation region (Si transistor) can also be used.

[0361] Examples of silicon include single-crystalline silicon, polycrystalline silicon, amorphous silicon, etc. In particular, a transistor including LTPS in the semiconductor layer (hereinafter, also referred to as an LTPS transistor) can be used. The LTPS transistor has a high field-effect mobility and good frequency characteristics.

[0362] The transistor 100B includes a conductive layer 258a instead of the conductive layer 112a, and the other structure is the same as that described above.

[0363] The conductive layer 258a is used as one of the source electrode and the drain electrode of the transistor 100B, and is also used as one of the source electrode and the drain electrode of the transistor 250. When the transistor 100B and the transistor 250 commonly use the conductive layer 258a, the occupied area of the semiconductor device can be reduced.

[0364] Since the conductive layer 258a corresponds to the conductive layer 112a in the transistor 100B described above, the above description can be referred to.

[0365] The conductive layer 258a is a conductive layer that contacts both the semiconductor layer 253 and the semiconductor layer 108. By using a stacked structure of at least two layers of a conductive layer in contact with the semiconductor layer 253 and a conductive layer in contact with the semiconductor layer 108 as the conductive layer 258a, materials suitable for the layers respectively connected to the semiconductor layer 253 and the semiconductor layer 108 can be used, so it is preferable. Thereby, a reduction in the contact resistance and good adhesion between the conductive layer 258a and the semiconductor layer 253 and between the conductive layer 258a and the semiconductor layer 108 can be achieved. For example, preferably, a metal layer or an alloy layer is used as the lowermost layer (the layer in contact with the semiconductor layer 253) of the conductive layer 258a, and an oxide conductor layer is used as the uppermost layer (the layer in contact with the semiconductor layer 108).

[0366] As described above, the transistor 100B is a vertical-channel type transistor. On the other hand, in the transistor 250, the current flowing through the semiconductor layer flows in the lateral direction, that is, in a direction parallel or substantially parallel to the surface of the substrate 102. Such a transistor can be referred to as a lateral-channel type transistor or a lateral-type channel transistor.

[0367] Thus, the semiconductor device according to one embodiment of the present invention may include a lateral-channel type transistor in addition to the vertical-channel type transistor.

[0368] As Figure 13E shown, the back gate and the gate of the transistor 250 can also be electrically connected to each other. In addition, as Figure 13FAs shown, the back gate of transistor 250 is electrically connected to the source or drain. Additionally, as Figure 13G shown, transistor 250 may also not include a back gate.

[0369] [Semiconductor device 10D] Figure 13H Shows the circuit diagram of semiconductor device 10D. Figure 18A Shows the top view of semiconductor device 10D. Figure 18B Is a cross-sectional view along Figure 18A the dash-dotted line A1 - A2 in

[0370] Semiconductor device 10D includes transistor 100B and transistor 250. The gate of transistor 250 is electrically connected to one of the source and drain of transistor 100B.

[0371] What is different between semiconductor device 10D and semiconductor device 10C is that the opening 146 is provided in a manner overlapping with the conductive layer 255 serving as the gate electrode of transistor 250. Therefore, in semiconductor device 10C, transistor 100B is provided in a manner overlapping on the gate electrode of transistor 250. In semiconductor device 10D, a part of each of the conductive layer 112b and the insulating layer 110 is selectively removed in the region overlapping with the conductive layer 255 to form the opening 146.

[0372] In Figure 18A and Figure 18B , the opening 146 is provided in a manner overlapping with the channel formation region 253b, but is not limited thereto. The opening 146 may also be provided in a manner not overlapping with the channel formation region 253b but overlapping with the conductive layer 255. In semiconductor device 10D, the conductive layer 255 is used as the gate electrode of transistor 250 and is used as one of the source electrode and drain electrode of transistor 100B.

[0373] By overlapping transistor 100B and transistor 250, a semiconductor device with a further reduced occupied area can be realized.

[0374] The conductive layer 255 corresponds to the conductive layer 112a in the above-mentioned transistor 100B, so the above description can be referred to.

[0375] Additionally, what is different between semiconductor device 10D and semiconductor device 10C is the structure of the opening 257a, the opening 257b, the conductive layer 258a, and the conductive layer 258b.

[0376] In the semiconductor device 10D, the opening 257a is formed in a region overlapping with the drain region 253a of the semiconductor layer 253 by selectively removing a part of each of the insulating layer 254 and the insulating layer 110. Further, in the semiconductor device 10D, the opening 257b is formed in a region overlapping with the source region 253c of the semiconductor layer 253 by selectively removing a part of each of the insulating layer 254 and the insulating layer 110.

[0377] Further, in the semiconductor device 10D, the conductive layer 258a and the conductive layer 258b are provided on the insulating layer 110.

[0378] In the semiconductor device 10D, the conductive layers 258a, 258b and the conductive layer 112b can be formed simultaneously using the same material and the same manufacturing process. Since it is not necessary to separately manufacture the conductive layers 258a, 258b and the conductive layer 112b, the manufacturing process of the semiconductor device can be shortened to improve the productivity of the semiconductor device.

[0379] Further, a semiconductor device according to one embodiment of the present invention includes at least one transistor and at least one capacitor, and a source or a drain of the transistor is electrically connected to one of a pair of electrodes of the capacitor. Figure 13I An example is shown in which a source or a drain of the transistor 100 is electrically connected to one electrode of the capacitor 190.

[0380] A transistor according to one embodiment of the present invention is a type of vertical transistor. Since the source electrode, the semiconductor layer, and the drain electrode can be overlapped, the occupied area can be made much smaller than that of a planar transistor. Further, by using a p-channel type Si transistor as a planar transistor and an n-channel type OS transistor as a vertical transistor, a CMOS (Complementary Metal Oxide Semiconductor) circuit can be constituted. Further, by adopting this structure and overlapping the planar transistor and the vertical transistor, the occupied area of the CMOS circuit can be reduced.

[0381] Further, the vertical transistor can improve the on-state current and the integration degree compared with the planar transistor. Therefore, the problem of the OS transistor having a lower on-state current than LTPS can be solved, and a narrow border of the display device can also be realized. Therefore, even without using a structure combining an LTPS transistor and an OS transistor (also referred to as LTPO), a backplane of the display device can be realized only using OS transistors regardless of whether its size is large, medium, or small. Compared with the case of using LTPO, when manufacturing a display device using only OS transistors, the number of photomasks required is small, the number of manufacturing processes can be reduced, and thus cost reduction can be achieved.

[0382] As described above, a transistor according to one embodiment of the present invention includes two or more conductive layers containing different metals in at least one of a source electrode and a drain electrode, thereby reducing the contact resistance with a semiconductor layer and reducing the wiring resistance. As a result, a transistor with high reliability and high on-state current can be achieved.

[0383] This embodiment can be appropriately combined with other embodiments. Further, in this specification, when multiple structural examples are shown in one embodiment, the structural examples can be appropriately combined.

[0384] (Embodiment 2) In this embodiment, a method for manufacturing a display device according to one embodiment of the present invention will be described with reference to FIGS. 19 to 21. In this embodiment, a method for manufacturing the transistor 100 illustrated in Embodiment 1 will be described. Note that, regarding the materials and formation methods of the respective components, parts that are the same as those described in Embodiment 1 above may sometimes be omitted.

[0385] In FIGS. 19 to 21, cross-sectional views along the Figure 1A indicated dash-dotted line A1 - A2 and cross-sectional views along the dash-dotted line B1 - B2 are shown side by side.

[0386] Note that the thin films (insulating films, semiconductor films, conductive films, etc.) constituting the semiconductor device can be formed by a sputtering method, a chemical vapor deposition (CVD: Chemical Vapor Deposition) method, a vacuum evaporation method, a pulsed laser deposition (PLD: Pulsed Laser Deposition) method, an ALD method, or the like. As the CVD method, there are a PECVD method and a thermal CVD method, etc. Further, as one of the thermal CVD methods, there is a metalorganic chemical vapor deposition (MOCVD: Metal Organic CVD) method.

[0387] The thin films (insulating films, semiconductor films, conductive films, etc.) constituting the semiconductor device can be formed by wet deposition methods such as a spin coating method, an impregnation method, a spraying method, an inkjet method, a dispenser method, a screen printing method, an offset printing method, a doctor knife method, a slot die coating method, a roll coating method, a curtain coating method, or a blade coating method.

[0388] Further, when processing the thin films constituting the semiconductor device, a photolithography method or the like can be used. Alternatively, a nanoimprint method, a sandblasting method, a lift-off method, or the like can be used to process the thin films. Further, island-shaped thin films can be directly formed by a deposition method using a masking mask such as a metal mask.

[0389] Typically, there are two methods in photolithography. One is a method of forming a resist mask on a thin film to be processed, processing the thin film by etching or the like, and removing the resist mask. The other is a method of depositing a photosensitive thin film and then performing exposure and development to process the thin film into a desired shape.

[0390] In photolithography, as the light used for exposure, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these lights can be used. In addition, ultraviolet light, KrF laser, ArF laser, etc. can also be used. Furthermore, immersion exposure technology can also be utilized for exposure. In addition, as the light used for exposure, extreme ultraviolet (EUV) light or X-rays can also be used. In addition, instead of the light used for exposure, an electron beam can also be used. When using extreme ultraviolet light, X-rays, or an electron beam, extremely fine processing can be performed, so it is preferred. Note that when performing exposure by scanning with a light beam such as an electron beam, a photomask is not required.

[0391] As an etching method for the thin film, a dry etching method, a wet etching method, a sandblasting method, etc. can be used.

[0392] [Example of manufacturing method] First, a conductive layer 112a is formed on a substrate 102. Figure 19A The case where the conductive layer 112a has a two-layer structure including a conductive layer 182a and a conductive layer 122a covering the top surface and side surfaces of the conductive layer 182a is shown.

[0393] First, a conductive film that becomes the conductive layer 182a is formed on the substrate 102, and the conductive film is processed to form the conductive layer 182a. Then, a conductive film that becomes the conductive layer 122a is formed on the substrate 102 and the conductive layer 182a, and the conductive film is processed to thereby form the conductive layer 122a covering the top surface and side surfaces of the conductive layer 182a ( Figure 19A ).

[0394] For example, when forming the conductive film, it is preferable to use a sputtering method. A resist mask is formed on the conductive film using a photolithography process, and then the conductive film is processed to thereby form the conductive layer. In the processing of the conductive film, one or both of a wet etching method and a dry etching method can be used.

[0395] When the conductive layer 112a has a laminated structure of three or more layers, the same mask pattern can be used to process a plurality of layers formed in such a manner that the top surface shapes are the same or substantially the same. For example, transistor 100A (refer to Figure 4A and Figure 4B) The included conductive layer 184a and conductive layer 122a can be formed by processing a conductive film in the same process. In addition, Figure 7C The shown conductive layer 184a and conductive layer 182a can be formed by processing a conductive film in the same process.

[0396] Next, an insulating film 110bf that becomes the insulating layer 110b and an insulating film 110cf that becomes the insulating layer 110c are formed on the conductive layer 112a ( Figure 19B ).

[0397] For example, a silicon nitride film or an aluminum oxide film is preferably formed as the insulating film 110bf. In addition, for example, a silicon oxide film or a silicon oxynitride film is preferably formed as the insulating film 110cf.

[0398] When forming the insulating film 110bf and the insulating film 110cf, for example, the sputtering method or the PECVD method is preferably used. It is preferable to continuously form the insulating film 110cf in a vacuum without exposing the surface of the insulating film 110cf to the atmosphere after forming the insulating film 110bf. By continuously forming the insulating film 110bf and the insulating film 110cf, attachment of impurities derived from the atmosphere to the surface of the insulating film 110bf can be suppressed. Examples of such impurities include water and organic substances.

[0399] As shown in the transistor 100B (refer to Figure 8A and Figure 8B ), when forming at least one layer constituting the insulating layer 110 by the PECVD method in the case where the insulating layer 110 has a five-layer structure, it is possible to easily form both a film with a low hydrogen content and a film with a high hydrogen content, so it is preferable. It is preferable to continuously form the insulating film 110bf in a vacuum without exposing the surface of the insulating film to the atmosphere after forming the insulating film that becomes the insulating layer 110a.

[0400] The substrate temperature when forming the insulating film 110bf and the insulating film 110cf is preferably 180°C or higher and 450°C or lower, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, more preferably 300°C or higher and 400°C or lower, more preferably 350°C or higher and 400°C or lower. By setting the substrate temperature when forming the insulating film 110bf and the insulating film 110cf within the above range, release of impurities (for example, water and hydrogen) from the insulating film 110bf and the insulating film 110cf themselves can be reduced, and thus diffusion of impurities into the semiconductor layer 108 can be suppressed. Therefore, a transistor with good electrical characteristics and high reliability can be achieved.

[0401] Note that since the insulating films 110bf and 110cf are formed first and then the semiconductor layer 108 is formed, there is no concern about oxygen detachment from the semiconductor layer 108 due to the heat applied when forming the insulating films 110bf and 110cf.

[0402] Preferably, after forming the insulating film 110cf, it is not opened to the atmosphere (in-situ) and plasma treatment is performed in an oxygen-containing atmosphere. For example, N2O plasma treatment is preferably performed. By performing such plasma treatment, oxygen can be supplied to the insulating film 110cf.

[0403] Next, it is preferable to form a metal oxide layer 149 ( Figure 19C ) on the insulating film 110cf. By forming the metal oxide layer 149, oxygen can be supplied to the insulating film 110cf.

[0404] There is no limitation on the conductivity of the metal oxide layer 149. The metal oxide layer 149 can use at least one of an insulating film, a semiconductor film, and a conductive film. For example, the metal oxide layer 149 can use alumina, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or indium tin oxide containing silicon (ITSO).

[0405] As the metal oxide layer 149, it is preferable to use an oxide material containing one or more elements the same as those in the semiconductor layer 108. In particular, it is preferable to use an oxide semiconductor material applicable to the semiconductor layer 108.

[0406] When forming the metal oxide layer 149, the higher the ratio of the oxygen flow rate (oxygen flow ratio) in the total flow rate of the deposition gas introduced into the processing chamber of the deposition apparatus or the oxygen partial pressure in the processing chamber, the more oxygen can be supplied to the insulating film 110cf. The oxygen flow ratio or the oxygen partial pressure is, for example, 50% or more and 100% or less, preferably 65% or more and 100% or less, more preferably 80% or more and 100% or less, and further preferably 90% or more and 100% or less. In particular, it is preferable to set the oxygen flow ratio to 100% to make the oxygen partial pressure as close to 100% as possible.

[0407] Thus, by forming the metal oxide layer 149 by sputtering in an oxygen-containing atmosphere, oxygen can be supplied to the insulating film 110cf while preventing oxygen from detaching from the insulating film 110cf when forming the metal oxide layer 149. As a result, more oxygen can be trapped in the insulating film 110cf. And more oxygen can be supplied to the semiconductor layer 108 through the subsequent heat treatment. As a result, the oxygen vacancies and V O H in the semiconductor layer 108 can be reduced, and a transistor with good electrical characteristics and high reliability can be realized.

[0408] The heat treatment is preferably performed after the formation of the metal oxide layer 149. By performing the heat treatment after the formation of the metal oxide layer 149, oxygen can be effectively supplied from the metal oxide layer 149 to the insulating film 110cf.

[0409] The temperature of the heat treatment is preferably 150 °C or higher and lower than the strain point of the substrate, more preferably 200 °C or higher and 450 °C or lower, more preferably 250 °C or higher and 450 °C or lower, more preferably 300 °C or higher and 450 °C or lower, more preferably 300 °C or higher and 400 °C or lower, more preferably 350 °C or higher and 400 °C or lower. The heat treatment can be performed in an atmosphere containing one or more of noble gases, nitrogen, and oxygen. As the nitrogen-containing atmosphere or oxygen-containing atmosphere, dry air (CDA: Clean Dry Air) can also be used. Note that the content of hydrogen, oxygen, etc. in this atmosphere is preferably as small as possible. As this atmosphere, a high-purity gas with a dew point of -60 °C or lower, preferably -100 °C or lower, is preferably used. By using an atmosphere with as little content of hydrogen, water, etc. as possible, absorption of hydrogen, water, etc. by the insulating film 110cf, etc. can be prevented as much as possible. This heat treatment can use an oven, a rapid thermal annealing (RTA) device, etc. By using an RTA device, the heat treatment time can be shortened.

[0410] After the formation of the metal oxide layer 149 or after the above heat treatment, oxygen can also be supplied to the insulating film 110cf through the metal oxide layer 149. As a method for supplying oxygen, for example, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or a plasma treatment can be used. In the plasma treatment of the manufacturing method of a semiconductor device according to one aspect of the present invention, a device for plasmaizing oxygen gas with high-frequency power can be appropriately used. As a device for plasmaizing a gas with high-frequency power, for example, a plasma etching device and a plasma ashing device can be cited.

[0411] In addition, a heat treatment can also be performed after the formation of the insulating film 110bf and the insulating film 110cf and before the formation of the metal oxide layer 149. By performing the heat treatment, water and hydrogen can be removed from the surface and the film of the insulating film 110cf.

[0412] Next, the metal oxide layer 149 ( Figure 19D ) is removed.

[0413] Although there is no particular limitation on the method for removing the metal oxide layer 149, a wet etching method can be appropriately adopted. By using the wet etching method, etching of the insulating film 110cf when removing the metal oxide layer 149 can be suppressed. Therefore, a decrease in the thickness of the insulating film 110cf can be suppressed, and the thickness of the insulating layer 110c can be made uniform.

[0414] Note that the oxygen supply treatment for the insulating film 110cf is not limited to the above method. For example, oxygen radicals, oxygen atoms, oxygen atomic ions, or oxygen molecular ions can be supplied to the insulating film 110cf by using an ion doping method, an ion implantation method, or a plasma treatment, etc. Additionally, after forming a film that inhibits oxygen detachment on the insulating film 110cf, oxygen can be supplied to the insulating film 110cf through this film. It is preferred to remove this film after supplying oxygen. As the above-mentioned film that inhibits oxygen detachment, a conductive film or a semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten can be used.

[0415] Next, an insulating film 110df that will become the insulating layer 110d is formed on the insulating film 110cf( Figure 19D ).

[0416] The formation of the insulating film 110df can refer to the description of the formation of the insulating film 110bf. Note that the deposition conditions of the insulating film 110bf and the insulating film 110df can be the same or different.

[0417] Next, a conductive layer 112b is formed on the insulating film 110df( Figures 20A to 20C , Figure 21A ). Figure 21A The case where the conductive layer 112b has a two-layer structure including a conductive layer 182b and a conductive layer 122a covering the top surface and side surfaces of the conductive layer 182b is shown.

[0418] First, a conductive film 182f that will become the conductive layer 182b is formed on the insulating film 110df( Figure 20A ), and the conductive layer 182b is formed by processing the conductive film 182f( Figure 20B ).

[0419] The conductive layer 182b is formed in an island shape so as not to overlap with the portion of the insulating films 110bf, 110cf, 110df where an opening is formed later. The conductive layer 182b can also include an opening that overlaps the portion of the insulating films 110bf, 110cf, 110df where an opening is formed later as a whole (refer to the opening 145 shown in Figure 1A etc.).

[0420] Next, a conductive film 122f that will become the conductive layer 122b is formed on the insulating film 110df and the conductive layer 182b( Figure 20C ), and the conductive layer 122b covering the top surface and side surfaces of the conductive layer 182b is formed by processing the conductive film 122f( Figure 21A ). The conductive layer 122b is formed so as to include the opening 143 at a position overlapping the portion of the insulating films 110bf, 110cf, 110df where an opening is formed later.

[0421] For example, when forming a conductive film (conductive film 182f, conductive film 122f), it is preferable to use a sputtering method. An antireflective mask is formed on the conductive film using a photolithography process, and then the conductive film is processed to form a conductive layer. In the processing of the conductive film (conductive film 182f, conductive film 122f), one or both of a wet etching method and a dry etching method can be used. In particular, when forming the opening 143, it is preferable to use a wet etching method.

[0422] The process of processing the conductive film 122f into an island shape and the process of forming the opening 143 in the conductive film 122f can be performed independently of each other, and there is no limitation on the order of these processes. In addition, etching can be performed after performing exposure using a mask for processing into a square island shape and exposure using a mask for forming a circular opening, thereby performing the processing of the island shape and the formation of the opening at one time. In addition, exposure using a multi-level gray-scale mask (typically a halftone mask or a gray-scale mask) can also be used.

[0423] In addition, openings are formed in the insulating films 110bf to 110df to form an insulating layer 110 (insulating layers 110b, 110c, 110d) including the opening 141 ( Figure 21A ).

[0424] The opening 141 is provided at a position overlapping the opening 143 of the conductive layer 112b. By providing the opening 141, the region of the conductive layer 182a (the subsequent conductive layer 112a) overlapping the openings 141 and 143 is exposed.

[0425] Here, when forming the opening 141, the surfaces of the conductive layer 122a and the conductive layer 122b may be oxidized. For example, by performing an ashing process, a metal oxide film may be formed on the top surface of the conductive layer 122a and on the top surface and side surfaces of the conductive layer 122b. That is, in Figure 21A subsequent processes, a metal oxide layer may be formed on the surfaces of the conductive layer 112a and the conductive layer 112b (refer to Figure 7B the conductive layers 186a and 186b).

[0426] When forming the opening 141, one or both of a wet etching method and a dry etching method can be used. For example, it is preferable to use a dry etching method.

[0427] The opening 141 can be formed, for example, using the antireflective mask used for the formation of the opening 143. Specifically, an antireflective mask is formed on the conductive film 122f, a part of the conductive film 122f is removed using this antireflective mask to form the opening 143, and a part of each of the insulating films 110bf, 110cf, and 110df is removed using this antireflective mask, thereby forming the opening 141. In addition, the opening 141 and the opening 143 can also be formed using different antireflective masks.

[0428] Here, impurities including metals derived from the conductive layer 112b and impurities generated through the etching process (for example, impurities derived from the etching gas) and the like sometimes remain on the surface of the layer exposed inside the opening 141. Therefore, before forming the semiconductor layer 108, it is preferable to remove the impurities adhering to the surface of the layer exposed inside the opening 141. Thereby, the coverage of the semiconductor layer 108 can be improved. In addition, the electrical characteristics of the transistor can be improved or the non-uniformity of the electrical characteristics can be reduced.

[0429] For example, it is preferable to wash the inside of the opening 141 with an acid solution. Specifically, it is preferable to use dilute hydrofluoric acid, oxalic acid, phosphoric acid, acetic acid, nitric acid, or a mixed solution containing two or more of them. A plurality of layers such as the conductive layer 112a, the conductive layer 112b, and the insulating layer 110 are exposed inside the opening 141. Therefore, it is preferable to perform the treatment using a sufficiently diluted solution to prevent these exposed layers from being over-etched.

[0430] Next, a metal oxide film is formed so as to cover the opening 141 and the opening 143, and the metal oxide film is processed to form the semiconductor layer 108 ( Figure 21B ). The semiconductor layer 108 is provided in contact with the top surface and the side surface of the conductive layer 112b, the top surface and the side surface of the insulating layer 110, and the top surface of the conductive layer 112a.

[0431] The metal oxide film that will become the semiconductor layer 108 is preferably formed with as uniform a thickness as possible on the side surface in the opening 141 of the insulating layer 110 and the side surface in the opening 143 of the conductive layer 112b. This metal oxide film can be deposited, for example, by a sputtering method or an ALD method.

[0432] The metal oxide film that will become the semiconductor layer 108 is preferably formed by a sputtering method using a metal oxide target.

[0433] The semiconductor layer 108 is preferably a dense film with as few defects as possible. The semiconductor layer 108 is preferably a film with high purity, in which impurities containing hydrogen elements are reduced as much as possible. In particular, as the semiconductor layer 108, it is preferable to use a metal oxide layer having crystallinity.

[0434] When forming the metal oxide film that will become the semiconductor layer 108, it is preferable to use oxygen gas. By using oxygen gas when forming this metal oxide film, oxygen can be appropriately supplied to the insulating layer 110. For example, when the insulating layer 110c uses an oxide, oxygen can be appropriately supplied to the insulating layer 110c.

[0435] By supplying oxygen to the insulating layer 110c and supplying oxygen to the semiconductor layer 108 in a subsequent process, oxygen vacancies and V in the semiconductor layer 108 can be reduced. OH.

[0436] When depositing the metal oxide film that will become the semiconductor layer 108, an oxygen gas and an inert gas (e.g., helium gas, argon gas, xenon gas, etc.) can also be mixed. Note that the higher the oxygen flow ratio during the deposition of the metal oxide film, the higher the crystallinity of the semiconductor layer 108 can be, and transistors with high reliability can be realized. On the other hand, the lower the oxygen flow ratio, the lower the crystallinity of the semiconductor layer 108, and transistors with a large on-state current can be realized.

[0437] When the substrate temperature is relatively high during the formation of the metal oxide film that will become the semiconductor layer 108, a metal oxide film with higher crystallinity and greater density can be formed. On the other hand, when the substrate temperature is relatively low, a metal oxide film with lower crystallinity and higher conductivity can be formed.

[0438] The substrate temperature during the formation of the metal oxide film that will become the semiconductor layer 108 is preferably above room temperature and below 250 °C, more preferably above room temperature and below 200 °C, and further preferably above room temperature and below 140 °C. For example, the substrate temperature is preferably above room temperature and below 140 °C, whereby productivity can be improved. By depositing the metal oxide film at room temperature or in a state where the substrate is not heated, the crystallinity can be reduced.

[0439] When using the ALD method, deposition methods such as thermal ALD or PEALD (Plasma Enhanced ALD) are preferably used. Deposition using the thermal ALD method has extremely high step coverage, so it is preferred. In addition, deposition using the PEALD method not only has high step coverage but can also be performed at a low temperature, so it is preferred.

[0440] The metal oxide film that will become the semiconductor layer 108 can be deposited, for example, using a precursor containing a constituent metal element and an oxidizing agent and using the ALD method.

[0441] Examples of the precursor containing indium include trimethylindium, triethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedionato)indium, cyclopentadienylindium, indium(III) chloride, and (3-(dimethylamino)propyl)dimethylindium.

[0442] Examples of the precursor containing gallium include trimethylgallium, triethylgallium, tris(dimethylamide)gallium(III), gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedionato)gallium, dimethylchlorogallium, diethylchlorogallium, and gallium(III) chloride.

[0443] As tin-containing precursors, for example, tetramethyltin, tetraethyltin, tetravinyltin, tetraallyltin, tributylvinyltin, allyltributyltin, tributylethyltin, tributylphenyltin, trimethyltin chloride, triethyltin chloride, and tin(IV) chloride can be cited.

[0444] As zinc-containing precursors, for example, dimethylzinc, diethylzinc, zinc bis(2,2,6,6-tetramethyl-3,5-heptanedionate), and zinc chloride can be cited.

[0445] For example, when depositing an In-Ga-Zn oxide, three precursors including an indium-containing precursor, a gallium-containing precursor, and a zinc-containing precursor can be used. Alternatively, two precursors including an indium-containing precursor and a precursor containing gallium and zinc can also be used.

[0446] As oxidants, for example, ozone, oxygen, and water can be cited.

[0447] As a method for controlling the composition of the obtained film, adjustment of the flow rate ratio of source gases, the flow time of source gases, the flow order of source gases, etc. can be cited. In addition, by adjusting them, a film with a continuously changing composition can also be deposited. In addition, films with different compositions can also be deposited continuously.

[0448] Before depositing the metal oxide film that will become the semiconductor layer 108, it is preferable to perform at least one of a treatment for removing water, hydrogen, organic substances, etc. adsorbed on the surface of the insulating layer 110 and a treatment for supplying oxygen to the insulating layer 110. For example, a heat treatment can be performed at a temperature of 70°C or higher and 200°C or lower in a reduced-pressure atmosphere. Alternatively, a plasma treatment in an oxygen-containing atmosphere can also be performed. Or, by performing a plasma treatment in an atmosphere containing an oxidizing gas such as nitrous oxide (N2O), oxygen can also be supplied to the insulating layer 110. When performing a plasma treatment containing nitrous oxide gas, the organic substances on the surface of the insulating layer 110 can be appropriately removed and oxygen can be supplied to the insulating layer 110. Preferably, after such a treatment, the metal oxide film is continuously deposited in such a way that the surface of the insulating layer 110 is not exposed to the atmosphere.

[0449] Note that in the case where the semiconductor layer 108 has a stacked structure, it is preferable to continuously deposit the upper metal oxide film in such a way that its surface is not exposed to the atmosphere after depositing the lower metal oxide film.

[0450] In the case where the semiconductor layer 108 has a stacked structure, all the layers constituting the semiconductor layer 108 can be formed using the same deposition method (e.g., sputtering method or ALD method), or different deposition methods can be used for each layer. For example, the first metal oxide film can be deposited using the sputtering method and the second metal oxide film can be deposited using the ALD method.

[0451] The semiconductor layer 108 can be formed using one or both of a wet etching method and a dry etching method. For example, the wet etching method is preferably used. At this time, sometimes a part of the conductive layer 112b in a region not overlapping with the semiconductor layer 108 is etched and the thickness becomes smaller. Similarly, sometimes a part of the insulating layer 110 in a region not overlapping with both the semiconductor layer 108 and the conductive layer 112b is etched and the thickness becomes smaller.

[0452] Heat treatment is preferably performed after depositing the metal oxide film or after processing the metal oxide film into the semiconductor layer 108. By the heat treatment, hydrogen or water contained in the semiconductor layer 108 or adsorbed on the surface of the semiconductor layer 108 can be removed. In addition, by the heat treatment, sometimes the film quality of the semiconductor layer 108 is improved (e.g., reduction of defects or improvement of crystallinity). More preferably, the heat treatment is performed before processing the semiconductor layer 108.

[0453] Preferably, oxygen is supplied from the insulating layer 110c to at least a part of the metal oxide film or at least a part of the semiconductor layer 108 by the heat treatment. The region in the semiconductor layer 108 that contacts the insulating layer 110c and its vicinity are used as a channel formation region. By supplying oxygen to this region, the oxygen vacancies in the channel formation region can be reduced and the carrier concentration can be decreased. That is, the channel formation region can be made into an i-type (intrinsic) or substantially i-type region. Thereby, stable electrical characteristics can be given to the transistor.

[0454] Since the heat treatment can be referred to the above description, the detailed description is omitted.

[0455] Note that it is not necessarily required to perform this heat treatment. In addition, the heat treatment performed in a later process can be used as the heat treatment in this process without performing the heat treatment in this process. Sometimes, the treatment at a high temperature in a later process (e.g., deposition process) can be used as the heat treatment in this process.

[0456] Note that due to the deposition process of the metal oxide film that becomes the semiconductor layer 108 or the subsequent heat treatment, etc., the portions of the conductive layer 112a and the conductive layer 112b that contact the metal oxide film (or the semiconductor layer 108) are sometimes oxidized (refer to Figure 7B the conductive layers 186a and 186b).

[0457] Next, an insulating layer 106 is formed so as to cover the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110( Figure 21B ). The insulating layer 106 is preferably formed by, for example, PECVD method or ALD method.

[0458] When an oxide semiconductor is used for the semiconductor layer 108, it is preferable to use the insulating layer 106 as a barrier film for suppressing oxygen diffusion. By making the insulating layer 106 have a function of suppressing oxygen diffusion, oxygen diffusion from the upper side of the insulating layer 106 to the conductive layer 104 can be suppressed, and the conductive layer 104 is oxidized. As a result, a transistor having good electrical characteristics and high reliability can be realized.

[0459] Note that in this specification and the like, a barrier film refers to a film having barrier properties. For example, an insulating layer having barrier properties can be referred to as a barrier insulating layer. In this specification and the like, barrier properties refer to one or both of a function of suppressing the diffusion of the corresponding substance (it can also be said to have low permeability) and a function of capturing or fixing (also referred to as gettering) the corresponding substance.

[0460] By increasing the temperature during the formation of the insulating layer 106 used as a gate insulating layer, an insulating layer with fewer defects can be formed. However, when the temperature during the formation of the insulating layer 106 is high, oxygen detaches from the semiconductor layer 108, and sometimes oxygen vacancies and V O H in the semiconductor layer 108 increase. The substrate temperature during the formation of the insulating layer 106 is preferably 180 °C or higher and 450 °C or lower, more preferably 200 °C or higher and 450 °C or lower, more preferably 250 °C or higher and 450 °C or lower, more preferably 300 °C or higher and 450 °C or lower, and more preferably 300 °C or higher and 400 °C or lower. By making the substrate temperature during the formation of the insulating layer 106 within the above range, oxygen detachment from the semiconductor layer 108 can be suppressed while reducing the defects of the insulating layer 106. Therefore, a transistor having good electrical characteristics and high reliability can be realized.

[0461] Before forming the insulating layer 106, the surface of the semiconductor layer 108 can also be subjected to plasma treatment. By this plasma treatment, impurities such as water adsorbed on the surface of the semiconductor layer 108 can be reduced. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 can be reduced, and thus a transistor with high reliability can be realized. In particular, when the surface of the semiconductor layer 108 is exposed to the atmosphere between the formation of the semiconductor layer 108 and the formation of the insulating layer 106, plasma treatment is preferable. The plasma treatment can be performed, for example, in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, etc. The plasma treatment and the deposition of the insulating layer 106 are preferably carried out continuously without exposure to the atmosphere.

[0462] In addition, when using a film containing a large amount of oxygen as the insulating layer 106, it is preferable because oxygen can be supplied from the insulating layer 106 to the semiconductor layer 108. Additionally, it is more preferable to use a film that releases oxygen upon heating for the insulating layer 106. Due to the heat applied during the manufacturing process of the transistor, the insulating layer 106 releases oxygen, and thus oxygen can be supplied to the semiconductor layer 108. By supplying oxygen from the insulating layer 106 to the semiconductor layer 108, particularly to the channel formation region of the semiconductor layer 108, oxygen vacancies in the semiconductor layer 108 can be reduced, and a transistor with good electrical characteristics and high reliability can be achieved.

[0463] Next, a conductive layer 104 is formed on the insulating layer 106 ( Figure 21B ). For example, it is preferable to form the conductive film that will become the conductive layer 104 using a sputtering method, a thermal CVD method (including MOCVD method), or an ALD method. After forming a resist mask on this conductive film using a photolithography process, the conductive film is processed, thereby forming an island-shaped conductive layer 104 that serves as a gate electrode.

[0464] Through the above processes, a semiconductor device according to one embodiment of the present invention can be manufactured.

[0465] [Method for manufacturing the insulating layer 110c] Hereinafter, an example of the method for manufacturing the insulating layer 110c will be described. As described above, it is preferable to use an oxygen-containing layer as the insulating layer 110c that contacts the channel formation region of the semiconductor layer 108. Here, the insulating layer 110c preferably has a structure that particularly easily supplies oxygen to the central portion of the channel formation region of the semiconductor layer 108. Therefore, for example, the insulating layer 110c may also have a structure in which the oxygen diffusion coefficient of each region is different (a structure in which the ease of oxygen diffusion is different). Alternatively, the central portion in the thickness direction of the insulating layer 110c may have a region containing more oxygen than other portions.

[0466] Specifically, the insulating layer 110c can also be formed by performing the deposition process of the oxide insulating film or the oxynitride insulating film two or more times under different conditions.

[0467] Here, an example of forming oxynitride silicon using the PECVD method will be described.

[0468] As the source gas for the insulating layer 110c, a mixed gas containing a silicon-containing deposition gas and an oxidizing gas can be used. As the silicon-containing deposition gas, for example, one or more of silane (SiH4), disilane (Si2H6), trisilane (Si3H8), silicon tetrafluoride (SiF4), TEOS (Tetraethoxysilane: Si(OC2H5)4) can be used. As the oxidizing gas, an oxygen-containing gas can be appropriately used. As the oxidizing gas, for example, one or more of oxygen (O2), ozone (O3), nitrous oxide (N2O), nitric oxide (NO), and nitrogen dioxide (NO2) can be used. When silane (SiH4) is used as the silicon-containing deposition gas and nitrous oxide (N2O) is used as the oxidizing gas, the formation of particles can be reduced compared to the case of using oxygen (O2), so it is preferred. Alternatively, when forming silicon oxide as the insulating layer 110b and TEOS is used as the silicon-containing deposition gas, oxygen (O2) can be appropriately used as the oxidizing gas.

[0469] In the formation of the insulating layer 110c using the PECVD method, by reducing the plasma density with respect to the flow rate of the deposition gas, that is, reducing the ratio (which can also be said to be the ratio) of the plasma density to the flow rate of the deposition gas, an insulating layer with a large oxygen diffusion coefficient can be formed. Here, in the case of plasmaizing the source gas using an RF power supply, by reducing the power of the RF power supply (hereinafter also referred to as RF power), the plasma density can be reduced. By reducing the RF power with respect to the flow rate of the deposition gas (reducing the ratio of the RF power to the flow rate of the deposition gas), an insulating layer with a large oxygen diffusion coefficient can be formed. By reducing the ratio of the RF power to the flow rate of the deposition gas (hereinafter also referred to as the F ratio), the oxygen diffusion coefficient in the insulating layer 110c becomes larger, and the oxygen contained in the insulating layer 110c can be efficiently supplied to the semiconductor layer 108 (especially the channel formation region). As a result, it is possible to suppress the transistor from being in a normally-on state and to suppress the threshold voltage of the transistor from drifting in the negative direction.

[0470] However, in the case of using a hydrogen-containing gas (e.g., SiH4) as the source gas, when the F ratio is too small, sometimes the amount of hydrogen contained in the insulating layer 110c becomes large. When a large amount of hydrogen is contained in the insulating layer 110c, the amount of hydrogen-containing impurities (e.g., water, hydrogen, and ammonia) released from the insulating layer 110c may become large.

[0471] In addition, in the case of using a nitrogen-containing gas (e.g., N2O) as the source gas, when the F ratio is too small, sometimes the amount of nitrogen contained in the insulating layer 110c becomes large. When a large amount of nitrogen is contained in the insulating layer 110c, the amount of nitrogen-containing impurities (e.g., nitrogen oxides (NO x )) released from the insulating layer 110c may become large.

[0472] Nitrogen oxides such as nitrogen dioxide (NO2) (NO x ) form energy levels in the insulating layer. These energy levels are located in the energy gap of the oxide semiconductor. Thus, when nitrogen oxides (NO x ) diffuse to the interface between the insulating layer 110c and the semiconductor layer 108, sometimes these energy levels capture electrons on the insulating layer 110c side. As a result, the captured electrons remain near the interface between the insulating layer 110c and the semiconductor layer 108, thereby causing the threshold voltage of the transistor to drift in the positive direction.

[0473] Then, in one aspect of the present invention, an oxide insulating film or an oxynitride insulating film provided at the central portion in the thickness direction of the insulating layer 110c is formed under the condition of a small F ratio, and an insulating film located at a position far from the central portion in the thickness direction of the insulating layer 110c is formed under the condition of a larger F ratio. Thus, the central portion of the channel formation region of the semiconductor layer 108 contacts the insulating film with a large oxygen diffusion coefficient. Therefore, oxygen is easily supplied to the channel formation region, the oxygen vacancies in the channel formation region can be reduced, and thus the threshold voltage of the transistor can be made positive (normally off). In addition, the negative drift of the threshold voltage of the transistor can be suppressed. On the other hand, the region far from the central portion of the channel formation region of the semiconductor layer 108 contacts the insulating film with an oxygen diffusion coefficient smaller than that of the central portion. Compared with the case where the entire insulating layer 110c is formed under the condition of a small F ratio, the diffusion of hydrogen-containing impurities and nitrogen-containing impurities from the insulating layer 110c to the semiconductor layer 108 can be suppressed, so the positive drift of the threshold voltage of the transistor can be suppressed. Thus, by forming the insulating layer 110c from a plurality of layers deposited under different F ratio conditions, a highly reliable transistor can be realized.

[0474] Note that depending on the F ratio condition and the like, sometimes a part of the region of the semiconductor layer 108 in contact with the insulating layer 110c becomes a low-resistance region. In particular, a low-resistance region is sometimes formed in the region near the insulating layer 110b or the region near the insulating layer 110d in the region of the semiconductor layer 108 in contact with the insulating layer 110c. Thus, a high electric field is not easily generated near the drain region, the generation of hot carriers is suppressed, and thus transistor degradation can be suppressed.

[0475] When the flow rate unit of the deposition gas is expressed in sccm (Standard Cubic Centimeters Per Minute) and the RF power is expressed in W (Watt), the F ratio when depositing each layer included in the insulating layer 110c is preferably 12 or less, 10 or less, 9 or less, 8 or less, 7 or less, 6 or less, or 5 or less, and is 2 or more or 3 or more. For example, when the flow rate of silane (SiH4) is 290 sccm and the RF power is 1160 W, the F ratio is 4. Additionally, for example, when the flow rate of silane (SiH4) is 290 sccm and the RF power is 1740 W, the F ratio is 6. By setting the F ratio within the above range, oxygen contained in the insulating layer 110c can be efficiently supplied to the semiconductor layer 108 (especially the channel formation region), and the amount of impurities released from the insulating layer 110c can be reduced. Furthermore, the F ratio of the insulating film located far from the central portion in the thickness direction of the insulating layer 110c (the film in contact with the insulating layer 110b or the insulating layer 110d and the film in its vicinity) may sometimes be less than 2 or greater than 12.

[0476] In this specification and the like, sccm represents the flow rate at 1 atmosphere and 0 °C (273.15 K). Additionally, although the F ratio is shown when the flow rate unit of the deposition gas is sccm and the RF power is W, when using units different from these, the units can be converted to calculate the F ratio. For example, when the flow rate is 0.3 SLM (Standard Liter Per Minute), the flow rate can be converted to 300 sccm to calculate the F ratio.

[0477] Compared with a transistor having a long channel length, in a transistor having a short channel length, the influence of oxygen vacancies (V O ) and V O H on the charge supply characteristics is great. Therefore, it is very important to efficiently supply oxygen from the insulating layer 110c to the semiconductor layer 108 (especially the channel formation region) and reduce the amount of impurities released from the insulating layer 110c. By setting the F ratio during the formation of the insulating layer 110c within the above range, a transistor with good electrical characteristics and high reliability can be achieved.

[0478] Specifically, the insulating layer 110c is preferably manufactured through the following steps: depositing a first silicon oxynitride film; depositing a second silicon oxynitride film under the condition that the F ratio is less than that of the first silicon oxynitride film; depositing a third silicon oxynitride film under the condition that the F ratio is greater than that of the second silicon oxynitride film. At this time, it is preferable to deposit the first silicon oxynitride film and the third silicon oxynitride film under the condition of the same F ratio. In the insulating layer 110c, the second silicon oxynitride film corresponds to the layer in contact with the central portion of the channel formation region of the semiconductor layer 108. Thereby, oxygen can be particularly easily supplied to the central portion of the channel formation region of the semiconductor layer 108, and a decrease in the reliability of the transistor can be suppressed.

[0479] For example, the insulating layer 110c preferably has a structure in which three silicon oxynitride films formed under the conditions of an F ratio of 10, 4, and 10 are stacked in sequence.

[0480] Alternatively, the insulating layer 110c is preferably manufactured through the following steps: depositing a first silicon oxynitride film; depositing a second silicon oxynitride film under the condition that the F ratio is less than that of the first silicon oxynitride film; depositing a third silicon oxynitride film under the condition that the F ratio is less than that of the second silicon oxynitride film; depositing a fourth silicon oxynitride film under the condition that the F ratio is greater than that of the third silicon oxynitride film; depositing a fifth silicon oxynitride film under the condition that the F ratio is greater than that of the fourth silicon oxynitride film. At this time, it is preferable to deposit the first silicon oxynitride film and the fifth silicon oxynitride film under the condition of the same F ratio, and it is preferable to deposit the second silicon oxynitride film and the fourth silicon oxynitride film under the condition of the same F ratio. In the insulating layer 110c, the third silicon oxynitride film corresponds to the layer in contact with the central portion of the channel formation region of the semiconductor layer 108. Thereby, oxygen can be particularly easily supplied to the central portion of the channel formation region of the semiconductor layer 108, and a decrease in the reliability of the transistor can be suppressed.

[0481] For example, the insulating layer 110c preferably has a structure in which five silicon oxynitride films formed under the conditions of an F ratio of 10, 6, 4, 6, and 10 are stacked in sequence.

[0482] Note that there are no particular limitations on the thickness of each layer and its size relationship. For example, the smaller the F ratio condition of the formed layer, the smaller its thickness can be. Alternatively, the smaller the F ratio condition of the formed layer, the larger its thickness can be. In addition, each layer can be formed with the same thickness.

[0483] In addition, by measuring the nitrogen concentration (N concentration) distribution or hydrogen concentration (H concentration) distribution in the depth direction of the insulating layer 110c using secondary ion mass spectrometry (SIMS), it can be confirmed that the insulating layer 110c is composed of multiple layers with different deposition conditions. Specifically, the smaller the F ratio condition of the deposited layer, the higher the hydrogen concentration. In addition, the smaller the F ratio condition of the deposited layer, the lower the nitrogen concentration. Through the above analysis, the number of layers constituting the insulating layer 110c and the magnitude relationship of the F ratio conditions of each layer can be speculated.

[0484] Note that if the F ratio during film formation is high, the etching rate with respect to the etchant becomes slow, and if the F ratio during film formation is low, the etching rate with respect to the etchant becomes fast. Therefore, the etching rate can be used as an index of diffusion ease. As such an etchant, for example, an etchant containing hydrofluoric acid can be used. Specifically, hydrofluoric acid and BHF (Buffered Hydrofluoric acid) can be cited. BHF is an etchant containing hydrofluoric acid and a buffer (for example, ammonium fluoride (NH4F)). In addition, an etchant to which a surfactant is added can also be used. For example, at 25 °C, the etching rate of each layer constituting the insulating layer 110c with respect to 0.5 wt% hydrofluoric acid is preferably 8 nm / min or more, 9 nm / min or more, 10 nm / min or more, 11 nm / min or more, or 12 nm / min or more and 15 nm / min or less. In addition, the etching rate can be calculated by dividing the difference between the thickness of the target film before etching and the thickness of the target film after etching by the etching time.

[0485] In addition, the deposition process of the oxide insulating film or oxynitride insulating film can be performed two or more times, and after at least one of these deposition processes, plasma treatment is performed in an oxygen-containing atmosphere to form the insulating layer 110c. For example, the insulating layer 110c can be formed by the following process: depositing a first silicon oxynitride film; performing a first N2O plasma treatment; depositing a second silicon oxynitride film; performing a second N2O plasma treatment. In addition, for example, the insulating layer 110c can be formed by the following process: depositing a first silicon oxynitride film; performing a first N2O plasma treatment; depositing a second silicon oxynitride film; performing a second N2O plasma treatment; depositing a third silicon oxynitride film; performing a third N2O plasma treatment. Note that the number of deposition processes and the number of plasma treatment processes are not limited to two or three, and can also be four or more.

[0486] The deposition conditions of each silicon oxynitride film can be the same or one or more of them can be different. In addition, the conditions of each plasma treatment can be the same or one or more of them can be different.

[0487] It is preferable to increase the amount of oxygen contained in the insulating layer 110c by performing plasma treatment multiple times in an oxygen-containing atmosphere. In addition, by changing the presence or absence or conditions (treatment time, etc.) of plasma treatment each time, a region containing more oxygen than other parts can be easily formed at the central portion in the thickness direction of the insulating layer 110c. For example, in the case of performing plasma treatment three times, it is preferable to use the same conditions between the first and the third times, and the treatment time of the second time is longer than that of the first and the third times. Alternatively, plasma treatment may not be performed after the first deposition and the third deposition, and plasma treatment may be performed only after the second deposition. Alternatively, plasma treatment may be performed after the first deposition and the third deposition, and plasma treatment may not be performed after the second deposition.

[0488] For example, the insulating layer 110c can be formed through the following steps: forming a silicon oxynitride film under the condition that the F ratio is 10; performing N2O plasma treatment; forming a silicon oxynitride film under the condition that the F ratio is 4; forming a silicon oxynitride film under the condition that the F ratio is 10; performing N2O plasma treatment.

[0489] This embodiment can be appropriately combined with other embodiments.

[0490] (Embodiment 3) In this embodiment, with reference to Figures 22 to 27 a display device according to one aspect of the present invention will be described.

[0491] The display device of this embodiment can be a high-resolution display device or a large display device. Therefore, for example, the display device of this embodiment can be used as the display unit of the following devices: electronic devices with a large screen such as a television device, a desktop or notebook personal computer, a monitor for a computer, etc., a digital signage, a large game machine such as a pachinko machine; a digital camera; a digital video camera; a digital photo frame; a mobile phone; a portable game machine; a portable information terminal; a sound reproduction device.

[0492] In addition, the display device of this embodiment can be a high-definition display device. Therefore, for example, the display device of this embodiment can be used as the display unit of information terminal devices (wearable devices) such as watch-type and bracelet-type, and the display unit of wearable devices that can be worn on the head such as VR devices such as head-mounted displays (HMDs) and glasses-type AR devices.

[0493] A semiconductor device according to one embodiment of the present invention can be used in a display device or a module including the display device. As a module including the display device, examples include a module in which the display device is equipped with a connector such as a flexible printed circuit (hereinafter referred to as FPC) or a TCP (Tape Carrier Package), and a module in which an integrated circuit (IC) is mounted by a COG (Chip On Glass) method or a COF (Chip On Film) method, etc.

[0494] The display device of the present embodiment may also have a touch panel function. For example, various detection elements (which may also be referred to as sensor elements) capable of detecting the approach or contact of a detection object such as a finger can be used in the display device.

[0495] For example, as sensor methods, there are capacitive, resistive film, surface acoustic wave, infrared, optical, and piezoresistive types.

[0496] As the capacitive type, for example, there are surface capacitive and projected capacitive types. In addition, as the projected capacitive type, for example, there are self-capacitive and mutual-capacitive types. The mutual-capacitive type is preferably used, whereby multi-point detection can be performed simultaneously.

[0497] As a touch panel, for example, there are Out-Cell type, On-Cell type, and In-Cell type. Note that the In-Cell type touch panel refers to a structure in which electrodes constituting the detection element are provided on one or both of the substrate supporting the display element and the counter substrate.

[0498] [Display device 50A] Figure 22 is a perspective view of the display device 50A.

[0499] The display device 50A has a structure in which the substrate 152 is bonded to the substrate 151. In Figure 22 it, the substrate 152 is shown by a dashed line.

[0500] The display device 50A includes a display unit 162, a connection unit 140, a circuit unit 164, a conductive layer 165, etc. Figure 22 An example in which the display device 50A is equipped with the IC 173 and the FPC 172 is shown. Therefore, the Figure 22 structure shown can also be referred to as a display module including the display device 50A, the IC, and the FPC.

[0501] The connecting portion 140 is provided outside the display portion 162. The connecting portion 140 may be provided along one or more sides of the display portion 162. The connecting portion 140 may also be one or more. Figure 22 An example is shown in which the connecting portion 140 is provided so as to surround the four sides of the display portion. In the connecting portion 140, the common electrode of the display element is electrically connected to the conductive layer, and a potential can be supplied to the common electrode.

[0502] The circuit portion 164 includes, for example, a scan line driving circuit (also referred to as a gate driver). In addition, the circuit portion 164 may also include both a scan line driving circuit and a signal line driving circuit (also referred to as a source driver).

[0503] The conductive layer 165 has a function of supplying signals and power to the display portion 162 and the circuit portion 164. The signals and power are input to the conductive layer 165 from the outside via the FPC 172 or input to the conductive layer 165 from the IC 173.

[0504] Figure 22 An example is shown in which the IC 173 is provided on the substrate 151 by a COG method or a COF method or the like. As the IC 173, for example, an IC including one or both of a scan line driving circuit and a signal line driving circuit can be used. Note that the display device 50A and the display module do not necessarily have to be provided with an IC. In addition, the IC can also be mounted on the FPC by a COF method or the like.

[0505] A semiconductor device according to one embodiment of the present invention can be used, for example, in one or both of the display portion 162 and the circuit portion 164 of the display device 50A.

[0506] For example, when a semiconductor device according to one embodiment of the present invention is used in a pixel circuit of a display device, the occupied area of the pixel circuit can be reduced, and a high-definition display device can be realized. In addition, for example, when a semiconductor device according to one embodiment of the present invention is used in a driving circuit of a display device (for example, one or both of a gate line driving circuit and a source line driving circuit), the occupied area of the driving circuit can be reduced, and a narrow-bezel display device can be realized. In addition, a semiconductor device according to one embodiment of the present invention has good electrical characteristics, and by using this semiconductor device in a display device, the reliability of the display device can be improved.

[0507] The display portion 162 is an image display area in the display device 50A and includes a plurality of pixels 201 arranged periodically. Figure 22 An enlarged view of one pixel 201 is shown.

[0508] There is no particular limitation on the arrangement of pixels in the display device of the present embodiment, and various methods can be adopted. As the arrangement of pixels, for example, stripe arrangement, S stripe arrangement, matrix arrangement, Delta arrangement, Bayer arrangement, and Pentile arrangement can be cited.

[0509] Figure 22 The pixel 201 shown includes a sub-pixel 11R that presents red light, a sub-pixel 11G that presents green light, and a sub-pixel 11B that presents blue light. There is no particular limitation on the number of sub-pixels included in one pixel.

[0510] The sub-pixels 11R, 11G, and 11B all include a display element and a circuit that controls the driving of the display element.

[0511] Various elements can be used as the display element. For example, a liquid crystal element and a light-emitting element can be cited. In addition, a MEMS (Micro Electro Mechanical Systems) element of a shutter method or a light interference method, a display element using a microcapsule method, an electrophoresis method, an electrowetting method, or an electronic ink (registered trademark) method, etc. can also be used. In addition, a QLED (Quantum-dot LED) using a light source and a color conversion technology using a quantum dot material can also be used.

[0512] As a display device using a liquid crystal element, for example, a transmissive liquid crystal display device, a reflective liquid crystal display device, and a transflective liquid crystal display device can be cited.

[0513] As modes applicable to display devices using liquid crystal elements, for example, a vertical alignment (VA) mode, a fringe field switching (FFS) mode, an in-plane switching (IPS) mode, a twisted nematic (TN) mode, an axially symmetric aligned micro-cell (ASM) mode, an optically compensated birefringence (OCB) mode, a ferroelectric liquid crystal (FLC) mode, an antiferroelectric liquid crystal (AFLC) mode, an electrically controlled birefringence (ECB) mode, and a guest-host mode can be cited. As the VA mode, for example, a multi-domain vertical alignment (MVA) mode, a patterned vertical alignment (PVA) mode, and an advanced super view (ASV) mode can be cited.

[0514] As liquid crystal materials applicable to liquid crystal elements, for example, thermotropic liquid crystals, low-molecular liquid crystals, high-molecular liquid crystals, polymer dispersed liquid crystals (PDLC), polymer network liquid crystals (PNLC), ferroelectric liquid crystals, and antiferroelectric liquid crystals can be cited. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, a blue phase, etc. depending on conditions. In addition, as the liquid crystal material, either a positive-type liquid crystal or a negative-type liquid crystal can be used, and it can be selected according to the mode or design to be used.

[0515] As light-emitting elements, for example, self-luminous light-emitting elements such as light-emitting diodes (LED), organic light-emitting diodes (OLED), and semiconductor lasers can be cited. As the LED, for example, a small-sized LED, a micro-LED, etc. can be used.

[0516] Examples of the luminescent substance contained in the light-emitting element include a substance that emits fluorescence (fluorescent material), a substance that emits phosphorescence (phosphorescent material), a substance that exhibits thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF) material), and an inorganic compound (quantum dot material, etc.).

[0517] The emission color of the light-emitting element can be infrared, red, green, blue, cyan, magenta, yellow, white, or the like. In addition, when the light-emitting element has a microcavity structure, the color purity can be further improved.

[0518] In a pair of electrodes included in the light-emitting element, one electrode is used as the anode and the other electrode is used as the cathode.

[0519] The display device according to one embodiment of the present invention may also adopt any one of the following structures: a top emission type that emits light in a direction opposite to the substrate on which the light-emitting element is formed, a bottom emission type that emits light toward the substrate side on which the light-emitting element is formed, and a dual emission type that emits light on both sides.

[0520] Figure 23A An example of a cross-section showing a part of the region including the FPC 172, a part of the circuit portion 164, a part of the display portion 162, a part of the connection portion 140, and a part of the region including the end portion of the display device 50A is shown.

[0521] Figure 23A The shown display device 50A includes transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, light-emitting elements 130G, light-emitting elements 130B, etc. between the substrate 151 and the substrate 152. The light-emitting element 130R is a display element included in the sub-pixel 11R that presents red light, the light-emitting element 130G is a display element included in the sub-pixel 11G that presents green light, and the light-emitting element 130B is a display element included in the sub-pixel 11B that presents blue light.

[0522] The display device 50A adopts an SBS structure. In the SBS structure, the materials and structures of the respective light-emitting elements can be optimized separately, the degree of freedom in the selection of materials and structures is increased, and it becomes easy to improve the brightness and reliability.

[0523] In addition, the display device 50A adopts a top emission type. In the top emission type, transistors and the like can be arranged so as to overlap with the light-emitting region of the light-emitting element, so the aperture ratio of the pixel can be further improved compared with the bottom emission type.

[0524] The transistors 205D, 205R, 205G, and 205B are all formed on the substrate 151. These transistors can be manufactured using the same material and the same process.

[0525] In the present embodiment, an example is shown in which OS transistors are used as the transistors 205D, 205R, 205G, and 205B. As the transistors 205D, 205R, 205G, and 205B, the transistors of one aspect of the present invention can be used. That is, in the display device 50A, both the display unit 162 and the circuit unit 164 include the transistors of one aspect of the present invention. By using the transistors of one aspect of the present invention in the display unit 162, the pixel size can be reduced and high definition can be achieved. In addition, by using the transistors of one aspect of the present invention in the circuit unit 164, the occupied area of the circuit unit 164 can be reduced and narrow bezelization can be achieved. Regarding the transistors of one aspect of the present invention, reference can be made to the description of the above embodiments.

[0526] Specifically, the transistors 205D, 205R, 205G, and 205B each include a conductive layer 104 serving as a gate, an insulating layer 106 serving as a gate insulating layer, conductive layers 112a and 112b serving as a source or a drain, a semiconductor layer 108 containing a metal oxide, and an insulating layer 110. Here, multiple layers obtained by processing the same conductive film are attached with the same hatching. The insulating layer 110 is located between the conductive layer 112a and the semiconductor layer 108. The insulating layer 106 is located between the conductive layer 104 and the semiconductor layer 108.

[0527] In the present embodiment, an example is shown in which the transistor 100B described in Embodiment 1 is used as the transistors 205D, 205R, 205G, and 205B. Specifically, an example is shown in which the insulating layer 110 has a five-layer structure of insulating layers 110a, 110b, 110c, 110d, and 110e. In addition, an example is shown in which both the conductive layer 112a and the conductive layer 112b have a two-layer structure in which the upper layer covers the top surface and the side surface of the lower layer.

[0528] Note that the transistors included in the display device of the present embodiment are not limited to the transistors of one aspect of the present invention. For example, a combination of the transistors of one aspect of the present invention and transistors having other structures can also be used.

[0529] The display device of the present embodiment can include, for example, any one or more of a planar transistor, a staggered transistor, and an anti-staggered transistor. The transistors included in the display device of the present embodiment have any one of a top-gate type and a bottom-gate type structure. Alternatively, a gate can be provided above and below the semiconductor layer forming the channel.

[0530] Alternatively, the display device of the present embodiment may also include Si transistors.

[0531] When increasing the emission luminance of the light-emitting element included in the pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting element. To this end, it is necessary to increase the source-drain voltage of the driving transistor included in the pixel circuit. Since the breakdown voltage between the source and drain of the OS transistor is higher than that of the Si transistor, a high voltage can be applied between the source and drain of the OS transistor. Thus, by using the OS transistor as the driving transistor included in the pixel circuit, the amount of current flowing through the light-emitting element can be increased to increase the emission luminance of the light-emitting element.

[0532] In addition, when the transistor operates in the saturation region, compared with the Si transistor, the OS transistor can make the change in the source-drain current for the change in the gate-source voltage finer. Therefore, by using the OS transistor as the driving transistor included in the pixel circuit, the current flowing through the source-drain can be determined in detail according to the change in the gate-source voltage, so that the amount of current flowing through the light-emitting element can be controlled. Thus, the number of gray levels of the pixel circuit can be increased.

[0533] In addition, regarding the saturation characteristics of the current flowing when the transistor operates in the saturation region, compared with the Si transistor, the OS transistor can make a stable current (saturation current) flow even when gradually increasing the source-drain voltage. Therefore, by using the OS transistor as the driving transistor, a stable current can flow through the light-emitting element even if, for example, the current-voltage characteristics of the light-emitting element are uneven. That is, when the OS transistor operates in the saturation region, even if the source-drain voltage is changed, the source-drain current hardly changes, so that the emission luminance of the light-emitting element can be stabilized.

[0534] The transistors included in the circuit unit 164 and the transistors included in the display unit 162 may have the same structure or different structures. The plurality of transistors included in the circuit unit 164 may have the same structure or two or more different structures. Similarly, the plurality of transistors included in the display unit 162 may have the same structure or two or more different structures.

[0535] All the transistors included in the display unit 162 may be OS transistors, all the transistors included in the display unit 162 may be Si transistors, and some of the transistors included in the display unit 162 may be OS transistors and the remaining transistors may be Si transistors.

[0536] For example, by using both LTPS transistors and OS transistors in the display unit 162, a display device with low power consumption and high driving ability can be realized. In addition, a structure combining LTPS transistors and OS transistors is sometimes referred to as LTPO. As a more preferable example, the following structure can be cited: using OS transistors for transistors such as those used as switches for controlling conduction / non-conduction between control wirings and using LTPS transistors for transistors for controlling current, etc.

[0537] For example, one of the transistors included in the display unit 162 is used as a transistor for controlling the current flowing through the light-emitting element and can also be referred to as a driving transistor. One of the source and drain of the driving transistor is electrically connected to the pixel electrode of the light-emitting element. An LTPS transistor is preferably used as the driving transistor. Thereby, the current flowing through the light-emitting element in the pixel circuit can be increased.

[0538] On the other hand, another one of the transistors included in the display unit 162 is used as a switch for controlling selection and non-selection of the pixel and can also be referred to as a selection transistor. The gate of the selection transistor is electrically connected to the gate line, and one of the source and drain is electrically connected to the source line (signal line). An OS transistor is preferably used as the selection transistor. Therefore, even if the frame frequency is significantly low (for example, 1 fps or less), the gray scale of the pixel can be maintained. Thus, by stopping the driver when displaying a static image, power consumption can be reduced.

[0539] An insulating layer 218 is provided so as to cover the transistors 205D, 205R, 205G, 205B, and an insulating layer 235 is provided on the insulating layer 218.

[0540] The insulating layer 218 is preferably used as a protective layer for the transistors. The insulating layer 218 preferably uses a material that does not easily diffuse impurities such as water and hydrogen. Thereby, the insulating layer 218 can be used as a barrier layer. By adopting such a structure, it is possible to effectively suppress the diffusion of impurities from the outside into the transistors, and thus the reliability of the display device can be improved.

[0541] The insulating layer 218 preferably includes one or more inorganic insulating films. As the inorganic insulating film, for example, an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitrogen oxide insulating film can be cited. Specific examples of the above inorganic insulating films are as described above.

[0542] The insulating layer 235 is preferably used as a planarization layer, and an organic insulating film is suitable for use. As materials that can be used for the organic insulating film, for example, acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimide amide resin, silicone resin, benzocyclobutene resin, phenolic resin, and precursors of these resins can be cited. In addition, the insulating layer 235 can also adopt a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 is preferably used as an etching protection layer. Thereby, when processing the pixel electrodes 111R, 111G, 111B, etc., the formation of recesses in the insulating layer 235 can be suppressed. Alternatively, recesses can also be provided in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc.

[0543] Light-emitting elements 130R, 130G, and 130B are provided on the insulating layer 235.

[0544] The light-emitting element 130R includes a pixel electrode 111R on the insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. Figure 23A The shown light-emitting element 130R emits red light (R). The EL layer 113R includes a light-emitting layer that emits red light.

[0545] The light-emitting element 130G includes a pixel electrode 111G on the insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. Figure 23A The shown light-emitting element 130G emits green light (G). The EL layer 113G includes a light-emitting layer that emits green light.

[0546] The light-emitting element 130B includes a pixel electrode 111B on the insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. Figure 23A The shown light-emitting element 130B emits blue light (B). The EL layer 113B includes a light-emitting layer that emits blue light.

[0547] Note that in Figure 23A the EL layers 113R, 113G, and 113B are shown with the same thickness, but it is not limited thereto. The respective thicknesses of the EL layers 113R, 113G, and 113B can also be different. For example, it is preferable to set the thickness corresponding to strengthening the optical path of the light emitted by the EL layers 113R, 113G, and 113B. Thereby, a microcavity structure can be realized to improve the color purity of the light emitted from each light-emitting element.

[0548] The pixel electrode 111R is electrically connected to the conductive layer 112b included in the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235. Similarly, the pixel electrode 111G is electrically connected to the conductive layer 112b included in the transistor 205G, and the pixel electrode 111B is electrically connected to the conductive layer 112b included in the transistor 205B.

[0549] As described above, in the present embodiment, an example is shown in which the conductive layer 112b has a two-layer structure in which the upper layer covers the top surface and the side surface of the lower layer. Figure 23A An example is shown in which an opening is provided in the upper layer of the conductive layer 112b and the pixel electrode contacts the top surface of the lower layer of the conductive layer 112b through the opening. In the transistor according to one aspect of the present invention, the conductive layer 112b has a stacked structure. In order to reduce the contact resistance between the pixel electrode and the conductive layer 112b, it is preferable to select the layer that contacts the pixel electrode from the layers constituting the conductive layer 112b. In addition, from the viewpoint of adhesion, the layer that contacts the pixel electrode can also be selected.

[0550] For example, when a metal layer or an alloy layer is used as the pixel electrode (or the lowermost layer of the pixel electrode), it is preferable that the top surface of the metal layer or the alloy layer in the layers constituting the conductive layer 112b contacts the pixel electrode. In addition, when an oxide conductive layer is used as the pixel electrode (or the lowermost layer of the pixel electrode), it is preferable that the top surface of the oxide conductive layer in the layers constituting the conductive layer 112b contacts the pixel electrode.

[0551] Each end of the pixel electrodes 111R, 111G, and 111B is covered by the insulating layer 237. The insulating layer 237 is used as a partition wall. The insulating layer 237 can be provided in a single-layer structure or a stacked structure using one or both of an inorganic insulating material and an organic insulating material. The insulating layer 237 can use, for example, the material that can be used for the insulating layer 218 and the material that can be used for the insulating layer 235. The insulating layer 237 can electrically insulate the pixel electrode from the common electrode. In addition, the insulating layer 237 can electrically insulate the light-emitting elements adjacent to each other.

[0552] The insulating layer 237 is provided at least in the display unit 162. The insulating layer 237 can be provided not only in the display unit 162 but also in the connection unit 140 and the circuit unit 164. In addition, the insulating layer 237 can also be provided so as to extend to the end of the display device 50A.

[0553] The common electrode 115 is a continuous film shared by the light-emitting elements 130R, 130G, and 130B. The common electrode 115 shared by the plurality of light-emitting elements is electrically connected to the conductive layer 123 provided in the connection portion 140. The conductive layer 123 is preferably a conductive layer formed of the same material as the pixel electrodes 111R, 111G, and 111B and by the same process as the pixel electrodes 111R, 111G, and 111B.

[0554] In the display device according to one embodiment of the present invention, a conductive film that transmits visible light is used as the electrode on the light extraction side of the pixel electrode and the common electrode. In addition, as the electrode on the non-light extraction side, a conductive film that reflects visible light is preferably used.

[0555] In addition, a conductive film that transmits visible light may be used as the electrode on the non-light extraction side. In this case, it is preferable to dispose the electrode between the reflective layer and the EL layer. In other words, the light emitted from the EL layer can also be reflected by the reflective layer and extracted from the display device.

[0556] As the material for forming the pair of electrodes of the light-emitting element, metals, alloys, conductive compounds, and mixtures thereof can be appropriately used. Specifically, examples of such materials include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, and alloys obtained by appropriately combining them. In addition, as the material, indium tin oxide (also referred to as In-Sn oxide, ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide can be cited. In addition, as the material, aluminum-containing alloys (aluminum alloys) such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), silver-containing alloys such as an alloy of silver and magnesium and an alloy of silver, palladium, and copper (also denoted as Ag-Pd-Cu, APC) can be cited. In addition, as the material, elements belonging to Group 1 or Group 2 of the periodic table that are not listed above (for example, lithium, cesium, calcium, strontium), rare earth metals such as europium and ytterbium, alloys obtained by appropriately combining them, and graphene can be cited.

[0557] The light-emitting element preferably has a microcavity resonator (microcavity) structure. Therefore, one of the pair of electrodes included in the light-emitting element preferably includes an electrode having visible light transmissivity and reflectivity (semi-transmissive - semi-reflective electrode), and the other preferably includes an electrode having visible light reflectivity (reflective electrode). When the light-emitting element has a microcavity structure, light emitted from the light-emitting layer can be resonated between the two electrodes, and the light emitted from the light-emitting element can be enhanced.

[0558] The light transmittance of the transparent electrode is 40% or more. For example, an electrode with a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more is preferably used as the transparent electrode of the light-emitting element. The visible light reflectance of the semi-transmissive semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less. In addition, the resistivity of these electrodes is preferably 1×10 -2 Ωcm or less.

[0559] The EL layers 113R, 113G, and 113B are all arranged in an island shape. In Figure 23A , the end of the adjacent EL layer 113R overlaps with the end of the EL layer 113G, the end of the adjacent EL layer 113G overlaps with the end of the EL layer 113B, and the end of the adjacent EL layer 113R overlaps with the end of the EL layer 113B. As Figure 23A shown, in the case of depositing an island-shaped EL layer using a high-precision metal mask, sometimes the ends of adjacent EL layers overlap, but the present invention is not limited thereto. That is, the adjacent EL layers may also be separated without overlapping. In addition, in the display device, there may also be both a part where adjacent EL layers overlap and a part where adjacent EL layers are separated without overlapping.

[0560] The EL layers 113R, 113G, and 113B all include at least a light-emitting layer. The light-emitting layer contains one or more light-emitting substances. As the light-emitting substance, a substance that exhibits a light-emitting color such as blue, purple, blue-violet, green, yellow-green, yellow, orange, or red is appropriately used. In addition, as the light-emitting substance, a substance that emits near-infrared light may also be used.

[0561] Examples of the light-emitting substance include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0562] In addition to the light-emitting substance (guest material), the light-emitting layer may also contain one or more organic compounds (host materials, auxiliary materials, etc.). As the one or more organic compounds, one or both of a substance with high hole-transporting properties (hole-transporting material) and a substance with high electron-transporting properties (electron-transporting material) can be used. In addition, as the one or more organic compounds, a bipolar substance (a substance with high electron-transporting and hole-transporting properties) or a TADF material may also be used.

[0563] For example, the light-emitting layer preferably contains a combination of a phosphorescent material, a hole-transporting material that easily forms an exciplex, and an electron-transporting material. By adopting such a structure, light emission by ExTET (Exciplex-Triplet Energy Transfer) that utilizes energy transfer from the exciplex to the luminescent substance (phosphorescent material) can be obtained efficiently. By selecting, as the exciplex, a combination of exciplexes that emit light with a wavelength overlapping the absorption band on the lowest energy side of the luminescent substance, energy transfer can be made smooth, and thus light emission can be obtained efficiently. By adopting the above structure, high efficiency, low-voltage driving, and long lifetime of the light-emitting element can be achieved simultaneously.

[0564] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole-injecting property (hole injection layer), a layer containing a hole-transporting material (hole transport layer), a layer containing a substance with high electron-blocking property (electron blocking layer), a layer containing a substance with high electron-injecting property (electron injection layer), a layer containing an electron-transporting material (electron transport layer), and a layer containing a substance with high hole-blocking property (hole blocking layer). In addition, the EL layer may contain one or both of a bipolar substance and a TADF material.

[0565] The light-emitting element may use a low-molecular compound or a high-molecular compound, and may also contain an inorganic compound. The layers constituting the light-emitting element may be formed by methods such as vapor deposition (including vacuum vapor deposition), transfer printing, printing, inkjet, and coating.

[0566] The light-emitting element may adopt a single structure (a structure with only one light-emitting unit) or a tandem structure (a structure including multiple light-emitting units). The light-emitting unit includes at least one light-emitting layer. The tandem structure has a structure in which multiple light-emitting units are connected in series through a charge generation layer. The charge generation layer has a function of injecting electrons into one of the two light-emitting units and injecting holes into the other when a voltage is applied between a pair of electrodes. By adopting the tandem structure, a light-emitting element capable of emitting light with high brightness can be realized. In addition, since the tandem structure can reduce the current required to obtain the same brightness compared to the single structure, the reliability can be improved. In addition, the tandem structure may also be referred to as a stacked structure.

[0567] When Figure 23A using a light-emitting element with a tandem structure, preferably, the EL layer 113R includes multiple light-emitting units that emit red light, the EL layer 113G includes multiple light-emitting units that emit green light, and the EL layer 113B includes multiple light-emitting units that emit blue light.

[0568] A protective layer 131 is provided on the light-emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded by an adhesive layer 142. The substrate 152 is provided with a light-shielding layer 117. As the sealing of the light-emitting element, for example, a solid sealing structure or a hollow sealing structure can be adopted. In Figure 23A , the space between the substrate 152 and the substrate 151 is filled with the adhesive layer 142, that is, a solid sealing structure is adopted. Alternatively, a hollow sealing structure using an inert gas (such as nitrogen or argon) to fill the space can also be adopted. At this time, the adhesive layer 142 can also be provided in a manner that does not overlap with the light-emitting element. In addition, the space can also be filled with a resin different from the adhesive layer 142 provided in a frame shape.

[0569] The protective layer 131 is provided at least in the display portion 162, and is preferably provided so as to cover the entire display portion 162. The protective layer 131 is preferably provided so as to cover the connection portion 140 and the circuit portion 164 in addition to the display portion 162. In addition, the protective layer 131 is preferably provided so as to extend to the end of the display device 50A. On the other hand, in order to electrically connect the FPC 172 to the conductive layer 166, there is a portion in the connection portion 204 where the protective layer 131 is not provided.

[0570] By providing the protective layer 131 on the light-emitting elements 130R, 130G, and 130B, the reliability of the light-emitting elements can be improved.

[0571] The protective layer 131 can have a single-layer structure or a laminated structure of two or more layers. In addition, there is no limitation on the conductivity of the protective layer 131. As the protective layer 131, at least one of an insulating film, a semiconductor film, and a conductive film can be used.

[0572] When the protective layer 131 includes an inorganic film, deterioration of the light-emitting element can be suppressed, such as preventing oxidation of the common electrode 115 and suppressing the entry of impurities (such as moisture and oxygen) into the light-emitting element, thereby improving the reliability of the display device.

[0573] As the protective layer 131, for example, inorganic insulating films such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitrogen oxide insulating film can be used. Specific examples of the above inorganic insulating films are as described above. In particular, the protective layer 131 preferably includes a nitride insulating film or a nitrogen oxide insulating film, and more preferably includes a nitride insulating film.

[0574] In addition, as the protective layer 131, an inorganic film containing ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or IGZO, etc. can also be used. The inorganic film preferably has a high resistance. Specifically, the inorganic film preferably has a higher resistance than the common electrode 115. The inorganic film can also contain nitrogen.

[0575] When extracting the light emission of the light-emitting element through the protective layer 131, the visible light transmittance of the protective layer 131 is preferably high. For example, ITO, IGZO, and alumina are all inorganic materials with high visible light transmittance, so they are preferred.

[0576] As the protective layer 131, for example, a stacked structure of an alumina film and a silicon nitride film on the alumina film or a stacked structure of an alumina film and an IGZO film on the alumina film can be adopted. By using this stacked structure, the entry of impurities (such as water and oxygen) into the EL layer side can be suppressed.

[0577] Moreover, the protective layer 131 may also include an organic film. For example, the protective layer 131 may include both an organic film and an inorganic film. As the organic film that can be used for the protective layer 131, for example, an organic insulating film that can be used for the insulating layer 235 can be cited.

[0578] A connection portion 204 is provided in a region of the substrate 151 that does not overlap with the substrate 152. In the connection portion 204, the conductive layer 165 is electrically connected to the FPC 172 through the conductive layer 166 and the connection layer 242. An example of a stacked structure of the conductive layer 165 obtained by processing the same conductive film as the conductive layer 112b is shown. An example of the conductive layer 166 obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B is shown. The connection portion between the conductive layer 165 and the conductive layer 166 can adopt the same structure as the connection portion between the pixel electrode and the conductive layer 112b. Specifically, Figure 23A An example in which an opening is provided in the upper layer of the conductive layer 165 and the conductive layer 166 contacts the top surface of the lower layer of the conductive layer 165 through this opening is shown. The conductive layer 166 is exposed on the top surface of the connection portion 204. Therefore, the connection portion 204 can be electrically connected to the FPC 172 through the connection layer 242.

[0579] The display device 50A adopts a top emission type. The light emitted by the light-emitting element is emitted to the substrate 152 side. The substrate 152 is preferably made of a material with high visible light transmittance. The pixel electrodes 111R, 111G, and 111B contain materials that reflect visible light, and the counter electrode (common electrode 115) contains materials that transmit visible light.

[0580] Preferably, a light-shielding layer 117 is provided on the surface of the substrate 152 on the substrate 151 side. The light-shielding layer 117 can be provided between adjacent light-emitting elements, in the connection portion 140, the circuit portion 164, etc.

[0581] In addition, a color filter or other coloring layer can also be provided on the surface of the substrate 152 on the substrate 151 side or on the protective layer 131. When the color filter is provided overlapping the light-emitting element, the color purity of the light emitted from the pixel can be improved.

[0582] The coloring layer is a colored layer that selectively transmits light in a specific wavelength region and absorbs light in other wavelength regions. For example, a red (R) color filter that transmits light in the red wavelength region, a green (G) color filter that transmits light in the green wavelength region, a blue (B) color filter that transmits light in the blue wavelength region, etc. can be used. Each coloring layer can use one or more of a metal material, a resin material, a pigment, and a dye. The coloring layer is formed at a desired position by a printing method, an inkjet method, an etching method using a photolithography method, etc.

[0583] In addition, various optical members can be disposed on the outer side of the substrate 152 (the surface on the side opposite to the substrate 151). As the optical member, for example, a polarizing plate, a retardation plate, a light diffusion layer (diffusion film, etc.), an antireflection layer, and a condensing film can be cited. In addition, an antistatic film that suppresses the adhesion of dust, a water-repellent film that is not easily soiled, a hard coating film that suppresses damage during use, an impact absorption layer, etc., which are surface protective layers, can also be disposed on the outer side of the substrate 152. For example, by providing a glass layer or a silicon dioxide layer (SiO x layer) as the surface protective layer, it is possible to suppress the surface from being soiled or damaged, so it is preferable. In addition, DLC (diamond-like carbon), aluminum oxide (AlO x ), a polyester-based material, a polycarbonate-based material, etc. can also be used as the surface protective layer. In addition, a material having a high visible light transmittance is preferably used as the surface protective layer. In addition, a material having a high hardness is preferably used as the surface protective layer.

[0584] The substrate 151 and the substrate 152 can each use glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, etc. The substrate on the light extraction side of the light-emitting element uses a material that transmits the light. By using a flexible material for the substrate 151 and the substrate 152, the flexibility of the display device can be improved, and thus a flexible display can be realized. As at least one of the substrate 151 and the substrate 152, a polarizing plate can also be used.

[0585] As the substrate 151 and the substrate 152, the following materials can be used respectively: polyester resins such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aromatic polyamide, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamide-imide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, and cellulose nanofibers. In addition, glass having a flexible thickness can also be used as at least one of the substrate 151 and the substrate 152.

[0586] When overlapping a circularly polarized plate on a display device, it is preferable to use a substrate with high optical isotropy as the substrate included in the display device. The birefringence of a substrate with high optical isotropy is low (it can also be said that the amount of birefringence is small). As a thin film with high optical isotropy, a cellulose triacetate (TAC, also known as cellulose acetate) film, a cyclic olefin polymer (COP) film, a cyclic olefin copolymer (COC) film, an acrylic resin film, etc. can be cited.

[0587] As the adhesive layer 142, various curable adhesives such as ultraviolet curable adhesives and other photocurable adhesives, reaction curable adhesives, thermosetting adhesives, anaerobic adhesives, etc. can be used. As these adhesives, epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene-vinyl acetate) resins, etc. can be cited. In particular, it is preferable to use a material with low moisture permeability such as an epoxy resin. In addition, a two-component mixed resin can also be used. In addition, an adhesive sheet, etc. can also be used.

[0588] As the connection layer 242, an anisotropic conductive film (ACF: Anisotropic Conductive Film), an anisotropic conductive paste (ACP: Anisotropic Conductive Paste), etc. can be used.

[0589] [Display device 50B] Figure 23B An example of a cross-section of the display unit 162 of the display device 50B is shown. The main difference between the display device 50B and the display device 50A is that in the former, light-emitting elements including an EL layer 113 shared by the light-emitting elements and a coloring layer (such as a color filter) are used in the sub-pixels of each color. Figure 23B The structure shown can be combined with Figure 23A the structure of the region including the FPC 172, the circuit unit 164, the laminated structure of the substrate 151 to the insulating layer 235 of the display unit 162, the connection unit 140, and the end portion shown. Note that in the description of the display device described later, the parts that are the same as those of the previously described display device may sometimes be omitted from the description.

[0590] Figure 23B The display device 50B shown includes light-emitting elements 130R, 130G, 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, a coloring layer 132B that transmits blue light, etc.

[0591] The light-emitting element 130R includes a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. The light emitted by the light-emitting element 130R is extracted as red light to the outside of the display device 50B through the coloring layer 132R.

[0592] The light-emitting element 130G includes a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. The light emitted by the light-emitting element 130G is extracted as green light to the outside of the display device 50B through the coloring layer 132G.

[0593] The light-emitting element 130B includes a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. The light emitted by the light-emitting element 130B is extracted as blue light to the outside of the display device 50B through the coloring layer 132B.

[0594] The light-emitting elements 130R, 130G, and 130B share the EL layer 113 and the common electrode 115. Compared with a structure in which different EL layers are respectively provided for sub-pixels of each color, the structure in which the sub-pixels of each color share the EL layer 113 can reduce the number of manufacturing processes.

[0595] For example, Figure 23B the light-emitting elements 130R, 130G, and 130B shown emit white light. The white light emitted by the light-emitting elements 130R, 130G, and 130B passes through the coloring layers 132R, 132G, and 132B, whereby light of a desired color can be obtained.

[0596] The white light-emitting element preferably includes two or more light-emitting layers. In the case of obtaining white light emission using two light-emitting layers, the light-emitting layers are selected such that the emission colors of the two light-emitting layers are in a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer be in a complementary color relationship, a structure in which white light is emitted as a whole in the light-emitting element can be obtained. In addition, in the case of obtaining white light emission using three or more light-emitting layers, the emission colors of the three or more light-emitting layers are combined to obtain a structure in which white light is emitted as a whole in the light-emitting element.

[0597] The EL layer 113 preferably includes, for example, a light-emitting layer containing a light-emitting substance that emits blue light and a light-emitting layer containing a light-emitting substance that emits visible light having a wavelength longer than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0598] The light-emitting element that emits white light preferably adopts a series structure. Specifically, the following structures can be adopted: a two-stage series structure including a light-emitting unit that emits yellow light and a light-emitting unit that emits blue light; a two-stage series structure including a light-emitting unit that emits red light and green light and a light-emitting unit that emits blue light; a three-stage series structure including a light-emitting unit that emits blue light, a light-emitting unit that emits yellow light, yellow-green light or green light, and a light-emitting unit that emits blue light in sequence; or a three-stage series structure including a light-emitting unit that emits blue light, a light-emitting unit that emits yellow light, yellow-green light or green light and red light, and a light-emitting unit that emits blue light in sequence, etc. For example, as the number of stacked layers and color sequence of the light-emitting unit, a two-stage structure of stacking B and Y from the anode side, a two-stage structure of stacking B and the light-emitting unit X, a three-stage structure of stacking B, Y and B, a three-stage structure of stacking B, X and B can be cited. As the number of stacked layers and color sequence of the light-emitting layer in the light-emitting unit X, a two-layer structure of stacking R and Y from the anode side, a two-layer structure of stacking R and G, a two-layer structure of stacking G and R, a three-layer structure of stacking G, R and G or a three-layer structure of stacking R, G and R can be adopted, etc. In addition, other layers can also be provided between two light-emitting layers.

[0599] In addition, by adopting a microcavity structure, the light-emitting element of the structure that emits white light sometimes emits light by enhancing a specific color such as red, green or blue.

[0600] Or, for example Figure 23B The light-emitting elements 130R, 130G, 130B shown emit blue light. At this time, the EL layer 113 includes one or more light-emitting layers that emit blue light. Regarding the sub-pixel 11B that presents blue light, the blue light emitted by the light-emitting element 130B can be extracted. In addition, regarding the sub-pixel 11R that presents red light and the sub-pixel 11G that presents green light, by providing a color conversion layer between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength and extracted as red light or green light. And preferably, a coloring layer 132R is provided between the color conversion layer on the light-emitting element 130R and the substrate 152, and a coloring layer 132G is provided between the color conversion layer on the light-emitting element 130G and the substrate 152. Sometimes a part of the light emitted by the light-emitting element is transmitted without being converted by the color conversion layer. By extracting the light transmitted through the color conversion layer via the coloring layer, the coloring layer can absorb the light other than the desired color light, thereby improving the color purity of the light presented by the sub-pixel.

[0601] [Display device 50C] Figure 24 The main difference between the shown display device 50C and the display device 50B is that the former is a bottom-emitting display device.

[0602] The light emitted by the light-emitting element is emitted to the side of the substrate 151. It is preferable to use a material with high visible light transmittance for the substrate 151. On the other hand, there is no limitation on the light transmittance of the material for the substrate 152.

[0603] It is preferable to form a light-shielding layer 117 between the substrate 151 and the transistor. Figure 24 An example is shown as follows: a light-shielding layer 117 is provided on the substrate 151, an insulating layer 153 is provided on the light-shielding layer 117, and transistors 205D, transistors 205R (not shown), transistors 205G, and transistors 205B, etc. are provided on the insulating layer 153. In addition, a coloring layer 132R, a coloring layer 132G, and a coloring layer 132B are provided on the insulating layer 218, and an insulating layer 235 is provided on the coloring layer 132R, the coloring layer 132G, and the coloring layer 132B.

[0604] The light-emitting element 130R overlapping with the coloring layer 132R includes a pixel electrode 111R, an EL layer 113, and a common electrode 115.

[0605] The light-emitting element 130G overlapping with the coloring layer 132G includes a pixel electrode 111G, an EL layer 113, and a common electrode 115.

[0606] The light-emitting element 130B overlapping with the coloring layer 132B includes a pixel electrode 111B, an EL layer 113, and a common electrode 115.

[0607] The pixel electrodes 111R, 111G, and 111B each use a material with high visible light transmittance. The common electrode 115 preferably uses a material that reflects visible light. Since a metal with low resistance or the like can be used for the common electrode 115 in the bottom-emission type display device, a voltage drop due to the resistance of the common electrode 115 can be suppressed, and high display quality can be achieved.

[0608] The transistor according to one embodiment of the present invention can be miniaturized to reduce the occupied area, so the aperture ratio of the pixel can be increased or the size of the pixel can be reduced in the bottom-emission type display device.

[0609] [Display device 50D] Figure 25A The main difference between the shown display device 50D and the display device 50A is that the former includes a light-receiving element 130S.

[0610] The display device 50D includes a light-emitting element and a light-receiving element in the pixel. In the display device 50D, it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element. The organic EL element and the organic photodiode can be formed on the same substrate. Therefore, the organic photodiode can be mounted in a display device using the organic EL element.

[0611] In the display device 50D in which a pixel includes a light-emitting element and a light-receiving element, since the pixel has a light-receiving function, the display device can detect the contact or approach of an object while displaying an image. Therefore, the display unit 162 has one or both of a camera function and a sensing function in addition to the image display function. For example, not only an image is displayed in all sub-pixels included in the display device 50D, but a part of the sub-pixels can be used as light sources to emit light, another part of the sub-pixels can be used for light detection, and the remaining sub-pixels can be used to display an image.

[0612] Therefore, it is not necessary to separately provide a light-receiving unit and a light source for the display device 50D, and the number of components of the electronic device can be reduced. For example, it is not necessary to separately provide a biometric device installed in the electronic device or a capacitive touch panel for scrolling or the like. Therefore, by using the display device 50D, an electronic device with a reduced manufacturing cost can be provided.

[0613] When the light-receiving element is used as an image sensor, the display device 50D can use the light-receiving element to capture an image. For example, an image sensor can be used for imaging for personal identification using a fingerprint, palmprint, iris, vein shape (including vein shape and artery shape), or face.

[0614] In addition, the light-receiving element can be used for a touch sensor (also referred to as a direct touch sensor) or a non-contact sensor (also referred to as a floating sensor, floating touch sensor, non-touch sensor), etc. The touch sensor can detect an object when the object (finger, hand, pen, etc.) directly touches the display device. In addition, the non-contact sensor can detect the object even if the object does not touch the display device.

[0615] The light-emitting element 130S includes a pixel electrode 111S on an insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S. Light Lin is incident on the functional layer 113S from the outside of the display device 50D.

[0616] The pixel electrode 111S is electrically connected to a conductive layer 112b included in the transistor 205S through an opening provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.

[0617] An end portion of the pixel electrode 111S is covered by an insulating layer 237.

[0618] The common electrode 115 is a continuous film shared by the light-receiving element 130S, the light-emitting element 130R (not shown), the light-emitting element 130G, and the light-emitting element 130B. The common electrode 115 shared by the light-emitting element and the light-receiving element is electrically connected to a conductive layer 123 provided in the connection portion 140.

[0619] The functional layer 113S includes at least an active layer (also referred to as a photoelectric conversion layer). The active layer contains a semiconductor. Examples of the semiconductor include inorganic semiconductors such as silicon and organic semiconductors containing organic compounds. In the present embodiment, an example of using an organic semiconductor as the semiconductor contained in the active layer is shown. By using an organic semiconductor, the light-emitting layer and the active layer can be formed by the same method (e.g., vacuum evaporation method), and manufacturing equipment can be used in common, so it is preferable.

[0620] The functional layer 113S may also further include a layer containing a substance with high hole transportability, a substance with high electron transportability, a bipolar substance, etc. as a layer other than the active layer. In addition, without being limited thereto, it may also further include a layer containing a substance with high hole injectability, a hole blocking material, a substance with high electron injectability, an electron blocking material, etc. As the functional layer 113S, for example, the materials that can be used for the light-emitting element described above can be used.

[0621] The light-receiving element can use a low-molecular compound or a high-molecular compound, and may also contain an inorganic compound. The layers constituting the light-receiving element can be formed by methods such as evaporation method (including vacuum evaporation method), transfer method, printing method, inkjet method, coating method, etc.

[0622] Figure 25B and Figure 25C The display device 50D shown includes a layer 353 having a light-receiving element, a circuit layer 355, and a layer 357 having a light-emitting element between the substrate 151 and the substrate 152.

[0623] The layer 353 includes, for example, the light-receiving element 130S. The layer 357 includes, for example, the light-emitting elements 130R, 130G, and 130B.

[0624] The circuit layer 355 includes a circuit for driving the light-receiving element and a circuit for driving the light-emitting element. The circuit layer 355 includes, for example, the transistors 205R, 205G, and 205B. In addition to this, one or more of a switch, a transistor, a capacitor, a resistor, a wiring, a terminal, etc. may be provided in the circuit layer 355.

[0625] Figure 25B This is an example of using the light-receiving element 130S as a touch sensor. As Figure 25B shown, when the finger 352 touching the display device 50D reflects the light emitted by the light-emitting element in the layer 357, the light-receiving element in the layer 353 detects the reflected light. Thereby, it can be detected that the finger 352 touches the display device 50D.

[0626] Figure 25C This is an example of using the light-receiving element 130S as a non-contact sensor. As Figure 25CAs shown, when a finger 352 that is close to (i.e., does not touch) the display device 50D reflects the light emitted by the light-emitting element in the layer 357, the light-receiving element in the layer 353 detects the reflected light.

[0627] [Display device 50E] Figure 26A The display device 50E shown is an example of a display device that employs an MML (Metal Mask Less) structure. That is, the display device 50E includes light-emitting elements that are manufactured without using a high-precision metal mask.

[0628] In the light-emitting elements included in a display device that applies an MML structure, the island-shaped light-emitting layer is formed by performing processing using photolithography after depositing the light-emitting layer over the entire surface. Therefore, a high-definition display device or a display device with a high aperture ratio, which has been difficult to achieve until now, can be realized. Furthermore, since the light-emitting layer can be formed separately for each color, a display device that is extremely vivid, has a high contrast, and has a high display quality can be realized. For example, when using three types of light-emitting elements that emit blue light, green light, and red light to constitute a display device, three types of island-shaped light-emitting layers can be formed by repeating the deposition of the light-emitting layer three times and the processing using photolithography.

[0629] Since a device with an MML structure can be manufactured without using a metal mask, the upper limit of the clarity due to the alignment accuracy of the metal mask can be exceeded. In addition, when manufacturing a device without using a metal mask, the equipment related to the manufacture of the metal mask and the cleaning process of the metal mask can be omitted. In addition, in the processing using photolithography, a device that is shared with or the same as the device used when manufacturing a transistor can be used, so there is no need to introduce a special device for manufacturing a device with an MML structure. As such, the MML structure can reduce the manufacturing cost and is thus suitable for mass production of devices.

[0630] In a display device that employs an MML structure, for example, there is no need to adopt a special pixel arrangement such as a Pentile arrangement to pseudo-increase the clarity, and thus a display device can be realized in which the so-called stripe arrangement in which R, G, and B sub-pixels are arranged in one direction is adopted and the clarity is high (for example, 500 ppi or more, 1000 ppi or more, 2000 ppi or more, 3000 ppi or more, or 5000 ppi or more).

[0631] In addition, by providing a sacrificial layer on the light-emitting layer, the damage to the light-emitting layer during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting element can be improved.

[0632] In addition, by adopting a deposition process using a range mask and a processing process using a resist mask, a light-emitting element can be manufactured with a relatively simple process.

[0633] Note that the stacked structure of the substrate 151 to the insulating layer 235 and the stacked structure of the protective layer 131 to the substrate 152 are the same as those of the display device 50A, so the description thereof is omitted.

[0634] In Figure 26A this, light-emitting elements 130R, 130G, and 130B are provided on the insulating layer 235.

[0635] The light-emitting element 130R includes a conductive layer 124R on the insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114. Figure 26A The illustrated light-emitting element 130R emits red light (R). The layer 133R includes a light-emitting layer that emits red light. In the light-emitting element 130R, the layer 133R and the common layer 114 may be collectively referred to as the EL layer. One or both of the conductive layer 124R and the conductive layer 126R may be referred to as a pixel electrode.

[0636] The light-emitting element 130G includes a conductive layer 124G on the insulating layer 235, a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114. Figure 26A The illustrated light-emitting element 130G emits green light (G). The layer 133G includes a light-emitting layer that emits green light. In the light-emitting element 130G, the layer 133G and the common layer 114 may be collectively referred to as the EL layer. One or both of the conductive layer 124G and the conductive layer 126G may be referred to as a pixel electrode.

[0637] The light-emitting element 130B includes a conductive layer 124B on the insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114. Figure 26A The illustrated light-emitting element 130B emits blue light (B). The layer 133B includes a light-emitting layer that emits blue light. In the light-emitting element 130B, the layer 133B and the common layer 114 may be collectively referred to as the EL layer. One or both of the conductive layer 124B and the conductive layer 126B may be referred to as a pixel electrode.

[0638] In the present specification and the like, the island-shaped layers provided for each light-emitting element in the EL layer included in the light-emitting element are denoted as layer 133R, layer 133G, or layer 133B, and the layer shared by a plurality of light-emitting elements is denoted as the common layer 114. In addition, in the present specification and the like, the layers 133R, 133G, and 133B that do not include the common layer 114 may sometimes be referred to as island-shaped EL layers, EL layers formed in an island shape, and the like. In addition, a light-emitting element manufactured without using a metal mask may not include the common layer, or all the layers constituting the EL layer may be formed in an island shape.

[0639] The layers 133R, 133G, and 133B are separated from each other. By providing an island-shaped EL layer in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, unintended light emission d...

Claims

1. A semiconductor device, comprising: a semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; and a second insulating layer, wherein the first insulating layer is located on the first conductive layer, the second conductive layer is located on the first insulating layer, the second conductive layer includes a fourth conductive layer and a fifth conductive layer, the fourth conductive layer and the fifth conductive layer contain different metals from each other, the fifth conductive layer covers at least a part of the top surface and at least a part of the side surface of the fourth conductive layer, the semiconductor layer is in contact with the top surface of the first conductive layer, the top surface and the side surfaces of the fifth conductive layer, and the side surface of the first insulating layer, the second insulating layer is located on the semiconductor layer, and the third conductive layer is located on the second insulating layer and overlaps with the semiconductor layer with the second insulating layer therebetween.

2. A semiconductor device, comprising: a semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a first insulating layer; and a second insulating layer, wherein the first insulating layer is located on the first conductive layer and has a first opening, the second conductive layer is located on the first insulating layer and has a second opening overlapping with the first opening, the second conductive layer includes a fourth conductive layer and a fifth conductive layer, the fourth conductive layer and the fifth conductive layer contain different metals from each other, the fifth conductive layer covers at least a part of the top surface and at least a part of the side surface of the fourth conductive layer, the semiconductor layer is in contact with the top surface of the first conductive layer through the first opening and the second opening, and is in contact with each of the top surface of the fifth conductive layer, the side surface in the second opening, and the side surface in the first opening of the first insulating layer, the second insulating layer is located on the semiconductor layer, and the third conductive layer is located on the second insulating layer and overlaps with the semiconductor layer with the second insulating layer therebetween.

3. The semiconductor device according to claim 2, wherein the fourth conductive layer has a third opening, and in a top view, the fifth conductive layer has the second opening inside the third opening.

4. The semiconductor device according to any one of claims 1 to 3, wherein the first conductive layer includes a sixth conductive layer and a seventh conductive layer, the sixth conductive layer and the seventh conductive layer contain different metals from each other, and the seventh conductive layer covers at least a part of the top surface and at least a part of the side surface of the sixth conductive layer.

5. The semiconductor device according to claim 4, wherein the semiconductor layer contains a metal oxide in a channel formation region, the fifth conductive layer includes a first oxide conductor layer, the seventh conductive layer includes a second oxide conductor layer, and the semiconductor layer is in contact with the first oxide conductor layer and the second oxide conductor layer.

6. The semiconductor device according to claim 4, wherein the conductivity of the fourth conductive layer is higher than that of the fifth conductive layer, and the conductivity of the sixth conductive layer is higher than that of the seventh conductive layer.

7. The semiconductor device according to claim 4, Wherein the first conductive layer includes an eighth conductive layer, the sixth conductive layer is located on the eighth conductive layer, and outside the end of the sixth conductive layer, the seventh conductive layer is in contact with the eighth conductive layer.

8. The semiconductor device according to any one of claims 1 to 3, wherein the second conductive layer includes a ninth conductive layer, the fourth conductive layer is located on the ninth conductive layer, and outside the end of the fourth conductive layer, the fifth conductive layer is in contact with the ninth conductive layer.

9. The semiconductor device according to claim 4, wherein the fifth conductive layer includes a first metal layer and a first metal oxide layer on the first metal layer, the first metal layer and the first metal oxide layer contain the same metal, the first metal layer is electrically connected to the semiconductor layer through the first metal oxide layer, the seventh conductive layer includes a second metal layer and a second metal oxide layer on the second metal layer, the second metal layer and the second metal oxide layer contain the same metal, and the second metal layer is electrically connected to the semiconductor layer through the second metal oxide layer.

10. The semiconductor device according to claim 4, wherein the sixth conductive layer includes an eighth conductive layer and a ninth conductive layer on the eighth conductive layer, and the top surface shape of the eighth conductive layer is the same as or substantially the same as the top surface shape of the ninth conductive layer.

11. The semiconductor device according to any one of claims 1 to 3, wherein the fourth conductive layer includes a tenth conductive layer and an eleventh conductive layer on the tenth conductive layer, and the top surface shape of the eleventh conductive layer is the same as or substantially the same as the top surface shape of the tenth conductive layer.

12. The semiconductor device according to any one of claims 1 to 3, wherein the first insulating layer includes a first layer containing nitrogen and silicon on the first conductive layer, a second layer containing oxygen and silicon on the first layer, and a third layer containing nitrogen and silicon on the second layer.

13. The semiconductor device according to claim 12, wherein the first insulating layer includes a fourth layer between the first conductive layer and the first layer and a fifth layer on the third layer, the fourth layer has a region with a higher hydrogen content than the first layer, and the fifth layer has a region with a higher hydrogen content than the third layer.

Images