A silicon photonic chip and 800G 2×DR4 optical engine

Abstract

The present invention relates to a silicon photonic chip, comprising a first input waveguide and multiple first output waveguides on a first side, a second input waveguide on a second side, coupled to an MPD, and a second output waveguide on a third side. The first input waveguide distributes some light to the second output waveguide, while the remaining light is distributed equally to the multiple first output waveguides. An 800G 2×DR4 optical engine comprises two silicon photonic chips arranged side by side and adjacent to each other, with the second output waveguide of one silicon photonic chip coupled to the second input waveguide of the other. The beneficial effect is that when light enters the first input waveguides of the two silicon photonic chips, the MPD of one silicon photonic chip will generate a photocurrent, while the MPD of the other will not. This allows the two silicon photonic chips to be distinguished. By monitoring the changes in the photocurrent of the MPD under high and low temperature conditions and during long-term operation, it is possible to determine whether there is relative displacement between the two silicon photonic chips.

Description

Technical Field

[0001] The present invention relates to the field of optical engine technology, and in particular to a silicon photonic chip and an 800G 2×DR4 optical engine. Background Art

[0002] In order to ensure the yield and be compatible with 400G DR4 silicon photonic chips, the traditional 800G 2×DR4 optical engine uses two 400G DR4 silicon photonic chips to make an 800G optical engine. The structure is as follows: Figure 1 As shown, it includes: two 400G DR4 silicon photonic chips, two optical transmitters and two multi-channel optical fiber arrays. Each 400G DR4 silicon photonic chip has an input waveguide and four output waveguides. The input waveguide is coupled with the input of a first 1×2 coupler. The two outputs of the first 1×2 coupler are each coupled with the input of a second 1×2 coupler. The two outputs of each second 1×2 coupler are each coupled with an output waveguide through an MZM modulator. The first 1×2 coupler and the two second 1×2 couplers split light in equal proportion, so that the light entering the input waveguide is divided into four output waveguides in equal proportion. Each optical transmitter is connected to a 400G The input waveguides of the DR4 silicon photonic chip are coupled, and each multi-channel fiber array is coupled with the four output waveguides of a 400GDR4 silicon photonic chip. The optical transmitter includes: a laser chip, a collimating lens, an optical isolator, and a converging lens coupled in sequence along the direction of light propagation. The converging lens is coupled to the input waveguide, and the laser chip is located on a ceramic heat sink. The defect of this type of 800G 2×DR4 optical engine is that the module firmware cannot distinguish between the two silicon photonic chips, which is unfavorable for performance debugging and monitoring. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a silicon photonic chip and an 800G 2×DR4 optical engine to overcome the deficiencies in the above-mentioned prior art.

[0004] The technical solution of the present invention to solve the above technical problems is as follows:

[0005] A silicon photonic chip comprises a first side, a second side adjacent to the first side and arranged in an opposite manner, and a third side. The first side comprises a first input waveguide and a plurality of first output waveguides. The second side comprises a second input waveguide coupled to an MPD. The third side comprises a second output waveguide. The first input waveguide distributes part of the light to the second output waveguide, while the remaining light is distributed in equal proportions to the plurality of first output waveguides.

[0006] The beneficial effect of the present invention is that when this type of silicon photonic chip is used in an 800G 2×DR4 optical engine, since the two silicon photonic chips have the same structure and are arranged side by side and adjacent to each other, and the second output waveguide of one of the two silicon photonic chips is coupled with the second input waveguide of the other silicon photonic chip, when light enters the first input waveguides of the two silicon photonic chips, the MPD of one of the silicon photonic chips will have photocurrent, while the MPD of the other silicon photonic chip will have no photocurrent, so that the firmware can distinguish between the two silicon photonic chips. In addition, by monitoring the changes in photocurrent of the MPD at high and low temperatures and during long-term operation, it can be clearly known whether there is relative displacement between the two silicon photonic chips, thereby effectively monitoring product reliability.

[0007] On the basis of the above technical solution, the present invention can also be improved as follows.

[0008] Furthermore, there are multiple mark points on the surface of the silicon photonic chip.

[0009] A further beneficial effect of the above method is that the two silicon photonic chips can be aligned with the mark patch to ensure that the two silicon photonic chips can be accurately coupled.

[0010] Furthermore, the multiple mark points on the upper surface of the silicon photonic chip are distributed in rows parallel to the first side.

[0011] Furthermore, the first input waveguide splits 2% of the light into the second output waveguide.

[0012] Further, the number of the first output waveguides is four.

[0013] Furthermore, the first input waveguide is coupled to the input of a first 1×2 coupler, the two outputs of the first 1×2 coupler are each coupled to the input of a second 1×2 coupler, and the two outputs of each second 1×2 coupler are each coupled to a first output waveguide via an MZM modulator.

[0014] Based on the above technical solution, the present invention also provides an 800G 2×DR4 optical engine, including: two silicon photonic chips, the two silicon photonic chips are distributed side by side and adjacent to each other, and the second output waveguide of one silicon photonic chip is coupled with the second input waveguide of the other silicon photonic chip.

[0015] The above-mentioned further beneficial effects are: since the two silicon photonic chips have the same structure, and the two silicon photonic chips are distributed side by side and adjacent to each other, and the second output waveguide of one of the two silicon photonic chips is coupled with the second input waveguide of the other silicon photonic chip, when light enters the first input waveguide of the two silicon photonic chips, the MPD of one of the silicon photonic chips will have photocurrent, while the MPD of the other silicon photonic chip will have no photocurrent, so that the firmware can distinguish between the two silicon photonic chips. In addition, by monitoring the changes in photocurrent of MPD at high and low temperatures and long-term operation, it can be clearly known whether there is relative displacement between the two silicon photonic chips, thereby effectively monitoring product reliability.

[0016] Furthermore, the first input waveguide of each silicon photonic chip is coupled to a light emitting end.

[0017] Furthermore, the light emitting end includes: a laser chip, a collimating lens, an optical isolator and a converging lens coupled in sequence along the light propagation direction, the converging lens is coupled to the first input waveguide, and the laser chip is located on a ceramic heat sink.

[0018] Furthermore, each of the multiple first output waveguides of each silicon photonic chip is coupled to a multi-channel optical fiber array. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a structural diagram of an 800G 2×DR4 optical engine in the prior art;

[0020] Figure 2 This is a structural diagram of the silicon photonic chip in the present invention;

[0021] Figure 3 This is a structural diagram of the 800G 2×DR4 optical engine in the present invention.

[0022] In the accompanying drawings, the components represented by the reference numerals are as follows:

[0023] 1. Silicon photonic chip, 110, first input waveguide, 120, first output waveguide, 130, second input waveguide, 140, MPD, 150, second output waveguide, 160, mark point, 170, first 1×2 coupler, 180, second 1×2 coupler, 190, MZM modulator, 2. Optical transmitter, 210, laser chip, 220, collimating lens, 230, optical isolator, 240, converging lens, 250, ceramic heat sink, 3. Multi-channel fiber array. DETAILED DESCRIPTION

[0024] The principles and features of the present invention are described below with reference to the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0025] Example 1

[0026] like Figure 2 As shown, a silicon photonic chip has a first side, a second side, and a third side, wherein the second side and the third side are adjacent to the first side, and the second side and the third side are arranged in an opposing manner. A first input waveguide 110 and multiple first output waveguides 120 are provided on the first side, a second input waveguide 130 is provided on the second side, and the second input waveguide 130 is coupled to the MPD 140, and a second output waveguide 150 is provided on the third side. The first input waveguide 110 distributes part of the light to the second output waveguide 150, and the rest of the light is distributed in equal proportions to the multiple first output waveguides 120. Typically, the first input waveguide 110 distributes 1% to 3% of the light to the second output waveguide 150, for example, the first input waveguide 110 distributes 2% of the light to the second output waveguide 150, and the remaining 98% of the light is distributed in equal proportions to the multiple first output waveguides 120.

[0027] When this type of silicon photonic chip is used in an 800G 2×DR4 optical engine, since the two silicon photonic chips 1 have the same structure and are arranged side by side and adjacent to each other, and the second output waveguide 150 of one of the two silicon photonic chips 1 (denoted as silicon photonic chip A) is coupled with the second input waveguide 130 of the other silicon photonic chip 1 (denoted as silicon photonic chip B), when light enters the first input waveguide 110 of the two silicon photonic chips 1, the MPD 140 of one of the silicon photonic chips 1 will have a photocurrent, while the MPD 140 of the other silicon photonic chip 1 will have no photocurrent (the principle is that after light enters the first input waveguide 110 of the silicon photonic chip A, the first The input waveguide 110 will distribute part of the light to the second output waveguide 150. Since the second output waveguide 150 of silicon photonic chip A is coupled with the second input waveguide 130 of silicon photonic chip B, light will enter the second input waveguide 130 of silicon photonic chip B and be monitored by the MPD 140 of silicon photonic chip B, thereby allowing the MPD 140 of silicon photonic chip B to have a photocurrent. In this way, the firmware can distinguish between the two silicon photonic chips 1. In addition, by monitoring the changes in the photocurrent of MPD 140 at high and low temperatures and long-term operation, it can be clearly known whether there is a relative displacement between the two silicon photonic chips 1, thereby effectively monitoring product reliability.

[0028] Example 2

[0029] like Figure 2 As shown, this embodiment is a further improvement on the basis of embodiment 1, specifically as follows:

[0030] There are multiple mark points 160 on the surface of the silicon photonic chip 1. Multiple can refer to two, three, four, five, six, etc., and there are four in the figure shown here. Of course, four is just an exemplary expression. The number can be adjusted during actual application. The two silicon photonic chips 1 are exactly the same, and the silicon photonic chip 1 is designed with a mark point 160. The two silicon photonic chips 1 are aligned with the mark point 160 for patching. Since the silicon photonic chip 1 is cut from a wafer and has the same thickness, it is sufficient to ensure that the patch accuracy is ±10μm.

[0031] Furthermore, the multiple mark points 160 on the upper surface of the silicon photonic chip 1 are distributed in rows parallel to the first side.

[0032] Example 3

[0033] like Figure 2 As shown, this embodiment is a further improvement on the basis of embodiment 1 or 2, specifically as follows:

[0034] The first input waveguide 110 can be designed to distribute 2% of the light to the second output waveguide 150. Of course, this is just an exemplary statement. In actual application, it is not ruled out that other proportions of light can be distributed to the second output waveguide 150, such as 1%, 3%, etc.

[0035] Example 4

[0036] like Figure 2 As shown, this embodiment is a further improvement on the basis of any one of the embodiments 1 to 3, and the details are as follows:

[0037] The number of the first output waveguides 120 is preferably four, and in this case, the silicon photonic chip is a 400G DR4 silicon photonic chip.

[0038] Furthermore, the first input waveguide 110 is coupled to the input of a first 1×2 coupler 170, and the two outputs of the first 1×2 coupler 170 are each coupled to the input of a second 1×2 coupler 180, that is, there are two second 1×2 couplers 180, and the two outputs of each second 1×2 coupler 180 are each coupled to a first output waveguide 120 via an MZM modulator 190, that is, there are four MZM modulators 190. The first 1×2 coupler 170 and the two second 1×2 couplers 180 all split light in equal proportions, thereby achieving the goal of splitting the light entering the first input waveguide 110 into the four first output waveguides 120 in equal proportions.

[0039] Example 5

[0040] like Figure 2 、 Figure 3As shown, an 800G 2×DR4 optical engine includes: two silicon photonic chips 1 as described in any of embodiments 1 to 4, the two silicon photonic chips 1 are arranged side by side and adjacent to each other, and the second output waveguide 150 of one of the two silicon photonic chips 1 is coupled to the second input waveguide 130 of the other silicon photonic chip 1.

[0041] Since the two silicon photonic chips 1 have the same structure and are arranged side by side and adjacent to each other, and the second output waveguide 150 of one of the two silicon photonic chips 1 (denoted as silicon photonic chip A) is coupled with the second input waveguide 130 of the other silicon photonic chip 1 (denoted as silicon photonic chip B), when light enters the first input waveguide 110 of the two silicon photonic chips 1, the MPD 140 of one of the silicon photonic chips 1 will have a photocurrent, while the MPD 140 of the other silicon photonic chip 1 will have no photocurrent (the principle is that after light enters the first input waveguide 110 of the silicon photonic chip A, the first input waveguide 110 0 will distribute the light to the second output waveguide 150. Since the second output waveguide 150 of silicon photonic chip A is coupled with the second input waveguide 130 of silicon photonic chip B, light will enter the second input waveguide 130 of silicon photonic chip B and be monitored by the MPD 140 of silicon photonic chip B, so that the MPD 140 of silicon photonic chip B will have a photocurrent. Therefore, the firmware can distinguish between the two silicon photonic chips 1. In addition, by monitoring the changes in the photocurrent of MPD 140 at high and low temperatures and long-term operation, it can be clearly known whether there is a relative displacement between the two silicon photonic chips 1, thereby effectively monitoring product reliability.

[0042] Example 6

[0043] like Figure 3 As shown, this embodiment is a further improvement on the basis of embodiment 5, specifically as follows:

[0044] The first input waveguide 110 of each silicon photonic chip 1 is coupled to one light emitting end 2 , that is, the light emitted by each light emitting end 2 is coupled into the first input waveguide 110 of one silicon photonic chip 1 .

[0045] Furthermore, the light emitting end 2 includes: a laser chip 210, a collimating lens 220, an optical isolator 230 and a converging lens 240 coupled in sequence along the light propagation direction. The converging lens 240 is coupled to the first input waveguide 110. The laser chip 210 is located on a ceramic heat sink 250. That is, the light emitted by the laser chip 210 is coupled into the first input waveguide 110 of the silicon photonic chip 1 after passing through the collimating lens 220, the optical isolator 230 and the converging lens 240 in sequence.

[0046] The multiple first output waveguides 120 of each silicon photonic chip 1 are each coupled to a multi-channel optical fiber array 3 .

[0047] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A silicon photonic chip, characterized in that: The invention comprises a first side, a second side and a third side adjacent to the first side and distributed in an opposite manner, wherein a first input waveguide (110) and a plurality of first output waveguides (120) are provided on the first side, a second input waveguide (130) is provided on the second side, and the second input waveguide (130) is coupled to an MPD (140), and a second output waveguide (150) is provided on the third side; the first input waveguide (110) distributes part of the light to the second output waveguide (150), and the rest of the light is distributed in equal proportions to the plurality of first output waveguides (120).

2. The silicon photonic chip according to claim 1, wherein: There are a plurality of mark points (160) on the upper surface.

3. The silicon photonic chip according to claim 2, wherein: The plurality of mark points (160) on the upper surface are distributed in rows in a manner parallel to the first side.

4. The silicon photonic chip according to claim 1, wherein: The first input waveguide (110) splits 2% of the light into the second output waveguide (150).

5. The silicon photonic chip according to claim 1, wherein: The number of the first output waveguides (120) is four.

6. The silicon photonic chip according to claim 1, characterized in that: The first input waveguide (110) is coupled to an input of a first 1×2 coupler (170), two outputs of the first 1×2 coupler (170) are each coupled to an input of a second 1×2 coupler (180), and two outputs of each second 1×2 coupler (180) are each coupled to a first output waveguide (120) via an MZM modulator (190).

7. An 800G 2×DR4 optical engine, characterized in that: include: Two silicon photonic chips according to any one of claims 1 to 6 are arranged side by side and adjacent to each other, and the second output waveguide (150) of one silicon photonic chip is coupled to the second input waveguide (130) of the other silicon photonic chip.

8. The 800G 2×DR4 optical engine according to claim 7, characterized in that: The first input waveguide (110) of each silicon photonic chip is coupled to a light emitting end (2).

9. The 800G 2×DR4 optical engine according to claim 8, characterized in that: The light emitting end (2) comprises: a laser chip (210), a collimating lens (220), an optical isolator (230), and a converging lens (240) coupled in sequence along a light propagation direction; the converging lens (240) is coupled to a first input waveguide (110); and the laser chip (210) is located on a ceramic heat sink (250).

10. The 800G 2×DR4 optical engine according to claim 7, characterized in that: Each silicon photonic chip has a plurality of first output waveguides (120) each coupled to a multi-channel optical fiber array (3).

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