Eight-output symmetric reference source generation circuit

Abstract

The invention provides an eight-output symmetric reference source generation circuit, which comprises a precise reference voltage source, an eight-output symmetric reference source, an eight-output symmetric reference source and an eight-output symmetric reference source, the voltage buffer circuit adopts a unit gain operational amplifier to realize voltage following, and the input end of the voltage buffer circuit is connected with the output end of the precise reference voltage source; the symmetric voltage generation circuit is used for generating N-time reference voltage in positive and negative symmetry, and the input end of the symmetric voltage generation circuit is connected with the output end of the voltage buffer circuit; the input end of the loop adjusting circuit is connected with the output end of the symmetrical voltage generating circuit; and the filtering and feedback adjusting circuit is connected between the quadruple reference voltage output end and the reference voltage source. According to the invention, four groups of reference voltages with high symmetry and opposite polarities among a plurality of outputs are ensured in a series resistor constant-current boosting mode, and meanwhile, equal current is generated by quadruple source configuration by adopting a balance resistor and is sent to a reference power supply chip to form closed-loop negative feedback, so that the stability of the final output is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and particularly to an eight-output symmetric reference source generation circuit capable of generating a symmetric reference voltage inside a precision measuring instrument. Background Art

[0002] With the continuous development of modern electronic technology, many electronic systems require precise and stable reference power supplies to ensure the reliability and performance of their respective modules, especially in the fields of high-precision measurement, data conversion, sensor drive, and analog signal processing.

[0003] During the operation of traditional multi-output reference source circuits, they are often affected by factors such as power supply noise and load changes, resulting in unstable output voltage and poor symmetry, which affects the overall performance of the system. In addition, existing circuits usually have problems such as complex design, high power consumption, and large size, and cannot meet the requirements of modern electronic systems for high precision, low power consumption, and miniaturization. Therefore, innovative technologies and designs are needed to solve these problems and improve the stability, symmetry, and integration of multi-output reference source circuits. Summary of the Invention

[0004] To overcome the existing problems and defects, the present invention proposes an eight-output symmetric reference source generation circuit, which is characterized by including: A precision reference voltage source, including a voltage source, a voltage-dividing resistor, and a filtering capacitor, for generating an initial reference voltage +VR0; A voltage buffer circuit, which uses a unity-gain operational amplifier to achieve voltage following, and its input terminal is connected to the output terminal of the precision reference voltage source; A symmetric voltage generation circuit, including a dual operational amplifier and a precision resistor array, for generating positive and negative symmetric 1-fold, 2-fold, 3-fold, and 4-fold reference voltages, and its input terminal is connected to the output terminal of the voltage buffer circuit; A loop adjustment circuit, which provides a driving current and adjusts the loop voltage to ensure the stability of the output voltage, and its input terminal is connected to the output terminal of the symmetric voltage generation circuit; A filtering and feedback adjustment circuit, including a multi-stage RC network and a balancing resistor, is connected between the four-fold reference voltage output terminal and the reference voltage source.

[0005] Furthermore, the precision reference voltage source includes a reference voltage source chip U1, a first resistor R1, a first capacitor C1, and a second capacitor C2; Pin 4 of the reference voltage source chip U1 is connected to the -15V power supply. Pin 3 of the reference voltage source chip U1 is connected to the +15V power supply and serves as a common terminal connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to Pin 1 of the reference voltage source chip U1 and serves as the output terminal (+VR0) of the precision reference voltage source, which is connected to one end of the first capacitor C1 and one end of the second capacitor C2. Pin 2 of the reference voltage source chip U1 is connected to the other end of the first capacitor C1 and the other end of the second capacitor C2, and then connected to GND.

[0006] Further, the voltage buffer circuit includes a precision operational amplifier U2 and a second resistor R2; The second resistor R2 is connected to the positive input terminal of the precision operational amplifier U2. The negative input terminal of the precision operational amplifier U2 is connected to the output terminal. Pin 7 of the precision operational amplifier U2 is connected to the +15V power supply, and Pin 4 of the precision operational amplifier U2 is connected to GND.

[0007] Further, the symmetrical voltage generation circuit includes a dual-channel precision operational amplifier U3, a precision resistor array R3, a third capacitor C3, and a fourth capacitor C4. The dual-channel precision operational amplifier U3 consists of precision operational amplifiers U3A and U3B. The precision resistor array R3 consists of precision resistors R3A, R3B, R3C, R3D, R3E, R3F, R3G, and R3H. One end of the precision resistor R3G is connected to one end of the precision resistor R3E and serves as the positive triple output terminal (+3VR1). The other end of the precision resistor R3E is connected to one end of the precision resistor R3C and serves as the positive double output terminal (+2VR1). The other end of the precision resistor R3C is connected to one end of the precision resistor R3A and serves as a common terminal, which is connected to the negative terminal of the precision operational amplifier U3A and one end of the third capacitor C3 and serves as the positive single output terminal (+VR1). The other end of the third capacitor C3 is connected to the output terminal of the precision operational amplifier U3A. The other end of the precision resistor R3A is connected to one end of the precision resistor R3B and serves as a common terminal, which is connected to the negative terminal of the precision operational amplifier U3B and one end of the fourth capacitor C4. The other end of the fourth capacitor C4 is connected to the output terminal of the precision operational amplifier U3B. The other end of the precision resistor R3B is connected to one end of the precision resistor R3D and serves as the negative single output terminal (-VR1). The other end of the precision resistor R3D is connected to one end of the precision resistor R3F and serves as the negative double output terminal (-2VR1). The other end of the precision resistor R3F is connected to one end of the precision resistor R3H and serves as the negative triple output terminal (-3VR1).

[0008] Further, the loop adjustment circuit includes a first triode Q1, a second triode Q2, a first constant current diode D1, a second constant current diode D2, a first zener diode Z1, a second zener diode Z2, a fourth resistor R4, and a fifth resistor R5; The emitter of the first triode Q1 is connected to the other end of the precision resistor R3G as the positive quadruple output terminal (+4VR1). The collector of the first triode Q1 is connected to the positive 30V power supply. The base of the first triode Q1 is connected to one end of the fourth resistor R4 as the common terminal and is connected to the cathode of the first voltage stabilizing diode Z1. The anode of the first voltage stabilizing diode Z1 is connected to the output terminal of the precision operational amplifier U3A. The other end of the fourth resistor R4 is connected to the anode of the first constant current diode D1. The cathode of the first constant current diode D1 is connected to the positive 30V power supply. Similarly, the emitter of the second triode Q2 is connected to the other end of the precision resistor R3H as the negative quadruple output terminal (-4VR1). The collector of the second triode Q2 is connected to the negative 30V power supply. The base of the second triode Q2 is connected to one end of the fifth resistor R5 as the common terminal and is connected to the anode of the second voltage stabilizing diode Z2. The cathode of the second voltage stabilizing diode Z2 is connected to the output terminal of the precision operational amplifier U3B. The other end of the fifth resistor R5 is connected to the cathode of the second constant current diode D2. The anode of the second constant current diode D2 is connected to the negative 30V power supply.

[0009] Furthermore, the filtering and feedback regulation circuit includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8; One end of the seventh resistor R7 is connected to one end of the fifth capacitor C5 as the common terminal and is connected to the emitter of the first triode Q1. The other end of the seventh resistor R7 is connected to one end of the sixth capacitor C6 as the common terminal and is connected to one end of the eighth resistor R8. The other end of the eighth resistor R8 is connected to one end of the seventh capacitor C7 as the common terminal and is connected to one end of the ninth resistor R9. The other end of the ninth resistor R9 is connected to one end of the eighth capacitor C8 as the common terminal and is connected to the emitter of the second triode Q2. The other ends of the remaining fifth capacitor C5, sixth capacitor C6, seventh capacitor C7, and eighth capacitor C8 are connected together and then connected to GND. One end of the sixth resistor R6 is connected to the output terminal of the precision reference voltage source (+VR0). The other end of the sixth resistor R6 is connected to the positive quadruple output terminal (+4VR1). One end of the tenth resistor R10 is connected to GND. The other end of the tenth resistor R10 is connected to the negative quadruple output terminal (-4VR1).

[0010] Furthermore, the precision resistor array R3 is made of a high-stability alloy material to ensure that it is not easily affected by oxidation under special environmental conditions. And it satisfies R3A = R3C = R3E = R3G = R3B = R3D = R3F = R3H.

[0011] Further, the resistance value of the sixth resistor R6 is 0.75 times that of the tenth resistor R10, i.e., R6 = 0.75R10.

[0012] Further, the constant current values of the first constant current diode D1 and the second constant current diode D2 are 1 mA.

[0013] Further, the voltage stabilization values of the first voltage stabilizing diode Z1 and the second voltage stabilizing diode Z2 are 10 V.

[0014] Advantages of the present invention: The present invention provides an eight-output symmetric reference source generation circuit, which can generate four groups of reference voltages with equal magnitudes and opposite polarities. This circuit ensures a high degree of symmetry among multiple outputs by means of series resistance constant current boosting, and uses balanced resistors to generate equal currents from a quadruple source configuration and send them to the reference power supply chip, forming a closed-loop negative feedback to stabilize the output voltage of the reference power supply chip. When the loads at the positive and negative output terminals are unbalanced, the output current of the reference source is automatically adjusted, thereby ensuring the stability of the final output. Description of the Drawings

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0016] Figure 1 It is the circuit diagram of the present invention. Detailed Embodiments

[0017] The following will describe the present application in conjunction with specific embodiments: Embodiment

[0018] The eight-output symmetric reference source generation circuit provided in this embodiment is as Figure 1 shown, including a precision reference voltage source, a voltage buffer circuit, a symmetric voltage generation circuit, a loop adjustment circuit, and a filtering and feedback adjustment circuit. The output terminal of the precision reference voltage source is connected to the input terminal of the voltage buffer circuit, the output terminal of the voltage buffer circuit is connected to the input terminal of the symmetric voltage generation circuit, the output terminal of the symmetric voltage generation circuit is respectively connected to the input terminal of the loop adjustment circuit and the first input terminal of the filtering and feedback adjustment circuit, and the second input terminal of the filtering and feedback adjustment circuit is connected to the output terminal of the precision reference voltage source.

[0019] The precision reference voltage source of the present invention includes: a reference voltage source chip U1, a first resistor R1, a first capacitor C1, and a second capacitor C2. The 4th pin of the reference voltage source chip U1 is connected to the -15V power supply, and the 3rd pin of the reference voltage source chip U1 and the +15V power supply are connected as a common terminal to one end of the first resistor R1. The other end of the first resistor R1 is connected to the 1st pin of the reference voltage source chip U1 as the output terminal (+VR0) of the precision reference voltage source and is connected to one end of the first capacitor C1 and one end of the second capacitor C2. The 2nd pin of the reference voltage source chip U1 is connected to the other end of the first capacitor C1 and the other end of the second capacitor C2 and then connected to GND. This precision reference voltage source is powered by a set of ±15V power supplies. A resistor R1 is connected between the +15V power supply and the output terminal (+VR0) of the precision reference voltage source to provide a feedback path, thereby improving the output stability and regulation accuracy and ensuring that the reference voltage source chip can output a reference level with good stability and high accuracy.

[0020] The reference voltage source U1 is powered by ±15V. By setting the shunt current through R1, the initial reference voltage +VR0 is generated. The capacitors C1 / C2 filter out high-frequency noise and establish a stable DC reference.

[0021] The voltage buffer circuit includes: a precision operational amplifier U2 and a second resistor R2. The second resistor R2 is connected to the positive input terminal of the precision operational amplifier U2. The negative input terminal of the precision operational amplifier U2 is connected to the output terminal. The 7th pin of the precision operational amplifier U2 is connected to the +15V power supply, and the 4th pin of the precision operational amplifier U2 is connected to GND. This voltage buffer circuit isolates the reference voltage source from the load circuit, avoiding interference from the load to the reference voltage source. After being buffered by the operational amplifier, the output voltage of the reference voltage source is hardly affected by the change of the load, that is, the accuracy of the voltage source will not be significantly interfered by the change of the load. The precision operational amplifier U2 adopts rail-to-rail input and output technology, improving the flexibility of system design. The precision operational amplifier has characteristics such as low noise, low power consumption, and high common-mode rejection ratio.

[0022] After the reference voltage +VR0 passes through R2 (100Ω current limiting), the positive input terminal of U2 and the output terminal of U2 are maintained at the same potential (maintaining the +VR0 voltage). The voltage buffer circuit isolates the reference source from the subsequent stage and prevents the change of the load from affecting the reference accuracy.

[0023] The symmetric voltage generation circuit includes: a dual-channel precision operational amplifier U3, a precision resistor array R3, a third capacitor C3, and a fourth capacitor C4. The dual-channel precision operational amplifier U3 consists of precision operational amplifiers U3A and U3B, and the precision resistor array R3 consists of precision resistors R3A, R3B, R3C, R3D, R3E, R3F, R3G, and R3H. One end of the precision resistor R3G is connected to one end of the precision resistor R3E as the positive triple output terminal (+3VR1), the other end of the precision resistor R3E is connected to one end of the precision resistor R3C as the positive double output terminal (+2VR1), the other end of the precision resistor R3C is connected to one end of the precision resistor R3A as the common terminal and the negative terminal of the precision operational amplifier U3A, and one end of the third capacitor C3 is connected as the positive single output terminal (+VR1), the other end of the third capacitor C3 is connected to the output terminal of the precision operational amplifier U3A, the other end of the precision resistor R3A is connected to one end of the precision resistor R3B as the common terminal and the negative terminal of the precision operational amplifier U3B, and one end of the fourth capacitor C4 is connected, the other end of the fourth capacitor C4 is connected to the output terminal of the precision operational amplifier U3B, the other end of the precision resistor R3B is connected to one end of the precision resistor R3D as the negative single output terminal (-VR1), the other end of the precision resistor R3D is connected to one end of the precision resistor R3F as the negative double output terminal (-2VR1), and the other end of the precision resistor R3F is connected to one end of the precision resistor R3H as the negative triple output terminal (-3VR1). The symmetric voltage generation circuit generates four groups of reference voltages with good symmetry by applying a fixed voltage to a precision resistor through a dual-channel precision operational amplifier in cooperation with a precision resistor array and boosting the voltage with a constant current in series resistors.

[0024] The symmetric voltage generation circuit is divided into a positive polarity channel and a negative polarity channel. For the positive polarity channel, it forms a non-inverting amplifier with the operational amplifier U3A, and the gain is determined by the voltage division of R3A - R3G. The voltage at the negative input terminal of U3A, +VR1 = +VR0, and the output current flows through R3A → R3C → R3E → R3G. Based on the equal resistance values of the resistors in the R3 array, the voltage boost amplitude is the same. Since the negative potential of U3A in the negative polarity channel is ground and the voltage difference across R3A is +VR0, for each resistor passed through in R3A → R3C → R3E → R3G, the voltage is boosted by one time +VR0. The forced virtual short at the input terminals of the operational amplifiers U3A and U3B can ensure that the voltage across RA3 is constant, thereby maintaining the precise voltage ratio at each node.

[0025] The loop adjustment circuit includes: the first triode Q1, the second triode Q2, the first constant current diode D1, the second constant current diode D2, the first zener diode Z1, the second zener diode Z2, the fourth resistor R4, and the fifth resistor R5. The emitter of the first triode Q1 is connected to the other end of the precision resistor R3G as the positive quadruple output terminal (+4VR1). The collector of the first triode Q1 is connected to the +30V power supply. The base of the first triode Q1 is connected to one end of the fourth resistor R4 as the common terminal and is connected to the cathode of the first zener diode Z1. The anode of the first zener diode Z1 is connected to the output terminal of the precision operational amplifier U3A. The other end of the fourth resistor R4 is connected to the anode of the first constant current diode D1. The cathode of the first constant current diode D1 is connected to the +30V power supply. Similarly, the emitter of the second triode Q2 is connected to the other end of the precision resistor R3H as the negative quadruple output terminal (-4VR1). The collector of the second triode Q2 is connected to the -30V power supply. The base of the second triode Q2 is connected to one end of the fifth resistor R5 as the common terminal and is connected to the anode of the second zener diode Z2. The cathode of the second zener diode Z2 is connected to the output terminal of the precision operational amplifier U3B. The other end of the fifth resistor R5 is connected to the cathode of the second constant current diode D2. The anode of the second constant current diode D2 is connected to the -30V power supply. The loop adjustment circuit forms a loop around the triodes Q1 and Q2 in a common collector connection method, providing a driving current and adjusting the loop voltage to ensure that the circuit can still maintain the stability and high precision of the output voltage under load changes and other interference conditions. Among them, the constant current values of the first constant current diode D1 and the second constant current diode D2 are 1mA. The constant current diodes have characteristics such as overheat protection, high stability, and low power consumption. The zener voltage values of the first zener diode Z1 and the second zener diode Z2 are 10V. The zener diodes have characteristics such as high precision, high stability, and low power consumption.

[0026] The triode Q1 has a common collector structure. The emitter voltage is +4VR1, and the base voltage = +4VR1 + Vbe(Q1). The constant current source D1 provides a 1mA base drive current to ensure that Q1 operates in the linear region. The triode Q2 works on the same principle, and the emitter outputs a voltage of -4VR1.

[0027] The filtering and feedback adjustment circuit includes: the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the tenth resistor R10, the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7, and the eighth capacitor C8. One end of the seventh resistor R7 is connected to one end of the fifth capacitor C5 as a common terminal and is connected to the emitter of the first triode Q1. The other end of the seventh resistor R7 is connected to one end of the sixth capacitor C6 as a common terminal and is connected to one end of the eighth resistor R8. The other end of the eighth resistor R8 is connected to one end of the seventh capacitor C7 as a common terminal and is connected to one end of the ninth resistor R9. The other end of the ninth resistor R9 is connected to one end of the eighth capacitor C8 as a common terminal and is connected to the emitter of the second triode Q2. The other ends of the remaining fifth capacitor C5, sixth capacitor C6, seventh capacitor C7, and eighth capacitor C8 are connected together and then connected to GND. One end of the sixth resistor R6 is connected to the output terminal (+VR0) of the precision reference voltage source. The other end of the sixth resistor R6 is connected to the positive quadruple output terminal (+4VR1). One end of the tenth resistor R10 is connected to GND. The other end of the tenth resistor R10 is connected to the negative quadruple output terminal (-4VR1). The sixth resistor R6 and the tenth resistor R10 are precision resistors. The resistance value of the sixth resistor R6 is 0.75 times that of the tenth resistor R10.

[0028] The multi-stage RC filtering and feedback adjustment circuit attenuates the noise of different frequency bands step by step through the way of step-by-step filtering and isolates the fluctuations between the output ports, thereby improving the stability of the output.

[0029] At the same time, a balanced resistor is used to generate equal current from the quadruple source configuration and send it to the output terminal of the reference power supply chip. The closed-loop negative feedback adjustment system ensures that the precision shunt reference voltage source can provide a high-precision and high-stability output voltage. It includes: Positive path: +4VR1 → the sixth resistor R6 (resistance value 0.75R10) → the output terminal +VR0 of the precision reference voltage source; Negative path: GND → the tenth resistor R10 → -4VR1.

[0030] By designing R6 = 0.75R10, the currents of the two paths are forced to be equal, realizing the absolute symmetry of the positive and negative quadruple voltages:

[0031] That is:

[0032] The symmetric output is forced to be realized in principle.

[0033] When the load of the +4VR1 output terminal increases and causes the voltage to drop, the system dynamically adjusts in the following order: (1) Current change detection: The current flowing through R6 decreases (ΔI = (original current - new current)); The reference voltage source U1 detects the voltage fluctuation at the +VR0 terminal through an internal error amplifier.

[0034] (2) Shunt regulation response: The internal MOSFET of U1 adjusts the shunt current; Compensation formula:

[0035] where Kp = 10 mA / V and Ki = 1 mA / (V·s); (3) Voltage recovery process: The shunt current increases → the output impedance of U1 decreases → the voltage at +VR0 rises; It is quickly transmitted to the symmetric voltage generation circuit through the buffer stage U2.

[0036] The filtering and feedback regulation circuit provided in this embodiment can enable the circuit to maintain sub-millivolt-level symmetry accuracy of four groups of reference voltages under harsh conditions such as load mutation and temperature fluctuation.

[0037] The circuit of the present invention can generate four groups of symmetric reference voltages. A highly stable reference voltage is generated by a reference voltage source chip and applied to a precision resistor, and four groups of reference voltages with good symmetry are generated in the way of constant-current boosting with series resistors. This circuit solves the problem that the two outputs of the traditional symmetric reference voltage source float up and down due to temperature changes and load imbalance in practical applications. It is composed of a reference voltage source chip (U1), a precision operational amplifier (U2), a dual-channel precision operational amplifier (U3), constant-current diodes (D1, D2), zener diodes (Z1, Z2) and a triode, and has extremely high symmetry and stability.

[0038] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other.

Claims

1. An eight-output symmetric reference source generation circuit, characterized in that Comprising: A precision reference voltage source, including a voltage source, a voltage-dividing resistor, and a filtering capacitor, for generating an initial reference voltage +VR0; A voltage buffer circuit, implemented by a unity-gain operational amplifier to achieve voltage following, whose input terminal is connected to the output terminal of the precision reference voltage source; A symmetric voltage generation circuit, including a dual operational amplifier and a precision resistor array, for generating positive and negative symmetric reference voltages of 1 times, 2 times, 3 times, and 4 times, whose input terminal is connected to the output terminal of the voltage buffer circuit; A loop adjustment circuit, providing a driving current and adjusting the loop voltage to ensure the stability of the output voltage, whose input terminal is connected to the output terminal of the symmetric voltage generation circuit; A filtering and feedback adjustment circuit, including a multi-stage RC network and a balancing resistor, connected between the quadruple reference voltage output terminal and the reference voltage source.

2. The eight-output symmetric reference source generation circuit according to claim 1, characterized in that: The precision reference voltage source includes a reference voltage source chip U1, a first resistor R1, a first capacitor C1, and a second capacitor C2; Pin 4 of the reference voltage source chip U1 is connected to the -15V power supply, pin 3 of the reference voltage source chip U1 and the +15V power supply are connected as a common terminal and connected to one end of the first resistor R1, the other end of the first resistor R1 is connected to pin 1 of the reference voltage source chip U1 as the output terminal (+VR0) of the precision reference voltage source and connected to one end of the first capacitor C1 and one end of the second capacitor C2, and pin 2 of the reference voltage source chip U1 is connected to the other end of the first capacitor C1 and the other end of the second capacitor C2 and then connected to GND.

3. The eight-output symmetric reference source generation circuit according to claim 2, characterized in that: The voltage buffer circuit includes a precision operational amplifier U2 and a second resistor R2; The second resistor R2 is connected to the positive input terminal of the precision operational amplifier U2, the negative input terminal of the precision operational amplifier U2 is connected to the output terminal, pin 7 of the precision operational amplifier U2 is connected to the +15V power supply, and pin 4 of the precision operational amplifier U2 is connected to GND.

4. The eight-output symmetric reference source generation circuit according to claim 3, characterized in that: The symmetric voltage generation circuit includes a dual-channel precision operational amplifier U3, a precision resistor array R3, a third capacitor C3, and a fourth capacitor C4; wherein the dual-channel precision operational amplifier U3 is composed of precision operational amplifiers U3A and U3B, and the precision resistor array R3 is composed of precision resistors R3A, R3B, R3C, R3D, R3E, R3F, R3G, and R3H; One end of the precision resistor R3G is connected to one end of the precision resistor R3E as the positive triple output terminal (+3VR1). The other end of the precision resistor R3E is connected to one end of the precision resistor R3C as the positive double output terminal (+2VR1). The other end of the precision resistor R3C is connected to one end of the precision resistor R3A as the common terminal and is connected to the negative terminal of the precision operational amplifier U3A and one end of the third capacitor C3 as the positive single output terminal (+VR1). The other end of the third capacitor C3 is connected to the output terminal of the precision operational amplifier U3A. The other end of the precision resistor R3A is connected to one end of the precision resistor R3B as the common terminal and is connected to the negative terminal of the precision operational amplifier U3B and one end of the fourth capacitor C4. The other end of the fourth capacitor C4 is connected to the output terminal of the precision operational amplifier U3B. The other end of the precision resistor R3B is connected to one end of the precision resistor R3D as the negative single output terminal (-VR1). The other end of the precision resistor R3D is connected to one end of the precision resistor R3F as the negative double output terminal (-2VR1). The other end of the precision resistor R3F is connected to one end of the precision resistor R3H as the negative triple output terminal (-3VR1).

5. The eight-output symmetric reference source generation circuit according to claim 4, characterized in that: The loop adjustment circuit includes a first triode Q1, a second triode Q2, a first constant current diode D1, a second constant current diode D2, a first zener diode Z1, a second zener diode Z2, a fourth resistor R4, and a fifth resistor R5; The emitter of the first triode Q1 is connected to the other end of the precision resistor R3G as the positive quadruple output terminal (+4VR1). The collector of the first triode Q1 is connected to the positive 30V power supply. The base of the first triode Q1 is connected to one end of the fourth resistor R4 as the common terminal and is connected to the cathode of the first zener diode Z1. The anode of the first zener diode Z1 is connected to the output terminal of the precision operational amplifier U3A. The other end of the fourth resistor R4 is connected to the anode of the first constant current diode D1. The cathode of the first constant current diode D1 is connected to the positive 30V power supply. Similarly, the emitter of the second triode Q2 is connected to the other end of the precision resistor R3H as the negative quadruple output terminal (-4VR1). The collector of the second triode Q2 is connected to the negative 30V power supply. The base of the second triode Q2 is connected to one end of the fifth resistor R5 as the common terminal and is connected to the anode of the second zener diode Z2. The cathode of the second zener diode Z2 is connected to the output terminal of the precision operational amplifier U3B. The other end of the fifth resistor R5 is connected to the cathode of the second constant current diode D2. The anode of the second constant current diode D2 is connected to the negative 30V power supply.

6. The eight-output symmetric reference source generation circuit according to claim 5, characterized in that: The filtering and feedback adjustment circuit includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, and an eighth capacitor C8; One end of the seventh resistor R7 is connected to one end of the fifth capacitor C5 as a common terminal and is connected to the emitter of the first triode Q1. The other end of the seventh resistor R7 is connected to one end of the sixth capacitor C6 as a common terminal and is connected to one end of the eighth resistor R8. The other end of the eighth resistor R8 is connected to one end of the seventh capacitor C7 as a common terminal and is connected to one end of the ninth resistor R9. The other end of the ninth resistor R9 is connected to one end of the eighth capacitor C8 as a common terminal and is connected to the emitter of the second triode Q2. The other ends of the remaining fifth capacitor C5, sixth capacitor C6, seventh capacitor C7, and eighth capacitor C8 are connected together and connected to GND. One end of the sixth resistor R6 is connected to the output terminal (+VR0) of the precision reference voltage source. The other end of the sixth resistor R6 is connected to the positive quadruple output terminal (+4VR1). One end of the tenth resistor R10 is connected to GND. The other end of the tenth resistor R10 is connected to the negative quadruple output terminal (-4VR1).

7. An eight-output symmetric reference source generation circuit according to claim 6, characterized in that: Each resistor in the precision resistor array R3 is made of a high-stability alloy material, and R3A = R3C = R3E = R3G = R3B = R3D = R3F = R3H is satisfied.

8. An eight-output symmetric reference source generation circuit according to claim 6, characterized in that: The resistance value of the sixth resistor R6 is 0.75 times that of the tenth resistor R10.

9. An eight-output symmetric reference source generation circuit according to claim 6, characterized in that: The constant current values of the first constant current diode D1 and the second constant current diode D2 are 1 mA.

10. An eight-output symmetric reference source generation circuit according to claim 6, characterized in that: The voltage stabilization values of the first voltage stabilizing diode Z1 and the second voltage stabilizing diode Z2 are 10 V.

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