Foldable display panel and electronic equipment

Abstract

The invention provides a foldable display panel and electronic equipment, and relates to the technical field of folding display. The scanning direction of the first scanning drive circuit is consistent with the transmission direction of the output signal of the signal bus in the first scanning drive circuit, and the scanning direction of the second scanning drive circuit is consistent with the transmission direction of the output signal of the signal bus in the second scanning drive circuit. The scanning direction of the first scanning driving circuit is opposite to the scanning direction of the second scanning driving circuit, so that the transmission direction of the output signal of the signal bus in the first scanning driving circuit is opposite to the transmission direction of the output signal in the first scanning driving circuit; therefore, the delay when the output signal of the signal bus is transmitted to the far end of the first scanning driving circuit and the delay when the output signal of the signal bus is transmitted to the near end of the second scanning driving circuit tend to be the same, the screen splitting problem of the foldable display panel at the folding line of the first display area and the second display area is solved, and the display effect of the foldable display panel is improved.

Description

Technical Field

[0001] The present application relates to the technical field of foldable display, and more specifically, to a foldable display panel and an electronic device. Background Art

[0002] Nowadays, display devices of portable terminals such as mobile phones and tablet computers are extremely popular. However, with the continuous development of display technology, people have put forward higher pursuits for display devices. They hope to have a large-screen and large-field-of-view usage experience when using the devices, and also hope to have good portability when not in use. To meet this demand, foldable display devices have been mass-produced and are typical representatives that combine a large screen and portability. However, the display effect of existing foldable display panels is poor, and a split-screen problem will occur at the folding line between two adjacent display areas. Summary of the Invention

[0003] In view of this, the present application provides a foldable display panel and an electronic device, which effectively solve the technical problems existing in the prior art, improve the split-screen problem at the folding line between the first display area and the second display area of the foldable display panel, and improve the display effect of the foldable display panel.

[0004] To achieve the above object, the technical solutions provided by the present application are as follows:

[0005] A foldable display panel, the foldable display panel includes a display area and a non-display area, and the display area includes a pixel circuit;

[0006] The display area includes a first display area and a second display area arranged adjacent to each other; the non-display area includes a first non-display area and a second non-display area; the first non-display area, the first display area, and the second display area are arranged in sequence along a first direction; the second non-display area is located on at least one side of the display area along a second direction, and the first direction and the second direction intersect;

[0007] The second non-display area includes a first scan driving circuit and a second scan driving circuit arranged along the first direction. The first scan driving circuit is electrically connected to the pixel circuit of the first display area, and the second scan driving circuit is electrically connected to the pixel circuit of the second display area; both the first scan driving circuit and the second scan driving circuit include a proximal end close to the first non-display area and a distal end far from the first non-display area;

[0008] The foldable display panel further includes a first scan start signal line, a second scan start signal line, and a signal bus. The first scan start signal line and the signal bus are electrically connected to the first scan driving circuit at one of the proximal end or the distal end of the first scan driving circuit, and the second scan start signal line and the signal bus are electrically connected to the second scan driving circuit at the other of the proximal end or the distal end of the second scan driving circuit.

[0009] Based on the same inventive concept, the present application also provides an electronic device, which includes the above-mentioned foldable display panel.

[0010] Compared with the prior art, the technical solution provided by the present application has at least the following advantages:

[0011] The present application provides a foldable display panel and an electronic device. The first scan start signal line and the signal bus are electrically connected to the first scan driving circuit at one of the proximal end or the distal end of the first scan driving circuit, and the second scan start signal line and the signal bus are electrically connected to the second scan driving circuit at the other of the proximal end or the distal end of the second scan driving circuit. It can be seen that the scanning direction of the first scan driving circuit is consistent with the transmission direction of the output signal of the signal bus in the first scan driving circuit, the scanning direction of the second scan driving circuit is consistent with the transmission direction of the output signal of the signal bus in the second scan driving circuit, and the scanning directions of the first scan driving circuit and the second scan driving circuit are opposite, so that the transmission direction of the output signal of the signal bus in the first scan driving circuit is opposite to the transmission direction in the first scan driving circuit. As a result, the delay of the output signal of the signal bus transmitted to the distal end of the first scan driving circuit is approximately the same as the delay transmitted to the proximal end of the second scan driving circuit, ensuring that the driving signals output by the first scan driving circuit to the pixel circuits near the folding line in the first display area are approximately the same as the driving signals output by the second driving circuit to the pixel circuits near the folding line in the second display area, improving the problem of split screen at the folding line between the first display area and the second display area of the foldable display panel caused by the different delays of the output signal of the signal bus transmitted to the distal end of the first scan driving circuit and the proximal end of the second scan driving circuit, and improving the display effect of the foldable display panel. Description of the Drawings

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained according to the provided drawings.

[0013] Figure 1 It is a partial circuit structure schematic diagram of a foldable display panel provided by the present application;

[0014] Figure 2 It is a partial circuit structure schematic diagram of another foldable display panel provided by the present application;

[0015] Figure 3 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0016] Figure 4 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0017] Figure 5 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0018] Figure 6 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0019] Figure 7 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0020] Figure 8 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0021] Figure 9 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0022] Figure 10 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0023] Figure 11 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0024] Figure 12 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0025] Figure 13 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0026] Figure 14 A partial structure diagram in the cross-sectional direction of a foldable display panel provided by an embodiment of this application;

[0027] Figure 15 Another partial structure diagram in the cross-sectional direction of a foldable display panel provided by an embodiment of this application;

[0028] Figure 16 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0029] Figure 17 Another partial circuit structure diagram of the foldable display panel provided by this application;

[0030] Figure 18 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0031] Reference numerals:

[0032] 10-foldable display panel; 11-pixel circuit; 110-first scanning drive circuit; 120-second scanning drive circuit; 101-sub-scanning drive circuit; 1011-first sub-scanning drive circuit of the second scanning drive circuit, 1011'-first sub-scanning drive circuit of the first scanning drive circuit; 101m-Mth sub-scanning drive circuit of the first scanning drive circuit; 101n'-Nth sub-scanning drive circuit of the second scanning drive circuit; 111-first signal line; 121-second signal line; 200-signal total Line; 201-first sub-signal bus; 202-second sub-signal bus; 210-bus segment; 211-first sub-line segment; 212-second sub-line segment; 300-delay circuit; 400-functional signal line; 510-substrate; 520-semiconductor layer; 530-gate insulating layer; 540-gate metal layer; 550-first insulating layer; 560-capacitor metal layer; 570-interlayer insulating layer; 580-source and drain metal layer; 590-second insulating layer; 600-transfer metal layer; 700-switching circuit; 1000-electronic device;

[0033] AA-display area; AA1-first display area; AA2-second display area; NA-non-display area; NA1-first non-display area; NA2-second non-display area; Y-first direction; X-second direction; STV1-first scan start signal line; STV2-second scan start signal line; Q-node area; P-node; R-resistance; C-capacitance; Z-thickness direction; TFT-transistor; IC-driver chip; BL-folding line. DETAILED DESCRIPTION

[0034] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0035] As described in the background art, display devices of portable terminals such as mobile phones and tablet computers are extremely popular. However, with the continuous development of display technology, people have put forward higher pursuits for display devices. They hope to have a large-screen and large-field-of-view usage experience when using, and also hope to have good portability when not in use. To meet this demand, foldable display devices have been mass-produced and are typical representatives that combine a large screen and portability. However, the display effect of existing foldable display panels is poor, and a split-screen problem will occur at the folding line between two adjacent display areas.

[0036] Based on this, the embodiments of the present application provide a foldable display panel and an electronic device, which effectively solve the technical problems existing in the prior art, improve the split-screen problem at the folding line between the first display area and the second display area of the foldable display panel, and improve the display effect of the foldable display panel. Among them, the folding line is the central axis where the foldable display panel is bent, that is, the dividing line between the first display area and the second display area.

[0037] To achieve the above object, the technical solutions provided by the embodiments of the present application are as follows, and will be specifically described in Figures 1 to 18 detail in combination with the

[0038] reference to Figure 1 As shown, it is a partial circuit structure schematic diagram of a foldable display panel provided by an embodiment of the present application. Among them, the foldable display panel 10 provided by the embodiment of the present application includes a display area AA and a non-display area NA, and the non-display area NA can be arranged to surround the display area AA. One surrounding type, such as the non-display area NA, can surround the display area AA in a closed-loop shape, and another surrounding type, such as the non-display area NA, can surround the display area AA in an open-loop shape. In the display area AA, the display area AA includes a first display area AA1 and a second display area AA2 that are adjacent to each other. In the non-display area NA, the non-display area NA includes a first non-display area NA1 and a second non-display area NA2. The first non-display area NA1 can be an area where a driving chip IC is arranged. The first non-display area NA1, the first display area AA1, and the second display area AA2 are arranged in sequence along a first direction Y. The first direction Y is the one-way direction from the first non-display area NA1 to the first display area AA1. The first non-display area NA1, the first display area AA1, and the second display area AA2 can be three adjacent areas along the first direction Y; or, although the first non-display area NA1, the first display area AA1, and the second display area AA2 are arranged in sequence along the first direction Y, other structures or areas can also be arranged between the first non-display area NA1 and the first display area AA1. The second non-display area NA2 is located on at least one side of the display area AA along a second direction X, and the first direction Y and the second direction X intersect. The second direction X is a non-directional two-way direction, and optionally, the second direction X and the first direction Y are perpendicular to each other.

[0039] In the foldable display panel 10, the display area AA includes pixel circuits 11. In addition, the foldable display panel 10 further includes a first scan start signal line STV1, a second scan start signal line STV2, and a signal bus 200. The signal bus 200 can be electrically connected to a driving chip IC, and the driving chip IC provides corresponding functional signals for the signal bus 200. In some other embodiments, the signal bus 200 can also provide corresponding functional signals through other circuit structures, not limited to the driving chip IC. In some embodiments, the pixel circuits 11 can be arranged in an array. Both the first display area AA1 and the second display area AA2 include a plurality of pixel circuit rows. Each pixel circuit row includes a plurality of pixel circuits 11 arranged along the second direction X, and all pixel circuit rows are arranged along the first direction Y. In the second non-display area NA2, the second non-display area NA2 includes a first scan driving circuit 110 and a second scan driving circuit 120 arranged along the first direction Y. The first scan driving circuit 110 is electrically connected to the pixel circuits 11 in the first display area AA1, and the first scan start signal line STV1 and the signal bus 200 are electrically connected to the first scan driving circuit 110. The first scan start signal line STV1 outputs a first scan start signal to the first scan driving circuit 110. By cooperating with the output signal of the signal bus 200, the first scan driving circuit 110 is controlled to provide driving signals for the pixel circuit rows in the first display area AA1 row by row for scanning. Moreover, the second scan driving circuit 120 is electrically connected to the pixel circuits 11 in the second display area AA2, and the second scan start signal line STV2 and the signal bus 200 are electrically connected to the second scan driving circuit 120. The second scan start signal line STV2 outputs a second scan start signal to the second scan driving circuit 120. By cooperating with the output signal of the signal bus 200, the second scan driving circuit 120 is controlled to provide driving signals for the pixel circuit rows in the second display area AA2 row by row for scanning.

[0040] The first scan driving circuit 110 and the second scan driving circuit 120 both include a proximal end close to the first non-display area NA1 and a distal end away from the first non-display area NA1. The proximal end of the first scan driving circuit 110 is the side of the first scan driving circuit 110 facing the first non-display area NA1 in the first direction Y, and the distal end of the first scan driving circuit 110 is the side of the first scan driving circuit 110 away from the first non-display area NA1 in the first direction Y. The proximal end of the first scan driving circuit 110 and its distal end are opposite sides. The proximal end of the second scan driving circuit 120 is the side of the second scan driving circuit 120 facing the first non-display area NA1 in the first direction Y, and the distal end of the second scan driving circuit 120 is the side of the second scan driving circuit 120 away from the first non-display area NA1 in the first direction Y. The proximal end of the second scan driving circuit 120 and its distal end are opposite sides. Among them, the side where the first scan start signal line STV1 is connected to the first scan driving circuit 110 is the starting end of the scanning direction of the first scan driving circuit 110, and the side where the second scan start signal line STV2 is connected to the second scan driving circuit 120 is the starting end of the scanning direction of the second scan driving circuit 120.

[0041] like Figure 1 As shown, the first scan start signal line STV1 and the signal bus line 200 are electrically connected to the first scan driving circuit 110 at one of the proximal end or the distal end of the first scan driving circuit 110, and the second scan start signal line STV2 and the signal bus line 200 are electrically connected to the second scan driving circuit 120 at the other of the proximal end or the distal end of the second scan driving circuit 120. That is, the connection side of the first scan start signal line STV1 and the signal bus line 200 to the first scan driving circuit 110 is opposite to the connection side of the second scan start signal line STV2 and the signal bus line 200 to the second scan driving circuit 120. When the first scan start signal line STV1 and the signal bus are electrically connected to the near end of the first scan driving circuit 110, the second scan start signal line STV2 and the signal bus 200 are electrically connected to the far end of the second scan driving circuit 120; or, when the first scan start signal line STV1 and the signal bus are electrically connected to the far end of the first scan driving circuit 110, the second scan start signal line STV2 and the signal bus 200 are electrically connected to the near end of the second scan driving circuit 120. That is, the scanning direction of the first scan driving circuit 110 and the transmission direction of the output signal of the signal bus 200 in the first scan driving circuit 110 are the same, and the scanning direction of the second scan driving circuit 120 and the transmission direction of the output signal of the signal bus 200 in the second scan driving circuit 120 are the same, but the scanning directions of the first scan driving circuit 110 and the second scan driving circuit 120 are opposite, and the transmission directions of the output signal of the signal bus 200 in the first scan driving circuit 110 and the second scan driving circuit 120 are also opposite.

[0042] For example, if the first scan start signal line STV1 and the signal bus 200 are electrically connected to the first scan driving circuit 110 at the proximal end of the first scan driving circuit 110, and the second scan start signal line 120 and the signal bus 200 are electrically connected to the second scan driving circuit 120 at the distal end of the second scan driving circuit 120, then the scan direction of the first scan driving circuit 110 and the transmission direction of the output signal of the signal bus 200 in the first scan driving circuit 110 are: the direction from the proximal end of the first scan driving circuit 110 to its distal end, and this direction is the same as the first direction Y; while the scan direction of the second scan driving circuit 120 and the transmission direction of the output signal of the signal bus 200 in the second scan driving circuit 120 are: the direction from the distal end of the second scan driving circuit 120 to its proximal end, and this direction is opposite to the first direction Y. Or, if the first scan start signal line STV1 and the signal bus 200 are electrically connected to the first scan driving circuit 110 at the distal end of the first scan driving circuit 110, and the second scan start signal line 120 and the signal bus 200 are electrically connected to the second scan driving circuit 120 at the proximal end of the second scan driving circuit 120, then the scan direction of the first scan driving circuit 110 and the transmission direction of the output signal of the signal bus 200 in the first scan driving circuit 110 are: the direction from the distal end of the first scan driving circuit 110 to its proximal end, and this direction is opposite to the first direction Y; while the scan direction of the second scan driving circuit 120 and the transmission direction of the output signal of the signal bus 200 in the second scan driving circuit 120 are: the direction from the proximal end of the second scan driving circuit 120 to its distal end, and this direction is the same as the first direction Y.

[0043] As can be seen from the above, the scanning direction of the first scanning driving circuit 110 is the same as the transmission direction of the output signal of the signal bus 200 in the first scanning driving circuit 110, and the scanning direction of the second scanning driving circuit 120 is the same as the transmission direction of the output signal of the signal bus 200 in the second scanning driving circuit 120. Moreover, the scanning direction of the first scanning driving circuit 110 is opposite to that of the second scanning driving circuit 120, so that the transmission direction of the output signal of the signal bus 200 in the first scanning driving circuit 110 is opposite to that in the second scanning driving circuit 120. As a result, the delay of the output signal of the signal bus 200 transmitted to the far end of the first scanning driving circuit 110 is approximately the same as the delay of the output signal transmitted to the near end of the second scanning driving circuit 120. Optionally, the time difference between the signal bus 200 transmitting a signal to the far end of the first scanning driving circuit 110 and transmitting a signal to the near end of the second scanning driving circuit 120 is not greater than 100 ns, ensuring that the driving signal output by the first scanning driving circuit 110 to the pixel circuit 11 near the folding line BL in the first display area AA1 and the driving signal output by the second driving circuit 120 to the pixel circuit 11 near the folding line BL in the second display area AA2 have approximately the same delay, improving the problem of screen splitting at the folding line BL between the first display area AA1 and the second display area AA2 of the foldable display panel 10 caused by the different delays of the output signal of the signal bus 200 transmitted to the far end of the first scanning driving circuit 110 and the near end of the second scanning driving circuit 120, and enhancing the display effect of the foldable display panel 10.

[0044] It can be understood that the scan driving circuit of the foldable display panel 10 includes an independent first scan driving circuit 110 and a second scan driving circuit 120. The first scan driving circuit 110 is electrically connected to a first scan start signal line STV1 alone, and the second scan driving circuit 120 is connected to a second scan start signal line STV2 alone, thereby realizing independent scanning of the first display area AA1 and the second display area AA2. Based on this, the foldable display panel 10 can implement multiple screen scanning modes, that is, the foldable display panel 10 includes a first working mode and / or a second working mode; in the first working mode, the data refresh frequency of the first display area AA1 is equal to the data refresh frequency of the second display area AA2; in the second working mode, the data refresh frequency of the first display area AA1 is not equal to the data refresh frequency of the second display area AA2. That is to say, the foldable display panel 10 can implement the first working mode, or can implement the second working mode, or can implement a hybrid working mode of the first working mode and the second working mode, improving the working flexibility of the foldable display panel 10, meeting different application scenarios of electronic devices, and thus expanding the applicable range of the foldable display panel 10.

[0045] Such as Figure 2As shown in the figure, it is a partial circuit structure diagram of another foldable display panel provided by an embodiment of the present application. The first scan driving circuit 110 includes a first signal line 111, and the first signal line 111 extends from the proximal end to the distal end of the first scan driving circuit 110. And, the second scan driving circuit 120 includes a second signal line 121, and the second signal line 121 extends from the proximal end to the distal end of the second scan driving circuit 120. The first scan driving circuit 110 and the second scan driving circuit 120 each include a plurality of cascaded sub-scan driving circuits 101. One sub-scan driving circuit 101 in the first scan driving circuit 110 is electrically connected to one row of pixel circuits in the first display area AA1, and one word scan driving circuit 101 in the second scan driving circuit 120 is electrically connected to one row of pixel circuits in the second display area AA2. The sub-scan driving circuit 101 is used to provide a driving signal for the row of pixel circuits, so as to drive the pixel circuit 11 to work. The signal bus 200 is electrically connected to the corresponding proximal end or distal end of the first scan driving circuit 110 and the second scan driving circuit 120. Actually, the signal bus 200 is electrically connected to the first signal line 111 and the second signal line 121. That is, the signal bus 200 is electrically connected to the first signal line 111 at one of the proximal end or the distal end of the first scan driving circuit 110, and the signal bus 200 is electrically connected to the second signal line 121 at the other of the proximal end or the distal end of the second scan driving circuit 120. The output signal of the signal bus 200 is transmitted to the sub-scan driving circuit 101 through the first signal line 111 and the second signal line 122, so as to cooperate with other signal lines to drive the sub-scan driving circuit 101 to work. By using the method of electrically connecting the signal bus 200 to the first signal line 111 and the second signal line 121, corresponding signals are provided for each sub-scan driving circuit 101, avoiding the problem of complex circuits caused by each sub-scan driving circuit 101 being electrically connected to the signal bus 200 through its respective leads, thereby making the panel wiring clearer and more convenient for wiring design.

[0046] In order to transmit signals to the first signal line 111 and the second signal line 121, the signal bus 200 can be designed as a single signal line for transmitting corresponding signals, and both the first signal line 111 and the second signal line 121 are electrically connected to the one signal line. Specifically, reference can be made to Figure 2 the connection manner of the signal bus 200 in the form of a single signal line shown in the figure to the first signal line 111 and the second signal line 121. Or as Figure 3Schematic diagram of a partial circuit structure of the foldable display panel shown. The signal bus 200 can also be designed as a multi-line circuit including two signal lines, namely a first sub-signal bus 201 and a second sub-signal bus 202. The first sub-signal bus 201 is electrically connected to the first signal line 111, and the second sub-signal bus 202 is electrically connected to the second signal line 121. On the basis that the line widths and materials of the first sub-signal bus 201 and the second sub-signal bus 202 are the same, the lengths of the first sub-signal bus 201 and the second sub-signal bus 202 are set to be the same, so as to improve the delay consistency of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121.

[0047] In some embodiments, the scanning direction of the first scanning driving circuit 110 can be designed as a scanning mode opposite to the first direction Y, while the scanning direction of the second scanning driving circuit 120 is designed as a scanning mode in the same direction as the first direction Y. At this time, the relevant circuits are electrically connected to the far end of the first scanning driving circuit 110 and the near end of the second scanning driving circuit 120. Specifically combined with Figures 4 to 6 Schematic diagram of a partial circuit structure of the foldable display panel shown. Both the first scanning driving circuit 110 and the second scanning driving circuit 120 include a plurality of cascaded sub-scanning driving circuits 101. The first scanning driving circuit 110 includes M cascaded sub-scanning driving circuits 101 arranged in sequence along the first direction Y. That is, the first sub-scanning driving circuit of the first scanning driving circuit 110 is located at the near end of the first scanning driving circuit 110, and the Mth sub-scanning driving circuit 101m of the first scanning driving circuit is located at the far end of the first scanning driving circuit 110. The second scanning driving circuit 120 includes N cascaded sub-scanning driving circuits 101 arranged in sequence along the first direction Y; that is, the first sub-scanning driving circuit 1011 of the second scanning driving circuit is located at the near end of the second scanning driving circuit 120, and the Nth sub-scanning driving circuit of the second scanning driving circuit 120 is located at the far end of the second scanning driving circuit 120. The first scanning start signal line STV1 is electrically connected to the Mth sub-scanning driving circuit 101m of the first scanning driving circuit; the second scanning start signal line STV2 is electrically connected to the first sub-scanning driving circuit 1011 of the second scanning driving circuit. Both M and N are integers greater than 1.

[0048] At the same time, the signal bus 200 is electrically connected to the first signal line 111 at the far end of the first scanning driving circuit 110, and the signal bus 200 is electrically connected to the second signal line 121 at the near end of the second scanning driving circuit 120. Among them, the first signal line 111 and the second signal line 121 are electrically connected to the signal bus 200 in the same node area Q to ensure that the delay of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121 is the same. Specifically as Figure 5As shown in the figure, when the signal bus 200 is in the form of a single signal line, the node area Q can be understood as a connection node on the signal bus 200, where the first signal line 111 and the second signal line 121 are electrically connected to the signal bus 200 at this connection node, so as to ensure that the delay of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121 is the same, making the delay of the output signal of the signal bus 200 transmitted to the far end of the first scan driving circuit 110 tend to be the same as the delay transmitted to the near end of the second scan driving circuit 120, ensuring that the driving signal output by the first scan driving circuit 110 to the pixel circuit 11 near the folding line BL in the first display area AA1 tends to be the same as the driving signal output by the second driving circuit 120 to the pixel circuit 11 near the folding line BL in the second display area AA2, improving the split screen problem at the folding line BL between the first display area AA1 and the second display area AA2 of the foldable display panel 10, and improving the display effect of the foldable display panel 10. Or as Figure 6 As shown in the figure, when the signal bus 200 includes two sub-signal buses, the node area Q can be understood as the electrical connection position of the first sub-signal bus 201 and the first signal line 111, and the electrical connection position of the second sub-signal bus 202 and the second signal line 121 is in the same area, so as to ensure that the delay of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121 tends to be the same, making the delay of the output signal of the signal bus 200 transmitted to the far end of the first scan driving circuit 110 tend to be the same as the delay transmitted to the near end of the second scan driving circuit 120, ensuring that the driving signal output by the first scan driving circuit 110 to the pixel circuit 11 near the folding line BL in the first display area AA1 tends to be the same as the driving signal output by the second driving circuit 120 to the pixel circuit 11 near the folding line BL in the second display area AA2, improving the split screen problem at the folding line BL between the first display area AA1 and the second display area AA2 of the foldable display panel 10, and improving the display effect of the foldable display panel 10.

[0049] As Figure 7 As shown in the figure, it is a partial circuit structure schematic diagram of another foldable display panel provided by the embodiment of the present application. The signal bus 200 can extend to the area between the first scan driving circuit 110 and the second scan driving circuit 120, that is, extend the output side of the signal bus 200 to the area between the far end of the first scan driving circuit 110 and the near end of the second scan driving circuit 120, so as to facilitate the electrical connection between the signal bus 200 and the first signal line 111 at the far end of the first scan driving circuit 110, and at the same time facilitate the electrical connection between the signal bus 200 and the second signal line 121 at the near end of the second scan driving circuit 120.

[0050] The above content describes the related technical solution in which the scanning direction of the first scanning driving circuit 110 is opposite to the first direction Y, and the scanning direction of the second scanning driving circuit 120 is the same as the first direction Y. In some other embodiments, the scanning direction of the first scanning driving circuit 110 can also be designed to be the same as the first direction Y, and the scanning direction of the second scanning driving circuit 120 is designed to be opposite to the first direction Y. Specifically, refer to Figure 8 As shown, it is a partial circuit structure schematic diagram of another foldable display panel provided by an embodiment of the present application. Both the first scanning driving circuit 110 and the second scanning driving circuit 120 include a plurality of cascaded sub-scanning driving circuits 101. The first scanning driving circuit 110 includes M cascaded sub-scanning driving circuits 101 arranged in sequence along the first direction Y; that is, the first sub-scanning driving circuit 1011' of the first scanning driving circuit is located at the proximal end of the first scanning driving circuit 110, and the Mth sub-scanning driving circuit 101m of the first scanning driving circuit is located at the distal end of the first scanning driving circuit 110. The second scanning driving circuit 120 includes N cascaded sub-scanning driving circuits 101 arranged in sequence along the first direction Y; that is, the first sub-scanning driving circuit of the second scanning driving circuit is located at the proximal end of the second scanning driving circuit 120, and the Nth sub-scanning driving circuit 101n' of the second scanning driving circuit is located at the distal end of the second scanning driving circuit 120. The first scanning start signal line STV1 is electrically connected to the first sub-scanning driving circuit 1011' of the first scanning driving circuit; the second scanning start signal line STV2 is electrically connected to the Nth sub-scanning driving circuit 101n' of the second scanning driving circuit. Both M and N are integers greater than 1.

[0051] Continue to refer to Figure 8 As shown, the signal bus 200 includes a main segment 210, a first sub-segment 211, and a second sub-segment 212. The first sub-segment 211 and the second sub-segment 212 are electrically connected to the same node P of the main segment 210; the first sub-segment 211 is electrically connected to the first signal line 111 at the proximal end of the first scanning driving circuit 110, and the second sub-segment 212 is electrically connected to the second signal line 121 at the distal end of the second scanning driving circuit 120. Designing the signal bus 200 as the main segment 210 electrically connected to the driving chip IC, and the first sub-segment 211 and the second sub-segment 212 respectively connected to the first signal line 111 and the second signal line 121 not only facilitates the connection between the signal bus 200 and the first signal line 111 and the second signal line 121, but also can improve the delay consistency of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121.

[0052] Further refer to Figure 8As shown, the main segment 210 extends from the first non-display area NA1 to the far end of the first scan driving circuit 110 and is electrically connected to the first sub-segment 211 and the second sub-segment 212; optionally, the main segment 210 extends to an area outside the area between the far end of the first scan driving circuit 110 and the near end of the second scan driving circuit 120; that is, the node P is located outside the area between the far end of the first scan driving circuit 110 and the near end of the second scan driving circuit 120 and is optionally located in the extending direction of the folding line BL. The first sub-segment 211 extends along the direction from the far end to the near end of the first scan driving circuit 110 to the near end of the first scan driving circuit 110, and the first sub-segment 211 is electrically connected to the first signal line 111. The second sub-segment 212 extends along the first direction Y to the far end of the second scan driving circuit 120, and the second sub-segment 212 is electrically connected to the second signal line 121. By designing the main segment 210, the first sub-segment 211, and the second sub-segment 212 according to the above wiring method, the length consistency of the first sub-segment 211 and the second sub-segment 212 can be ensured, and the delay consistency of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121 is improved. Especially under the condition that the materials and line widths of the first sub-segment 211 and the second sub-segment 212 are the same, the delay consistency of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121 is further improved, ensuring that the driving signal output from the first scan driving circuit 110 to the pixel circuit 11 near the folding line BL in the first display area AA1 is the same as the driving signal output from the second driving circuit 120 to the pixel circuit 11 near the folding line BL in the second display area AA2. The delay difference of the driving signals output at the far end of the first scan driving circuit 110 and the near end of the second scan driving circuit 120 caused by the different delays of the output signal of the signal bus 200 transmitted to the far end of the first scan driving circuit 110 and the near end of the second scan driving circuit 120 is improved, and the split screen problem of the foldable display panel 10 at the folding line BL between the first display area AA1 and the second display area AA2 is finally solved, improving the display effect of the foldable display panel 10.

[0053] In the signal bus 200, the main segment 210 can not only extend to the far end of the first scan driving circuit 110 as Figure 8 shown, but also extend to the near end of the first scan driving circuit 110, so as to design the first sub-segment 211 in a folded line to improve the length consistency of the first sub-segment 211 and the second sub-segment 212. Specifically, refer to Figure 9Schematic diagram of a partial circuit structure of the foldable display panel shown. The total line segment 210 extends from the first non-display area NA1 to the proximal end of the first scan driving circuit 110 and is electrically connected to the first sub-line segment 211 and the second sub-line segment 212 at the same node P. The first sub-line segment 211 includes at least two sub-line segments 211a arranged along the second direction X. The sub-line segments 211a extend along the first direction Y, and the adjacent two sub-line segments 211a are connected end to end. The sub-line segment 211a close to the display area AA is electrically connected to the first signal line 111. The second sub-line segment 212 extends along the first direction Y to the distal end of the second scan driving circuit 120, and the second sub-line segment 212 is electrically connected to the second signal line 121. It can be understood that the second sub-line segment 212 extends from the node P along the first direction Y to the distal end of the second driving circuit 120. The second sub-line segment 212 is equivalent to passing at least the lengths of the first scan driving circuit 110 and the second scan driving circuit 120 in the first direction Y. Therefore, the first sub-line segment 211 is set as a circuit of two sub-line segments 211a in a folded line shape, and the length of the sub-line segment 211a and the first scan driving circuit 110 in the first direction Y is set to be approximately the same. The two sub-line segments 211a are connected end to end to ensure that the lengths of the first sub-line segment 211 and the second sub-line segment 212 are basically the same, thereby improving the delay consistency of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121, and finally improving the split screen problem at the folding line BL between the first display area AA1 and the second display area AA2 of the foldable display panel 10 and improving the display effect of the foldable display panel 10.

[0054] Figure 9 It shows the area adjacent to the proximal end of the total line segment 210 extending to the first scan driving circuit 110. In addition, the total line segment 210 can also extend to the adjacent area between the proximal end and the distal end of the first scan driving circuit 110, that is, the node P is located in the adjacent area of any part between the proximal end and the distal end of the first scan driving circuit 110. At this time, the first sub-line segment 211 can also be designed in a folded line to ensure a high degree of length consistency between the first sub-line segment 211 and the second sub-line segment 212. Or as Figure 10 shown, the total line segment 210 can also extend to one side of the second scan driving circuit 120, such as extending to the adjacent area between the proximal end and the distal end of the second scan driving circuit 120, that is, the node P is located in the adjacent area of any part between the proximal end and the distal end of the second scan driving circuit 120. The first sub-line segment 211 extends along the direction opposite to the first direction Y to the proximal end of the first scan driving circuit 110 and is electrically connected to the first signal line 111. At this time, the second sub-line segment 212 needs to be designed in a folded line to ensure a high degree of length consistency between the first sub-line segment 211 and the second sub-line segment 212, thereby improving the delay consistency of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121.

[0055] Regardless of how the total signal line segment 210 is designed, the purpose is to ensure a high degree of consistency in the lengths of the first sub-signal line segment 211 and the second sub-signal line segment 212. Considering the influence of the number of sub-scanning driving circuits 101 included in the first scanning driving circuit 110 and the second scanning driving circuit 120 on the length of the signal line, when the number of sub-scanning driving circuits 101 in the scanning driving circuit is large, the signal line needs to be lengthened to connect all the sub-scanning driving circuits 101; when the number of sub-scanning driving circuits 101 in the scanning driving circuit is small, the signal line needs to be shortened. On the basis of ensuring that all the sub-scanning driving circuits 101 are connected, excessive wiring space occupied by the line is avoided. Based on this, when the number of sub-scanning driving circuits 101 included in the first scanning driving circuit 110 and the second scanning driving circuit 120 is different, at this time, the lengths of the first signal line 111 and the second signal line 121 are inconsistent. More attention needs to be paid to the consistency of the total lengths of the first sub-signal line segment 211 and the first signal line 111, and the total lengths of the second sub-signal line segment 212 and the second signal line 121. Optionally, the relationship between the total length dz1 of the first sub-signal line segment 211 and the first signal line 111 and the total length dz2 of the second sub-signal line segment 212 and the second signal line 121 is set as: 0.05 ≤ |dz1 - dz2| / dz1 ≤ 0.1, or 0.05 ≤ |dz1 - dz2| / dz2 ≤ 0.1, so as to improve the delay consistency of the output signal of the signal bus 200 transmitted to the far end of the first scanning driving circuit 110 and the near end of the second scanning driving circuit 120, improve the split-screen problem at the folding line BL between the first display area AA1 and the second display area AA2 of the foldable display panel 10, and improve the display effect of the foldable display panel 10. Or, when the number of sub-scanning driving circuits 101 included in the first scanning driving circuit 110 and the second scanning driving circuit 120 is the same, at this time, the lengths of the first signal line 111 and the second signal line 121 are basically the same. More attention needs to be paid to the consistency of the lengths of the first sub-signal line segment 211 and the second sub-signal line segment 212. Optionally, the relationship between the length d1 of the first sub-signal line segment and the length d2 of the second sub-signal line segment is set as: 0.05 ≤ |d1 - d2| / d1 ≤ 0.1, or 0.05 ≤ |d1 - d2| / d2 ≤ 0.1, so as to improve the delay consistency of the output signal of the signal bus 200 transmitted to the far end of the first scanning driving circuit 110 and the near end of the second scanning driving circuit 120, improve the split-screen problem at the folding line BL between the first display area AA1 and the second display area AA2 of the foldable display panel 10, and improve the display effect of the foldable display panel 10.

[0056] In the above embodiments, by optimizing the wiring method of the line segments of the signal bus 200, the delay consistency of the output signal of the signal bus 200 transmitted to the far end of the first scan driving circuit 110 and the near end of the second scan driving circuit 120 is improved. Optionally, the delay consistency of the output signal of the signal bus 200 transmitted to the far end of the first scan driving circuit 110 and the near end of the second scan driving circuit 120 can also be improved by connecting the signal bus 200 to a delay circuit. Refer to Figure 11 the partial circuit structure schematic diagram of the foldable display panel shown. The signal bus 200 extends from the first non-display area NA1 to the far end of the second scan driving circuit 120 and is electrically connected to the second signal line 121. And in the extending path of the signal bus 200, near the near end of the first scan driving circuit 110, the signal bus 200 is electrically connected to the first signal line 111 through a delay circuit 300 at the near end of the first scan driving circuit 110. It can be understood that the signal bus 200 extends from the first non-display area NA1 to the far end of the second scan driving circuit 120 and is electrically connected to the second signal line 121. At this time, the delay of the output signal of the signal bus 200 transmitted to the second signal line 121 is relatively large. At this time, near the near end of the first scan driving circuit 110, the signal bus 200 is electrically connected to the first signal line 111 through the delay circuit 300. The delay circuit 300 is used to delay the transmission of the output signal of the signal bus 200 to the first signal line 111, thereby improving the delay consistency of the output signal of the signal bus 200 transmitted to the first signal line 111 and the second signal line 121. Specifically, as Figure 12 shown, the delay circuit 300 includes an RC circuit. The RC delay circuit includes a resistor R and a capacitor C. The first end of the resistor R is electrically connected to the first electrode plate of the capacitor C and is electrically connected to the signal bus 200; the second end of the resistor R is electrically connected to the second electrode plate of the capacitor C and is electrically connected to the first signal line 111. In some other embodiments, the delay circuit 300 can also be of other types.

[0057] The above embodiments have described in detail the wiring structure of the signal bus 200. Next, the type of the signal bus 200 will be described. The foldable display panel 10 includes at least one of a first clock signal line, a second clock signal line, a high-level signal line, and a low-level signal line that are electrically connected to the first scan driving circuit 110 and the second scan driving circuit 120; wherein, at least in some time periods, the clock signals transmitted by the first clock signal line and the second clock signal line have opposite phases. The first clock signal line and the second clock signal line are the lines for providing clock signals to the scan driving circuit to control the conduction or cutoff of the corresponding transistors in the scan driving circuit, thereby controlling the operation of the scan driving circuit. And, the high-level signal line and the low-level signal line are the lines for providing a fixed level to the scan driving circuit to cooperate with the conduction or cutoff of the corresponding transistors in the scan driving circuit and transmit the corresponding fixed level to each node in the scan driving circuit. This is the same as the prior art, so no redundant description will be made. Optionally, the signal bus 200 may include at least one of a first clock signal line, a second clock signal line, a high-level signal line, and a low-level signal line. By adopting the wiring design of the signal bus 200 in the above embodiments, the high delay consistency of signals such as the clock signal and the fixed level output by the signal bus 200 to the far end of the first scan driving circuit 110 and the near end of the second scan driving circuit 120 can be ensured, and the display effect of the foldable display panel 10 can be improved.

[0058] In some embodiments, since the delay difference of the clock signal is more likely to cause the split screen problem of the foldable display panel 10, only the clock signal line can be optimized in the wiring design, and a simple continuous line can be made for the fixed level signal line. On the basis of improving the split screen problem of the foldable display panel 10, the wiring of the foldable display panel 10 can also be simplified. Such as Figure 13As shown, the foldable display panel 10 further includes a functional signal line 400. The functional signal line 400 extends along the first direction Y starting from the first non-display area NA1, and the functional signal line 400 is electrically connected to both the first scan driving circuit 110 and the second scan driving circuit 120. The foldable display panel 10 includes at least one of a first clock signal line, a second clock signal line, a high-level signal line, and a low-level signal line that are electrically connected to the first scan driving circuit 110 and the second scan driving circuit 120. Among them, at least in some periods, the clock signals transmitted by the first clock signal line and the second clock signal line have opposite phases. The first clock signal line and the second clock signal line are the lines for providing clock signals to the scan driving circuit to control the conduction or cutoff of the corresponding transistors in the scan driving circuit, thereby controlling the operation of the scan driving circuit. And, the high-level signal line and the low-level signal line are the lines for providing fixed levels to the scan driving circuit to cooperate with the conduction or cutoff of the corresponding transistors in the scan driving circuit and transmit the corresponding fixed levels to each node in the scan driving circuit. This is the same as the prior art, so no redundant description will be made. The functional signal line 400 includes at least one of the high-level signal line and the low-level signal line. And the signal bus 200 includes at least one of the first clock signal line and the second clock signal line. The functional signal line 400 can extend and be electrically connected to the driving chip IC, and the driving chip IC provides a fixed-level signal for the functional signal line 400. In addition, along the thickness direction of the foldable display panel 10, the functional signal line 400 can at least partially overlap with the first scan driving circuit 110 and the second scan driving circuit 120, thereby improving the problem of the functional signal line 400 occupying wiring space and increasing the wiring space of the foldable display panel 10.

[0059] In addition, along the thickness direction of the foldable display panel 10, the first signal line 111 at least partially overlaps with the first scan driving circuit 110, and the second signal line 121 at least partially overlaps with the second scan driving circuit 120. Optionally, when the first signal line 111 and the second signal line 121 and the transistors in the sub-scan driving circuit 101 are in different conductive layers, the first signal line 111 can at least partially overlap with the sub-scan driving circuit 101 in the first scan driving circuit 110, and the second signal line 121 can at least partially overlap with the sub-scan driving circuit 101 in the second scan driving circuit 120, thereby improving the problem of the first signal line 111 and the second signal line 121 occupying wiring space and further increasing the wiring space of the foldable display panel 10. As Figure 14As shown, the foldable display panel 10 may include top-gate transistors as the thin-film transistors (TFTs). The foldable display panel includes a substrate 510 in the thickness direction Z; a semiconductor layer 520 located on the substrate 510, where the semiconductor layer 520 includes an active region that forms the TFT; a gate insulating layer 530 located on the side of the semiconductor layer 520 away from the substrate 510; a gate metal layer 540 located on the side of the gate insulating layer 530 away from the substrate 510, where the gate metal layer 540 includes a gate that forms the TFT; a first insulating layer 550 located on the side of the gate metal layer 540 away from the substrate 510; a capacitive metal layer 560 located on the side of the first insulating layer 550 away from the substrate 510; an interlayer insulating layer 570 located on the side of the capacitive metal layer 560 away from the substrate 510; a source-drain metal layer 580 located on the side of the interlayer insulating layer 570 away from the substrate 510, where the source-drain metal layer 580 includes a source and a drain that form the TFT; a second insulating layer 590 located on the side of the source-drain metal layer 580 away from the substrate 510; and a transfer metal layer 600 located on the side of the second insulating layer 290 away from the substrate 510. Among them, when the first signal line 111 and the second signal line 121 are located on the capacitive metal layer 560 or the transfer metal layer 600, the first signal line 111 and the second signal line 121 may at least partially overlap with the sub-scanning driving circuit 101.

[0060] Or as Figure 15As shown, the transistors TFT included in the foldable display panel 10 may also be bottom-gate transistors. The foldable display panel includes a substrate 510 in the thickness direction Z; a gate metal layer 540 located on the substrate 510, and the gate metal layer 540 includes the gate of the transistor TFT; a gate insulating layer 530 located on the side of the gate metal layer 540 facing away from the substrate 510; a semiconductor layer 520 located on the side of the gate insulating layer 530 facing away from the substrate 510, and the semiconductor layer 520 includes the active region of the transistor TFT; a first insulating layer 550 located on the side of the semiconductor layer 520 facing away from the substrate 510; a capacitive metal layer 560 located on the side of the first insulating layer 550 facing away from the substrate 510; an interlayer insulating layer 570 located on the side of the capacitive metal layer 560 facing away from the substrate 510; a source-drain metal layer 580 located on the side of the interlayer insulating layer 570 facing away from the substrate 510, and the source-drain metal layer 580 includes the source and drain of the transistor TFT; a second insulating layer 590 located on the side of the source-drain metal layer 580 facing away from the substrate 510; a transfer metal layer 600 located on the side of the second insulating layer 290 facing away from the substrate 510. Among them, when the first signal line 111 and the second signal line 121 are located in the capacitive metal layer 560 or the transfer metal layer 600, the first signal line 111 and the second signal line 121 may at least partially overlap with the sub-scanning driving circuit 101. Optionally, the signal bus 200 and the functional signal line 400 may be located in at least one of the gate metal layer 540, the capacitive metal layer 560, the source-drain metal layer 580, and the transfer metal layer 600, and no specific limitation is made thereto.

[0061] In some embodiments, the power consumption of the foldable display panel 10 can also be optimized. As Figure 16 shown, a switching circuit 700 is connected in series between at least one of the connection lines of the signal bus 200 and the first scanning driving circuit 110 and the connection lines of the signal bus 200 and the first scanning driving circuit 120. The switching circuit 700 can be implemented by a switching transistor. During the operation of the foldable display panel 10, the conduction or cut-off of the switching circuit 700 can be selectively controlled to realize the signal transmission or stop of the signal bus 200 to the first signal line 111 and / or the second signal line 121. Thus, when the first display area AA1 does not need to display an image, the switching circuit 700 on the connection line between the signal bus 200 and the first scanning driving circuit 110 can be controlled to be turned off, so as to achieve the purpose of reducing the power consumption of the foldable display panel 10. And when the second display area AA2 does not need to display an image, the switching circuit 700 on the connection line between the signal bus 200 and the second scanning driving circuit 120 can be controlled to be turned off, so as to achieve the purpose of reducing the power consumption of the foldable display panel 10.

[0062] In some embodiments, on both sides of the display area AA provided in the embodiments of the present application in the second direction X are second non-display areas NA2, where the foldable display panel 10 is provided with a first scan driving circuit 110 and a second scan driving circuit 120 only on one side of the display area AA, as Figure 1 shown in the wiring structure of the foldable display panel 10. Or as Figure 17 shown, in the foldable display panel 10, a first scan driving circuit 110 and a second scan driving circuit 120 may be provided on both sides of the display area AA along the second direction X. The first scan driving circuits 110 and the second scan driving circuits 120 on both sides are electrically connected to the signal buses 200 on their respective corresponding sides. And on any one side of the display area AA along the second direction X, the electrical connection structure between the signal buses 200 and the first scan driving circuit 110 and the second scan driving circuit 120 is the same as the wiring structure of the signal buses 200 provided in any one of the above embodiments. Continuing as Figure 17 shown, in the first display area AA1, any pixel circuit row is provided with driving signals simultaneously by the first scan driving circuits 110 on both sides. Similarly, in the second display area AA2, any pixel circuit row is provided with driving signals simultaneously by the second scan driving circuits 120 on both sides, so as to ensure that the voltage drop difference of the driving signals received by the pixel circuits 11 in the same row is relatively small, and further improve the display effect of the foldable display panel 10.

[0063] Based on the same inventive concept, the embodiments of the present application further provide an electronic device. Referring to Figure 18 shown, it is a schematic structural diagram of an electronic device provided in the embodiments of the present application. Among them, the electronic device 1000 includes the foldable display panel provided in any one of the above embodiments. It should be noted that the illustration is only schematic with the electronic device 1000 as a two-fold device. The electronic device 1000 may also be a device with a greater number of folds such as three folds or four folds, and this is not limited. In some embodiments, the electronic device 1000 may be a mobile terminal, a notebook, a tablet computer, a computer, a wearable device, a vehicle-mounted display device, etc.

[0064] In summary, the embodiments of the present application provide a foldable display panel and an electronic device. The first scan start signal line and the signal bus are electrically connected to the first scan driving circuit at one of the proximal end or the distal end of the first scan driving circuit, and the second scan start signal line and the signal bus are electrically connected to the second scan driving circuit at the other of the proximal end or the distal end of the second scan driving circuit. It can be seen that the scanning direction of the first scan driving circuit is consistent with the transmission direction of the output signal of the signal bus in the first scan driving circuit, the scanning direction of the second scan driving circuit is consistent with the transmission direction of the output signal of the signal bus in the second scan driving circuit, and the scanning directions of the first scan driving circuit and the second scan driving circuit are opposite, so that the transmission direction of the output signal of the signal bus in the first scan driving circuit is opposite to the transmission direction in the first scan driving circuit. As a result, the delay of the output signal of the signal bus transmitted to the distal end of the first scan driving circuit is approximately the same as the delay transmitted to the proximal end of the second scan driving circuit, ensuring that the driving signals output from the first scan driving circuit to the pixel circuits near the folding line in the first display area are approximately the same as the driving signals output from the second driving circuit to the pixel circuits near the folding line in the second display area, improving the problem of split screen at the folding line between the first display area and the second display area of the foldable display panel caused by the different delays of the output signal of the signal bus transmitted to the distal end of the first scan driving circuit and the proximal end of the second scan driving circuit, and improving the display effect of the foldable display panel.

[0065] In the description of the embodiments of the present application, it should be understood that if terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are used to indicate the orientation or positional relationship, it is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the embodiments of the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, so it should not be construed as a limitation to the present application.

[0066] In addition, if terms such as "first" and "second" are only used for descriptive purposes, they cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the embodiments of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0067] In the embodiments of the present application, unless otherwise clearly specified or limited, terms such as "installed", "connected", "connected to", "fixed", etc. shall be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection, an electrical connection, or communicable with each other; it may be directly connected, or indirectly connected through an intermediate medium, and may be the communication inside two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0068] In the embodiments of the present application, unless otherwise clearly specified or limited, the first feature being "on" or "under" the second feature may be that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature may be that the first feature is directly above or obliquely above the second feature, or merely indicates that the first feature is at a higher level than the second feature in terms of horizontal height. The first feature being "under", "beneath" and "underneath" the second feature may be that the first feature is directly below or obliquely below the second feature, or merely indicates that the first feature is at a lower level than the second feature in terms of horizontal height.

[0069] In the embodiments of the present application, terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0070] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present application. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present application.

Claims

1. A foldable display panel, characterized in that, The foldable display panel includes a display area and a non-display area, and the display area includes pixel circuits; The display area includes a first display area and a second display area arranged adjacent to each other; the non-display area includes a first non-display area and a second non-display area; the first non-display area, the first display area, and the second display area are arranged in sequence along a first direction; the second non-display area is located on at least one side of the display area along a second direction, and the first direction and the second direction intersect; The second non-display area includes a first scan driving circuit and a second scan driving circuit arranged along the first direction. The first scan driving circuit is electrically connected to the pixel circuits of the first display area, and the second scan driving circuit is electrically connected to the pixel circuits of the second display area; both the first scan driving circuit and the second scan driving circuit include a proximal end close to the first non-display area and a distal end far from the first non-display area; The foldable display panel further includes a first scan start signal line, a second scan start signal line, and a signal bus. The first scan start signal line and the signal bus are electrically connected to the first scan driving circuit at one of the proximal end or the distal end of the first scan driving circuit, and the second scan start signal line and the signal bus are electrically connected to the second scan driving circuit at the other of the proximal end or the distal end of the second scan driving circuit.

2. The foldable display panel according to claim 1, wherein The first scan driving circuit includes a first signal line that extends from the proximal end to the distal end of the first scan driving circuit; and the second scan driving circuit includes a second signal line that extends from the proximal end to the distal end of the second scan driving circuit; The signal bus is electrically connected to the first signal line at one of the proximal end or the distal end of the first scan driving circuit, and the signal bus is electrically connected to the second signal line at the other of the proximal end or the distal end of the second scan driving circuit.

3. The foldable display panel according to claim 2, wherein Both the first scan driving circuit and the second scan driving circuit include a plurality of cascaded sub-scan driving circuits; the first scan driving circuit includes M cascaded sub-scan driving circuits arranged in sequence along the first direction; the second scan driving circuit includes N cascaded sub-scan driving circuits arranged in sequence along the first direction; The first scan start signal line is electrically connected to the Mth sub-scan driving circuit of the first scan driving circuit; the second scan start signal line is electrically connected to the first sub-scan driving circuit of the second scan driving circuit, and both M and N are integers greater than 1.

4. The foldable display panel according to claim 3, wherein, The first signal line and the second signal line are electrically connected to the signal bus at the same node area.

5. The foldable display panel according to claim 2, wherein Both the first scan driving circuit and the second scan driving circuit include a plurality of cascaded sub-scan driving circuits; The first scan driving circuit includes M cascaded sub-scan driving circuits arranged in sequence along the first direction; the second scan driving circuit includes N cascaded sub-scan driving circuits arranged in sequence along the first direction; The first scan start signal line is electrically connected to the first sub-scan driving circuit of the first scan driving circuit; the second scan start signal line is electrically connected to the Nth sub-scan driving circuit of the second scan driving circuit, where both M and N are integers greater than 1.

6. The foldable display panel according to claim 5, wherein, The signal bus includes a main segment, a first sub-segment, and a second sub-segment, and the first sub-segment and the second sub-segment are electrically connected to the same node of the main segment; The first sub-segment is electrically connected to the first signal line at the proximal end of the first scan driving circuit, and the second sub-segment is electrically connected to the second signal line at the distal end of the second scan driving circuit.

7. The foldable display panel according to claim 6, characterized in that, The main segment extends from the first non-display area to the proximal end of the first scan driving circuit and is electrically connected to the first sub-segment and the second sub-segment; The first sub-segment includes at least two sub-segments arranged along the second direction, the sub-segments extend along the first direction, the head and tail of adjacent two sub-segments are connected, and the sub-segment close to the display area is electrically connected to the first signal line; The second sub-segment extends along the first direction to the distal end of the second scan driving circuit, and the second sub-segment is electrically connected to the second signal line.

8. The foldable display panel according to claim 6, wherein The main segment extends from the first non-display area to the distal end of the first scan driving circuit and is electrically connected to the first sub-segment and the second sub-segment; The first sub-segment extends from the distal end of the first scan driving circuit towards its proximal end to the proximal end of the first scan driving circuit, and the first sub-segment is electrically connected to the first signal line; The second sub-segment extends along the first direction to the distal end of the second scan driving circuit, and the second sub-segment is electrically connected to the second signal line.

9. The foldable display panel according to claim 6, wherein, The number of sub-scan driving circuits included in the first scan driving circuit and the second scan driving circuit is different; The relationship between the total length dz1 of the first sub-segment and the first signal line and the total length dz2 of the second sub-segment and the second signal line is: 0.05 ≤ |dz1 - dz2| / dz1 ≤ 0.1, or, 0.05 ≤ |dz1 - dz2| / dz2 ≤ 0.

1.

10. The foldable display panel according to claim 6, characterized in that, The number of sub-scan driving circuits included in the first scan driving circuit and the second scan driving circuit is the same; The relationship between the length d1 of the first sub-segment and the length d2 of the second sub-segment is: 0.05 ≤ |d1 - d2| / d1 ≤ 0.1, or, 0.05 ≤ |d1 - d2| / d2 ≤ 0.

1.

11. The foldable display panel according to claim 5, wherein The signal bus extends from the first non-display area to the distal end of the second scan driving circuit and is electrically connected to the second signal line; And in the extension path of the signal bus, the signal bus is electrically connected to the first signal line through a delay circuit.

12. The foldable display panel according to claim 11, wherein, The delay circuit includes an RC circuit.

13. The foldable display panel according to claim 1, wherein The time difference between the signal bus transmitting a signal to the distal end of the first scan driving circuit and transmitting a signal to the proximal end of the second scan driving circuit is not greater than 100 ns.

14. The foldable display panel according to claim 1, wherein The foldable display panel includes at least one of a first clock signal line, a second clock signal line, a high-level signal line, and a low-level signal line that are electrically connected to the first scan driving circuit and the second scan driving circuit; wherein, at least in some time periods, the clock signals transmitted by the first clock signal line and the second clock signal line have opposite phases; The signal bus includes at least one of the first clock signal line, the second clock signal line, the high-level signal line, and the low-level signal line.

15. The foldable display panel according to claim 1, wherein The foldable display panel further includes a functional signal line that extends along the first direction starting from the first non-display area, and the functional signal line is electrically connected to both the first scan driving circuit and the second scan driving circuit; The foldable display panel includes at least one of a first clock signal line, a second clock signal line, a high-level signal line, and a low-level signal line that are electrically connected to the first scan driving circuit and the second scan driving circuit; wherein, at least in some time periods, the clock signals transmitted by the first clock signal line and the second clock signal line have opposite phases; The functional signal line includes at least one of the high-level signal line and the low-level signal line; the signal bus includes at least one of the first clock signal line and the second clock signal line.

16. The foldable display panel according to claim 1, wherein, The foldable display panel includes a first working mode and / or a second working mode; In the first working mode, the data refresh frequency of the first display area is equal to the data refresh frequency of the second display area; In the second working mode, the data refresh frequency of the first display area is not equal to the data refresh frequency of the second display area.

17. The foldable display panel according to claim 1, wherein Along the thickness direction of the foldable display panel, the first signal line at least partially overlaps with the first scan driving circuit, and the second signal line at least partially overlaps with the second scan driving circuit.

18. An electronic device, characterized in that, The electronic device includes the foldable display panel according to any one of claims 1-15.

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