Alloy resistor with low resistance value and wide electrode spacing and preparation method thereof

Abstract

The invention discloses an alloy resistor with low resistance and wide electrode spacing and a preparation method thereof, and the preparation method comprises the following steps: printing a solder mask material on a semi-finished plate with a set circuit pattern for the first time, so as to form a first solder mask layer on the semi-finished plate; carrying out first copper plating to form two opposite first electrodes; the two first electrodes are respectively positioned at two end parts of the first solder mask layer; printing the solder mask material for the second time to form a second solder mask layer; the second solder mask layer is located above the first solder mask layer; carrying out second copper plating to form two opposite second electrodes; the second electrodes are correspondingly located above the first electrodes, and the two second electrodes are located at the two ends of the second solder mask layer respectively. According to the preparation method disclosed by the invention, the mode of multiple times of welding prevention and multiple times of electroplating is adopted, and the electrode spacing of the product can be effectively increased under the condition of the same resistance value of the product.

Description

Technical Field

[0001] The present invention belongs to the technical field of alloy resistors, and particularly relates to a preparation method of an alloy resistor with a low resistance value (1-3 mΩ) and a wide electrode spacing (1.4-1.8 mm), and an alloy resistor with a low resistance value and a wide electrode spacing prepared by using the preparation method. Background Art

[0002] Compared with other types of resistors, alloy resistors have the characteristics of low temperature coefficient, high stability and oxidation resistance, making their applications in electronic circuits more and more extensive. For conventional alloy resistors, the smaller the resistance value, the smaller the electrode spacing; when using alloy resistors with a small resistance value, the corresponding application pad spacing needs to be matched accordingly, resulting in a narrow application range for low-resistance alloy resistors. Alloy resistors with a low resistance value and a wide electrode spacing can meet a wider range of application scenarios, and the market demand is also increasing.

[0003] In the prior art, an alloy is etched to obtain a resistor body semi-finished product with a certain resistance value, and then a single product is obtained through solder mask, electroplating, cutting, and barrel plating. The pad spacing used is the size corresponding to the width of the electrode.

[0004] However, since the electrode spacing of the resistor body is affected by the resistivity and thickness of the material, when the size of the product is fixed, the electrode spacing of the product is also fixed. According to the resistance calculation formula: R = ρ * L / S (where R is the resistance value, ρ is the resistivity, L is the length of the resistor body, and S is the cross-sectional area of the resistor body), under the condition that the thickness and width of the product are fixed, the smaller the resistance value of the product, the smaller the length of the effective resistor, so the electrode spacing of the product is narrower, and thus the applicable range of the product is narrower. In the prior art, it is impossible to achieve a low resistance value while ensuring a relatively wide electrode spacing for alloy resistors.

[0005] For example, in the patent with the application number 2022108875824, a resistor structure and its manufacturing method are proposed. By setting the metal layer as a first metal region and a second metal region, and the second metal region is located in the non-electrode region of the first metal region, the thickness can be reduced while ensuring that the resistance value of the product remains unchanged. However, the thickness of the electrodes of the resistor prepared by this patent is higher than that of the second metal region, and the total thickness of the product will be affected by the thickness of the second metal region. Moreover, the total thickness of the metal region at the non-electrode of the resistor remains unchanged, the length of the effective resistor body of the resistor remains unchanged, and the spacing between the two electrodes will also be fixed, and it is impossible to widen the electrode spacing of the resistor.

[0006] For another example, a chip alloy resistor and its manufacturing method are proposed in the patent with the application number 2022114027146. Different resistance value requirements of the resistor body are achieved through punching, and then heat sinks are covered on the alloy to effectively increase the heat dissipation of the product. However, in this patent, the punching method is adopted, and the costs of related equipment and jigs are relatively high. And on the premise that the resistance value of the resistor remains unchanged, the relevant dimensions of the effective resistance area remain unchanged, so the distance between the two electrodes will not change either, making it difficult to meet the requirement of a wide electrode distance for the resistor.

[0007] For yet another example, the patent with the application number 2017112990487 obtains a resistor with high precision and low TCR (temperature coefficient of resistance) by printing a mask layer on the resistance area and then covering a protective layer on the surface of the mask layer. However, the original sizes of the alloy and the protective layer in this patent remain unchanged, making it difficult to achieve a resistor with a wide electrode distance.

[0008] For example, the patent with the application number 2015104222674 discloses a micro-resistor. Its first electrode contact point and second electrode contact point do not directly contact the protective layer. The protective layer contacts the solder balls or solder layers. The actual electrode distance of the product is determined by the distance between the two outermost solder balls or solder layers; the solder layer covers the electrode contact points, and the protective layer contacts the solder layer, without actually widening the electrode distance. At the same time, the solder layer in this patent will contract the end part of the protective layer inward, further reducing the electrode distance.

[0009] The disclosure of the above background technical content is only used to assist in understanding the inventive concept and technical solution of the present invention, and it does not necessarily belong to the prior art of this application. Without clear evidence indicating that the above content was publicly available before the filing date of this application, the above background technology should not be used to evaluate the novelty and inventiveness of this application. Summary of the Invention

[0010] In view of this, in order to overcome the defects of the prior art, the purpose of the present invention is to provide a manufacturing method for an alloy resistor with low resistance value and wide electrode distance, achieving a low resistance value while ensuring a relatively wide electrode distance.

[0011] In order to achieve the above purpose, the present invention adopts the following technical solutions: A manufacturing method for an alloy resistor with low resistance value and wide electrode distance includes the following steps: Print the solder resist material on the semi-finished product board with a set circuit pattern for the first time to form a first solder resist layer on the semi-finished product board; Perform copper plating for the first time to form two opposite first electrodes; the two first electrodes are respectively located at the two ends of the first solder resist layer; Print the solder resist material for the second time to form a second solder resist layer; the second solder resist layer is located above the first solder resist layer; Perform copper plating for the second time to form two opposite second electrodes; the second electrodes are correspondingly located above the first electrodes, and the two second electrodes are respectively located at two ends of the second solder resist layer and are in direct contact with the ends of the second solder resist layer. Specifically, the ends of the second solder resist layer are embedded in the second electrodes and are located between the first electrodes and the second electrodes to widen the actual electrode pitch of the product to the target value.

[0012] According to some preferred embodiments of the present invention, the distance between the two second electrodes is greater than the distance between the two first electrodes.

[0013] According to some preferred embodiments of the present invention, the distance between the two second electrodes is 1.4 - 1.8 mm.

[0014] Further preferably, the distance between the two first electrodes is 0.8 - 1.2 mm.

[0015] According to some preferred embodiments of the present invention, the top surface of the first electrode is higher than the top surface of the first solder resist layer.

[0016] According to some preferred embodiments of the present invention, the top surface of the second solder resist layer is higher than the top surface of the first electrode.

[0017] According to some preferred embodiments of the present invention, the length of the second solder resist layer is greater than the length of the first solder resist layer; the ends of the second solder resist layer cover one end of the two first electrodes close to each other. That is, the second solder resist layer will cover the first electrodes, and at the same time, the second solder resist layer is in direct contact with the second electrodes (the ends of the second solder resist layer are embedded in the second electrodes) to widen the actual electrode pitch of the product to the target value.

[0018] According to some preferred embodiments of the present invention, the top surface of the second electrode is higher than the top surface of the second solder resist layer.

[0019] According to some preferred embodiments of the present invention, print the solder resist material for the third time to form a third solder resist layer; the third solder resist layer is located above the second solder resist layer and between the two second electrodes. The length of the third solder resist layer is less than the distance between the two second electrodes.

[0020] According to some preferred embodiments of the present invention, the top surface of the third solder resist layer is lower than the top surface of the second electrode.

[0021] According to some preferred embodiments of the present invention, the length of the third solder resist layer is less than the length of the second solder resist layer.

[0022] According to some preferred implementation aspects of the present invention, the distance between the two second electrodes is greater than the length of the third solder mask layer.

[0023] According to some preferred implementation aspects of the present invention, the distance between the end of the third solder mask layer and the end of the second electrode is 0.2 - 0.4 mm.

[0024] According to some preferred implementation aspects of the present invention, the semi-finished sheet includes an alloy sheet and a substrate that are bonded to each other. The set circuit pattern is located on the alloy sheet, and the first solder mask layer and the first electrode are located above the alloy sheet.

[0025] According to some preferred implementation aspects of the present invention, the resistance value of the alloy resistor is 1 - 3 mΩ.

[0026] According to some preferred implementation aspects of the present invention, the step includes a resistance trimming step before the third printing of the solder mask material, and the third solder mask layer is used to cover the trimming blade edge.

[0027] According to some preferred implementation aspects of the present invention, the step includes a step of particle separation and / or nickel-tin plating after the third printing of the solder mask material.

[0028] In the present invention, the length is defined as the value in the length direction of the alloy resistor product as viewed from the product cross-sectional view of the alloy resistor.

[0029] According to some preferred implementation aspects of the present invention, the semi-finished sheet with the set circuit pattern is formed by double-sided etching, and includes the following steps: Bond dry film on both sides of the alloy sheet, and then perform exposure and development to form a first circuit pattern on the dry film; Etch to form a second circuit pattern corresponding to the first circuit pattern on the dry film on both sides of the alloy sheet; Strip the film to remove the dry film on the alloy sheet; Bond the alloy sheet and the substrate to obtain a semi-finished sheet with the set circuit pattern.

[0030] According to some preferred implementation aspects of the present invention, the second circuit patterns on both sides of the alloy sheet are exactly the same, and after the etching is completed, the second circuit patterns penetrate through the thickness of the alloy sheet to form the corresponding set circuit pattern. That is, during etching, as the etching progresses, the etching depth of the second circuit patterns corresponding to both sides of the alloy sheet gradually increases and finally penetrates through the thickness direction of the alloy sheet, thereby obtaining the set circuit pattern on the alloy sheet and completing the etching.

[0031] According to some preferred implementation aspects of the present invention, during the etching, both sides of the alloy sheet are etched simultaneously and the etching conditions are kept consistent.

[0032] According to some preferred implementation aspects of the present invention, the etching conditions are an acidic etching solution with an etching rate of 1 - 3 m / min; the etching temperature is 45 ± 5 °C.

[0033] According to some preferred implementation aspects of the present invention, the laminating substrate is to set an epoxy resin film between the alloy sheet and the substrate, and then pre - laminating is carried out first, and then vacuum laminating is carried out using a vacuum press.

[0034] According to some preferred implementation aspects of the present invention, the lamination time of the pre - lamination is 100 - 150 s, the lamination pressure is 20 - 30 KG, and the lamination temperature is 140 - 160 °C.

[0035] According to some preferred implementation aspects of the present invention, the lamination time of the vacuum lamination is 280 - 320 s, the lamination pressure is 50 - 70 KG, and the lamination temperature is 140 - 160 °C.

[0036] According to some preferred implementation aspects of the present invention, the steps include a pretreatment step before laminating the dry film, which is used to remove the oxidation substances and oil stains on the surface of the alloy sheet.

[0037] According to some preferred implementation aspects of the present invention, during exposure, for the dry films on both sides of the alloy sheet, the same set of optical alignment points is used for alignment, so as to make the second circuit patterns on both sides of the alloy sheet completely correspond, avoid the offset of the second circuit patterns on both sides, and prevent the failure to achieve through - etching.

[0038] In some embodiments of the present invention, a method for preparing an alloy resistor with a low resistance value and a wide electrode spacing specifically includes the following steps: Step S1, preparing a semi - finished product sheet with a set circuit pattern The semi - finished product sheet is obtained by laminating an alloy sheet with a set circuit pattern and a substrate.

[0039] The etching for preparing the alloy sheet with a set circuit pattern is preferably carried out by double - sided etching, specifically as follows: S11, laminating the dry film Using a laminating machine, the upper and lower surfaces of the alloy sheet are fully laminated with the dry film.

[0040] The lamination time is 55 - 65 s, the lamination pressure is 40 - 50 KG, and the lamination temperature is 130 - 150 °C.

[0041] Preferably, the surface of the alloy sheet is pretreated before laminating the dry film to remove the oxides and oil stains on the surface of the alloy sheet, which is beneficial to the full lamination of the subsequent dry film and the alloy sheet.

[0042] The pretreatment is specifically as follows: The alloy sheet is pretreated with a micro-etching solution to remove surface oil and oxides. The micro-etching speed is 1 - 3 m / min, and the micro-etching temperature is 45 ± 5°C.

[0043] The micro-etching solution is a mixed solution formed by sulfuric acid and hydrogen peroxide. The concentration of sulfuric acid in the mixed solution is 5% ± 1%; the concentration of hydrogen peroxide is 5% ± 1%.

[0044] S12. Exposure and development Expose the upper and lower surfaces of the alloy sheet with the dry film attached, and then develop it to obtain a first circuit pattern with a predetermined shape on the dry film on the upper and lower surfaces of the alloy sheet.

[0045] S13. Double-sided etching After development, the alloy sheet undergoes an etching operation. During etching, a double-sided synchronous etching method is used, so that the upper and lower surfaces of the alloy sheet simultaneously obtain a second circuit pattern corresponding to the first circuit pattern on the dry film. The etching conditions on the upper and lower surfaces are the same to reduce the side etching amount and improve the etching efficiency.

[0046] Acidic etching solution is used for etching. The etching speed is 1 - 3 m / min; the etching temperature is 45 ± 5°C. The acidic etching solution is a mixed solution formed by copper chloride and hydrochloric acid. The concentration of copper chloride in the mixed solution is 90 - 95%, and the concentration of hydrochloric acid is 5 - 10%.

[0047] Since it is necessary to ensure the complete correspondence of the circuit patterns on the upper and lower surfaces of the alloy sheet, in this invention, the same set of alignment marks is used on the upper and lower surfaces during graphic exposure to ensure the complete correspondence of the first circuit patterns on the two dry films, so that the positions and shapes of the second circuit patterns on the two surfaces of the alloy sheet are completely the same, so as to form a through-set circuit pattern in the thickness of the alloy sheet after etching.

[0048] S14. Stripping The etched alloy sheet is subjected to a stripping treatment to remove the dry film on the surface of the alloy sheet. At this time, an alloy sheet with a set circuit pattern is obtained.

[0049] The stripping speed is 1 - 2 m / min; the stripping temperature is 45 ± 5°C.

[0050] S15. Laminating the substrate First, an epoxy resin film is set between one surface of the etched alloy sheet and the substrate; then pre-pressing is carried out, and then vacuum pressing is carried out using a vacuum press to obtain a semi-finished sheet with a set circuit pattern.

[0051] The lamination time for pre-lamination is 100 - 150 s, the lamination pressure is 20 - 30 KG, and the lamination temperature is 140 - 160 °C; the lamination time for vacuum lamination is 280 - 320 s, the lamination pressure is 50 - 70 KG, and the lamination temperature is 140 - 160 °C.

[0052] For alloys of the same thickness and under the same etching conditions, the side etching amount of single-sided etching is at least twice that of double-sided etching. The side etching amount of single-sided etching is larger and not easy to control. Using the double-sided etching method to prepare the resistor of the low-resistance alloy material can reduce the side etching amount of the product, lower the production cost, improve the production efficiency, and is beneficial to the stability of the product.

[0053] Step S2, printing solder mask ink for the first time Print the solder mask ink for the first time, expose, and develop on the alloy sheet with a circuit pattern to form a first solder mask layer on the semi-finished sheet. Developing is to remove the unexposed ink and expose the alloy at the bottom.

[0054] The first solder mask layer is located at the middle position above the alloy sheet, and the length of the first solder mask layer determines the resistance value of the product. From the cross-sectional view of the product, this length is the length of the first solder mask layer in the length direction of the product.

[0055] Step S3, copper plating for the first time Perform copper plating for the first time to form two opposite first electrodes. The two first electrodes are located at the two ends of the first solder mask layer, and the top surface of the first electrode is higher than the top surface of the first solder mask layer. The distance between the two first electrodes is 0.8 - 1.2 mm, and the thickness of the first electrode is 0.05 - 0.08 mm.

[0056] Step S4, printing solder mask ink for the second time Print the solder mask ink for the second time to form a second solder mask layer. The second solder mask layer is located above the first solder mask layer, and the length of the second solder mask layer is greater than the length of the first solder mask layer. The top surface of the second solder mask layer is higher than the top surface of the first electrode.

[0057] Print, expose, and develop the solder mask ink for the second time on the sheet after the first copper plating. The length of the solder mask ink for the second time determines the final electrode distance of the product; the length of the solder mask ink for the second time is longer than that of the first solder mask ink, and has a very small impact on the resistance value of the product, and can effectively widen the distance between the electrodes.

[0058] Step S5, copper plating for the second time Perform copper plating for the second time to form two opposite second electrodes. The second electrodes are located above the first electrodes. The two second electrodes are located at the two ends of the second solder mask layer. The ends of the second solder mask layer are embedded in the second electrodes and are located between the first electrodes and the second electrodes to widen the actual electrode distance of the product to the target value. The top surface of the second electrode is higher than the top surface of the second solder mask layer.

[0059] The distance between the two second electrodes is greater than the distance between the two first electrodes, and the distance between the two second electrodes is 1.4 - 1.8 mm; the thickness of the second electrode is 0.05 - 0.08 mm.

[0060] Step S6, resistance trimming Perform resistance trimming on the product to adjust the resistance value of the product to the set range.

[0061] Step S7, third printing of solder mask Print the solder mask for the third time to form a third solder mask layer, and the third solder mask layer is used to cover the trimming cut. The third solder mask layer is located above the second solder mask layer, that is, the first solder mask layer, the second solder mask layer, and the third solder mask layer are stacked in sequence.

[0062] The top surface of the third solder mask layer is lower than the top surface of the second electrode. The length of the third solder mask layer is less than the length of the second solder mask layer and less than the distance between the two second electrodes; the distance between the end of the third solder mask layer and the end of the second electrode is 0.2 - 0.4 mm.

[0063] Step S8, granulation Cut the sheet with the third solder mask layer into grains.

[0064] Step S9, nickel - tin plating Perform barrel plating of nickel - tin on the corresponding electrodes of the granulated product to obtain an alloy resistor with a low resistance value and a wide electrode spacing. On the premise of ensuring that the resistance value of the product remains unchanged, with the structure and preparation method in the present invention, the obtained electrode spacing is 1.4 - 1.8 mm.

[0065] In the present invention, the first solder mask layer is used to determine the length of the effective resistance area of the product, to make the resistance value of the resistor body, and to prevent oxidation or breakage of the alloy area; the second solder mask layer is used to widen the distance between the two electrodes of the product to achieve the target electrode spacing; the third solder mask layer is used to cover the solder mask breakage caused by trimming the cut and prevent alloy abnormalities and oxidation in the trimming area.

[0066] The present invention also provides an alloy resistor with a low resistance value and a wide electrode spacing prepared according to the above - mentioned preparation method.

[0067] Due to the adoption of the above - mentioned technical solutions, compared with the prior art, the advantages of the present invention are as follows: The preparation method of the alloy resistor with a low resistance value and a wide electrode spacing in the present invention adopts the methods of multiple solder masking and multiple electroplating. Under the condition of the same resistance value of the product, it can effectively increase the electrode spacing of the product and better meet the applicable range of the large pad spacing of the product. Brief Description of the Drawings

[0068] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the accompanying drawings required for the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0069] Figure 1 Schematic flow chart of the preparation method of the alloy resistor in the embodiment of the present invention; Figure 2 Schematic cross-sectional structure diagram of the alloy resistor with low resistance value and wide electrode spacing in the embodiment of the present invention; Figure 3 Schematic diagram of the side etching effect of double-sided etching in the embodiment of the present invention; Figure 4 Schematic diagram of the side etching effect of single-sided etching in the prior art.

[0070] Among them, the reference numerals are: substrate - 1, alloy sheet - 2, first solder mask layer - 3, second solder mask layer - 4, third solder mask layer - 5, first electrode - 6, second electrode - 7. Detailed implementation manners

[0071] In order to enable those skilled in the art to better understand the technical solutions of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0072] The preparation method of the alloy resistor with low resistance value and wide electrode spacing of the present invention includes the following steps: 1. First print a solder mask material on the semi-finished product board with a set circuit pattern to form a first solder mask layer 3 on the semi-finished product board.

[0073] The semi-finished product board includes an alloy sheet 2 and a substrate 1 that are attached to each other. The set circuit pattern is located on the alloy sheet 2, and the first solder mask layer 3 and the first electrode 6 are located above the alloy sheet 2.

[0074] 2. Perform the first copper plating to form two opposite first electrodes 6; the two first electrodes 6 are respectively located at the two ends of the first solder mask layer 3.

[0075] The distance between the two first electrodes 6 is 0.8 - 1.2 mm. The top surface of the first electrode 6 is higher than the top surface of the first solder mask layer 3. The thickness of the first electrode 6 is 0.05 - 0.08 mm.

[0076] 3. Second printing of solder resist material to form a second solder resist layer 4; the second solder resist layer 4 is located above the first solder resist layer 3.

[0077] The top surface of the second solder resist layer 4 is higher than the top surface of the first electrode 6. The length of the second solder resist layer 4 is greater than the length of the first solder resist layer 3; the ends of the second solder resist layer 4 cover one end of the two first electrodes 6 that are close to each other. That is, the second solder resist layer will cover the first electrode, and at the same time, the second solder resist layer is in direct contact with the second electrode (the end of the second solder resist layer is embedded in the second electrode) in order to widen the actual electrode spacing of the product to the target value.

[0078] 4. Perform second copper plating to form two opposite second electrodes 7; the second electrodes 7 are correspondingly located above the first electrodes 6, and the two second electrodes 7 are respectively located at the two ends of the second solder resist layer 4, and the ends of the second solder resist layer are embedded in the second electrodes and are located between the first electrode and the second electrode.

[0079] The spacing between the two second electrodes 7 is greater than the spacing between the two first electrodes 6. The distance between the two second electrodes 7 is 1.4 - 1.8 mm. The top surface of the second electrode 7 is higher than the top surface of the second solder resist layer 4. The thickness of the second electrode 7 is 0.05 - 0.08 mm.

[0080] 5. Third printing of solder resist ink to form a third solder resist layer 5; the third solder resist layer 5 is located above the second solder resist layer 4 and is located between the two second electrodes 7. The resistance value of the obtained alloy resistor is 1 - 3 mΩ.

[0081] The top surface of the third solder resist layer 5 is lower than the top surface of the second electrode 7. The length of the third solder resist layer 5 is less than the length of the second solder resist layer 4. The distance between the two second electrodes 7 is greater than the length of the third solder resist layer 5. The distance between the end of the third solder resist layer 5 and the end of the second electrode 7 is 0.2 - 0.4 mm.

[0082] The first solder resist layer is used to determine the length of the effective resistance area of the product, to make the resistance value of the resistor body, and to prevent oxidation or damage of the alloy area; the second solder resist layer is used to widen the distance between the two electrodes of the product to achieve the target electrode spacing; the third solder resist layer is used to cover the solder resist breakage caused by the resistance trimming, and to prevent alloy anomalies and oxidation in the resistance trimming area.

[0083] Further, the steps include a resistance trimming step before the third printing of solder resist ink, and the third solder resist layer 5 is used to cover the resistance trimming cut.

[0084] Further, the steps include a step of granulating and / or nickel-tin plating after the third printing of solder resist ink.

[0085] In the present invention, the length is defined as the value in the length direction of the alloy resistor product as seen from the product cross-sectional view of the alloy resistor.

[0086] An alloy resistor with a low resistance value (1 - 3 mΩ) and a wide electrode spacing (1.4 - 1.8 mm) can be prepared by the above preparation method.

[0087] Preferably, the semi-finished product sheet is obtained by laminating the alloy sheet 2 with a set circuit pattern and the substrate 1. The alloy sheet 2 with a set circuit pattern is formed by double-sided etching, including the following steps: 1) Dry films are laminated on both sides of the alloy sheet 2, and then exposure and development are carried out to form a first circuit pattern on the dry films.

[0088] During exposure, for the dry films on both sides of the alloy sheet 2, the same set of optical alignment marks is used for alignment to make the second circuit patterns on both sides of the alloy sheet 2 completely corresponding.

[0089] Preferably, the surface of the alloy sheet 2 is pretreated before laminating the dry film to remove the oxides and oil stains on the surface of the alloy sheet 2, which is beneficial to the full lamination of the subsequent dry film and the alloy sheet 2.

[0090] The specific pretreatment is as follows: The alloy sheet 2 is pretreated with a micro-etching solution to remove the surface oil stains and oxides. The micro-etching speed is 1 - 3 m / min, and the micro-etching temperature is 45 ± 5°C.

[0091] The micro-etching solution is a mixed solution formed by sulfuric acid and hydrogen peroxide. The concentration of sulfuric acid in the mixed solution is 5% ± 1%; the concentration of hydrogen peroxide is 5% ± 1%.

[0092] 2) Etching is carried out to form second circuit patterns corresponding to the first circuit patterns on the dry films on both sides of the alloy sheet 2.

[0093] During etching, both sides of the alloy sheet 2 are etched simultaneously, and the etching conditions are kept consistent. The etching conditions are an acidic etching solution, the etching speed is 1 - 3 m / min, and the etching temperature is 45 ± 5°C.

[0094] The second circuit patterns on both sides of the alloy sheet 2 are completely the same. After the etching is completed, the second circuit patterns penetrate through the thickness of the alloy sheet 2 to form the corresponding set circuit pattern. That is, during etching, as the etching progresses, the etching depth of the second circuit patterns corresponding to both sides of the alloy sheet 2 gradually increases and finally penetrates through the thickness direction of the alloy sheet 2, and then the set circuit pattern is obtained on the alloy sheet 2, and the etching is completed.

[0095] 3) Stripping the dry film to remove the dry film on the alloy sheet 2.

[0096] 4) Bond the alloy sheet 2 with a set circuit pattern to the substrate 1 to obtain a semi-finished sheet with a set circuit pattern.

[0097] For bonding the substrate 1, an epoxy resin film is provided between the alloy sheet 2 and the substrate 1. After that, pre-pressing is carried out first, and then vacuum pressing is carried out using a vacuum press.

[0098] The pressing time for the pre-pressing is 100 - 150 s, the pressing pressure is 20 - 30 KG, and the pressing temperature is 140 - 160 °C; the pressing time for the vacuum pressing is 280 - 320 s, the pressing pressure is 50 - 70 KG, and the pressing temperature is 140 - 160 °C.

[0099] Example 1 As Figure 2 shown, the alloy resistor with low resistance and wide electrode spacing in this example includes an alloy sheet 2, a substrate 1, a first solder mask layer 3, a second solder mask layer 4, a third solder mask layer 5, two first electrodes 6, and two second electrodes 7. The two first electrodes 6 are located at the two ends of the first solder mask layer 3. The second solder mask layer 4 is located above the first solder mask layer 3, and the ends of the second solder mask layer 4 cover one end of the two first electrodes 6 close to each other; the two second electrodes 7 are located at the two ends of the second solder mask layer 4, and the ends of the second solder mask layer are embedded in the second electrodes, located between the first electrode and the second electrode, so as to widen the actual electrode spacing of the product to the target value. The third solder mask layer 5 is located above the second solder mask layer 4, and the second electrode 7 is located above the first electrode 6. That is, the first solder mask layer 3, the second solder mask layer 4, and the third solder mask layer 5 are stacked in sequence.

[0100] The semi-finished sheet includes the alloy sheet 2 and the substrate 1 bonded to each other, and the alloy sheet 2 has a set circuit pattern. The first solder mask layer 3 and the first electrode 6 are located above the alloy sheet 2. The first solder mask layer 3, the second solder mask layer 4, the third solder mask layer 5, the two first electrodes 6, and the two second electrodes 7 are all located on the side of the alloy sheet 2 away from the substrate 1.

[0101] The distance between the two second electrodes 7 is greater than the distance between the two first electrodes 6. The distance between the two first electrodes 6 is 1.2 mm; the distance between the two second electrodes 7 is 1.8 mm. The thickness of the first electrode 6 is 0.06 mm; the thickness of the second electrode 7 is 0.06 mm.

[0102] The length of the second solder mask layer 4 is greater than the length of the first solder mask layer 3; the length of the third solder mask layer 5 is less than the length of the second solder mask layer 4 and less than the distance between the two second electrodes 7; the distance between the end of the third solder mask layer 5 and the end of the second electrode 7 is 0.3 mm.

[0103] The top surface of the first electrode 6 is higher than the top surface of the first solder mask layer 3; the top surface of the second solder mask layer 4 is higher than the top surface of the first electrode 6; the top surface of the second electrode 7 is higher than the top surface of the second solder mask layer 4; the top surface of the third solder mask layer 5 is lower than the top surface of the second electrode 7.

[0104] The resistance value of the alloy resistor with low resistance value and wide electrode spacing in the above structure is 1.5 mΩ, and the electrode spacing is 1.8 mm.

[0105] Example 2 The alloy resistor with low resistance value and wide electrode spacing in this example has basically the same structure as that in Example 1. The difference is that the resistance value of the alloy resistor in this example is 1 mΩ, and the electrode spacing is 1.6 mm. The distance between the two first electrodes 6 is 0.8 mm; the distance between the two second electrodes 7 is 1.6 mm. The thickness of the first electrode 6 is 0.05 mm; the thickness of the second electrode 7 is 0.08 mm. The distance between the end of the third solder mask layer 5 and the end of the second electrode 7 is 0.2 mm.

[0106] Example 3 As Figure 1 and Figure 2 shown, the preparation method of the alloy resistor with low resistance value and wide electrode spacing in this example adopts the method of three times of solder mask and two times of electroplating. Under the condition of ensuring that the resistance value of the product meets the requirements, the electrode spacing of the product can be made wider, which can better meet the applicable range of the large pad spacing of the product. The specific steps are as follows: Step S1, prepare a semi-finished product plate with a set circuit pattern The semi-finished product plate is obtained by laminating the alloy sheet 2 with a set circuit pattern and the substrate 1. In this example, the etching of the alloy sheet 2 with a set circuit pattern is preferably carried out by double-sided etching. Specifically as follows: S11, double-sided dry film lamination Use a laminating machine to fully laminate the upper and lower surfaces of the alloy sheet 2 with the dry film.

[0107] The lamination time is 60 s, the lamination pressure: 40 kG, and the lamination temperature: 130 °C.

[0108] Preferably, the surface of the alloy sheet 2 is pretreated before dry film lamination to remove the oxides and oil stains on the surface of the alloy sheet 2, which is beneficial to the full lamination of the subsequent dry film and the alloy sheet 2.

[0109] The pretreatment is specifically: the alloy sheet 2 is pretreated with a micro-etching solution to remove the surface oil stains and oxides, and the micro-etching speed: 2.5 m / min, the micro-etching temperature: 45 ± 5 °C.

[0110] The micro-etching solution is a mixed solution formed by sulfuric acid and hydrogen peroxide, and the concentration of sulfuric acid in the mixed solution is 5%; the concentration of hydrogen peroxide is 5%.

[0111] S12. Exposure and Development Expose both the upper and lower surfaces of the alloy sheet 2 laminated with dry film, and then develop it to obtain a first circuit pattern with a predetermined shape on the dry film on both the upper and lower surfaces of the alloy sheet 2.

[0112] Since it is necessary to ensure that the circuit patterns on both the upper and lower surfaces of the alloy sheet 2 are completely corresponding, in this embodiment, the same set of alignment mark points is used on both the upper and lower surfaces during graphic exposure to ensure the complete correspondence of the first circuit patterns on both sides of the dry film, so that the positions and shapes of the second circuit patterns on the alloy sheet 2 are completely corresponding, and then the final set circuit pattern is obtained.

[0113] S13. Double-sided Etching The developed alloy sheet 2 undergoes an etching operation. During etching, a synchronous etching method is adopted, so that the second circuit patterns corresponding to the first circuit patterns on the dry film are obtained on both the upper and lower surfaces of the alloy sheet 2 at the same time. The positions and shapes of the second circuit patterns on both surfaces of the alloy sheet 2 are completely the same, so that after the etching is completed, a through-set circuit pattern is formed in the thickness of the alloy sheet 2. The etching conditions on both the upper and lower surfaces are the same to reduce the side etching amount and improve the etching efficiency.

[0114] Acidic etching solution is used for etching, etching speed: 2.5 m / min; etching temperature: 45 ± 5 °C. The acidic etching solution is a mixed solution formed by copper chloride and hydrochloric acid. The concentration of copper chloride in the mixed solution is 90%, and the concentration of hydrochloric acid is 8%.

[0115] S14. Stripping The etched alloy sheet 2 is subjected to a stripping treatment to remove the dry film on the surface of the alloy sheet 2. At this time, the alloy sheet 2 with a set circuit pattern is obtained.

[0116] Stripping speed: 1.5 m / min; stripping temperature: 45 ± 5 °C.

[0117] S15. Laminating Substrate 1 First, an epoxy resin film is set between one surface of the etched alloy sheet 2 and the substrate 1; then pre-pressing is carried out, and then vacuum pressing is carried out using a vacuum press to obtain a semi-finished sheet with a set circuit pattern.

[0118] The pressing time for pre-pressing is 120 s, the pressing pressure is 25 KG, and the pressing temperature is 145 °C; the pressing time for vacuum pressing is 300 s, the pressing pressure is 65 KG, and the pressing temperature is 145 °C.

[0119] For alloys of the same thickness and under the same etching conditions, the side etching amount of single-sided etching is at least twice that of double-sided etching. The side etching amount of single-sided etching is large and difficult to control. Using the double-sided etching method to prepare the low-resistance alloy material can reduce the side etching amount of the product, lower the production cost, improve the production efficiency, and is beneficial to the stability of the product.

[0120] Step S2: First printing of solder mask ink First print solder mask ink on the alloy sheet 2 with circuit patterns, expose, and develop to form the first solder mask layer 3 on the semi-finished sheet. Developing is to remove the unexposed ink and expose the alloy at the bottom.

[0121] The first solder mask layer 3 is located at the middle position above the alloy sheet 2. The length of the first solder mask layer 3 determines the resistance value of the product. From the cross-sectional view of the product, this length is the length of the first solder mask layer 3 in the length direction of the product.

[0122] Step S3: First copper plating Perform the first copper plating to form two opposite first electrodes 6. The two first electrodes 6 are located at the two ends of the first solder mask layer 3, and the top surface of the first electrode 6 is higher than the top surface of the first solder mask layer 3. The distance between the two first electrodes 6 is 1.2 mm, and the thickness of the first electrode 6 is 0.06 mm.

[0123] Step S4: Second printing of solder mask ink Print the solder mask ink for the second time to form the second solder mask layer 4. The second solder mask layer 4 is located above the first solder mask layer 3, and the length of the second solder mask layer 4 is greater than the length of the first solder mask layer 3. The top surface of the second solder mask layer 4 is higher than the top surface of the first electrode 6.

[0124] Print, expose, and develop the second solder mask ink on the sheet after the first copper plating. The length of this solder mask ink determines the final electrode spacing of the product; the length of the second solder mask ink is longer than that of the first solder mask ink, and has a minimal impact on the resistance value of the product, and can effectively widen the spacing between the electrodes.

[0125] Step S5: Second copper plating Perform the second copper plating to form two opposite second electrodes 7. The second electrodes 7 are located above the first electrodes 6. The two second electrodes 7 are located at the two ends of the second solder mask layer 4. The ends of the second solder mask layer are embedded in the second electrodes and are located between the first electrodes and the second electrodes to widen the actual electrode spacing of the product to the target value. The top surface of the second electrode 7 is higher than the top surface of the second solder mask layer 4.

[0126] The distance between the two second electrodes 7 is greater than the distance between the two first electrodes 6. The distance between the two second electrodes 7 is 1.8 mm; the thickness of the second electrode 7 is 0.06 mm.

[0127] Step S6, Resistance trimming Perform resistance trimming on the product to adjust the resistance value of the product to the set range.

[0128] Step S7, Third printing of solder mask ink Print the solder mask ink for the third time to form the third solder mask layer 5, and the third solder mask layer 5 is used to cover the trimming edge. The third solder mask layer 5 is located above the second solder mask layer 4, that is, the first solder mask layer 3, the second solder mask layer 4, and the third solder mask layer 5 are stacked in sequence.

[0129] The top surface of the third solder mask layer 5 is lower than the top surface of the second electrode 7. The length of the third solder mask layer 5 is less than the length of the second solder mask layer 4; the distance between the end of the third solder mask layer 5 and the end of the second electrode 7 is 0.3 mm.

[0130] Step S8, Granulation Cut the sheet with the third solder mask layer 5 into grains.

[0131] Step S9, Nickel-tin plating Perform barrel plating of nickel-tin on the corresponding electrodes of the granulated products to obtain an alloy resistor with a low resistance value and a wide electrode spacing. Under the same product resistance value (1.5 mΩ), for the structure and preparation method in this embodiment, the obtained electrode spacing is 1.8 mm.

[0132] Example 4 The difference between the preparation method of the alloy resistor with a low resistance value and a wide electrode spacing in this embodiment and that in Example 3 is only the difference in parameters, and the steps and methods are basically the same. The different parameters are given below: The lamination parameters for step S11 of laminating the dry film include a lamination time of 55 s, a lamination pressure of 50 KG, and a lamination temperature of 150 °C. The micro-etching solution used for pretreatment is a mixed solution formed by sulfuric acid and hydrogen peroxide. The concentration of sulfuric acid in the mixed solution is 4%; the concentration of hydrogen peroxide is 4%. Micro-etching speed: 1.5 m / min, micro-etching temperature: 45 ± 5 °C.

[0133] In step S13 of double-sided etching, the etching speed is 1 m / min; the etching temperature is 45 ± 5 °C. The acidic etching solution is a mixed solution formed by copper chloride and hydrochloric acid. The concentration of copper chloride in the mixed solution is 95%, and the concentration of hydrochloric acid is 5%.

[0134] The stripping speed in step S14 of stripping the film is 1 m / min; the stripping temperature is 45 ± 5 °C.

[0135] In step S15 of laminating the base material 1, the lamination time for pre-lamination is 100 s, the lamination pressure is 30 KG, and the lamination temperature is 160 °C. The lamination time for vacuum lamination is 280 s, the lamination pressure is 70 KG, and the lamination temperature is 160 °C.

[0136] The finally obtained alloy resistor with low resistance value and wide electrode spacing has a resistance value of 1 mΩ and an electrode spacing of 1.6 mm. The spacing between two first electrodes 6 is 0.8 mm, and the thickness of the first electrode 6 is 0.05 mm. The distance between two second electrodes 7 is 1.6 mm; the thickness of the second electrode 7 is 0.08 mm. The distance between the end of the third solder mask layer 5 and the end of the second electrode 7 is 0.2 mm. Example 5

[0137] The preparation method of the alloy resistor with low resistance value and wide electrode spacing in this example is only different from that of Example 3 in terms of parameters, and the steps and methods are basically the same. The different parameters are given below: The lamination parameters for pasting the dry film in Step 11 include a lamination time of 65 s, a lamination pressure of 40 KG; a lamination temperature of 130 °C. The micro-etching solution used for pretreatment is a mixed solution formed by sulfuric acid and hydrogen peroxide. The concentration of sulfuric acid in the mixed solution is 6%; the concentration of hydrogen peroxide is 6%. Micro-etching speed: 3 m / min, micro-etching temperature: 45 ± 5 °C.

[0138] In the double-sided etching in Step S13, the etching speed is 3 m / min; the etching temperature is 45 ± 5 °C. The acidic etching solution is a mixed solution formed by copper chloride and hydrochloric acid. The concentration of copper chloride in the mixed solution is 90%, and the concentration of hydrochloric acid is 10%.

[0139] The stripping speed in Step S14 of stripping the film is 2 m / min; the stripping temperature is 45 ± 5 °C.

[0140] In Step S15 of laminating the base material 1, the pre-lamination time is 150 s, the lamination pressure is 20 KG, and the lamination temperature is 140 °C. The lamination time for vacuum lamination is 320 s, the lamination pressure is 50 KG, and the lamination temperature is 140 °C.

[0141] The finally obtained alloy resistor with low resistance value and wide electrode spacing has a resistance value of 2.5 mΩ and an electrode spacing of 1.8 mm. The spacing between two first electrodes 6 is 1.2 mm, and the thickness of the first electrode 6 is 0.08 mm. The distance between two second electrodes 7 is 1.8 mm; the thickness of the second electrode 7 is 0.05 mm. The distance between the end of the third solder mask layer 5 and the end of the second electrode 7 is 0.4 mm. Comparative Example 1

[0142] The difference between this comparative example and Example 3 is that Steps S4 and S5 in Example 3 do not exist in this comparative example, that is, there is only one printing of the solder mask and one copper plating before resistance trimming in Step S6 of this comparative example. Other steps and parameters are basically the same as those in Example 1.

[0143] On the premise of ensuring that the resistance value of the product remains unchanged, the electrode spacing achieved in this Comparative Example 1 is 0.8 mm for 1.5 mΩ. Comparative Example 2

[0144] The difference between this comparative example and Example 3 is that in step S1 of this comparative example, for preparing a semi-finished sheet with a set circuit pattern, the etching of the alloy sheet 2 with a set circuit pattern is carried out by means of single-sided etching, which successively includes the following steps: laminating the substrate 1, single-sided laminating of dry film, exposure and development, single-sided etching, and stripping the film.

[0145] That is, in this comparative example, laminating the substrate 1 in step S15 is carried out before step S11, and it is single-sided film laminating. Correspondingly, step S13 is single-sided etching. The remaining steps, parameters and Example 1 are basically the same. Testing and Results

[0146] (1) On the premise of ensuring that the resistance value of the product remains unchanged at 1-3 mΩ, the electrode spacing achieved by the method of Comparative Example 1 is only 0.8-1.2 mm, while the electrode spacing of the method of Example 3 can reach 1.4-1.8 mm.

[0147] (2) Test the side etching amount (side etching depth) of the etched alloy sheets in Example 3 and Comparative Example 2: Take samples to make polished sections and measure the dimensions under an optical microscope. The results are as Figure 3 and 4 shown.

[0148] Among them, Figure 3 is a schematic diagram of double-sided etching in Example 3, and the side etching depth is 18.929 μm; Figure 4 is a schematic diagram of single-sided etching in Comparative Example 2, and the side etching depth is 55.554 μm.

[0149] (3) Measure the target resistance product of 1.5 mΩ.

[0150] Resistance value testing method: Weld the resistance product to the test board, measure the resistance value by the four-wire measurement method, and test multiple products to count their resistance values.

[0151] After testing and statistics, the resistance value of the resistance product obtained by single-sided etching in Comparative Example 2 is 1.5 mΩ * (1 - 10%), and the resistance value of the resistance product obtained by double-sided etching in Example 3 is 1.5 mΩ * (1 - 3%). The precision of the resistor product prepared by the method of the example is higher.

[0152] It can be seen that the side etching depth and side etching amount of double-sided etching in the embodiments of the present invention are far lower than those of single-sided etching. The double-sided etching method in the examples can effectively reduce the side etching amount of the product, ensure the stability of the etched resistance value of the product, shorten the etching time at the same time, and improve the production efficiency.

[0153] The existing preparation methods of low-resistance alloy resistors mainly involve preparing resistors with wide electrode spacing by increasing the thickness of the alloy. Although the goal of low resistance can be achieved, the thickness of the product increases, making it impossible to miniaturize and thin the product. For ultra-thin precision alloy resistors, there are requirements for the thickness of the product, which means that the thickness of the raw material alloy cannot be too thick. When designing low-resistance products, only by reducing the effective resistor body length of the product and decreasing the spacing between the electrodes can the resistance value be reduced to obtain the target low-resistance product. Usually, the actual application requirement of the product is to be soldered to pads with large spacing to be compatible with the pad spacing of high-resistance products and unify the pad size, which requires the electrode spacing of the product to be widened. Therefore, there is a contradiction between the resistance value and the spacing setting of the product itself and its actual use conditions. That is, if the same alloy material is used to widen the electrode spacing, thicker alloy material is required, which is contrary to the design of ultra-thin precision alloy resistors. However, the structure and design method of the alloy resistor product in the present invention can, under the condition of ensuring the unchanged alloy thickness, adjust the structure and preparation steps of the product. After achieving the target resistance value of the product first, the electrode spacing of the product can be widened by the second solder mask ink printing. It can not only achieve the design target value of low resistance but also effectively widen the electrode spacing of the product to meet the requirements of large pad spacing.

[0154] Specifically, the manufacturing method of the low-resistance, wide-electrode-spacing alloy resistor product of the present invention is as follows: First, perform resistor line etching to make the effective resistor and electrodes of the product to ensure that the product reaches the target resistance value. Then, apply the first solder mask protection ink to protect the effective resistor body; perform the first copper plating to form the first electrode with a certain thickness. Then, perform the second solder mask ink printing. The length of the solder mask ink this time is longer than that of the first time to achieve the target electrode width; then perform the second electrode copper plating to form the second electrode. After trimming the resistor, perform the third solder mask ink printing. Subsequently, obtain single products through cutting and barrel plating. The second solder mask layer of the alloy resistor will cover the first electrode, and at the same time, the second solder mask layer is in direct contact with the second electrode (the end of the second solder mask layer is embedded in the second electrode), which can effectively widen the distance between the electrodes under the condition of ensuring the resistance value of the product, so that it can be better applied to the use scenario of large pad spacing.

[0155] The above embodiments are only used to illustrate the technical concept and characteristics of the present invention. The purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly, and it cannot be used to limit the protection scope of the present invention. All equivalent changes or modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.

[0156] The endpoints and any values in the ranges disclosed herein are not limited to the exact ranges or values, and these ranges or values should be understood to include values close to these ranges or values. For numerical ranges, between the endpoint values of each range, between the endpoint values of each range and individual point values, and between individual point values, they can be combined with each other to obtain one or more new numerical ranges, and these numerical ranges should be regarded as specifically disclosed herein.

Claims

1. A preparation method of an alloy resistor with a low resistance value and a wide electrode spacing, characterized in that, It includes the following steps: Print the solder mask material for the first time on the semi-finished sheet with a set circuit pattern to form a first solder mask layer on the semi-finished sheet; Perform the first copper plating to form two opposite first electrodes; The two first electrodes are respectively located at two ends of the first solder mask layer; Print the solder mask material for the second time to form a second solder mask layer; The second solder mask layer is located above the first solder mask layer; Perform the second copper plating to form two opposite second electrodes; The second electrodes are correspondingly located above the first electrodes, and the two second electrodes are respectively located at two ends of the second solder mask layer.

2. The preparation method according to claim 1, wherein The distance between the two second electrodes is greater than the distance between the two first electrodes.

3. The preparation method according to claim 1 or 2, characterized in that, The distance between the two second electrodes is 1.4 - 1.8 mm; the distance between the two first electrodes is 0.8 - 1.2 mm.

4. The preparation method according to claim 1, wherein The top surface of the first electrode is higher than the top surface of the first solder mask layer.

5. The preparation method according to claim 1, wherein The top surface of the second solder mask layer is higher than the top surface of the first electrode.

6. The preparation method according to claim 1, wherein The length of the second solder mask layer is greater than the length of the first solder mask layer; the ends of the second solder mask layer cover one end of the two first electrodes close to each other.

7. The preparation method according to claim 1, characterized in that, The top surface of the second electrode is higher than the top surface of the second solder mask layer.

8. The preparation method according to claim 1, wherein The steps include printing the solder mask material for the third time to form a third solder mask layer; the third solder mask layer is located above the second solder mask layer and between the two second electrodes.

9. The preparation method according to claim 8, characterized in that, The top surface of the third solder mask layer is lower than the top surface of the second electrode.

10. The preparation method according to claim 8, characterized in that, The length of the third solder mask layer is less than the length of the second solder mask layer.

11. The preparation method according to claim 8, wherein The distance between the two second electrodes is greater than the length of the third solder mask layer.

12. The preparation method according to claim 11, wherein, The distance between the end of the third solder mask layer and the end of the second electrode is 0.2 - 0.4 mm.

13. The preparation method according to claim 1, characterized in that, The semi-finished sheet includes a bonded alloy sheet and a substrate, the set circuit pattern is located on the alloy sheet, and the first solder mask layer and the first electrodes are located above the alloy sheet.

14. The preparation method according to claim 1, characterized in that, The resistance value of the alloy resistor is 1 - 3 mΩ.

15. The preparation method according to claim 8, wherein, The steps include a resistance trimming step before printing the solder mask material for the third time, and the third solder mask layer is used to cover the trimming edge.

16. The preparation method according to claim 8, wherein The steps include a grain separation and / or nickel-tin plating step after printing the solder mask material for the third time.

17. The preparation method according to claim 1, characterized in that, The semi-finished sheet with a set circuit pattern is formed by double-sided etching, and includes the following steps: Bond dry films on both sides of the alloy sheet, and then perform exposure and development to form a first circuit pattern on the dry films; Etch to form second circuit patterns corresponding to the first circuit patterns on the dry films on both sides of the alloy sheet; Strip the film to remove the dry film on the alloy sheet; Bond the alloy sheet and the substrate to obtain a semi-finished sheet with a set circuit pattern.

18. The preparation method according to claim 17, characterized in that, The second circuit patterns on both sides of the alloy sheet are completely consistent, and after the etching is completed, the second circuit patterns penetrate through the thickness of the alloy sheet to form corresponding set circuit patterns.

19. The preparation method according to claim 17, characterized in that, During the etching, both sides of the alloy sheet are etched simultaneously, and the etching conditions are kept consistent.

20. The preparation method according to claim 17, wherein, The etching conditions are an acidic etching solution, an etching speed of 1 - 3 m / min; an etching temperature of 45 ± 5°C.

21. The preparation method according to claim 17, characterized in that, The alloy sheet and the substrate are bonded by arranging an adhesive film between the alloy sheet and the substrate, followed by pre-pressing and then vacuum pressing.

22. The preparation method according to claim 21, wherein For the pre-pressing, the pressing time is 100 - 150 s, the pressing pressure is 20 - 30 KG, and the pressing temperature is 140 - 160 °C; for the vacuum pressing, the pressing time is 280 - 320 s, the pressing pressure is 50 - 70 KG, and the pressing temperature is 140 - 160 °C.

23. The preparation method according to claim 17, wherein During the exposure, for the dry films on both sides of the alloy sheet, the same set of optical alignment marks is used for alignment.

24. An alloy resistor with low resistance value and wide electrode spacing prepared by the preparation method according to any one of claims 1 - 22.

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