Semiconductor active layer structure and preparation method thereof

Abstract

The invention provides a semiconductor active layer structure and a preparation method thereof, and relates to the field of semiconductors. The semiconductor active layer preparation method provided by the invention comprises the following steps: providing a substrate; depositing a first oxide semiconductor layer including interstitial oxygen over the substrate; depositing a second oxide semiconductor layer including oxygen vacancies over the first oxide semiconductor layer, the second oxide semiconductor layer having a thickness smaller than that of the first oxide semiconductor layer; and re-oxidizing the second oxide semiconductor layer so that the interstitial oxygen in the first oxide semiconductor layer and the oxygen vacancies in the second oxide semiconductor layer are compounded. According to the invention, the problems that the oxide semiconductor material with high mobility is large in oxygen vacancy concentration, the threshold voltage deviates from the normal value greatly and the oxide semiconductor material is difficult to apply are solved, and the mobility of the semiconductor device is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductors, and particularly to a semiconductor active layer structure and a method for preparing the same. Background Art

[0002] Amorphous oxide semiconductors (AOS) have been widely studied and considered as candidate materials for high-performance semiconductor technologies due to their high carrier mobility, low off-state current (I off ), excellent optical transparency, and low processing temperature. However, the emergence of emerging industries such as 5G, artificial intelligence, and virtual reality has put forward higher requirements for the mobility of AOS (>80 cm 2 ·V -1 ·s -1 ). The mobility of indium gallium zinc oxide (InGaZnO) TFTs currently used in large-scale production applications is only about 10 cm 2 ·V -1 ·s -1 , which is difficult to meet future requirements. However, for oxide semiconductor materials with higher mobility, their oxygen vacancy concentration is relatively large, and the threshold voltage deviates significantly from the normal value, making them difficult to apply. Summary of the Invention

[0003] In view of the technical problems existing in the prior art, this application provides a method for preparing a semiconductor active layer, including: providing a substrate; depositing a first oxide semiconductor layer including interstitial oxygen above the substrate; depositing a second oxide semiconductor layer including oxygen vacancies above the first oxide semiconductor layer, the thickness of the second oxide semiconductor layer being less than that of the first oxide semiconductor layer; and re-oxidizing the second oxide semiconductor layer so that the interstitial oxygen in the first oxide semiconductor layer and the oxygen vacancies in the second oxide semiconductor layer are combined.

[0004] Specifically, in the method for preparing a semiconductor active layer provided in this application, during the deposition process of the first oxide semiconductor layer, the flow ratio of argon to oxygen is less than 1.

[0005] Specifically, in the method for preparing a semiconductor active layer provided in this application, the atomic proportion content of indium in the second oxide semiconductor layer is 80%-100%, and / or the atomic proportion content of tin is 0%-10%.

[0006] Specifically, in the method for preparing a semiconductor active layer provided in this application, the preparation process of the first oxide semiconductor layer is physical vapor deposition (PVD), the preparation process of the second oxide semiconductor layer is atomic layer deposition (ALD), and during the growth of the second oxide semiconductor layer, it is re-oxidized.

[0007] Specifically, for the method of preparing a semiconductor active layer proposed in this application, physical vapor deposition (PVD) is used to form the first oxide semiconductor layer and the second oxide semiconductor layer, and then an annealing operation is performed for re-oxidation.

[0008] Specifically, for the method of preparing a semiconductor active layer proposed in this application, during the deposition process of the second oxide semiconductor layer, the temperature is 150°C - 250°C.

[0009] Specifically, for the method of preparing a semiconductor active layer proposed in this application, it includes performing plasma treatment at the interface between the first oxide semiconductor layer and the second oxide semiconductor layer.

[0010] Specifically, for the method of preparing a semiconductor active layer proposed in this application, the plasma treatment includes using hydrogen plasma, oxygen plasma, or fluorine plasma.

[0011] This application also proposes a method of preparing a semiconductor active layer, including: providing a substrate; depositing a third oxide semiconductor layer including oxygen vacancies above the substrate; depositing a fourth oxide semiconductor layer including interstitial oxygen above the third oxide semiconductor layer, and the thickness of the fourth oxide semiconductor layer is greater than that of the third oxide semiconductor layer; re-oxidizing the third oxide semiconductor layer so that the interstitial oxygen in the fourth oxide semiconductor layer and the oxygen vacancies in the third oxide semiconductor layer are combined.

[0012] Specifically, for the method of preparing a semiconductor active layer proposed in this application, during the deposition process of the fourth oxide semiconductor layer, the flow rate ratio of argon to oxygen is less than 1.

[0013] Specifically, for the method of preparing a semiconductor active layer proposed in this application, the atomic proportion content of indium in the third oxide semiconductor layer is 80% - 100%, and / or the atomic proportion content of tin is 0% - 10%.

[0014] Specifically, for the method of preparing a semiconductor active layer proposed in this application, physical vapor deposition (PVD) is used to form the third oxide semiconductor layer and the fourth oxide semiconductor layer, and then an annealing operation is performed for re-oxidation.

[0015] Specifically, for the method of preparing a semiconductor active layer proposed in this application, it includes performing plasma treatment at the interface between the third oxide semiconductor layer and the fourth oxide semiconductor layer.

[0016] Specifically, for the method of preparing a semiconductor active layer proposed in this application, the plasma treatment includes using hydrogen plasma, oxygen plasma, or fluorine plasma.

[0017] The present application also provides a semiconductor active layer structure, which includes a first oxide semiconductor layer and a second oxide semiconductor layer in contact therewith. The thickness of the first oxide semiconductor layer is greater than that of the second oxide semiconductor layer. The thickness of the first oxide semiconductor layer is 20 - 40 nm, and the thickness of the second oxide semiconductor layer is 2 - 10 nm. In the second oxide semiconductor layer, the atomic proportion content of indium is 80% - 100%.

[0018] Specifically, in the semiconductor active layer structure provided by the present application, in the second oxide semiconductor layer, the atomic proportion content of tin is 0% - 10%.

[0019] The present application also provides an electronic device, which includes the above-mentioned semiconductor active layer structure.

[0020] Due to the adoption of the active layer structure of the present application, the situation where the threshold voltage is damaged due to the original oxygen vacancy defects in the material with higher mobility is alleviated, and it can be used to realize a high-mobility device with a threshold voltage at a normal level. Description of the Drawings

[0021] Figure 1 is a schematic diagram of a semiconductor active layer structure according to an embodiment of the present application; Figure 2 is a flowchart of a method for preparing a semiconductor active layer according to an embodiment of the present application; Figure 3 is a schematic diagram of the state of the preparation process of a semiconductor active layer according to an embodiment of the present application; Figure 4 is a schematic diagram of a semiconductor active layer structure before re-oxidation according to an embodiment of the present application; Figure 5 is a schematic diagram of a semiconductor active layer structure after re-oxidation according to an embodiment of the present application; Figure 6 is a flowchart of a method for preparing a semiconductor active layer according to an embodiment of the present application; Figure 7 is a schematic diagram of the state of the preparation process of a semiconductor active layer according to an embodiment of the present application; Figure 8 is a flowchart of a method for preparing a semiconductor active layer according to an embodiment of the present application; Figure 9 is a schematic diagram of the state of the preparation process of a semiconductor active layer according to an embodiment of the present application. Detailed Description of the Embodiment

[0022] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of this application. Apparently, the described embodiments are some, but not all, of the embodiments of this application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of this application without creative efforts shall fall within the scope of protection of this application.

[0023] In the following detailed description, reference may be made to the accompanying drawings that form a part hereof, and in which are shown by way of illustration specific embodiments in which the application may be practiced. In the drawings, like reference numerals describe substantially similar components in different views. The various specific embodiments of the application have been described in sufficient detail below to enable those of ordinary skill in the relevant art to practice the technical solutions of the application. It should be understood that other embodiments may be utilized or structural, logical, or electrical changes may be made to the embodiments of the application.

[0024] Techniques, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the techniques, methods, and devices should be regarded as part of the description. Regarding the connections between the units in the drawings, it is only for the convenience of explanation, indicating that at least the units at both ends of the connection communicate with each other, and it is not intended to limit that the units not connected cannot communicate. Additionally, the number of lines between two units is intended to represent at least the number of signals involved in the communication between the two units or at least the number of output terminals, and is not used to limit that the two units can only communicate with the signals shown in the figure.

[0025] A transistor may refer to a transistor of any structure, such as a field-effect transistor (FET) or a bipolar junction transistor (BJT). When the transistor is a field-effect transistor, depending on the channel material, it can be hydrogenated amorphous silicon, metal oxide, low-temperature polycrystalline silicon, organic transistor, etc. Depending on whether the carriers are electrons or holes, it can be divided into N-type transistors and P-type transistors. Its control electrode refers to the gate of the field-effect transistor. The first electrode can be the drain or source of the field-effect transistor, and the corresponding second electrode can be the source or drain of the field-effect transistor. The control electrode or the third electrode can be the gate. When the transistor is a bipolar junction transistor, its control electrode refers to the base of the bipolar junction transistor. The first electrode can be the collector or emitter of the bipolar junction transistor, and the corresponding second electrode can be the emitter or collector of the bipolar junction transistor. The control electrode or the third electrode can be the base. The transistor can be fabricated using amorphous silicon, polycrystalline silicon, oxide semiconductor, organic semiconductor, NMOS / PMOS process, or CMOS process.

[0026] Figure 1 It is a schematic diagram of a semiconductor active layer structure according to an embodiment of the present application.

[0027] According to one embodiment, as Figure 1 shown, the semiconductor active layer structure may be located above the substrate 103.

[0028] According to one embodiment, the semiconductor active layer structure may include a first oxide semiconductor layer 101, which is located above the substrate 103. According to one embodiment, the material of the first oxide semiconductor layer 101 may include an oxide semiconductor material, such as indium gallium oxide (InGaO), indium zinc oxide (InZnO), indium tin oxide (InSnO), indium sesquioxide (In2O3), indium zinc tin oxide (InZnSnO). According to one embodiment, the thickness of the first oxide semiconductor layer 101 may be 20 - 40 nm.

[0029] According to one embodiment, before the re-oxidation process, the first oxide semiconductor layer 101 includes interstitial oxygen. Interstitial oxygen refers to additional oxygen atoms in the lattice interstitial, usually introduced by processes such as high-temperature oxidation or ion implantation, and its presence will change the local electron cloud distribution. Before the re-oxidation process, the reason why the first oxide semiconductor layer 101 contains intermittent oxygen is that the oxygen partial pressure in the sputtering atmosphere is relatively large during the preparation process.

[0030] According to one embodiment, the semiconductor active layer structure may further include a second oxide semiconductor layer 102, located above the first oxide semiconductor layer 101. According to one embodiment, the material of the second oxide semiconductor layer 102 may include an oxide semiconductor material, such as indium gallium oxide (InGaO), indium zinc oxide (InZnO), gallium sesquioxide (Ga2O3), gallium zinc oxide (GaZnO), indium sesquioxide (In2O3). According to one embodiment, the thickness of the second oxide semiconductor layer 102 may be 2 - 10 nm.

[0031] According to one embodiment, before the re-oxidation process, the second oxide semiconductor layer 102 includes oxygen vacancies. According to one embodiment, the vacancies formed by the absence of oxygen atoms in the lattice are widely present in oxide semiconductors. According to one embodiment, the concentration of oxygen vacancies in the second oxide semiconductor layer 102 is related to the atomic ratio of indium, and in some cases, it is also related to the atomic ratio of tin. According to one embodiment, the atomic ratio content of indium (In) in the second oxide semiconductor layer 102 may be 80% - 100%, and the atomic ratio content of tin (Sn) may be 0% - 10%.

[0032] According to one embodiment, after the re-oxidation process, at least part or all of the oxygen vacancies in the second oxide semiconductor layer 102 are combined with the interstitial oxygen in the first oxide.

[0033] According to different embodiments, the second oxide semiconductor layer 102 containing oxygen vacancies before re-oxidation may also be located below the first oxide semiconductor layer 101 containing interstitial oxygen before re-oxidation.

[0034] Figure 2 FIG. 4 is a flowchart of a method for preparing a semiconductor active layer according to an embodiment of the present application. Figure 3 FIG. 5 is a schematic diagram of the state of the semiconductor active layer preparation process according to an embodiment of the present application.

[0035] Step 201: As shown in (a) of FIG. 4, a substrate 303 is provided. Figure 3 As shown in (a) of FIG. 4, a substrate 303 is provided.

[0036] Step 202: As shown in (b) of FIG. 4, a first oxide semiconductor layer 301 is deposited above the substrate 303. According to one embodiment, the first oxide semiconductor layer 301 may be formed by, for example, a physical vapor deposition process. According to one embodiment, the material of the first oxide semiconductor layer 301 may include an oxide semiconductor material, such as InGaO, InZnO, InSnO, In2O3, InZnSnO, etc., and its thickness may be 20 - 40 nm. According to one embodiment, during the deposition process of the first oxide semiconductor layer 301, the flow rate ratio of argon to oxygen is less than 1. Figure 3 As shown in (b) of FIG. 4, a first oxide semiconductor layer 301 is deposited above the substrate 303. According to one embodiment, the first oxide semiconductor layer 301 may be formed by, for example, a physical vapor deposition process. According to one embodiment, the material of the first oxide semiconductor layer 301 may include an oxide semiconductor material, such as InGaO, InZnO, InSnO, In2O3, InZnSnO, etc., and its thickness may be 20 - 40 nm. According to one embodiment, during the deposition process of the first oxide semiconductor layer 301, the flow rate ratio of argon to oxygen is less than 1.

[0037] Optionally, Step 203: As shown in (c) of FIG. 4, the interface of the first oxide semiconductor layer 301 is subjected to plasma treatment. The plasma treatment may be performed using hydrogen plasma, oxygen plasma, and fluorine plasma. During the plasma treatment modification process, excessive power may lead to an increase in defects at the interface. Therefore, the power of the plasma treatment is set at 10 W - 50 W. Figure 3 As shown in (c) of FIG. 4, the interface of the first oxide semiconductor layer 301 is subjected to plasma treatment. The plasma treatment may be performed using hydrogen plasma, oxygen plasma, and fluorine plasma. During the plasma treatment modification process, excessive power may lead to an increase in defects at the interface. Therefore, the power of the plasma treatment is set at 10 W - 50 W.

[0038] Step 204: As shown in (d) of FIG. 4, a second oxide semiconductor layer 302 is deposited above the first oxide semiconductor layer 301. According to one embodiment, the second oxide semiconductor layer 302 may be formed by, for example, an atomic layer deposition process. According to one embodiment, the temperature of the deposition process of the second oxide semiconductor layer 302 may be 150°C - 250°C. The atomic layer deposition process is that the metal element precursor is oxidized to form the metal element oxide. However, there are some non-ideal processes during the oxidation process, the metal and oxygen combine weakly, and oxygen escapes during the deposition process, resulting in more oxygen vacancies in the oxide grown by atomic layer deposition. According to one embodiment, the material of the second oxide semiconductor layer 302 may include an oxide semiconductor material, such as InGaO, InZnO, Ga2O3, GaZnO, In2O3, etc., and its thickness may be 2 - 10 nm. Figure 3 As shown in (d) of FIG. 4, a second oxide semiconductor layer 302 is deposited above the first oxide semiconductor layer 301. According to one embodiment, the second oxide semiconductor layer 302 may be formed by, for example, an atomic layer deposition process. According to one embodiment, the temperature of the deposition process of the second oxide semiconductor layer 302 may be 150°C - 250°C. The atomic layer deposition process is that the metal element precursor is oxidized to form the metal element oxide. However, there are some non-ideal processes during the oxidation process, the metal and oxygen combine weakly, and oxygen escapes during the deposition process, resulting in more oxygen vacancies in the oxide grown by atomic layer deposition. According to one embodiment, the material of the second oxide semiconductor layer 302 may include an oxide semiconductor material, such as InGaO, InZnO, Ga2O3, GaZnO, In2O3, etc., and its thickness may be 2 - 10 nm.

[0039] Figure 4Schematic diagram of a semiconductor active layer structure before re-oxidation according to an embodiment of the present application. Figure 5 Schematic diagram of a semiconductor active layer structure after re-oxidation according to an embodiment of the present application.

[0040] Figure 4 and Figure 5 Taking the semiconductor active layer structure where the second oxide semiconductor layer is In2O3 as an example.

[0041] According to an embodiment, during the process of forming the second oxide semiconductor layer 402 by atomic layer deposition method, re-oxidation will occur. The specific principle of re-oxidation is as Figure 4 and Figure 5 shown.

[0042] According to an embodiment, there are oxygen vacancies in the second oxide semiconductor layer 402. Oxygen vacancies are vacancies formed by the absence of oxygen atoms in the lattice and are widely present in metal oxides. Oxygen vacancies change the oxidation state of the material by reducing the oxygen coordination number.

[0043] According to an embodiment, there is interstitial oxygen (Oi) in the first oxide semiconductor layer 401. Interstitial oxygen refers to extra oxygen atoms in the lattice interstitial, usually introduced by processes such as high oxygen partial pressure in the sputtering atmosphere or ion implantation, and its presence will change the local electron cloud distribution.

[0044] According to an embodiment, during the growth of the second oxide semiconductor layer 402, the interstitial oxygen in the first oxide semiconductor layer 401 can re-oxidize the oxygen vacancies in the second oxide semiconductor layer 402, playing a role in repair and greatly reducing the oxygen vacancy concentration in the second oxide semiconductor layer 402. This process is called the re-oxidation process. The semiconductor active layer structure after re-oxidation is as Figure 5 shown.

[0045] According to an embodiment, during the growth of the second oxide semiconductor layer 402, the interstitial oxygen is constantly lost, and the growth process of the second oxide semiconductor layer 402 is slow, so the first oxide semiconductor layer 401 needs to provide enough interstitial oxygen. Therefore, the first oxide semiconductor layer 401 is thicker, and its thickness can be 20 - 40 nm. The second oxide semiconductor layer 402 is thinner, and its thickness can be 2 - 10 nm.

[0046] According to an embodiment, during the plasma treatment modification process of step 203 above, hydrogen, oxygen or fluorine plasma is implanted into the first oxide semiconductor layer, and the anions therein will participate in the subsequent re-oxidation process. These anions have the same effect as interstitial oxygen and can repair oxygen vacancies, making the repair effect of the re-oxidation process better.

[0047] According to one embodiment, if the second oxide semiconductor layer 402 is formed by physical vapor deposition, re-oxidation needs to be completed during the subsequent annealing process.

[0048] Figure 6 is a flowchart of a method for preparing a semiconductor active layer according to an embodiment of the present application. Figure 7 is a schematic diagram of the state of the semiconductor active layer preparation process according to an embodiment of the present application.

[0049] Step 601: As shown in (a) of Figure 7 , provide a substrate 703.

[0050] Step 602: As shown in (b) of Figure 7 , deposit a first oxide semiconductor layer 701 above the substrate 703. According to one embodiment, the first oxide semiconductor layer 701 can be formed by, for example, a physical vapor deposition process. According to one embodiment, the material of the first oxide semiconductor layer 701 can include an oxide semiconductor material, such as InGaO, InZnO, InSnO, In2O3, InZnSnO, etc., and its thickness can be 20 - 40 nm. According to one embodiment, during the deposition process of the first oxide semiconductor layer 701, the flow rate ratio of argon to oxygen is less than 1.

[0051] Optionally, Step 603: As shown in (c) of Figure 7 , perform plasma treatment on the interface of the first oxide semiconductor layer 701. The plasma treatment can be carried out using hydrogen plasma, oxygen plasma, and fluorine plasma. During the plasma treatment process, too high power will lead to an increase in defects at the interface, so the power of the plasma treatment is set at 10 W - 50 W.

[0052] Step 604: As shown in (d) of Figure 7 , deposit a second oxide semiconductor layer 702 above the first oxide semiconductor layer 701. According to one embodiment, the second oxide semiconductor layer 702 can be formed by, for example, a physical vapor deposition process. According to one embodiment, the material of the second oxide semiconductor layer 702 can include an oxide semiconductor material, such as InGaO, InZnO, Ga2O3, GaZnO, In2O3, etc., and its thickness can be 2 - 10 nm.

[0053] Step 605: Anneal the structure formed by the above process. According to one embodiment, the annealing temperature can be between 300°C and 400°C.

[0054] Figure 8 is a flowchart of a method for preparing a semiconductor active layer according to an embodiment of the present application. Figure 9 is a schematic diagram of the state of the semiconductor active layer preparation process according to an embodiment of the present application.

[0055] Step 801: As shown in (a) of Figure 9 , provide a substrate 903.

[0056] Step 802: As shown in (b) of Figure 9 , deposit a third oxide semiconductor layer 902 above the substrate 903. According to one embodiment, the third oxide semiconductor layer 902 can be formed by, for example, a physical vapor deposition process. According to one embodiment, the material of the third oxide semiconductor layer 902 can include an oxide semiconductor material, such as InGaO, InZnO, Ga2O3, GaZnO, In2O3, etc., and its thickness can be 2 - 10 nm.

[0057] Optionally, Step 803: As shown in (c) of Figure 9 , perform plasma treatment on the interface of the third oxide semiconductor layer 902. The plasma treatment can be carried out using hydrogen plasma, oxygen plasma, and fluorine plasma. During the plasma treatment, too high power will cause an increase in defects at the interface, so the power of the plasma treatment is set at 10 W - 50 W.

[0058] Step 804: As shown in (d) of Figure 9 , deposit a fourth oxide semiconductor layer 901 above the third oxide semiconductor layer 902. According to one embodiment, the fourth oxide semiconductor layer 901 can be formed by, for example, a physical vapor deposition process. According to one embodiment, the material of the fourth oxide semiconductor layer 901 can include an oxide semiconductor material, such as InGaO, InZnO, InSnO, In2O3, InZnSnO, etc., and its thickness can be 20 - 40 nm. According to one embodiment, during the deposition of the fourth oxide semiconductor layer 901, the flow ratio of argon to oxygen is less than 1.

[0059] Step 805: Anneal the structure formed by the above process. According to one embodiment, the annealing temperature can be 300 °C - 400 °C.

[0060] Due to the adoption of the active layer structure of the present application, the situation where the threshold voltage is damaged due to the original oxygen vacancy defects in the material with a higher mobility is alleviated, and it can be used to realize a high-mobility device with a normal threshold voltage.

[0061] The present application also provides an electronic device, which includes the active layer structure as described above.

[0062] The above embodiments are only for illustrating the present application and are not intended to limit the present application. Those of ordinary skill in the relevant technical field can also make various changes and modifications without departing from the scope of the present application. Therefore, all equivalent technical solutions should also fall within the scope of the disclosure of the present application.

Claims

1. A method for preparing a semiconductor active layer, characterized in that, Comprising: Providing a substrate; Above the substrate, depositing a first oxide semiconductor layer comprising interstitial oxygen; Above the first oxide semiconductor layer, depositing a second oxide semiconductor layer comprising oxygen vacancies, the thickness of which is less than that of the first oxide semiconductor layer; Re-oxidizing the second oxide semiconductor layer so that the interstitial oxygen in the first oxide semiconductor layer and the oxygen vacancies in the second oxide semiconductor layer are recombined.

2. The preparation method according to claim 1, wherein During the deposition process of the first oxide semiconductor layer, the flow rate ratio of argon to oxygen is less than 1.

3. The preparation method according to claim 1, characterized in that, The atomic proportion content of indium in the second oxide semiconductor layer is 80%-100%, and / or the atomic proportion content of tin is 0%-10%.

4. The preparation method according to claim 1, characterized in that, The preparation process of the first oxide semiconductor layer is physical vapor deposition (PVD), and the preparation process of the second oxide semiconductor layer is atomic layer deposition (ALD). During the growth process of the second oxide semiconductor layer, it is re-oxidized.

5. The preparation method according to claim 1, wherein The first oxide semiconductor layer and the second oxide semiconductor layer are formed by physical vapor deposition (PVD), and then an annealing operation is performed for re-oxidation.

6. The preparation method according to claim 4, characterized in that, During the deposition process of the second oxide semiconductor layer, the temperature is 150°C - 250°C.

7. The preparation method according to any one of claims 1-6, characterized in that, Comprising performing plasma treatment at the interface between the first oxide semiconductor layer and the second oxide semiconductor layer.

8. The preparation method according to claim 7, characterized in that, The plasma treatment includes using hydrogen plasma, oxygen plasma or fluorine plasma.

9. A method for preparing a semiconductor active layer, characterized in that Comprising: Providing a substrate; Above the substrate, depositing a third oxide semiconductor layer comprising oxygen vacancies; Above the third oxide semiconductor layer, depositing a fourth oxide semiconductor layer comprising interstitial oxygen, the thickness of which is greater than that of the third oxide semiconductor layer; Re-oxidizing the third oxide semiconductor layer so that the interstitial oxygen in the fourth oxide semiconductor layer and the oxygen vacancies in the third oxide semiconductor layer are recombined.

10. The preparation method according to claim 9, characterized in that, During the deposition process of the fourth oxide semiconductor layer, the flow rate ratio of argon to oxygen is less than 1.

11. The preparation method according to claim 9, characterized in that, The atomic proportion content of indium in the third oxide semiconductor layer is 80%-100%, and / or the atomic proportion content of tin is 0%-10%.

12. The preparation method according to claim 9, characterized in that, The third oxide semiconductor layer and the fourth oxide semiconductor layer are formed by physical vapor deposition (PVD), and then an annealing operation is performed for re-oxidation.

13. According to the preparation method described in any one of claims 9-12, characterized in that, Comprising performing plasma treatment at the interface between the third oxide semiconductor layer and the fourth oxide semiconductor layer.

14. The preparation method according to claim 13, wherein The plasma treatment includes using hydrogen plasma, oxygen plasma or fluorine plasma.

15. A semiconductor active layer structure, characterized in that, Comprising a first oxide semiconductor layer and a second oxide semiconductor layer in contact therewith, wherein the thickness of the first oxide semiconductor layer is greater than that of the second oxide semiconductor layer, the thickness of the first oxide semiconductor layer is 20 - 40 nm, the thickness of the second oxide semiconductor layer is 2 - 10 nm, and in the second oxide semiconductor layer, the atomic proportion content of indium is 80%-100%.

16. The semiconductor active layer structure according to claim 15, characterized in that, In the second oxide semiconductor layer, the atomic proportion content of tin is 0%-10%.

17. An electronic device, characterized in that, Comprising the semiconductor active layer structure according to claim 15 or 16.

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