Manufacturing method of package substrate, package substrate and electronic equipment

Abstract

The invention provides a manufacturing method of a packaging substrate, the packaging substrate and electronic equipment, and relates to the technical field of semiconductors, the method comprises the steps that a hard first substrate and a hard second substrate are provided, the first substrate comprises a first surface, the first surface is provided with a first conductive circuit, the second substrate comprises a second surface, and the second surface is provided with a second conductive circuit; bonding the first substrate and the second substrate through a first bonding layer; through holes are formed in preset positions of the first substrate and the second substrate respectively, and the through holes penetrate through the first bonding layer; and filling the through hole so that the first conductive circuit is electrically connected with the second conductive circuit. According to the manufacturing method, the manufacturing precision of the conductive circuit in the packaging substrate can be improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular, to a method for manufacturing a packaging substrate, a packaging substrate, and an electronic device. Background Art

[0002] Existing electronic devices generally consist of a packaging substrate, a PCB board, and semiconductor devices connected to the packaging substrate.

[0003] A packaging substrate usually includes a substrate, conductive lines formed on the substrate, and insulating layers. When manufacturing a packaging substrate, usually an insulating layer is first formed on the substrate, conductive lines are fabricated on the insulating layer, then another insulating layer is formed, and conductive lines are fabricated on the insulating layer again.

[0004] Since the conductive lines have a certain height, after the conductive lines are formed on the insulating layer, when the next insulating layer and conductive lines are formed, the flatness of the conductive lines will be poor, thus resulting in a low manufacturing precision of the conductive lines. Summary of the Invention

[0005] The present application provides a method for manufacturing a packaging substrate, a packaging substrate, and an electronic device, which can improve the manufacturing precision of conductive lines in the packaging substrate.

[0006] To achieve the above object, the present application adopts the following technical solutions:

[0007] In a first aspect, a method for manufacturing a packaging substrate is provided. The packaging substrate at least includes a first substrate and a second substrate. The method includes: providing a rigid first substrate and a second substrate, where the first substrate includes a first surface on which a first conductive line is provided, and the second substrate includes a second surface on which a second conductive line is provided; bonding the first substrate and the second substrate through a first adhesive layer; respectively providing through holes at preset positions on the first substrate and the second substrate, the through holes penetrating the first adhesive layer; performing a hole filling process on the through holes so that the first conductive line is electrically connected to the second conductive line.

[0008] Based on this solution, compared with the existing solution of first spraying an insulating material on a substrate to form an insulating layer and then fabricating a layer of conductive circuits on the insulating layer, the solution of the present application provides a rigid first substrate and a second substrate, and bonds the first substrate and the second substrate through a first adhesive layer; through holes penetrating the first adhesive layer are respectively provided at preset positions of the first substrate and the second substrate. The first substrate includes a first surface on which a first conductive circuit is provided, and the second substrate includes a second surface on which a second conductive circuit is provided. By performing a hole filling process on the through holes, the first conductive circuit can be electrically connected to the second conductive circuit. Since the first substrate and the second substrate are rigid substrates, the influence of the height of the wire circuit on the flatness of the underlying substrate is reduced, and the surface carrying the conductive circuit will not be uneven, thereby improving the manufacturing accuracy of the conductive circuits in the packaging substrate; in addition, since the first substrate and the second substrate are rigid substrates, the manufacturing accuracy of the packaging substrate is relatively high, and the electronic device constituted by it can be without a PCB board, thereby reducing the cost of the packaging substrate.

[0009] In combination with the first aspect, in some embodiments of the first aspect, the method of respectively providing through holes at preset positions of the first substrate and the second substrate, with the through holes penetrating the first adhesive layer, includes: providing a first through hole at a first preset position of the first substrate, and forming a through hole on the first adhesive layer, the through hole communicating with the first through hole; providing a second through hole at a second preset position of the second substrate, and the projection of the first through hole on the first surface at least covers part of the projection of the second through hole on the first surface.

[0010] In combination with the first aspect, in some embodiments of the first aspect, the first conductive circuit is located on a side of the first substrate close to the first adhesive layer, and the second conductive circuit is located on a side of the second substrate close to the first adhesive layer.

[0011] In combination with the first aspect, in some embodiments of the first aspect, the first substrate further includes a third surface opposite to the first surface, and the second substrate further includes a fourth surface opposite to the second surface. The method of performing a hole filling process on the through holes further includes: forming a conductive layer on the third surface and a conductive layer on the fourth surface, the conductive layers respectively covering the through holes on the first substrate and the through holes on the second substrate; patterning the conductive layer on the third surface to form a third conductive circuit, and patterning the conductive layer on the fourth surface to form a fourth conductive circuit. The third conductive circuit is connected to the first conductive circuit through the through hole on the first surface, and the fourth conductive circuit is connected to the second conductive circuit through the through hole on the second surface.

[0012] In connection with the first aspect, in certain embodiments of the first aspect, the method further includes: providing a rigid third substrate and a fourth substrate, the third substrate including a fifth surface provided with a fifth conductive circuit, and the fourth substrate including a sixth surface provided with a sixth conductive circuit; bonding the third substrate to the first substrate through a second adhesive layer, and bonding the fourth substrate to the second substrate through a third adhesive layer; providing through holes penetrating the second adhesive layer at preset positions on the third substrate, and providing through holes penetrating the third adhesive layer at preset positions on the fourth substrate; performing a hole filling process on the through holes so that the fifth conductive circuit is electrically connected to the third conductive circuit and the sixth conductive circuit is electrically connected to the fourth conductive circuit.

[0013] In connection with the first aspect, in certain embodiments of the first aspect, a first through hole is provided at a first preset position on the first substrate, a second through hole is provided at a second preset position on the second substrate, and a through hole is formed in the first adhesive layer, including: forming the first through hole and the second through hole under a first laser-induced condition; forming the through hole under a second laser-induced condition different from the first laser-induced condition.

[0014] In connection with the first aspect, in certain embodiments of the first aspect, a receiving groove is provided on the first substrate or the second substrate. Before bonding the first substrate and the second substrate through the first adhesive layer, the method further includes: placing a packaged chip or a heat sink in the receiving groove.

[0015] In connection with the first aspect, in certain embodiments of the first aspect, before bonding the third substrate to the first substrate through the second adhesive layer and bonding the fourth substrate to the second substrate through the third adhesive layer, the method further includes: forming an insulating layer on the third surface and / or the fourth surface; forming a seventh conductive circuit on the insulating layer; and the width of the seventh conductive circuit is greater than the width of the first conductive circuit.

[0016] In a second aspect, a method for manufacturing a packaged substrate is provided. The packaged substrate at least includes a first substrate and a second substrate. The method is characterized in that the method includes: providing a rigid first substrate and a second substrate, the first substrate including opposite first, third surfaces and a filling hole penetrating the first and third surfaces, the first surface being provided with a first conductive circuit, the third surface being provided with a third conductive circuit, and the first conductive circuit being connected to the third conductive circuit through the filling hole; the second substrate including opposite second, fourth surfaces and a filling hole penetrating the second and fourth surfaces, the second surface being provided with a second conductive circuit, the fourth surface being provided with a fourth conductive circuit, and the second conductive circuit being connected to the fourth conductive circuit through the filling hole; providing conductive contacts on the first conductive circuit; bonding the first substrate and the second substrate through a first adhesive layer; and connecting the first conductive circuit to the second conductive circuit through the conductive contacts.

[0017] In combination with the second aspect, in certain embodiments of the second aspect, the method further includes: providing a rigid third substrate and a fourth substrate; bonding the third substrate to the first substrate through a second adhesive layer, and bonding the fourth substrate to the second substrate through a third adhesive layer; providing through holes penetrating the second adhesive layer at a preset position of the third substrate, and providing through holes penetrating the third adhesive layer at a preset position of the fourth substrate; performing hole filling treatment on the through holes.

[0018] In a third aspect, there is provided a packaged substrate, which is fabricated by using the fabrication method of any one of the packaged substrates provided in the above first aspect and any of its embodiments or the fabrication method of any one of the packaged substrates provided in the above second aspect and any of its embodiments.

[0019] In a fourth aspect, there is provided a packaged substrate, which at least includes: a first substrate including a first surface on which a first conductive circuit is provided; a second substrate bonded to the first substrate through a first adhesive layer, the second substrate including a second surface on which a second conductive circuit is provided; through holes after hole filling treatment are respectively provided at preset positions of the first substrate and the second substrate, the through holes penetrate the first adhesive layer, and the first conductive circuit is electrically connected to the second conductive circuit through the through holes.

[0020] In a fifth aspect, there is provided an electronic device including the above packaged substrate.

[0021] Among them, for the technical effects brought by any one of the embodiments in the third aspect to the fifth aspect, reference can be made to the technical effects brought by different embodiments in the above first aspect or the second aspect, which will not be elaborated herein. Description of the Drawings

[0022] Figure 1 is a schematic flowchart of a method for fabricating a packaged substrate according to an embodiment provided by the present application;

[0023] Figures 2a - 2h is Figure 1 a process schematic diagram of the fabrication method in

[0024] Figure 3 is a side view of a certain layer of substrate according to an embodiment provided by the present application;

[0025] Figure 4 is a side view of a substrate according to another embodiment provided by the present application;

[0026] Figure 5 is a schematic flowchart of a method for fabricating a packaged substrate according to another embodiment provided by the present application;

[0027] Figures 6a - 6c is Figure 5 a process schematic diagram of the fabrication method in

[0028] Figure 7 Another side view of the substrate provided by this application.

[0029] Reference numerals: Encapsulation substrate - 20, First substrate - 201, Second substrate - 202, First surface - 2011, First conductive circuit - 203, Second surface - 2021, Second conductive circuit - 204, Third surface - 2012, Fourth surface - 2022, First adhesive layer - 205, Through - hole - 206, First through - hole - 2061, Second through - hole - 2062, Through - penetration hole - 2063, Conductive material - 2064, Third conductive circuit - 207, Fourth conductive circuit - 208, Third substrate - 209, Fourth substrate - 210, Fifth surface - 2091, Fifth conductive circuit - 211, Sixth surface - 2101, Sixth conductive circuit - 212, Second adhesive layer - 213, Third adhesive layer - 214, Accommodating groove - 215, Encapsulated chip - 216, Heat sink - 217, Insulating layer - 218, Seventh conductive circuit - 219, Conductive contact - 2031, Semiconductor device - 30. Detailed implementation manners

[0030] In the description of this application, unless otherwise specified, "a plurality of" means two or more than two. "At least one (item)" or its similar expression refers to any combination of these items, including any combination of single item (s) or plural items (s). For example, at least one (item) of a, b, or c may represent: a, b, c, a - b, a - c, b - c, or a - b - c, where a, b, c may be single or multiple.

[0031] In addition, for the convenience of clearly describing the technical solutions of the embodiments of this application, in the embodiments of this application, words such as "first" and "second" are used to distinguish the same items or similar items with basically the same functions and roles. Those skilled in the art can understand that the words such as "first" and "second" do not limit the quantity and execution order, and the words such as "first" and "second" do not necessarily limit to be different.

[0032] Meanwhile, in the embodiments of this application, words such as "exemplary" or "for example" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Exactly speaking, using words such as "exemplary" or "for example" aims to present relevant concepts in a specific way for easy understanding.

[0033] It can be understood that the "embodiments" mentioned throughout the specification mean that specific features, structures, or characteristics related to the embodiments are included in at least one embodiment of the present application. Therefore, the embodiments throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures, or characteristics can be combined in one or more embodiments in any suitable manner. It can be understood that in various embodiments of the present application, the magnitude of the sequence number of each process does not mean the order of execution. The order of execution of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0034] It can be understood that some optional features in the embodiments of the present application can, in some scenarios, be implemented independently without relying on other features, such as the current solution they are based on, to solve the corresponding technical problems and achieve the corresponding effects. In some scenarios, they can also be combined with other features according to requirements. Correspondingly, the devices given in the embodiments of the present application can also implement these features or functions accordingly, which will not be elaborated here.

[0035] In the present application, unless otherwise specified, the same or similar parts between various embodiments can be referred to each other. In various embodiments of the present application and in each implementation method of each embodiment, if there is no special specification and logical conflict, the terms and / or descriptions between different embodiments and between each implementation method in each embodiment are consistent and can be mutually referred to. The technical features in different embodiments and in each implementation method in each embodiment can be combined to form new embodiments, implementation manners, implementation methods, or implementation methods according to their internal logical relationships. The following implementation manners of the present application do not constitute a limitation on the protection scope of the present application.

[0036] Existing electronic devices generally consist of a packaging substrate, a PCB board, and semiconductor devices connected to the packaging substrate.

[0037] The packaging substrate usually includes a substrate, conductive lines formed on the substrate, and an insulating layer. When manufacturing the packaging substrate, usually an insulating layer is first formed on the substrate, conductive lines are fabricated on the insulating layer, then an insulating layer is formed again, and conductive lines are fabricated on the insulating layer.

[0038] Since the conductive lines have a certain height, after forming the conductive lines on the insulating layer, when forming the insulating layer and conductive lines next time, the flatness of the conductive lines will be poor, resulting in a low manufacturing precision of the conductive lines.

[0039] To solve this problem, the present application provides a method for manufacturing a packaging substrate. Figure 1The flowchart of a manufacturing method of a packaging substrate according to an embodiment provided by the present application. The packaging substrate 20 includes at least a first substrate 201 and a second substrate 202. As Figure 1 shown, the manufacturing method of the packaging substrate 20 provided by the present application includes the following steps:

[0040] S101: Provide a hard first substrate 201 and a second substrate 202.

[0041] Among them, as Figure 2a shown, the first substrate 201 includes a first surface 2011, and a first conductive circuit 203 is provided on the first surface 2011. The second substrate 202 includes a second surface 2021, and a second conductive circuit 204 is provided on the second surface 2021.

[0042] The first substrate 201 may further include a third surface 2012 opposite to the first surface 2011, and the second substrate 202 may further include a fourth surface 2022 opposite to the second surface 2021.

[0043] It should be noted that the material of the first substrate 201 or the second substrate 202 may be glass, ceramic. Of course, the first substrate 201 or the second substrate 202 may also be other hard non-conductive materials, and the present application does not make specific limitations thereto.

[0044] The material of the first conductive circuit 203 may be metal, graphene, etc. The metal may include copper, titanium, etc. The material of the first conductive circuit 203 may be a pure conductive material 2064, or a composite conductive material 2064. For example, the composite conductive material 2064 may be composed of graphene and silver, or carbon fiber and copper.

[0045] It can be understood that the first conductive circuit 203 is a general term for the circuits located on the first surface 2011. The first conductive circuit 203 may be one circuit or multiple circuits located on the first surface 2011. Similarly, the second conductive circuit 204 is a general term for the circuits located on the second surface 2021. The second conductive circuit 204 may be one circuit or multiple circuits located on the second surface 2021. The descriptions of other conductive circuits provided in the specific embodiments of the present application may all refer to the descriptions of the first conductive circuit 203 or the second conductive circuit 204. For unified description here, the present application will not repeat it hereinafter.

[0046] The material, shape, and circuit parameters of the first conductive circuit 203 may be the same as or different from those of the second conductive circuit 204, and the present application does not make specific limitations thereto.

[0047] The roughness range of the first surface of the first substrate 201 or the third surface of the second substrate 202 can be 0.01 um - 0.5 um. Preferably, the roughness range of the first substrate 201 or the second substrate 202 is 0.02 um - 0.3 um. By setting the surface roughness of the first substrate / second substrate within this range, the adhesion of each conductive line on each surface can be improved while ensuring the accuracy of the circuit.

[0048] It should be noted that the roughness of each substrate provided in the specific embodiments of the present application can refer to the description of the roughness of the first substrate 201 or the second substrate 202. This is uniformly described here and will not be repeated later.

[0049] S102. Bond the first substrate 201 and the second substrate 202 through the first adhesive layer 205.

[0050] In some embodiments, the first conductive line 203 is located on the side of the first substrate 201 close to the first adhesive layer 205, and the second conductive line 204 is located on the side of the second substrate 202 close to the first adhesive layer 205. As Figure 2b shown, the first substrate 201 and the second substrate 202 are bonded through the first adhesive layer 205.

[0051] In still other embodiments, the first conductive line 203 can also be located on the side of the first substrate 201 away from the first adhesive layer 205, or the second conductive line 204 can also be located on the side of the second substrate 202 away from the first adhesive layer 205. The present application does not make specific limitations on this.

[0052] As a possible implementation, an adhesive material is provided on the first substrate 201. The adhesive material is coated not only on the first conductive line 203 but also on the first substrate 201 between adjacent two conductive lines. Then, the second substrate 202 is placed on the adhesive material, and the first substrate 201 and the second substrate 202 are pressed together so that the first substrate 201 and the second substrate 202 are bonded through the first adhesive layer 205.

[0053] The present application does not make specific limitations on the specific method of bonding.

[0054] S103. Respectively provide through holes 206 at preset positions on the first substrate 201 and the second substrate 202.

[0055] Among them, the through hole 206 penetrates through the first adhesive layer 205.

[0056] Taking Figure 2b as an example, as Figure 2c shown, through holes 206 are respectively provided at preset positions on the first substrate 201 and the second substrate 202, and the through hole 206 penetrates through the first adhesive layer 205.

[0057] As a possible implementation, a first through-hole 2061 is provided at a first preset position of the first substrate 201, a through-hole 2063 is formed on the first adhesive layer 205, and a second through-hole 2062 is provided at a second preset position of the second substrate 202.

[0058] Wherein, the through-hole 2063 communicates with the first through-hole 2061, and the projection of the first through-hole 2061 on the first surface 2011 at least covers a part of the projection of the second through-hole 2062 on the first surface 2011.

[0059] In some embodiments, as Figure 2c shown, the projection of the first through-hole 2061 on the first surface 2011 completely covers the projection of the second through-hole 2062 on the first surface 2011, that is, the first through-hole 2061 is completely aligned with the second through-hole 2062.

[0060] In still other embodiments, the projection of the first through-hole 2061 on the first surface 2011 covers a part of the projection of the second through-hole 2062 on the first surface 2011, that is, the first through-hole 2061 is not completely aligned with the second through-hole 2062.

[0061] As an example of this implementation, the first through-hole 2061 and the second through-hole 2062 are formed by a first laser-induced condition, and the through-hole 2063 is formed by a second laser-induced condition.

[0062] Wherein, the second laser-induced condition is different from the first laser-induced condition.

[0063] It should be noted that the first laser-induced condition can be a laser with laser energy distributed in the beam center and the peripheral ring. For example, it can be a laser emitted by a Bessel light source. Since the laser beam generated by the Bessel light source hardly diverges (quasi-non-diffracting) during propagation, a long-distance focal line can be formed, and relatively thick glass (such as millimeter-level or even centimeter-level) can be cut at one time without layering or dynamic focusing. The second laser-induced condition can be a laser with laser energy concentrated in the beam center. For example, it can be a laser emitted by a Gaussian light source. Since the light intensity of the laser beam generated by the Gaussian light source is centrosymmetrically distributed and the energy is highly concentrated in the focal region, the adhesive layer can be accurately cut (or ablated).

[0064] Exemplarily, through the first laser-induced condition, for example, through laser modification, the physical or chemical properties of the position on the first substrate 201 where holes need to be made are changed, and then the first substrate 201 is placed in an acidic or alkaline solution to form the first through-hole 2061. Through the second laser-induced condition, the first adhesive layer 205 is cut (or ablated) using a laser to form the through-hole 2063.

[0065] Similarly, a second through-hole 2062 can be formed on the second substrate 202 through processes such as laser modification.

[0066] S104. Perform hole filling on the through-hole 206 to electrically connect the first conductive line 203 to the second conductive line 204.

[0067] As a possible implementation, a conductive material 2064 is deposited on the inner wall of the through-hole 206, or the through-hole 206 is filled with the conductive material 2064 to electrically connect the first conductive line 203 to the second conductive line 204.

[0068] The specific solution for hole filling of the through-hole 206 can refer to existing solutions, and will not be elaborated in detail in this application. Figure 2c For example, as Figure 2d shown, after hole filling of the through-hole 206, the first conductive line 203 can be connected to the second conductive line 204 through the conductive material 2064 in the through-hole 206.

[0069] As another possible implementation, when the first substrate 201 further includes a third surface 2012 opposite to the first surface 2011, and the second substrate 202 further includes a fourth surface 2022 opposite to the second surface 2021, a conductive layer is formed on the third surface 2012 and a conductive layer is formed on the fourth surface 2022. The conductive layers respectively cover the through-hole 206 on the first substrate 201 and the through-hole 206 on the second substrate 202. The conductive layer on the third surface 2012 is patterned to form a third conductive line 207, and the conductive layer on the fourth surface 2022 is patterned to form a fourth conductive line 208, so that the third conductive line 207 is connected to the first conductive line 203 through the through-hole 206 on the first surface 2011, and the fourth conductive line 208 is connected to the second conductive line 204 through the through-hole 206 on the second surface 2021.

[0070] It should be noted that the specific description of this possible implementation can refer to the relevant description in the subsequent part of the specific implementation manner of this application, and will not be elaborated in this application for the time being.

[0071] Based on the implementation manners of S101 - S104, compared with the existing solution of first spraying an insulating material on a substrate to form an insulating layer and then fabricating a layer of conductive lines on the insulating layer, the solution of the present application provides a rigid first substrate 201 and a second substrate 202, and bonds the first substrate 201 and the second substrate 202 through a first adhesive layer 205; through holes 206 penetrating the first adhesive layer 205 are respectively arranged at preset positions of the first substrate 201 and the second substrate 202. The first substrate 201 includes a first surface 2011, and a first conductive line 203 is arranged on the first surface 2011. The second substrate 202 includes a second surface 2021, and a second conductive line 204 is arranged on the second surface 2021. By performing a hole filling process on the through holes 206, the first conductive line 203 can be electrically connected to the second conductive line 204. Since the first substrate 201 and the second substrate 202 are rigid substrates, the influence of the height of the wire lines on the flatness of the underlying substrate is reduced, and the surface carrying the conductive lines will not be uneven, thereby improving the manufacturing precision of the conductive lines in the packaging substrate 20; in addition, since the first substrate 201 and the second substrate 202 are rigid substrates, the manufacturing precision of the packaging substrate 20 is relatively high, and there is no need to provide a PCB board, thereby reducing the cost of the packaging substrate 20.

[0072] It should be noted that, in some embodiments, only S101 - S104 may be executed to form a packaging substrate having two layers of substrates.

[0073] The above is a general description of the manufacturing method of the packaging substrate 20 provided by the present application. The following will further describe the manufacturing method of the packaging substrate 20 provided by the present application with reference to the accompanying drawings.

[0074] In one design, as Figure 1 shown, S104 provided by the present application may further include the following multiple steps:

[0075] S1041. Form a conductive layer on the third surface 2012 and form a conductive layer on the fourth surface 2022.

[0076] Among them, the conductive layers respectively cover the through holes 206 on the first substrate 201 and the through holes 206 on the second substrate 202.

[0077] As a possible implementation manner, deposit a conductive material 2064 on the third surface 2012 and in the through holes 206 of the first substrate 201 to form a conductive layer; deposit a conductive material 2064 on the fourth surface 2022 and in the through holes 206 of the second substrate 202 to form a conductive layer.

[0078] It should be noted that the deposition of the conductive material 2064 on the surface of the substrate and in the through hole 206 can be implemented in the same process step or in different process steps, and the present application does not make specific limitations thereon.

[0079] S1042. Pattern the conductive layer on the third surface 2012 to form a third conductive line 207, and pattern the conductive layer on the fourth surface 2022 to form a fourth conductive line 208.

[0080] Among them, the third conductive line 207 is connected to the first conductive line 203 through the through hole 206 on the first surface 2011, and the fourth conductive line 208 is connected to the second conductive line 204 through the through hole 206 on the second surface 2021.

[0081] The material, shape, and circuit parameters of the third conductive line 207 or the fourth conductive line 208 can be the same as or different from those of the first conductive line 203 or the second conductive line 204, and the present application does not make specific limitations thereon.

[0082] As Figure 2e shown, the third surface 2012 of the first substrate 201 has a third conductive line 207, and the fourth surface 2022 of the second substrate 202 has a fourth conductive line 208.

[0083] As a possible implementation manner, perform processes such as photolithographic exposure on the conductive layer of the third surface 2012 to make the conductive layer of the third surface 2012 become the third conductive line 207; perform processes such as photolithographic exposure on the conductive layer of the fourth surface 2022 to make the conductive layer of the fourth surface 2022 become the fourth conductive line 208.

[0084] Based on S1041 - S1042, by forming a conductive layer on the third surface 2012 and forming a conductive layer on the fourth surface 2022, and then patterning the conductive layer on the third surface 2012 to form a third conductive line 207 and patterning the conductive layer on the fourth surface 2022 to form a fourth conductive line 208, it is possible to make both sides of the first substrate 201 and the second substrate 202 have conductive lines, increasing the integration degree of the packaging substrate 20.

[0085] It should be noted that in some embodiments, after S103, S104 can be executed first, and then S1041 - S1042 can be executed, or S104 - S1041 can be executed simultaneously.

[0086] In some embodiments, only S101 - S1042 can be executed to form a packaging substrate with two layers of substrates.

[0087] In one design, as Figure 1As shown, after S1042, the method for manufacturing the packaging substrate 20 provided in the present application may further include the following steps:

[0088] S105. Provide a rigid third substrate 209 and a fourth substrate 210.

[0089] Among them, the third substrate 209 includes a fifth surface 2091, and a fifth conductive line 211 is provided on the fifth surface 2091. The fourth substrate 210 includes a sixth surface 2101, and a sixth conductive line 212 is provided on the sixth surface 2101.

[0090] The material, shape, and circuit parameters of the fifth conductive line 211 or the sixth conductive line 212 may be the same as or different from those of the first conductive line 203, the second conductive line 204, the third conductive line 207, or the fourth conductive line 208. The present application does not make specific restrictions on this.

[0091] S106. Bond the third substrate 209 to the first substrate 201 through a second adhesive layer 213, and bond the fourth substrate 210 to the second substrate 202 through a third adhesive layer 214.

[0092] In some embodiments, the fifth conductive line 211 is located on the side of the third substrate 209 close to the second adhesive layer 213, and the sixth conductive line 212 is located on the side of the fourth substrate 210 close to the third adhesive layer 214. For Figure 2e example, as Figure 2f shown, the third substrate 209 is bonded to the first substrate 201 through the second adhesive layer 213, the fourth substrate 210 is bonded to the second substrate 202 through the third adhesive layer 214, the fifth conductive line 211 contacts the second adhesive layer 213, and the sixth conductive line 212 contacts the third adhesive layer 214.

[0093] In still other embodiments, the fifth conductive line 211 may also be located on the side of the third substrate 209 away from the second adhesive layer 213, or the sixth conductive line 212 may also be located on the side of the fourth substrate 210 away from the third adhesive layer 214. The present application does not make specific restrictions on this.

[0094] As a possible implementation manner, dispose an adhesive material on the first substrate 201, then place the third substrate 209 on the adhesive material, and press the first substrate 201 and the third substrate 209 together so that the first substrate 201 and the third substrate 209 are bonded through the second adhesive layer 213; dispose an adhesive material on the second substrate 202, then place the fourth substrate 210 on the adhesive material, and press the second substrate 202 and the fourth substrate 210 together so that the second substrate 202 and the fourth substrate 210 are bonded through the third adhesive layer 214.

[0095] This application does not specifically limit the specific bonding method.

[0096] S107. A through hole 206 penetrating the second bonding layer 213 is provided at a preset position on the third substrate 209, and a through hole 206 penetrating the third bonding layer 214 is provided at a preset position on the fourth substrate 210.

[0097] As a possible implementation, through the first laser-induced condition, for example, through laser modification, the physical or chemical properties of the position on the third substrate 209 where holes need to be made are changed. Then, the substrate assembly such as the first substrate 201 combined together is placed in an acidic or alkaline solution to form a through hole 206 on the third substrate 209. Then, through the second laser-induced condition, the position on the second bonding layer 213 corresponding to the through hole 206 on the third substrate 209 is cut (or ablated) using a laser to form a through hole 206 penetrating the second bonding layer 213.

[0098] Similarly, through the first laser-induced condition, such as processes like laser modification, a through hole 206 is formed on the fourth substrate 210. Then, through the second laser-induced condition, the position on the third bonding layer 214 corresponding to the through hole 206 on the fourth substrate 210 is cut (or ablated) using a laser to form a through hole 206 penetrating the third bonding layer 214.

[0099] Take Figure 2f as an example. As Figure 2g shown, a through hole 206 penetrating the second bonding layer 213 is provided at a preset position on the third substrate 209, and a through hole 206 penetrating the third bonding layer 214 is provided at a preset position on the fourth substrate 210.

[0100] S108. The through hole 206 is subjected to hole filling treatment so that the fifth conductive line 211 is electrically connected to the third conductive line 207, and the sixth conductive line 212 is electrically connected to the fourth conductive line 208.

[0101] It should be noted that for the hole filling treatment, a conductive material 2064 can be formed on the hole wall of the through hole 206, or the through hole 206 can be completely filled with the conductive material 2064. This application does not specifically limit this.

[0102] The specific solution for the hole filling treatment of the through hole 206 can refer to existing solutions, and this application will not elaborate on it here.

[0103] Take Figure 2g as an example. As Figure 2h shown, after the hole filling treatment of the through hole 206, the fifth conductive line 211 is electrically connected to the third conductive line 207, and the sixth conductive line 212 is electrically connected to the fourth conductive line 208.

[0104] Based on S105 - S108, by providing the rigid third substrate 209 and the fourth substrate 210, bonding the third substrate 209 to the first substrate 201 through the second bonding layer 213, and bonding the fourth substrate 210 to the second substrate 202 through the third bonding layer 214; arranging through - holes 206 penetrating the second bonding layer 213 at preset positions on the third substrate 209, and arranging through - holes 206 penetrating the third bonding layer 214 at preset positions on the fourth substrate 210; performing hole - filling treatment on the through - holes 206 so that the fifth conductive line 211 is electrically connected to the third conductive line 207, and the sixth conductive line 212 is electrically connected to the fourth conductive line 208, a packaging substrate 20 with a multi - layer structure can be fabricated.

[0105] After S108, S1041 - S1042, S105 - S108 can be repeatedly executed to fabricate a packaging substrate 20 that meets the layer number requirements. Additionally, since the first substrate 201, the second substrate 202, the third substrate 209, and the fourth substrate 210 are rigid substrates, the fabrication accuracy of the packaging substrate 20 is relatively high, and there is no need to set up a PCB board, thereby reducing the cost of the packaging substrate 20.

[0106] In one design, Figure 3 is a side view of another substrate provided by this application, as Figure 3 shown, on a certain layer of the substrate of the packaging substrate (for example, Figure 2h one of the first substrate 201, the second substrate 202, the third substrate 209, and the fourth substrate 210), a receiving groove 215 is arranged. Before S102, the method for fabricating the packaging substrate 20 provided by this application may further include the following steps:

[0107] Place a packaged chip 216 or a heat sink 217 in the receiving groove 215.

[0108] It should be noted that the packaged chip 216 can be a chip of any model, and the heat sink 217 can be a metal heat sink or a non - metal heat sink. This application does not make specific limitations on this.

[0109] Figure 3 The substrate shown can be any substrate provided by the specific implementation manner of this application. The surface of the substrate may be provided with conductive lines (not shown in the figure).

[0110] As Figure 3 shown, a packaged chip 216 or a heat sink 217 is placed in the receiving groove 215.

[0111] Based on this solution, by placing the packaged chip 216 and the heat sink 217 in the receiving groove 215 of the substrate, the number of components carried by the packaging substrate 20 can be increased without occupying the volume of the packaging substrate 20.

[0112] In one design, before S105, the method for manufacturing the packaging substrate 20 provided in this application may further include the following steps:

[0113] Form an insulating layer 218 on the third surface 2012 and / or the fourth surface 2022.

[0114] As a possible implementation, spray an insulating material on the third surface 2012 and / or the fourth surface 2022 to form the insulating layer 218. The insulating material can be polyimide, benzocyclobutene. Of course, the insulating material can also be an insulating material with other names, and this application does not make specific limitations on this.

[0115] Form a seventh conductive line 219 on the insulating layer 218.

[0116] Among them, the width of the seventh conductive line 219 is greater than the width of the first conductive line 203. It should be noted that the line width of the seventh conductive line 219 can be 8um - 12um.

[0117] Taking the formation of the insulating layer 218 on the third surface 2012 as an example, Figure 4 , as Figure 4 shown, it is a side view of another substrate provided in this application, and a seventh conductive line 219 is formed on the insulating layer 218.

[0118] Exemplarily, the seventh conductive line 219 may include a power supply line.

[0119] In some embodiments, the width of the seventh conductive line 219 may also be greater than the width of the conductive lines on other substrates. For example, the width of the seventh conductive line 219 may also be greater than the width of the second conductive line 204, the width of the third conductive line 207, and / or the width of the fourth conductive line 208. This application does not make specific limitations on this.

[0120] As a possible implementation, deposit a conductive material 2064 on the insulating layer 218 to form a conductive layer on the insulating layer 218, and pattern the conductive layer on the insulating layer 218 to form the seventh conductive line 219.

[0121] By forming the insulating layer 218 on the third surface 2012 and / or the fourth surface 2022, and forming the seventh conductive line 219 on the insulating layer 218, since the wider the conductive line, the smaller the resistance, and the width of the seventh conductive line 219 is greater than the width of the first conductive line 203. Compared with the first conductive line 203, the seventh conductive line 219 can carry a larger current. By arranging the seventh conductive line 219 carrying a larger current on the insulating layer 218, the impact of the larger current on the substrate can be reduced, and the stability of the packaging substrate 20 can be improved.

[0122] Further, after forming the seventh conductive line 219, a flat layer can be formed, for example, by bonding a rigid substrate. In this way, the influence of the height of the seventh conductive line 219 on the flatness of the packaging substrate 20 can be reduced. After that, S105 - S108 can be executed.

[0123] The above description is based on the case where one side of the substrate has conductive lines for the manufacturing method of the packaging substrate 20 provided in this application. Next, the manufacturing method of the packaging substrate 20 provided in this application will be described based on the case where both sides of the substrate have conductive lines.

[0124] Figure 5 A flowchart of a manufacturing method of a packaging substrate according to another embodiment provided in this application. The packaging substrate 20 at least includes a first substrate 201 and a second substrate 202, as Figure 5 shown, the manufacturing method of the packaging substrate 20 provided in this application may include the following steps:

[0125] S501. Provide a rigid first substrate 201 and a second substrate 202.

[0126] Among them, as Figure 6a shown, the first substrate 201 includes opposite first surface 2011, third surface 2012 and a filling hole penetrating the first surface 2011 and the third surface 2012. The first surface 2011 is provided with a first conductive line 203, the third surface 2012 is provided with a third conductive line 207, and the first conductive line 203 is connected to the third conductive line 207 through the filling hole. The second substrate 202 includes opposite second surface 2021, fourth surface 2022 and a filling hole penetrating the second surface 2021 and the fourth surface 2022. The second surface 2021 is provided with a second conductive line 204, the fourth surface 2022 is provided with a fourth conductive line 208, and the second conductive line 204 is connected to the fourth conductive line 208 through the filling hole.

[0127] S502. Provide conductive contacts 2031 on the first conductive line 203.

[0128] As a possible implementation, deposit a conductive material 2064 at a preset position on the first conductive line 203 so that the first conductive line 203 has conductive contacts 2031.

[0129] It should be noted that the material of the conductive contacts 2031 can be the same as that of the first conductive line 203, or the material of the conductive contacts 2031 can be different from that of the first conductive line 203. This application does not make specific limitations on this.

[0130] It can be understood that S502 is described by taking the example of providing the conductive contact 2031 on the first conductive line 203. In some embodiments, the conductive contact 2031 can be provided on any conductive line of any one of the first substrate 201 and the second substrate 202.

[0131] As Figure 6b shown, the conductive contact 2031 is provided on the first conductive line 203 of the first substrate 201.

[0132] S503. Bond the first substrate 201 and the second substrate 202 through the first adhesive layer 205.

[0133] Wherein, the first conductive line 203 is connected to the second conductive line 204 through the conductive contact 2031.

[0134] As a possible implementation manner, an adhesive material having the same height as the conductive contact 2031 (or the height of the adhesive material is slightly higher than the protruding conductive contact 2031) is provided on the first substrate 201. The adhesive material is provided not only on the first conductive line 203 but also on the first substrate 201 between the first conductive lines 203. Place the second substrate 202 on the adhesive material, and press the first substrate 201 and the second substrate 202 together so that the first conductive line 203 of the first substrate 201 is connected to the second conductive line 204 of the second substrate 202 through the conductive contact 2031.

[0135] The present application does not make specific limitations on the specific method of bonding.

[0136] As Figure 6c shown, the first substrate 201 and the second substrate 202 are bonded through the first adhesive layer 205, and the first conductive line 203 is connected to the second conductive line 204 through the conductive contact 2031.

[0137] Based on S501 - S503, by providing the rigid first substrate 201 and the second substrate 202, arranging conductive contacts 2031 on the first conductive circuit 203, and bonding the first substrate 201 and the second substrate 202 through the first adhesive layer 205, so that the first conductive circuit 203 of the first substrate 201 is connected to the second conductive circuit 204 of the second substrate 202 through the conductive contacts 2031. On the one hand, since the first substrate 201 and the second substrate 202 are rigid substrates, the influence of the height of the wire circuit on the flatness of the underlying substrate is reduced, and it will not cause the surface carrying the conductive circuit to be uneven, thereby reducing the impact on the manufacturing efficiency of the packaging substrate 20. On the other hand, by arranging the conductive contacts 2031 on the first conductive circuit 203, the first conductive circuit 203 can be connected to the second conductive circuit 204 through the conductive contacts 2031 without drilling holes in the first adhesive layer 205, thereby improving the manufacturing efficiency of the packaging substrate 20. On the other hand, since the first substrate 201 and the second substrate 202 are rigid substrates, the manufacturing precision of the packaging substrate 20 is relatively high, and there is no need to set up a PCB board, thereby reducing the cost of the packaging substrate 20.

[0138] It should be noted that, in some embodiments, only S501 - S503 may be executed to form a packaging substrate with two layers of substrates.

[0139] In one design, after S503, as Figure 5 shown, the manufacturing method of the packaging substrate 20 provided by the present application may further include the following multiple steps:

[0140] S504: Provide a rigid third substrate 209 and a fourth substrate 210.

[0141] It should be noted that the surfaces of the third substrate 209 and the fourth substrate 210 may be provided with conductive circuits, or the surfaces of the third substrate 209 and the fourth substrate 210 may not be provided with conductive circuits. The present application does not make specific limitations on this.

[0142] S505: Bond the third substrate 209 to the first substrate 201 through the second adhesive layer 213, and bond the fourth substrate 210 to the second substrate 202 through the third adhesive layer 214.

[0143] In some embodiments, when conductive circuits are provided on the surfaces of the third substrate 209 or the fourth substrate 210, the conductive circuits may be located on the side of the substrate close to the adhesive layer.

[0144] As a possible implementation, an adhesive material is disposed on the first substrate 201, the third substrate 209 is placed on the adhesive material, and the first substrate 201 and the third substrate 209 are pressed together so that the first substrate 201 and the third substrate 209 are bonded through the second adhesive layer 213; an adhesive material is disposed on the second substrate 202, the fourth substrate 210 is placed on the adhesive material, and the second substrate 202 and the fourth substrate 210 are pressed together so that the second substrate 202 and the fourth substrate 210 are bonded through the third adhesive layer 214.

[0145] This application does not specifically limit the specific method of bonding.

[0146] S506. A through hole 206 penetrating the second adhesive layer 213 is formed at a preset position of the third substrate 209, and a through hole 206 penetrating the third adhesive layer 214 is formed at a preset position of the fourth substrate 210.

[0147] As a possible implementation, through a first laser induction condition, for example, through laser modification, the physical or chemical properties of the position on the third substrate 209 where holes need to be formed are changed. Then, the combined body formed by the third substrate and the like is placed in an acidic or alkaline solution so that through holes 206 are formed at the laser-modified positions. Then, through a second laser induction condition, the position on the second adhesive layer 213 corresponding to the through hole 206 on the third substrate 209 is cut (or ablated) using a laser to form a through hole 206 penetrating the second adhesive layer 213.

[0148] Similarly, through a first laser induction condition, for example, through laser modification, through holes 206 are formed on the fourth substrate 210. Then, through a second laser induction condition, the position on the third adhesive layer 214 corresponding to the through hole 206 on the fourth substrate 210 is cut (or ablated) using a laser to form a through hole 206 penetrating the third adhesive layer 214.

[0149] S507. The through holes 206 are subjected to hole filling treatment.

[0150] It should be noted that the specific description of S507 can refer to the description of S104, and this application will not elaborate here.

[0151] Based on S504 - S507, by providing the hard third substrate 209 and the fourth substrate 210, bonding the third substrate 209 to the first substrate 201 through the second adhesive layer 213, bonding the fourth substrate 210 to the second substrate 202 through the third adhesive layer 214, forming a through hole 206 penetrating the second adhesive layer 213 at a preset position of the third substrate 209, forming a through hole 206 penetrating the thirteenth adhesive layer at a preset position of the fourth substrate 210, and performing hole filling treatment on the through holes 206, a packaging substrate 20 with a multi-layer structure can be manufactured.

[0152] In some embodiments, S504 - S507 can be repeatedly executed to fabricate the encapsulation substrate 20 that meets the layer number requirement.

[0153] In some embodiments, before S5041, the solution provided in the present application can also be provided to form an insulating layer 218 on the surface of the substrate.

[0154] In one design, after S104, S1042, S108, S503 or S507, a semiconductor device 30 can be disposed on the encapsulation substrate 20.

[0155] After S104, Figure 7 A side view of another substrate provided in the present application is shown as Figure 7 shown, where a semiconductor device 30 is disposed on the encapsulation substrate 20.

[0156] The present application does not specifically limit the specific type of the semiconductor device 30.

[0157] The present application also provides an encapsulation substrate 20, which is fabricated by using the fabrication method of any one of the encapsulation substrates in the fabrication methods of multiple encapsulation substrates provided in the above specific embodiments.

[0158] The present application also provides an encapsulation substrate 20, which at least includes: a first substrate 201, including a first surface 2011, on which a first conductive line 203 is provided; a second substrate 202, bonded to the first substrate 201 through a first adhesive layer 205, the second substrate 202 includes a second surface 2021, on which a second conductive line 204 is provided; via holes 206 after filling hole treatment are respectively disposed at preset positions of the first substrate 201 and the second substrate 202, the via holes 206 penetrate through the first adhesive layer 205, and the first conductive line 203 is electrically connected to the second conductive line 204 through the via holes 206.

[0159] It should be noted that for the specific description of this encapsulation substrate 20, reference can be made to the descriptions of the above respective embodiments, and the present application will not elaborate herein.

[0160] The present application also provides an electronic device, including an encapsulation substrate 20, which is fabricated by using the fabrication method of any one of the encapsulation substrates in the fabrication methods of multiple encapsulation substrates provided in the above specific embodiments. The encapsulation substrate provided in the present application is applied to common electronic devices on the market. For example, the electronic device can be some consumer electronic products (such as computers), communication electronic products, medical devices, automotive electronics, intelligent electronic products and other terminal devices, or the electronic device can also be semi-finished devices, etc., and no specific limitation is made herein.

[0161] The above embodiments are intended to illustrate the embodiments disclosed in the present application and should not be construed as limiting the present application. In addition, various modifications listed herein and changes in the methods and compositions in the application are obvious to those skilled in the art without departing from the scope and spirit of the present application. Although the present application has been specifically described in conjunction with various specific preferred embodiments of the present application, it should be understood that the present application should not be limited to these specific embodiments. In fact, all obvious modifications to those skilled in the art as described above to obtain the application should be included within the scope of the present application.

Claims

1. A manufacturing method of a packaging substrate, the packaging substrate at least includes a first substrate and a second substrate, characterized in that, The method includes: providing a rigid first substrate and a second substrate, the first substrate including a first surface on which a first conductive circuit is provided, and the second substrate including a second surface on which a second conductive circuit is provided; bonding the first substrate and the second substrate through a first bonding layer; respectively providing through holes at preset positions of the first substrate and the second substrate, the through holes penetrating the first bonding layer; performing a hole filling process on the through holes so that the first conductive circuit is electrically connected to the second conductive circuit.

2. The method according to claim 1, characterized in that The method of respectively providing through holes at preset positions of the first substrate and the second substrate, the through holes penetrating the first bonding layer, includes: providing a first through hole at a first preset position of the first substrate, and forming a through hole in the first bonding layer, the through hole communicating with the first through hole; providing a second through hole at a second preset position of the second substrate, and a projection of the first through hole on the first surface at least covering a part of a projection of the second through hole on the first surface.

3. The method according to claim 1, characterized in that The first conductive circuit is located on a side of the first substrate close to the first bonding layer, and the second conductive circuit is located on a side of the second substrate close to the first bonding layer.

4. The method according to claim 3, wherein The first substrate further includes a third surface opposite to the first surface, and the second substrate further includes a fourth surface opposite to the second surface. The method of performing a hole filling process on the through holes further includes: forming a conductive layer on the third surface and forming a conductive layer on the fourth surface, the conductive layers respectively covering the through holes on the first substrate and the through holes on the second substrate; patterning the conductive layer on the third surface to form a third conductive circuit, and patterning the conductive layer on the fourth surface to form a fourth conductive circuit, the third conductive circuit being connected to the first conductive circuit through the through hole on the first surface, and the fourth conductive circuit being connected to the second conductive circuit through the through hole on the second surface.

5. The method according to claim 4, wherein The method further includes: providing a rigid third substrate and a fourth substrate, the third substrate including a fifth surface on which a fifth conductive circuit is provided, and the fourth substrate including a sixth surface on which a sixth conductive circuit is provided; bonding the third substrate to the first substrate through a second bonding layer, and bonding the fourth substrate to the second substrate through a third bonding layer; providing through holes penetrating the second bonding layer at preset positions of the third substrate, and providing through holes penetrating the third bonding layer at preset positions of the fourth substrate; performing a hole filling process on the through holes so that the fifth conductive circuit is electrically connected to the third conductive circuit, and the sixth conductive circuit is electrically connected to the fourth conductive circuit.

6. The method according to claim 2, wherein The step of providing a first through hole at a first preset position of the first substrate, providing a second through hole at a second preset position of the second substrate, and forming a through hole in the first bonding layer includes: forming the first through hole and the second through hole under a first laser-induced condition; forming the through hole under a second laser-induced condition, the second laser-induced condition being different from the first laser-induced condition.

7. The method according to any one of claims 1-6, characterized in that, An accommodating groove is provided on the first substrate or the second substrate. Before bonding the first substrate and the second substrate through a first adhesive layer, the method further includes: Placing a packaged chip or a heat sink in the accommodating groove.

8. The method according to claim 4, wherein Before bonding the third substrate to the first substrate through a second adhesive layer and bonding the fourth substrate to the second substrate through a third adhesive layer, the method further includes: Forming an insulating layer on the third surface and / or the fourth surface; Forming a seventh conductive line on the insulating layer; the width of the seventh conductive line is greater than the width of the first conductive line.

9. A method for manufacturing a packaging substrate, the packaging substrate at least comprising a first substrate and a second substrate, characterized in that, The method includes: Providing a rigid first substrate and a second substrate, the first substrate including opposite first and third surfaces and a filling hole penetrating the first and third surfaces, the first surface being provided with a first conductive line, the third surface being provided with a third conductive line, the first conductive line connecting the third conductive line through the filling hole, the second substrate including opposite second and fourth surfaces and a filling hole penetrating the second and fourth surfaces, the second surface being provided with a second conductive line, the fourth surface being provided with a fourth conductive line, the second conductive line connecting the fourth conductive line through the filling hole; Providing conductive contacts on the first conductive line; Bonding the first substrate and the second substrate through a first adhesive layer; the first conductive line is connected to the second conductive line through the conductive contacts.

10. The method according to claim 9, characterized in that, The method further includes: Providing a rigid third substrate and a fourth substrate; Bonding the third substrate to the first substrate through a second adhesive layer and bonding the fourth substrate to the second substrate through a third adhesive layer; Providing through holes penetrating the second adhesive layer at preset positions on the third substrate and providing through holes penetrating the third adhesive layer at preset positions on the fourth substrate; Performing a hole filling process on the through holes.

11. An encapsulation substrate, characterized in that, The packaged substrate is manufactured by using the manufacturing method according to any one of claims 1-10.

12. An encapsulation substrate, characterized in that, The packaged substrate at least includes: A first substrate, including a first surface, the first surface being provided with a first conductive line; A second substrate, bonded to the first substrate through a first adhesive layer, the second substrate including a second surface, the second surface being provided with a second conductive line; Through holes after the hole filling process are respectively provided at preset positions on the first substrate and the second substrate, the through holes penetrate the first adhesive layer, and the first conductive line is connected to the second conductive line through the through holes.

13. An electronic device, characterized in that, The electronic device includes the packaged substrate according to claim 12.

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