Semiconductor device detection method, device and system, and storage medium

Abstract

The embodiment of the invention provides a semiconductor device detection method, device and system and a storage medium. The method comprises the following steps: acquiring defect information of the semiconductor device; the defect information comprises a plurality of defect types and the position of each defect type in the semiconductor device; determining a defect type to be analyzed from the plurality of defect types according to the defect information of the semiconductor device; and according to energy dispersive X-ray energy spectrum EDX information corresponding to the position where the defect type to be analyzed exists in the semiconductor device, determining an abnormal defect type in the defect type to be analyzed.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of semiconductor technology, and in particular, to a method, device, system, and storage medium for detecting semiconductor devices. Background Art

[0002] With the continuous development of semiconductor technology, the critical dimension (CD) of semiconductor devices is getting smaller and smaller, and the integration degree of semiconductor devices is getting higher and higher. Defect detection of semiconductor devices has become an important method to improve the yield of semiconductor devices. Summary of the Invention

[0003] In view of this, embodiments of the present disclosure provide a method, device, system, and storage medium for detecting semiconductor devices.

[0004] To achieve the above object, the technical solution of the present disclosure is implemented as follows:

[0005] In a first aspect, embodiments of the present disclosure provide a method for detecting a semiconductor device, the method including: obtaining defect information of the semiconductor device; the defect information includes a plurality of defect types and the position of each defect type in the semiconductor device; determining a defect type to be analyzed from the plurality of defect types according to the defect information of the semiconductor device; and determining an abnormal defect type from the defect type to be analyzed according to the energy dispersive X-ray spectroscopy (EDX) information corresponding to the position where the defect type to be analyzed exists in the semiconductor device.

[0006] In some embodiments, the method further includes: obtaining EDX information of a reference sample; the EDX information includes element types and element contents; and determining an abnormal defect type from the defect type to be analyzed according to the energy dispersive X-ray spectroscopy (EDX) information corresponding to the position where the defect type to be analyzed exists in the semiconductor device includes: comparing the EDX information of the reference sample with the EDX information corresponding to the position where the defect type to be analyzed exists in the semiconductor device, and determining an abnormal defect type from the defect type to be analyzed.

[0007] In some embodiments, comparing the EDX information of the reference sample and the EDX information corresponding to the position in the semiconductor device where the defect type to be analyzed exists, and determining an abnormal defect type among the defect types to be analyzed includes: comparing the element types included in the reference sample and the element types included in the position in the semiconductor device where the defect type to be analyzed exists, to obtain an element type analysis result corresponding to the defect type to be analyzed; wherein, the element type analysis result includes missing elements or abnormal elements; the element types included in the reference sample but not included in the position in the semiconductor device where the defect type to be analyzed exists are missing elements; the element types included in the position in the semiconductor device where the defect type to be analyzed exists but not included in the reference sample are the abnormal elements.

[0008] In some embodiments, comparing the EDX information of the reference sample and the EDX information corresponding to the position in the semiconductor device where the defect type to be analyzed exists, and determining an abnormal defect type among the defect types to be analyzed further includes: according to the content of the abnormal elements included in the position in the semiconductor device where the defect type to be analyzed exists, determining the abnormal defect type among the defect types to be analyzed whose element type analysis result is abnormal elements.

[0009] In some embodiments, according to the content of the abnormal elements included in the position in the semiconductor device where the defect type to be analyzed exists, determining the abnormal defect type among the defect types to be analyzed whose element type analysis result is abnormal elements includes: determining that the defect type to be analyzed is the abnormal defect type according to the content of the abnormal elements included in the position in the semiconductor device where the defect type to be analyzed exists being greater than a preset range.

[0010] In some embodiments, after determining the abnormal defect type among the defect types to be analyzed according to the energy dispersive X-ray spectroscopy (EDX) information corresponding to the position in the semiconductor device where the defect type to be analyzed exists, the method further includes: determining whether to continue the manufacturing process of the semiconductor device according to the ratio between the number of the abnormal defect types and the number of the defect types to be analyzed.

[0011] In some embodiments, determining whether to continue the manufacturing process of a semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed includes: determining to continue the manufacturing process of the semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed being less than or equal to a preset ratio; determining to pause the manufacturing process of the semiconductor device and issue an alarm according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed being greater than the preset ratio.

[0012] In a second aspect, an embodiment of the present disclosure provides a detection device for a semiconductor device. The device includes: a first acquisition module configured to acquire defect information of the semiconductor device; the defect information includes a plurality of defect types and the position of each defect type in the semiconductor device; a pre-determination module configured to determine a defect type to be analyzed from the plurality of defect types according to the defect information of the semiconductor device; a defect analysis module configured to determine an abnormal defect type from the defect types to be analyzed according to the energy dispersive X-ray spectroscopy (EDX) information corresponding to the position where the defect type to be analyzed exists in the semiconductor device.

[0013] In some embodiments, the device further includes: a second acquisition module configured to acquire EDX information of a reference sample; the EDX information includes element types and element contents; the defect analysis module is configured to compare the EDX information of the reference sample and the EDX information corresponding to the position where the defect type to be analyzed exists in the semiconductor device, and determine an abnormal defect type from the defect types to be analyzed.

[0014] In some embodiments, the defect analysis module includes a type analysis unit; the type analysis unit is configured to compare the element types included in the reference sample and the element types included in the position where the defect type to be analyzed exists in the semiconductor device, and obtain an element type analysis result corresponding to the defect type to be analyzed; wherein, the element type analysis result includes missing elements or abnormal elements; the element types included in the reference sample but not included in the position where the defect type to be analyzed exists in the semiconductor device are missing elements; the element types included in the position where the defect type to be analyzed exists in the semiconductor device but not included in the reference sample are the abnormal elements.

[0015] In some embodiments, the defect analysis module includes a content analysis unit; the content analysis unit is configured to determine the abnormal defect type from the defect types to be analyzed with the element type analysis result being abnormal elements according to the content of the abnormal elements included in the position where the defect type to be analyzed exists in the semiconductor device.

[0016] In some embodiments, the content analysis unit is configured to: determine that the defect type to be analyzed is the abnormal defect type according to that the content of the abnormal element included at the position where the defect type to be analyzed exists in the semiconductor device is greater than a preset range.

[0017] In some embodiments, the device further includes: a production execution module, configured to: determine whether to continue the manufacturing process of the semiconductor device according to the ratio between the number of the abnormal defect types and the number of the defect types to be analyzed.

[0018] In some embodiments, the production execution module is configured to: determine to continue the manufacturing process of the semiconductor device according to that the ratio between the number of the abnormal defect types and the number of the defect types to be analyzed is less than or equal to a preset ratio; determine to suspend the manufacturing process of the semiconductor device and issue an alarm according to that the ratio between the number of the abnormal defect types and the number of the defect types to be analyzed is greater than the preset ratio.

[0019] In a third aspect, an embodiment of the present disclosure provides a detection system for a semiconductor device, where the system includes: a storage device for storing executable instructions; a processing device for executing the executable instructions stored in the storage device to implement the detection method for the semiconductor device in the above technical solution.

[0020] In a fourth aspect, an embodiment of the present disclosure provides a storage medium, where a computer program is stored in the storage medium, and when the computer program is executed, the detection method for the semiconductor device in the above technical solution is implemented.

[0021] An embodiment of the present disclosure provides a detection method, device, system, and storage medium for a semiconductor device. In an embodiment of the present disclosure, a defect type to be analyzed is determined among multiple defect types of the semiconductor device, and according to the energy dispersive X-ray spectroscopy (EDX) information corresponding to the position where the defect type to be analyzed exists in the semiconductor device, an abnormal defect type is determined among the defect types to be analyzed; in this way, manpower can be saved, the defect detection efficiency of the semiconductor device can be improved, and the abnormal defect type can be fed back in time, thereby reducing the risk that the abnormal defect type is not discovered in time. Description of the Drawings

[0022] Figure 1 It is a schematic flowchart of the detection method for the semiconductor device provided by an embodiment of the present disclosure;

[0023] Figure 2 It is a schematic principle diagram of the detection method for the semiconductor device provided by an embodiment of the present disclosure;

[0024] Figure 3ABlock diagram of the detection device for the semiconductor device provided by the embodiment of the present disclosure Figure 1 ;

[0025] Figure 3B Block diagram of the detection device for the semiconductor device provided by the embodiment of the present disclosure Figure 2 ;

[0026] Figure 4 Block diagram of the detection system for the semiconductor device provided by the embodiment of the present disclosure. Detailed implementation manners

[0027] Next, in combination with the embodiments of the present disclosure and the drawings, the technical solutions in the embodiments of the present disclosure will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope protected by the present disclosure.

[0028] In the following description, a large number of specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present disclosure, some well-known technical features are not described; that is, not all features of the actual embodiments are described here, and the well-known functions and structures are not described in detail.

[0029] In the drawings, for clarity, the dimensions of layers, regions, elements, and their relative dimensions may be exaggerated. The same reference numerals throughout the drawings denote the same elements.

[0030] It should be understood that when an element or layer is referred to as "on", "adjacent to", "connected to", or "coupled to" another element or layer, it can be directly on, adjacent to, connected to, or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as "directly on", "directly adjacent to", "directly connected to", or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer, or part discussed below may be referred to as the second element, component, region, layer, or part. And when discussing the second element, component, region, layer, or part, it does not indicate that the present disclosure necessarily has the first element, component, region, layer, or part.

[0031] Spatial relationship terms such as "under", "below", "lower", "beneath", "above", "upper", etc. may be used herein for convenience of description to describe the relationship of one element or feature shown in the figures with other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are also intended to include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under other elements" or "beneath" or "underneath" it will be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0032] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present disclosure. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0033] To thoroughly understand the present disclosure, detailed steps and detailed structures will be set forth in the following description so as to illustrate the technical solutions of the present disclosure. The preferred embodiments of the present disclosure are described in detail below. However, in addition to these detailed descriptions, the present disclosure may have other embodiments.

[0034] With the continuous development of semiconductor technology, the feature size of semiconductor devices is getting smaller and smaller, and the integration degree of semiconductor devices is getting higher and higher. Defect detection of semiconductor devices has become an important method to improve the yield of semiconductor devices. The production process of semiconductor devices (such as memories) is numerous and complex. After each manufacturing process is performed, it is necessary to detect the defects on the surface of the wafer to prevent wafers with major defects from continuing to flow to subsequent processes, thereby affecting the performance of the finally formed memory.

[0035] Refer to Figure 1 , Figure 1 which is a schematic flow chart of a method for detecting a semiconductor device provided by an embodiment of the present disclosure. As Figure 1 shown, an embodiment of the present disclosure provides a method for detecting a semiconductor device, the method comprising:

[0036] Step S101: Obtain the defect information of the semiconductor device; the defect information includes multiple defect types and the position of each defect type in the semiconductor device.

[0037] Step S102: Determine the defect type to be analyzed from the multiple defect types according to the defect information of the semiconductor device.

[0038] Step S103: Determine the abnormal defect type from the defect types to be analyzed according to the energy dispersive X-ray spectroscopy (EDX) information corresponding to the position where the defect type to be analyzed exists in the semiconductor device.

[0039] In the embodiments of the present disclosure, the defect type to be analyzed is determined from the multiple defect types of the semiconductor device, and the abnormal defect type is determined from the defect types to be analyzed according to the energy dispersive X-ray spectroscopy (EDX) information corresponding to the position where the defect type to be analyzed exists in the semiconductor device. In this way, manpower can be saved, the defect detection efficiency of the semiconductor device can be improved, and the abnormal defect type can be timely fed back, thereby reducing the risk that the abnormal defect type is not discovered in time. Further, it is also possible to determine whether to continue the manufacturing process of the semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed, so as to provide analysis information for the manufacturing of the semiconductor device.

[0040] In the embodiments of the present disclosure, in step S101, the defect information of the semiconductor device is obtained; the defect information includes multiple defect types and the position of each defect type in the semiconductor device.

[0041] Here, the semiconductor device may include a semiconductor structure after at least one manufacturing process, or a semiconductor structure after any manufacturing process. During the manufacturing process of the semiconductor device, after each manufacturing process is executed, the defects of the semiconductor device need to be detected. If the detection is qualified, the semiconductor device can continue to flow to the subsequent process and execute the next manufacturing process; if the detection is unqualified, the semiconductor device cannot flow to the subsequent process. By performing the defect detection method after each manufacturing process, wafers with major defects can be prevented from continuing to flow to the subsequent process, thereby improving the yield of the semiconductor device.

[0042] The manufacturing process of the semiconductor device includes eight basic semiconductor processes, namely, oxidation process, diffusion process, deposition process, lithography process, etching process, ion implantation process, heat treatment process, and packaging process. The present disclosure has no special limitation on the number and type of manufacturing processes passed by the semiconductor device, and the semiconductor device may be a semiconductor structure after any manufacturing process.

[0043] For example, a deposition process is performed to form an alternately stacked gate insulating layer and a gate sacrificial layer on a substrate. At this time, defect detection can be performed on the gate insulating layer and the gate sacrificial layer on the substrate. Another example is that an etching process is performed to etch and form a channel hole penetrating the gate insulating layer and the gate sacrificial layer. At this time, defect detection can be performed on the etched channel hole.

[0044] Here, an image of the semiconductor device can be obtained by scanning the semiconductor device; wherein, the image contains the characteristic information of the semiconductor device. For example, the semiconductor device can be scanned by a Scanning Electron Microscope (SEM) to obtain an image of the semiconductor device. By analyzing the image of the semiconductor device, characteristic information such as the position and morphology of the defects in the semiconductor device can be obtained; by analyzing the morphology of the defects, the defect type can be obtained; thus, the defect information of the semiconductor device can be obtained, and the defect information includes the defect types included in the semiconductor device and the position of each defect type in the semiconductor device.

[0045] The defect types in the semiconductor device can be, for example, scratch defects, stacking fault defects, slip line defects, and particulate residue defects, etc. Scratch defects refer to linear defects in the semiconductor device caused by chemical mechanical polishing treatment, etc. Stacking fault defects refer to crystal plane defects generated by introducing atomic planes with abnormal stacking sequences into the normal stacking sequence, that is, defects where the crystal planes are misaligned. Slip line defects refer to defects where the lattice is misaligned at the junction between the slipped part and the unslipped part when a part of the crystal slips relative to another part. Particulate residue defects refer to particulates and the like remaining in the semiconductor device during certain manufacturing processes. There are many defect types in the semiconductor device, and the present disclosure does not have special limitations on the defect types included in the semiconductor device, and will not list them one by one here.

[0046] The position of the defect in the semiconductor device can be a coordinate position. For example, taking the center of the semiconductor device as the origin, a rectangular coordinate system is established, and the abscissa and ordinate of each defect are marked in the coordinate system to obtain the coordinate position information of each defect.

[0047] In the embodiment of the present disclosure, in step S102, according to the defect information of the semiconductor device, the defect type to be analyzed is determined among multiple defect types.

[0048] Here, a defect type to be analyzed is determined among the defect types included in the semiconductor device, that is, a specific number of defect types are selected from all the defect types included in the semiconductor device as the defect types to be analyzed. In other words, the number of all the defect types included in the semiconductor device is greater than or equal to the number of the defect types to be analyzed. Of course, according to the defect information of the semiconductor device, the defect types to be analyzed and the positions of each defect type to be analyzed in the semiconductor device can be obtained.

[0049] It should be noted that the purpose of determining the defect types to be analyzed among multiple defect types is to perform Energy Dispersive X-ray Spectroscopy (EDX) analysis subsequently, and analyze the element types and element contents at the positions where the defect types to be analyzed exist in the semiconductor device. That is to say, the positions where the defect types to be analyzed exist in the semiconductor device are high-risk areas where element type anomalies or element content anomalies occur. For example, particulate residue can be selected as the defect type to be analyzed.

[0050] In the embodiment of the present disclosure, in step S103, according to the EDX information corresponding to the positions where the defect types to be analyzed exist in the semiconductor device, the abnormal defect types are determined among the defect types to be analyzed.

[0051] In some embodiments, the method further includes: obtaining the EDX information of a reference sample; the EDX information includes element types and element contents; step S103 includes: comparing the EDX information of the reference sample and the EDX information corresponding to the positions where the defect types to be analyzed exist in the semiconductor device, and determining the abnormal defect types among the defect types to be analyzed.

[0052] Here, the reference sample refers to a semiconductor structure that has undergone the same manufacturing process as the semiconductor device. The reference sample can be a physical sample that has undergone the same manufacturing process, and the EDX information corresponding to the positions without defects in the reference sample is obtained, that is, the element types and element contents corresponding to the positions without defects in the reference sample are obtained. The reference sample can also be a virtual sample that does not need to be manufactured through actual manufacturing processes. Only by theoretical calculation methods, the EDX information of the virtual sample after a certain manufacturing process is determined, that is, the element types and element contents that should theoretically have after a certain manufacturing process are obtained.

[0053] For example, a certain manufacturing process is a deposition process to form a material layer on a substrate. The element types and element contents that the material layer should have after the deposition process can be determined by theoretical calculation methods.

[0054] Here, the types and contents of elements that should theoretically be present after a certain manufacturing process are obtained, and the types and contents of elements corresponding to the positions where the defect types to be analyzed exist in the semiconductor device are obtained, and the abnormal defect types are determined among the defect types to be analyzed. Specifically, the types of elements at the positions where the defect types to be analyzed exist in the semiconductor device may be the same as or different from the types of elements in the reference sample, and the contents of elements at the positions where the defect types to be analyzed exist in the semiconductor device may be the same as or different from the contents of elements in the reference sample. In other words, the number of defect types to be analyzed is greater than or equal to the number of abnormal defect types, the minimum value of the number of abnormal defect types may be 0, and the maximum value of the number of abnormal defect types may be the number of defect types to be analyzed.

[0055] For example, the number of defect types to be analyzed may be 5, and the number of abnormal defect types may be 3.

[0056] In some embodiments, comparing the EDX information of the reference sample and the EDX information corresponding to the positions where the defect types to be analyzed exist in the semiconductor device, and determining the abnormal defect types among the defect types to be analyzed includes: comparing the types of elements included in the reference sample and the types of elements included at the positions where the defect types to be analyzed exist in the semiconductor device to obtain the elemental type analysis result corresponding to the defect types to be analyzed; wherein, the elemental type analysis result includes missing elements or abnormal elements; the types of elements included in the reference sample but not included at the positions where the defect types to be analyzed exist in the semiconductor device are missing elements; the types of elements included at the positions where the defect types to be analyzed exist in the semiconductor device but not included in the reference sample are abnormal elements.

[0057] Here, comparing and analyzing the types of elements included in the reference sample and the types of elements included at the positions where the defect types to be analyzed exist in the semiconductor device includes the following three cases.

[0058] In the first case, the types of elements included in the reference sample are the same as the types of elements included at the positions where the defect types to be analyzed exist in the semiconductor device. For example, the reference sample has three elements: carbon, nitrogen, and oxygen; and the positions where the defect types to be analyzed exist in the semiconductor device also have three elements: carbon, nitrogen, and oxygen.

[0059] In the above technical solution, even if there are defect types to be analyzed in the semiconductor device, the types of elements corresponding to the positions of the defect types to be analyzed are the same as the types of elements included in the reference sample.

[0060] In the second case, the types of elements included in the reference sample are more than those included at the location where the defect type to be analyzed exists in the semiconductor device, that is, some element types that should be present are missing at the location where the defect type to be analyzed exists in the semiconductor device, namely, missing elements. For example, the reference sample has three element types: carbon element, nitrogen element, and oxygen element; the location where the defect type to be analyzed exists in the semiconductor device has two element types: carbon element and nitrogen element; that is, the oxygen element is missing at the location where the defect type to be analyzed exists in the semiconductor device.

[0061] In the third case, the types of elements included in the reference sample are less than those included at the location where the defect type to be analyzed exists in the semiconductor device, that is, some element types that should not be present are present at the location where the defect type to be analyzed exists in the semiconductor device, namely, abnormal elements. For example, the reference sample has three element types: carbon element, nitrogen element, and oxygen element; the location where the defect type to be analyzed exists in the semiconductor device has four element types: carbon element, nitrogen element, oxygen element, and copper element; that is, the copper element is present at the location where the defect type to be analyzed exists in the semiconductor device.

[0062] It should be noted that when detecting a semiconductor device, it is necessary to pay attention to whether there are some extra elements, especially metal elements, at the location where the defect type to be analyzed exists in the semiconductor device.

[0063] In some embodiments, comparing the EDX information of the reference sample and the EDX information corresponding to the location where the defect type to be analyzed exists in the semiconductor device, and determining an abnormal defect type among the defect types to be analyzed further includes: determining an abnormal defect type among the defect types to be analyzed whose elemental type analysis result is an abnormal element according to the content of the abnormal element included at the location where the defect type to be analyzed exists in the semiconductor device. More specifically, it is determined that the defect type to be analyzed is an abnormal defect type according to the content of the abnormal element included at the location where the defect type to be analyzed exists in the semiconductor device being greater than a preset range.

[0064] Here, some element types that should not be present (i.e., abnormal elements) are present at the location where the defect type to be analyzed exists in the semiconductor device, and it is necessary to control the content of these abnormal elements.

[0065] Exemplarily, controlling the content of the abnormal element of a certain defect type to be analyzed may include the following steps: numbering all elements, that is, each element corresponds to a number; controlling the content of the elements other than the element types of the reference sample; if the content of the other elements exceeds the preset range, then determining the defect type to be analyzed as an abnormal defect type.

[0066] For example, the reference sample has three elements, namely carbon, nitrogen, and oxygen; the content of other elements except carbon, nitrogen, and oxygen at the position with the defect type to be analyzed in the semiconductor device is controlled. If there is an abnormal element, i.e., copper, at the position with the defect type to be analyzed in the semiconductor device and the content of copper exceeds the preset range, the defect type to be analyzed is determined as an abnormal defect type. If there is no abnormal element at the position with the defect type to be analyzed in the semiconductor device, the defect type to be analyzed is not determined as an abnormal defect type; if there is an abnormal element, i.e., copper, at the position with the defect type to be analyzed in the semiconductor device and the content of copper does not exceed the preset range, the defect type to be analyzed is not determined as an abnormal defect type.

[0067] Here, different abnormal elements at the position with the defect type to be analyzed in the semiconductor device can correspond to the same or different preset ranges. The present disclosure does not have special limitations on the preset ranges of abnormal elements at the position with the defect type to be analyzed in the semiconductor device, and can be flexibly selected according to the actual situation.

[0068] In some embodiments, after step S103, the detection method further includes: determining whether to continue the manufacturing process of the semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed.

[0069] Here, it is possible to determine whether to continue the manufacturing process of the semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed.

[0070] For example, five defect types to be analyzed can be determined among the defect types included in the semiconductor device, namely the first defect type to be analyzed, the second defect type to be analyzed, the third defect type to be analyzed, the fourth defect type to be analyzed, and the fifth defect type to be analyzed. Element type analysis and element content analysis are respectively performed on the positions with each defect type to be analyzed in the semiconductor device. The element types corresponding to the positions with the first defect type to be analyzed and the third defect type to be analyzed in the semiconductor device are the same as those included in the reference sample. Abnormal elements appear at the positions with the second defect type to be analyzed, the fourth defect type to be analyzed, and the fifth defect type to be analyzed in the semiconductor device, and the content of the abnormal elements exceeds the preset range. Therefore, the second defect type to be analyzed, the fourth defect type to be analyzed, and the fifth defect type to be analyzed can all be determined as abnormal defect types.

[0071] In the above technical solution, the number of defect types to be analyzed is 5, and the number of abnormal defect types is 3. Therefore, the ratio between the number of abnormal defect types and the number of defect types to be analyzed can be calculated as 3 / 5.

[0072] In some embodiments, determining whether to continue the manufacturing process of a semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed includes: determining to continue the manufacturing process of the semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed being less than or equal to a preset ratio; determining to pause the manufacturing process of the semiconductor device and issue an alarm according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed being greater than the preset ratio.

[0073] Here, if the ratio between the number of abnormal defect types and the number of defect types to be analyzed is less than or equal to the preset ratio, it indicates that the element types and element contents at the positions of the defect types to be analyzed in the semiconductor device are within an acceptable range, and it is determined that the manufacturing process of the semiconductor device can continue, that is, the semiconductor device can continue to flow to the next manufacturing process.

[0074] Here, if the ratio between the number of abnormal defect types and the number of defect types to be analyzed is greater than the preset ratio, it indicates that the element types and element contents at the positions of the defect types to be analyzed in the semiconductor device are outside the acceptable range, and it is determined to pause the manufacturing process of the semiconductor device and issue an alarm, that is, the semiconductor device cannot continue to flow to the next manufacturing process.

[0075] Here, the present disclosure does not have any special limitations on the preset ratio between the number of abnormal defect types and the number of defect types to be analyzed, and it can be flexibly selected according to the actual situation.

[0076] In some embodiments, it is possible to use the automated defect classification (ADC) system at the machine end for detection. A computer program is added to the ADC system. When the computer program is executed, it can determine the abnormal defect types among the defect types to be analyzed according to the EDX information corresponding to the positions of the defect types to be analyzed in the semiconductor device. And the ratio between the number of abnormal defect types and the defect types to be analyzed can be notified by sending an e-mail by the ADC system.

[0077] In some embodiments, it is also possible to use an automated defect classification system (such as Klarity) for detection. A computer program is added to the Klarity system. When the computer program is executed, it can determine the abnormal defect types among the defect types to be analyzed according to the EDX information corresponding to the positions of the defect types to be analyzed in the semiconductor device.

[0078] Reference Figure 2 , Figure 2 is the flow schematic diagram of the detection method for the semiconductor device provided by the embodiments of the present disclosure. As Figure 2As shown, an Equipment (EQP) is used to obtain defect information of a semiconductor device. The defect information includes multiple defect types and the location of each defect type in the semiconductor device. The defect information file of the semiconductor device is uploaded to the Klarity system. The Klarity system can determine the defect type to be analyzed among multiple defect types according to the defect information of the semiconductor device; and determine the abnormal defect type among the defect types to be analyzed according to the corresponding Energy Dispersive X-ray Spectroscopy (EDX) information at the location where the defect type to be analyzed exists in the semiconductor device. Thus, the Klarity system can analyze and obtain the ratio between the number of abnormal defect types and the number of defect types to be analyzed.

[0079] Equipment Automation Programming (EAP) can initiate an inquiry to the Klarity system, and the Klarity system feeds back the result of the ratio between the number of abnormal defect types and the number of defect types to be analyzed to the EAP.

[0080] The EAP sends the result of the ratio between the number of abnormal defect types and the number of defect types to be analyzed to the Manufacturing Execution System (MES). The MES judges the magnitude relationship between the ratio between the number of abnormal defect types and the number of defect types to be analyzed and a preset ratio. If the ratio between the number of abnormal defect types and the number of defect types to be analyzed is greater than the preset ratio, that is, out of control (OOC), it is determined to suspend the manufacturing process of the semiconductor device (hold lot) and issue an alarm.

[0081] Reference Figure 3A , Figure 3A is the block diagram of the detection device for a semiconductor device provided by an embodiment of the present disclosure. Figure 1 As Figure 3A shown, an embodiment of the present disclosure provides a detection device for a semiconductor device. The detection device 300 includes: a first acquisition module 310 configured to acquire defect information of a semiconductor device; the defect information includes multiple defect types and the location of each defect type in the semiconductor device; a pre-determination module 320 configured to determine the defect type to be analyzed among multiple defect types according to the defect information of the semiconductor device; and a defect analysis module 330 configured to determine the abnormal defect type among the defect types to be analyzed according to the corresponding Energy Dispersive X-ray Spectroscopy (EDX) information at the location where the defect type to be analyzed exists in the semiconductor device.

[0082] In the embodiments of the present disclosure, the defect analysis module may determine an abnormal defect type among the defect types to be analyzed according to the EDX information corresponding to the position where the defect type to be analyzed exists in the semiconductor device; in this way, the abnormal defect type can be timely fed back, thereby reducing the risk that the abnormal defect type is not timely discovered.

[0083] Reference Figure 3B , Figure 3B is the block Figure 2 . As Figure 3B shown, in some embodiments, the detection device 300 further includes: a second acquisition module 340, configured to: acquire the EDX information of a reference sample; the EDX information includes the element type and the element content; a defect analysis module 330, configured to: compare the EDX information of the reference sample with the EDX information corresponding to the position where the defect type to be analyzed exists in the semiconductor device, and determine an abnormal defect type among the defect types to be analyzed.

[0084] In some embodiments, the defect analysis module 330 includes a type analysis unit 332; the type analysis unit 332 is configured to: compare the element types included in the reference sample with the element types included in the position where the defect type to be analyzed exists in the semiconductor device, and obtain an element type analysis result corresponding to the defect type to be analyzed; wherein, the element type analysis result includes a missing element or an abnormal element; an element type that is included in the reference sample and not included in the position where the defect type to be analyzed exists in the semiconductor device is a missing element; an element type that is included in the position where the defect type to be analyzed exists in the semiconductor device and not included in the reference sample is an abnormal element.

[0085] In some embodiments, the defect analysis module 330 includes a content analysis unit 334; the content analysis unit 334 is configured to: determine an abnormal defect type among the defect types to be analyzed with the element type analysis result being an abnormal element according to the content of the abnormal element included in the position where the defect type to be analyzed exists in the semiconductor device.

[0086] In some embodiments, the content analysis unit 334 is configured to: determine that the defect type to be analyzed is an abnormal defect type according to that the content of the abnormal element included in the position where the defect type to be analyzed exists in the semiconductor device is greater than a preset range.

[0087] In some embodiments, the detection device 300 further includes: a production execution module 350, configured to: determine whether to continue the manufacturing process of the semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed.

[0088] In some embodiments, the production execution module 350 is configured to: determine to continue the manufacturing process of the semiconductor device according to that the ratio between the number of abnormal defect types and the number of defect types to be analyzed is less than or equal to a preset ratio; and determine to pause the manufacturing process of the semiconductor device and issue an alarm according to that the ratio between the number of abnormal defect types and the number of defect types to be analyzed is greater than the preset ratio.

[0089] In the embodiments of the present disclosure, the defect analysis module and the production execution module can be linked. The defect analysis module is used to determine the ratio between the number of abnormal defect types and the number of defect types to be analyzed, and the production execution module is used to determine whether to continue the manufacturing process of the semiconductor device according to the magnitude relationship between the ratio between the number of abnormal defect types and the number of defect types to be analyzed and the preset ratio. In this way, problems can be discovered in time, and the manufacturing process of the semiconductor device with problems can be paused.

[0090] Reference Figure 4 , Figure 4 is a block diagram of the detection system for the semiconductor device provided by the embodiments of the present disclosure. As Figure 4 shown, the embodiments of the present disclosure provide a detection system for a semiconductor device. The detection system 400 includes: a storage device 402 for storing executable instructions; and a processing device 404 for executing the executable instructions stored in the storage device 402 to implement the detection method for the semiconductor device in the above technical solution.

[0091] In the embodiments of the present disclosure, the detection system 400 can be represented in various forms of hardware devices. The detection system 400 can be represented in various forms of digital computers, such as, for example, a laptop computer, a desktop computer, a workbench, a personal digital assistant (PDA), a server, a mainframe computer, and other suitable computers. The detection system 400 can also be represented in various forms of mobile devices, such as, for example, a personal digital processor, a smart phone, a wearable device, and a wafer processing device. Figure 4 The detection system 400 schematically shown is only a feasible embodiment. The components, connection relationships, and functions in the detection system 400 are only examples, and should not impose any limitations on the functions and usage scope of the embodiments of the present disclosure.

[0092] Here, the processing device 404 can be, for example, a central processing unit and a graphics processing unit, etc. The processing device 404 can perform various operations according to the program stored in the Read-Only Memory (ROM) 406; alternatively, the program stored in the storage device 402 can be loaded into the Random-Access Memory (RAM) 408 to perform various operations. Programs and data required for the detection system 400 to perform various operations can also be stored in the random access memory 408. The processing device 404, the read-only memory 406, and the random access memory 408 are connected to each other through the bus 410. The input / output interface 412 is also connected to the bus 410.

[0093] Here, the storage device 402 can be a storage medium, wherein instructions executable by at least one processing device 404 are stored in the storage device 402, so that at least one processing device 404 executes the detection method of the semiconductor device provided by the present disclosure. A computer program is stored in the storage medium provided by the present disclosure, and the computer program is used to cause a computer to execute the detection method of the semiconductor device provided by the present disclosure.

[0094] As Figure 4 shown, the detection system 400 may further include an input device 414, an output device 416, and a communication device 418 connected to the input / output interface 412. The input device 414 can receive input digital or character information, and generate signal inputs related to user settings and function controls of the electronic device for controlling quality. The input device 414 can be, for example, a touch screen, a touchpad, a keyboard, a mouse, a camera, or a microphone, etc. The input device 414 may further include a detection device for acquiring an image of the semiconductor device, and the image contains characteristic information of the semiconductor device. The output device 416 can be, for example, a display or a speaker, etc. The display may include, but is not limited to, a Liquid Crystal Display (LCD), a light-emitting diode display, and a Plasma Display Panel (PDP). The communication device 418 can enable the detection system 400 to perform wired communication or wireless communication with other devices to exchange data.

[0095] An embodiment of the present disclosure provides a storage medium, in which a computer program is stored. When the computer program is executed, the detection method of the semiconductor device in the above technical solution is implemented. The computer program includes program codes for executing the detection method of the semiconductor device in the above technical solution.

[0096] In the embodiments of the present disclosure, the storage medium may be a volatile memory, such as a random access memory; or a non-volatile memory, such as a read-only memory, a flash memory, a hard disk drive (HDD), or a solid state drive (SSD).

[0097] The various embodiments of the systems and techniques described herein can be implemented in digital electronic circuitry, integrated circuit systems, application specific integrated circuits (ASICs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include: being implemented in one or more computer programs, which can be executed and / or interpreted on a programmable system including at least one programmable processing device. The programmable processing device can be a dedicated or general-purpose programmable processing device that can receive data and instructions from a storage device, at least one input device, and at least one output device, and transmit the data and instructions to the storage device, the at least one input device, and the at least one output device.

[0098] These computing programs (also referred to as programs, software, software applications, or code) include machine instructions for a programmable processing device and can implement these computing programs using high-level procedural and / or object-oriented programming languages and / or assembly / machine languages.

[0099] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a cathode ray tube (CRT) or an LCD monitor); and a keyboard and a pointing device (e.g., a mouse or a trackball) through which the user can provide input to the computer. Other kinds of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and the input received from the user can be in any form (e.g., acoustic input, voice input, or tactile input). The systems and techniques described herein can be implemented in a computing system including backend components (e.g., as a data server), or a computing system including middleware components (e.g., an application server), or a computing system including frontend components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system including any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.

[0100] A computer system can include a client and a server. The client and the server are generally far apart from each other and typically interact through a communication network. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a server of a distributed system, or a server combined with a blockchain. The server can also be a cloud server, or an intelligent cloud computing server or an intelligent cloud host with artificial intelligence technology. The server can be a server of a distributed system, or a server combined with a blockchain. The server can also be a cloud server, or an intelligent cloud computing server or an intelligent cloud host with artificial intelligence technology.

[0101] Embodiments of the present disclosure provide a method, apparatus, system, and storage medium for detecting a semiconductor device. The method includes: obtaining defect information of the semiconductor device; the defect information includes a plurality of defect types and the positions of each of the defect types in the semiconductor device; determining a defect type to be analyzed from the plurality of defect types according to the defect information of the semiconductor device; and determining an abnormal defect type from the defect type to be analyzed according to the energy-dispersive X-ray spectroscopy (EDX) information corresponding to the positions where the defect type to be analyzed exists in the semiconductor device. In the embodiments of the present disclosure, a defect type to be analyzed is determined from the plurality of defect types of the semiconductor device, and an abnormal defect type is determined from the defect type to be analyzed according to the energy-dispersive X-ray spectroscopy (EDX) information corresponding to the positions where the defect type to be analyzed exists in the semiconductor device; in this way, manpower can be saved, the defect detection efficiency of the semiconductor device can be improved, and the abnormal defect type can be fed back in time, thereby reducing the risk that the abnormal defect type is not discovered in time.

[0102] It should be understood that the term "one embodiment" or "an embodiment" mentioned throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of the present disclosure. Therefore, the appearances of the phrases "in one embodiment" or "in an embodiment" throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that in various embodiments of the present disclosure, the sequence numbers of the above processes do not mean the order of execution, and the order of execution of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present disclosure. The sequence numbers of the embodiments of the present disclosure are only for description and do not represent the advantages and disadvantages of the embodiments.

[0103] The above is only the preferred embodiment of the present disclosure, and does not limit the patent scope of the present disclosure. Any equivalent structural transformation made by using the content of the specification and drawings of the present disclosure under the inventive concept of the present disclosure, or direct / indirect application in other related technical fields, is included in the patent protection scope of the present disclosure.

Claims

1. A method for detecting a semiconductor device, characterized in that, The method includes: Obtaining defect information of a semiconductor device; the defect information includes multiple defect types and the positions of each of the defect types in the semiconductor device; Determining a defect type to be analyzed from the multiple defect types according to the defect information of the semiconductor device; Determining an abnormal defect type from the defect type to be analyzed according to the energy-dispersive X-ray spectroscopy (EDX) information corresponding to the position where the defect type to be analyzed exists in the semiconductor device.

2. The detection method of the semiconductor device according to claim 1, wherein, The method further includes: Obtaining EDX information of a reference sample; the EDX information includes element types and element contents; The determining an abnormal defect type from the defect type to be analyzed according to the energy-dispersive X-ray spectroscopy (EDX) information corresponding to the position where the defect type to be analyzed exists in the semiconductor device includes: Comparing the EDX information of the reference sample with the EDX information corresponding to the position where the defect type to be analyzed exists in the semiconductor device, and determining an abnormal defect type from the defect type to be analyzed.

3. The detection method of the semiconductor device according to claim 2, characterized in that The comparing the EDX information of the reference sample with the EDX information corresponding to the position where the defect type to be analyzed exists in the semiconductor device, and determining an abnormal defect type from the defect type to be analyzed includes: Comparing the element types included in the reference sample with the element types included in the position where the defect type to be analyzed exists in the semiconductor device to obtain an element type analysis result corresponding to the defect type to be analyzed; Wherein, the element type analysis result includes missing elements or abnormal elements; the element types included in the reference sample but not included in the position where the defect type to be analyzed exists in the semiconductor device are missing elements; the element types included in the position where the defect type to be analyzed exists in the semiconductor device but not included in the reference sample are the abnormal elements.

4. The detection method of the semiconductor device according to claim 3, wherein, The comparing the EDX information of the reference sample with the EDX information corresponding to the position where the defect type to be analyzed exists in the semiconductor device, and determining an abnormal defect type from the defect type to be analyzed further includes: Determining the abnormal defect type from the defect type to be analyzed whose element type analysis result is an abnormal element according to the content of the abnormal element included in the position where the defect type to be analyzed exists in the semiconductor device.

5. The detection method of the semiconductor device according to claim 4, characterized in that, The determining the abnormal defect type from the defect type to be analyzed whose element type analysis result is an abnormal element according to the content of the abnormal element included in the position where the defect type to be analyzed exists in the semiconductor device includes: Determining that the defect type to be analyzed is the abnormal defect type according to that the content of the abnormal element included in the position where the defect type to be analyzed exists in the semiconductor device is greater than a preset range.

6. The detection method of the semiconductor device according to claim 1, characterized in that, After determining an abnormal defect type from the defect type to be analyzed according to the energy-dispersive X-ray spectroscopy (EDX) information corresponding to the position where the defect type to be analyzed exists in the semiconductor device, the method further includes: Determine whether to continue the manufacturing process of the semiconductor device according to the ratio between the number of the abnormal defect types and the number of the defect types to be analyzed.

7. The detection method of the semiconductor device according to claim 6, characterized in that, The determining whether to continue the manufacturing process of the semiconductor device according to the ratio between the number of the abnormal defect types and the number of the defect types to be analyzed includes: Determine to continue the manufacturing process of the semiconductor device according to the ratio between the number of the abnormal defect types and the number of the defect types to be analyzed being less than or equal to a preset ratio; Determine to suspend the manufacturing process of the semiconductor device and issue an alarm according to the ratio between the number of the abnormal defect types and the number of the defect types to be analyzed being greater than the preset ratio.

8. A detecting device for a semiconductor device, characterized in that, The device includes: A first acquisition module, configured to: acquire defect information of the semiconductor device; the defect information includes a plurality of defect types and the positions of each of the defect types in the semiconductor device; A pre-determination module, configured to: determine the defect types to be analyzed from the plurality of defect types according to the defect information of the semiconductor device; A defect analysis module, configured to: determine the abnormal defect types from the defect types to be analyzed according to the energy dispersive X-ray spectroscopy (EDX) information corresponding to the positions where the defect types to be analyzed exist in the semiconductor device.

9. The detecting device for a semiconductor device according to claim 8, characterized in that, The device further includes: A second acquisition module, configured to: acquire the EDX information of a reference sample; the EDX information includes element types and element contents; The defect analysis module, configured to: compare the EDX information of the reference sample and the EDX information corresponding to the positions where the defect types to be analyzed exist in the semiconductor device, and determine the abnormal defect types from the defect types to be analyzed.

10. The detecting device for a semiconductor device according to claim 9, characterized in that, The defect analysis module includes a type analysis unit; the type analysis unit is configured to: compare the element types included in the reference sample and the element types included in the positions where the defect types to be analyzed exist in the semiconductor device, and obtain an element type analysis result corresponding to the defect types to be analyzed; Wherein, the element type analysis result includes missing elements or abnormal elements; the element types included in the reference sample but not included in the positions where the defect types to be analyzed exist in the semiconductor device are missing elements; the element types included in the positions where the defect types to be analyzed exist in the semiconductor device but not included in the reference sample are the abnormal elements.

11. The detecting device for a semiconductor device according to claim 10, characterized in that, The defect analysis module includes a content analysis unit; the content analysis unit is configured to: determine the abnormal defect types from the defect types to be analyzed whose element type analysis result is abnormal elements according to the contents of the abnormal elements included in the positions where the defect types to be analyzed exist in the semiconductor device.

12. The detecting device for a semiconductor device according to claim 11, wherein, The content analysis unit is configured to: determine that the defect type to be analyzed is the abnormal defect type according to the content of the abnormal element included in the position where the defect type to be analyzed exists in the semiconductor device being greater than a preset range.

13. The detecting device for a semiconductor device according to claim 8, wherein, The device further includes: The production execution module is configured to: determine whether to continue the manufacturing process of the semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed.

14. The detection device for a semiconductor device according to claim 13, wherein The production execution module is configured to: determine to continue the manufacturing process of the semiconductor device according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed being less than or equal to a preset ratio; determine to suspend the manufacturing process of the semiconductor device and issue an alarm according to the ratio between the number of abnormal defect types and the number of defect types to be analyzed being greater than the preset ratio.

15. A detection system for a semiconductor device, characterized in that, The system includes: a storage device for storing executable instructions; a processing device for executing the executable instructions stored in the storage device to implement the detection method of the semiconductor device according to any one of claims 1 to 7.

16. A storage medium, characterized in that, A computer program is stored in the storage medium, and when the computer program is executed, the detection method of the semiconductor device according to any one of claims 1 to 7 is implemented.

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