Differential mode and common mode electromagnetic interference passive suppression device and electromagnetic compatibility control equipment
By setting up differential mode and common mode electromagnetic interference passive suppression devices at the power input end of the electronic device, and using differential mode and common mode capacitor inductor components to form a capacitor path bypass interference signal, the problem of impedance mismatch of the power supply conduction harassment suppression circuit is solved, and effective suppression of differential mode and common mode electromagnetic interference is achieved, and the anti-interference ability and performance stability of the equipment are improved.
Patent Information
- Application Number
- CN202510440221.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-12-30
- Filing Date
- 2025-04-09
- Publication Date
- 2025-07-25
AI Technical Summary
In the switching voltage-regulating power supply, the power supply conduction harassment suppression circuit deteriorates attenuation characteristics due to impedance mismatch, and it is impossible to effectively suppress differential mode and common mode electromagnetic interference.
The differential mode and common mode electromagnetic interference passive suppression device are provided at the power input of the electronic device, including a differential mode suppression component and a common mode suppression component. The differential mode suppression component consists of a differential mode capacitor and inductor. The common mode suppression component consists of a common mode capacitor and inductor. The disturbance voltage at the power input is reduced through a specific connection method to form a capacitor path bypass interference signal.
Effectively suppress electromagnetic interference, improve the anti-interference ability and performance stability of electronic equipment, and ensure the safe operation of equipment.
Smart Images

Figure CN120377645A_ABST
Abstract
Description
[0001] This application claims the priority of a Chinese patent application with the application number 202411957718.X and the application title "Differential-mode and Common-mode Electromagnetic Interference Passive Suppression Device and Electromagnetic Compatibility Control Equipment" filed with the Chinese Patent Office on December 30, 2024, the entire content of which is incorporated herein by reference. Technical Field
[0002] The present invention belongs to the technical field of electromagnetic compatibility control equipment, and particularly relates to a differential-mode and common-mode electromagnetic interference passive suppression device and an electromagnetic compatibility control equipment. Background Art
[0003] In the related art, the switching waveforms of high voltage and large current in a switched-mode power supply generate electromagnetic interference emissions including conduction and radiation. Therefore, it is necessary to install a power conduction interference suppression circuit composed of inductors and capacitors at the power input of an electronic device to suppress the differential and common-mode electromagnetic emission (EMI) signals generated by the switched-mode power supply of the electronic device. However, due to the serious impedance mismatch between the second terminal and the electronic device. When the impedance is seriously mismatched, the attenuation characteristics of the power conduction interference suppression circuit deteriorate significantly. Summary of the Invention
[0004] In a first aspect, an embodiment of the present invention provides a differential-mode and common-mode electromagnetic interference passive suppression device. The differential-mode and common-mode electromagnetic interference passive suppression device is disposed at the power input of an electronic device. The differential-mode and common-mode electromagnetic interference passive suppression device includes a differential-mode suppression component and a common-mode suppression component. The differential-mode suppression component is used to reduce the differential-mode interference voltage at the power input. The differential-mode suppression component includes a differential-mode capacitor component and a differential-mode inductor component. The first end of the differential-mode capacitor component is connected to the live wire, and the second end of the differential-mode capacitor component is connected to the neutral wire. The common-mode suppression component is used to reduce the common-mode interference voltage at the power input. The common-mode suppression component includes a common-mode capacitor component and a common-mode inductor component. The common-mode inductor component includes a first common-mode inductor and a second common-mode inductor. The first end of the common-mode capacitor component is connected to the live wire or the neutral wire, and the second end of the common-mode capacitor component is connected to the ground wire; wherein, the first input end of the first common-mode inductor is connected to the live wire, the second input end is connected to the neutral wire, the first output end is connected to the live wire, and the second output end is connected to the neutral wire; the first input end of the second common-mode inductor is connected to the live wire, the second input end is connected to the neutral wire, the first output end is connected to the live wire, and the second output end is connected to the neutral wire.
[0005] In a second aspect, an embodiment of the present invention provides an electromagnetic compatibility control equipment, including the differential-mode and common-mode electromagnetic interference passive suppression device according to any one of the above embodiments.
[0006] The beneficial effects brought by the present invention are as follows:
[0007] As can be seen from the above solution, the differential-mode and common-mode electromagnetic interference passive suppression device is arranged at the power input end of the electronic device. The differential-mode and common-mode electromagnetic interference passive suppression device includes a differential-mode suppression component and a common-mode suppression component. The differential-mode suppression component is used to reduce the differential-mode harassment voltage at the power input end. The differential-mode suppression component includes a differential-mode capacitor component and a differential-mode inductor component. The first end of the differential-mode capacitor component is connected to the live wire, and the second end of the differential-mode capacitor component is connected to the neutral wire. The common-mode suppression component is used to reduce the common-mode harassment voltage at the power input end. The common-mode suppression component includes a common-mode capacitor component and a common-mode inductor component. The first end of the common-mode capacitor component is connected to the live wire or the neutral wire, and the second end of the common-mode capacitor component is connected to the ground wire; the differential-mode capacitor component is connected across the live wire and the neutral wire of the power line to form a capacitive path. When a differential-mode interference signal appears, this capacitive path can bypass it to the other end of the power line, thereby achieving differential-mode filtering. The first end of the differential-mode capacitor component is connected to the live wire, and the second end is connected to the neutral wire. Such a connection method helps to ensure that the differential-mode interference signal can be effectively filtered out.
[0008] By suppressing differential-mode and common-mode electromagnetic interference, the anti-interference ability of the electronic device can be improved. By installing the differential-mode and common-mode electromagnetic interference passive suppression device, the electronic device can be effectively protected from electromagnetic interference damage and ensure the safe operation of the device.
[0009] Improve the performance stability of the electronic device: Electromagnetic interference may cause performance fluctuations or instability of the electronic device. By suppressing electromagnetic interference, the performance stability of the electronic device can be improved, ensuring that the device maintains stable performance during long-term operation. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Figure 1 Shows the power conduction harassment suppression circuit topology diagram of the present invention;
[0011] Figure 2 Shows the differential-mode conduction harassment topology circuit topology diagram of the present invention;
[0012] Figure 3 Shows the common-mode conduction harassment topology circuit topology diagram of the present invention;
[0013] Figure 4 Shows the amplitude-frequency characteristic curve diagram of the two-stage π-type filter topology circuit;
[0014] Figure 5 Shows the general model of the capacitive element according to an embodiment of the present invention;
[0015] Figure 6 Shows the capacitive element model in the power conduction harassment frequency band according to an embodiment of the present invention;
[0016] Figure 7Shows a general model of a common-mode inductance element according to an embodiment of the present invention;
[0017] Figure 8 Shows an equivalent model of the common-mode inductance element of the present invention;
[0018] Figure 9 Shows a wiring schematic diagram for measuring the common-mode characteristic parameters of a common-mode inductance element according to an embodiment of the present invention;
[0019] Figure 10 Shows a wiring schematic diagram for measuring the differential-mode characteristic parameters of a common-mode inductance element according to an embodiment of the present invention;
[0020] Figure 11 Shows the engineering implementation circuit diagram of the present invention;
[0021] Figure 12 Shows a simulation diagram of the non-symmetric (common-mode) insertion loss ratio for the case of severe impedance mismatch of the present invention;
[0022] Figure 13 Shows a simulation diagram for comparing the differential-mode insertion loss performance of the four-type filter topology circuit of the present invention;
[0023] Figure 14 Shows a simulation diagram for comparing the differential-mode insertion loss performance of the four-type filter topology circuit of the present invention;
[0024] Figure 15 Shows the test result diagram of the impedance characteristic curve of the 1UF differential-mode capacitor selected by the present invention;
[0025] Figure 16 Shows the general model of the high-frequency distribution parameters of the differential-mode capacitor of the present invention;
[0026] Figure 17 Shows the test result diagram of the impedance characteristic curve of the 10nF common-mode capacitor selected by the present invention;
[0027] Figure 18 Shows the test result diagram of the common-mode impedance characteristic curve of the 30mH common-mode inductor in the low-frequency band selected by the present invention;
[0028] Figure 19 Shows the test result diagram of the differential-mode impedance characteristic curve of the 30mH common-mode inductor in the low-frequency band selected by the present invention;
[0029] Figure 20 Shows the test result diagram of the common-mode impedance characteristic curve of the 30mH common-mode inductor in the high-frequency band selected by the present invention;
[0030] Figure 21 Shows the test result diagram of the differential-mode impedance characteristic curve of the 30mH common-mode inductor in the high-frequency band selected by the present invention;
[0031] Figure 22 Shows the common - mode model of the 30mH common - mode inductor established by the present invention;
[0032] Figure 23 Shows the differential - mode model of the 30mH common - mode inductor established by the present invention;
[0033] Figure 24 Shows the PSPICE circuit simulation model of the common - mode rejection loop of the present invention;
[0034] Figure 25 Shows the common - mode insertion loss simulation curve of the present invention;
[0035] Figure 26 Shows the PSPICE circuit simulation model of the differential - mode rejection loop of the present invention;
[0036] Figure 27 Shows the differential - mode insertion loss simulation curve of the present invention.
[0037] Reference numerals:
[0038] 100 Differential and common-mode electromagnetic interference passive suppression device, 102 live wire, 104 neutral wire, 106 ground wire, 110 differential-mode suppression component, 112 differential-mode capacitor component, 114 differential-mode inductor component, 120 common-mode suppression component, 122 common-mode capacitor component, 124 common-mode inductor component, 126 first common-mode inductor, 128 second common-mode inductor, 132 first inductor, 134 second inductor, 140 first capacitor module, 142 second capacitor module, 144 third capacitor module, 146 fourth capacitor module, 148 fifth capacitor module, 150 sixth capacitor module, 160 first common-mode capacitor, 162 second common-mode capacitor, 164 third common-mode capacitor, 165 fourth common-mode capacitor, 166 fifth common-mode capacitor, 168 sixth common-mode capacitor, 170 first discharge resistor, 172 second discharge resistor, 200 static capacitor, 220 first equivalent series inductance, 222 first equivalent series resistance, 300 capacitor element, 310 second equivalent series resistance, 312 second equivalent series inductance, 320 capacitor, 322 dielectric absorption resistor, 324 dielectric absorption capacitor, 330 equivalent parallel resistance, 340 first insulation resistance, 342 second insulation resistance, 350 first parasitic capacitor, 352 second parasitic capacitor, 410 first model resistor, 412 second model resistor, 414 first model inductor, 416 second model inductor, 417 first model capacitor, 418 second model capacitor, 510 test capacitor, 520 test equivalent series inductance, 530 test equivalent series resistance, R13 first experimental resistor, L10 first experimental inductor, C10 first experimental capacitor, R14 second experimental resistor, L11 second experimental inductor, C11 second experimental capacitor, R16 third experimental resistor, R17 third experimental resistor, L12 third experimental inductor, C12 third experimental capacitor, R15 fifth experimental resistor, L13 fourth experimental inductor, C13 fourth experimental capacitor, R4 seventh experimental resistor, L3 fifth experimental inductor, C3 fifth experimental capacitor, R5 eighth experimental resistor, L4 sixth experimental inductor, C4 sixth experimental capacitor, R6 ninth experimental resistor, L5 seventh experimental inductor, C5 seventh experimental capacitor, R10 tenth experimental resistor, R1 first experimental resistor, L1 eighth experimental inductor, C1 eighth experimental capacitor, R11 twelfth experimental resistor, L7 ninth experimental inductor, C7 ninth experimental capacitor, R12 thirteenth experimental resistor, L8 tenth experimental inductor, C8 tenth experimental capacitor, R2 fourteenth experimental resistor, L2 eleventh experimental inductor, C2 eleventh experimental capacitor, L9 twelfth experimental inductor, C9 twelfth experimental capacitor, R18 fifteenth experimental resistor, R19 sixteenth experimental resistor, L14 thirteenth experimental inductor, C14 thirteenth experimental capacitor. Detailed implementation
[0039] To make the objectives, technical solutions, and advantages of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.
[0040] As Figure 1 , Figure 2 and Figure 3 shown, a differential-mode and common-mode electromagnetic interference passive suppression device 100 provided by the present application is disposed at the power input end of an electronic device. The differential-mode and common-mode electromagnetic interference passive suppression device 100 includes a differential-mode suppression component 110 and a common-mode suppression component 120. The differential-mode suppression component 110 is used to reduce the differential-mode interference voltage at the power input end. The differential-mode suppression component 110 includes a differential-mode capacitor component 112 and a differential-mode inductor component 114. The first end of the differential-mode capacitor component 112 is connected to the live wire 102, and the second end of the differential-mode capacitor component 112 is connected to the neutral wire 104. The common-mode suppression component 120 is used to reduce the common-mode interference voltage at the power input end. The common-mode suppression component 120 includes a common-mode capacitor component 122 and a common-mode inductor component 124. The common-mode inductor component 124 includes a first common-mode inductor 126 and a second common-mode inductor 128. The first end of the common-mode capacitor component 122 is connected to the live wire 102 or the neutral wire 104, and the second end of the common-mode capacitor component 122 is connected to the ground wire 106; wherein, the first input end of the first common-mode inductor 126 is connected to the live wire 102, the second input end is connected to the neutral wire 104, the first output end is connected to the live wire 102, and the second output end is connected to the neutral wire 104; the first input end of the second common-mode inductor 128 is connected to the live wire 102, the second input end is connected to the neutral wire 104, the first output end is connected to the live wire 102, and the second output end is connected to the neutral wire 104.
[0041] A differential-mode and common-mode electromagnetic interference passive suppression device 100 provided by the present application. The differential-mode and common-mode electromagnetic interference passive suppression device 100 is arranged at the power input end of an electronic device. The differential-mode and common-mode electromagnetic interference passive suppression device 100 includes a differential-mode suppression component 110 and a common-mode suppression component 120. The differential-mode suppression component 110 is used to reduce the differential-mode disturbance voltage at the power input end. The differential-mode suppression component 110 includes a differential-mode capacitor component 112 and a differential-mode inductor component 114. The first end of the differential-mode capacitor component 112 is connected to the live wire 102, and the second end of the differential-mode capacitor component 112 is connected to the neutral wire 104. The common-mode suppression component 120 is used to reduce the common-mode disturbance voltage at the power input end. The common-mode suppression component 120 includes a common-mode capacitor component 122 and a common-mode inductor component 124. The common-mode inductor component 124 includes a first common-mode inductor 126 and a second common-mode inductor 128. The first end of the common-mode capacitor component 122 is connected to the live wire 102 or the neutral wire 104, and the second end of the common-mode capacitor component 122 is connected to the ground wire 106. Among them, the first input end of the first common-mode inductor 126 is connected to the live wire 102, the second input end is connected to the neutral wire 104, the first output end is connected to the live wire 102, and the second output end is connected to the neutral wire 104. The first input end of the second common-mode inductor 128 is connected to the live wire 102, the second input end is connected to the neutral wire 104, the first output end is connected to the live wire 102, and the second output end is connected to the neutral wire 104. The differential-mode capacitor component 112 is connected across the live wire 102 and the neutral wire 104 of the power line to form a capacitive path. When a differential-mode interference signal appears, this capacitive path can bypass it to the other end of the power line, thereby achieving differential-mode filtering. The first end of the differential-mode capacitor component 112 is connected to the live wire 102, and the second end is connected to the neutral wire 104. Such a connection method helps to ensure that the differential-mode interference signal can be effectively filtered out.
[0042] The differential-mode capacitor component 112 is connected across the live wire 102 and the neutral wire 104 of the power line to form a capacitive path. When a differential-mode interference signal appears, this capacitive path can bypass it to the other end of the power line, thereby achieving differential-mode filtering. The first end of the differential-mode capacitor component 112 is connected to the live wire 102, and the second end is connected to the neutral wire 104. Such a connection method helps to ensure that the differential-mode interference signal can be effectively filtered out.
[0043] The common-mode capacitor component 122 is connected across the live wire 102 (or the neutral wire 104) and the ground wire 106 to form a capacitive path to the ground. When a common-mode interference signal appears, this capacitive path can bypass it to the ground, thereby achieving common-mode filtering. The first end of the common-mode capacitor component 122 is connected to the live wire 102 or the neutral wire 104, and the second end is connected to the ground wire 106. Such a connection method helps to ensure that the common-mode interference signal can be effectively filtered out to the ground.
[0044] By suppressing differential-mode and common-mode electromagnetic interference, the anti-interference ability of electronic devices can be improved. By installing the differential-mode and common-mode electromagnetic interference passive suppression device 100, the electronic device can be effectively protected from electromagnetic interference damage and the safe operation of the device can be ensured.
[0045] Improve the performance stability of electronic devices: Electromagnetic interference may cause performance fluctuations or instability of electronic devices. By suppressing electromagnetic interference, the performance stability of electronic devices can be improved, ensuring stable performance during long-term operation.
[0046] Given that the insertion loss transfer function of the filter circuit and the attenuation slope of its amplitude-frequency characteristic curve are strongly correlated with the number of filter elements. The present invention selects the differential-mode suppression component 110 and the common-mode suppression component 120 and sets them in a two-stage π-type filter topology, also reducing the size of the common-mode inductor with a relatively large volume and weight; adopting a two-stage π-type filter topology, the circuit structure is CLCLC, and the insertion loss attenuation slope is 100 dB / decade. Therefore, considering from the insertion loss attenuation slope.
[0047] In some embodiments of the present invention, optionally, the differential-mode inductor component 114 includes a first inductor 132 and a second inductor 134. The first inductor 132 is disposed on the live wire 102, and the second inductor 134 is disposed on the neutral wire 104.
[0048] In this embodiment, the differential-mode inductor component 114 includes a first inductor 132 and a second inductor 134. The first inductor 132 is disposed on the live wire 102, and the second inductor 134 is disposed on the neutral wire 104. Differential-mode filtering can be performed to reduce differential-mode disturbing current.
[0049] In some embodiments of the present invention, optionally, the differential-mode capacitor component 112 includes a first capacitor module 140, a second capacitor module 142, and a third capacitor module 144. The first end of the first capacitor module 140 is connected to the live wire 102, the second end of the first capacitor module 140 is connected to the neutral wire 104, the first end of the second capacitor module 142 is connected to the live wire 102, the second end of the second capacitor module 142 is connected to the neutral wire 104, the first end of the third capacitor module 144 is connected to the live wire 102, and the second end of the third capacitor module 144 is connected to the neutral wire 104.
[0050] In this embodiment, the differential-mode capacitance component 112 includes a first capacitance module 140, a second capacitance module 142, and a third capacitance module 144. The first end of the first capacitance module 140 is connected to the live wire 102, and the second end of the first capacitance module 140 is connected to the neutral wire 104. The first end of the second capacitance module 142 is connected to the live wire 102, and the second end of the second capacitance module 142 is connected to the neutral wire 104. The first end of the third capacitance module 144 is connected to the live wire 102, and the second end of the third capacitance module 144 is connected to the neutral wire 104. The main function of the differential-mode capacitance is to suppress the differential-mode noise in the power grid. Since the differential-mode capacitance is a low-pass filtering element with a very low impedance to high-frequency differential-mode interference, the differential-mode noise will return to the circuit through the differential-mode capacitance, thereby effectively reducing or eliminating the influence of these noises on the circuit. In the circuit, the first capacitance module 140, the second capacitance module 142, and the third capacitance module 144 are connected in parallel between the live wire 102 and the neutral wire 104, jointly acting on the suppression of differential-mode noise and enhancing the filtering effect. By connecting the differential-mode capacitance component 112 in parallel between the live wire 102 and the neutral wire 104, the live wire 102 can be filtered to remove some high-frequency noise signals, which helps to improve the stability and safety of the circuit. Especially in high-frequency circuits, the interference between components is more obvious, and the filtering function of the differential-mode capacitance is particularly important. Although this is not the main function of the differential-mode capacitance, in some cases, the configuration of the differential-mode capacitance may also have a positive impact on the power factor of the power system. The power factor is the ratio of the actual power to the apparent power, reflecting the effective utilization degree of electric energy. Although the differential-mode capacitance mainly focuses on suppressing differential-mode noise, its filtering function may help to reduce the reactive power, thereby improving the power factor to a certain extent.
[0051] In some embodiments of the present invention, optionally, the common-mode capacitance component 122 includes a fourth capacitance module 146, a fifth capacitance module 148, and a sixth capacitance module 150. The first end of the fourth capacitance module 146 is connected to the live wire 102, and the second end of the fourth capacitance module 146 is connected to the ground wire 106. The first end of the fifth capacitance module 148 is connected to the live wire 102, and the second end of the fifth capacitance module 148 is connected to the ground wire 106. The first end of the sixth capacitance module 150 is connected to the live wire 102, and the second end of the sixth capacitance module 150 is connected to the ground wire 106.
[0052] In this embodiment, the common-mode capacitance component 122 includes a fourth capacitance module 146, a fifth capacitance module 148, and a sixth capacitance module 150. The first end of the fourth capacitance module 146 is connected to the live wire 102, and the second end of the fourth capacitance module 146 is connected to the ground wire 106. The first end of the fifth capacitance module 148 is connected to the live wire 102, and the second end of the fifth capacitance module 148 is connected to the ground wire 106. The first end of the sixth capacitance module 150 is connected to the live wire 102, and the second end of the sixth capacitance module 150 is connected to the ground wire 106. The main function of the common-mode capacitance component 122 is to suppress common-mode noise. Since the common-mode capacitance is connected across the live wire 102 and the ground wire 106, when there is common-mode noise, this noise will be introduced into the ground wire 106 through the short-circuit effect of the common-mode capacitance, thereby effectively reducing or eliminating the impact of this noise on the circuit. In the circuit, the fourth capacitance module 146, the fifth capacitance module 148, and the sixth capacitance module 150 are connected in parallel between the live wire 102 and the ground wire 106, jointly acting on the suppression of common-mode noise and enhancing the filtering effect. The common-mode capacitance component 122 can also effectively protect against electromagnetic interference (EMI).
[0053] In some embodiments of the present invention, optionally, the fourth capacitance module 146 includes a first common-mode capacitance 160 and a second common-mode capacitance 162, the fifth capacitance module 148 includes a third common-mode capacitance 164 and a fourth common-mode capacitance 165, and the sixth capacitance module 150 includes a fifth common-mode capacitance 166 and a sixth common-mode capacitance 168; wherein, the first end of the first common-mode capacitance 160 is connected to the live wire 102, the second end of the first common-mode capacitance 160 is connected to the ground wire 106, the first end of the second common-mode capacitance 162 is connected to the neutral wire 104, the second end of the second common-mode capacitance 162 is connected to the ground wire 106, the first end of the third common-mode capacitance 164 is connected to the live wire 102, the second end of the third common-mode capacitance 164 is connected to the ground wire 106, the first end of the fourth common-mode capacitance 165 is connected to the neutral wire 104, the second end of the fourth common-mode capacitance 165 is connected to the ground wire 106, the first end of the fifth common-mode capacitance 166 is connected to the live wire 102, the second end of the fifth common-mode capacitance 166 is connected to the ground wire 106, the first end of the sixth common-mode capacitance 168 is connected to the neutral wire 104, and the second end of the sixth common-mode capacitance 168 is connected to the ground wire 106.
[0054] In this embodiment, the fourth capacitor module 146 includes a first common-mode capacitor 160 and a second common-mode capacitor 162, the fifth capacitor module 148 includes a third common-mode capacitor 164 and a fourth common-mode capacitor 165, and the sixth capacitor module 150 includes a fifth common-mode capacitor 166 and a sixth common-mode capacitor 168. Among them, the first end of the first common-mode capacitor 160 is connected to the live wire 102, the second end of the first common-mode capacitor 160 is connected to the ground wire 106, the first end of the second common-mode capacitor 162 is connected to the neutral wire 104, the second end of the second common-mode capacitor 162 is connected to the ground wire 106, the first end of the third common-mode capacitor 164 is connected to the live wire 102, the second end of the third common-mode capacitor 164 is connected to the ground wire 106, the first end of the fourth common-mode capacitor 165 is connected to the neutral wire 104, the second end of the fourth common-mode capacitor 165 is connected to the ground wire 106, the first end of the fifth common-mode capacitor 166 is connected to the live wire 102, the second end of the fifth common-mode capacitor 166 is connected to the ground wire 106, the first end of the sixth common-mode capacitor 168 is connected to the neutral wire 104, and the second end of the sixth common-mode capacitor 168 is connected to the ground wire 106. Among them, the first common-mode capacitor 160, the third common-mode capacitor 164, and the fifth common-mode capacitor 166 are connected in parallel between the live wire 102 and the ground wire 106 to filter the common-mode noise on the live wire 102 together. These capacitors short-circuit the common-mode noise on the live wire 102 to the ground wire 106, thereby effectively reducing or eliminating the influence of these noises on the circuit. The second common-mode capacitor 162, the fourth common-mode capacitor 165, and the sixth common-mode capacitor 168 are connected in parallel between the neutral wire 104 and the ground wire 106 to filter the common-mode noise on the neutral wire 104. This configuration ensures that no matter whether the noise enters the circuit through the live wire 102 or the neutral wire 104, it can be effectively suppressed. By configuring multiple common-mode capacitors, the circuit can better meet the electromagnetic compatibility requirements. These capacitors can reduce the electromagnetic radiation generated by the circuit and at the same time reduce the influence of external electromagnetic interference on the circuit, thereby ensuring the stability and reliability of the circuit.
[0055] In some embodiments of the present invention, optionally, the differential-mode suppression component 110 includes a first discharge resistor 170. The first end of the first discharge resistor 170 is connected to the live wire 102, and the second end of the first discharge resistor 170 is connected to the neutral wire 104. The common-mode suppression component 120 includes a second discharge resistor 172. The first end of the second discharge resistor 172 is connected to the live wire 102, and the second end of the second discharge resistor 172 is connected to the ground wire 106.
[0056] In this embodiment, the differential-mode suppression component 110 includes a first discharge resistor 170. The first end of the first discharge resistor 170 is connected to the live wire 102, and the second end of the first discharge resistor 170 is connected to the neutral wire 104. The common-mode suppression component 120 includes a second discharge resistor 172. The first end of the second discharge resistor 172 is connected to the live wire 102, and the second end of the second discharge resistor 172 is connected to the ground wire 106. The purpose is to ensure that when the suppression circuit operates under rated current conditions and is disconnected from the power supply with a rated voltage for one second, the voltage existing between the power supply terminals of the suppression circuit is reduced to below the safety value of 34V specified by IEC, so as to avoid electric shock when a person touches the power plug just unplugged from the power supply. For the selection of the discharge resistor, the power consumption should be concerned. To avoid burning out the discharge resistor during the line-to-line test voltage test of the suppression circuit and affecting the discharge performance of the suppression circuit.
[0057] In some embodiments of the present invention, optionally, the first inductor 132 or the second inductor 134 is composed of the leakage inductance of the common-mode inductor component 124.
[0058] In this embodiment, the first inductor 132 or the second inductor 134 is composed of the leakage inductance of the common-mode inductor component 124. The number of additional inductor elements in the circuit can be reduced. This helps to simplify the circuit structure, reduce the circuit complexity and manufacturing cost. Using the leakage inductance of the common-mode inductor component 124 as the inductor element can enhance the resistance of the circuit to external electromagnetic interference. This helps to improve the stability and reliability of the circuit and ensure the normal operation of the circuit in a complex electromagnetic environment.
[0059] In some embodiments of the present invention, optionally, the differential-mode capacitor component 112 includes a static capacitor 200 and a first equivalent series inductance 220. The first end of the static capacitor 200 is connected to the live wire 102. The first end of the first equivalent series inductance 220 is connected to the second end of the static capacitor 200. The second end of the first equivalent series inductance 220 is connected to one end of a first equivalent series resistor 222, and the other end of the first equivalent series resistor 222 is connected to the neutral wire 104.
[0060] In this embodiment, the differential-mode capacitance component 112 includes a static capacitance 200 and a first equivalent series inductance 220. The first end of the static capacitance 200 is connected to the live wire 102. The first end of the first equivalent series inductance 220 is connected to the second end of the static capacitance 200. The second end of the first equivalent series inductance 220 is connected to one end of a first equivalent series resistance 222, and the other end of the first equivalent series resistance 222 is connected to the neutral wire 104. Among them, the static capacitance 200 plays a major filtering role in this component. When the differential-mode noise signal on the live wire 102 passes through the static capacitance 200, the high-frequency noise signal will be bypassed to the ground by the capacitance, thereby suppressing the propagation of differential-mode noise. The first equivalent series inductance 220 is connected in series with the static capacitance 200 to form an LC filter circuit. The inductance generates impedance to the high-frequency noise signal and, together with the capacitance, constitutes a low-pass filter to further suppress the propagation of high-frequency noise.
[0061] In some embodiments of the present invention, optionally, the differential-mode inductance of the common-mode inductance component is 0.5% of the inductance of the common-mode inductance component.
[0062] In this embodiment, the main objective of the common-mode inductance component is to suppress common-mode noise. However, when its differential-mode inductance is 0.5% of the common-mode inductance, it can also have a certain inhibitory effect on differential-mode noise. It can more effectively reduce electromagnetic radiation and electromagnetic interference, thereby improving the electromagnetic compatibility of the circuit.
[0063] In some embodiments of the present invention, optionally, the differential-mode and common-mode electromagnetic interference passive suppression device 100 is a π-type filter topology circuit.
[0064] In this embodiment, the differential-mode and common-mode electromagnetic interference passive suppression device 100 can be a π-type filter topology circuit. The differential-mode inductance component 114 in the π-type filter circuit generates impedance to the differential-mode interference signal, thereby suppressing the propagation of differential-mode interference. Differential-mode interference is mainly caused by the pulsating current of the switching converter. By reasonably designing the value of the differential-mode inductance, the amplitude of the differential-mode interference can be effectively reduced to ensure the stability and reliability of the circuit. The π-type filter circuit also has excellent common-mode interference suppression ability. Common-mode interference is mainly caused by the high-frequency oscillation generated by the interaction between the high voltage change rate dv / dt and stray parameters. In the π-type filter circuit, the common-mode capacitance component 122 is connected across the live wire 102 and the neutral wire 104 of the power supply line to form a capacitive path to the ground, bypassing the common-mode interference noise to the ground, thereby achieving common-mode filtering. In addition, the common-mode inductance component 124 can also generate a large impedance to the common-mode current, playing a role in suppressing the common-mode current. The differential-mode and common-mode electromagnetic interference passive suppression device 100 using the π-type filter topology circuit can significantly reduce the electromagnetic radiation generated by the circuit and at the same time reduce the influence of external electromagnetic interference on the circuit. This helps the circuit better meet the electromagnetic compatibility requirements and ensure the stability and reliability of the circuit in a complex electromagnetic environment.
[0065] In an embodiment of the present application, an electromagnetic compatibility control device is provided, including the differential-mode and common-mode electromagnetic interference passive suppression device 100 as described in any one of the above embodiments.
[0066] The electromagnetic compatibility control device provided in the present application includes the differential mode and common mode electromagnetic interference passive suppression device 100 as in any one of the above embodiments. Therefore, the electromagnetic compatibility control device has all the beneficial effects of the differential mode and common mode electromagnetic interference passive suppression device 100.
[0067] Specifically, the insertion loss of the differential mode suppression component 110 in the present application is:
[0068]
[0069] By solving the equation, the filtering corner frequency of the differential mode suppression component 110 is obtained as:
[0070]
[0071] Where R dm is 100Ω.
[0072] The insertion loss of the common mode rejection component 120 is:
[0073]
[0074] Through calculation, the filtering corner frequency of the common mode suppression component 120 is obtained as:
[0075]
[0076] Where R cm is 25Ω.
[0077] Where L dm1 By L cm1 The leakage inductance of the common mode inductor is composed of L dm2 By L cm2 The leakage inductance of the common-mode inductor is composed of the differential-mode inductance of the common-mode inductor, which is approximately 0.5% of the common-mode inductance.
[0078] Where, I is the current of the differential mode suppression circuit, L dm , L dm1 and L dm2 is the inductance value of the differential mode inductor, S is the scattering parameter, v dm1 and v dm2 is the differential mode disturbance voltage, C x1 , C x2 , C x3 are the capacitance values of differential mode capacitors, R dm is the differential mode resistance, f cdmis the filtering corner frequency of the differential-mode suppression component 110, L cm 、L cm1 and L cm2 are the inductance values of the differential-mode inductors, C y1 、C y2 、C y3 are all the capacitance values of the differential-mode capacitors, R cm is the differential-mode resistor, f ccm is the filtering corner frequency of the common-mode suppression component 120.
[0079] Specifically, the differential-mode and common-mode electromagnetic interference passive suppression device 100 in this application can be a suppression circuit, and the circuit structure is CLCLC, that is, a two-stage π-type filtering topology. The insertion loss attenuation slope in the differential-mode and common-mode electromagnetic interference passive suppression device 100 is 100 dB / decade, as Figure 4 shown, which is the amplitude-frequency characteristic curve of the two-stage π-type filtering topology circuit. The abscissa in the figure is the logarithm of the frequency f, i.e., lgf, and the ordinate is the gain dB, lgf Tcdm is the frequency point of the design target, V cdmreq is the required insertion loss value at this frequency point, lgf cdm is the filtering corner frequency.
[0080]
[0081] According to the requirements of the insertion loss design values at each frequency point, the filtering corner frequency can be calculated, and then based on the functional relationship between the filtering corner frequency and the differential and common-mode filtering element parameters, the parameters of the passive elements of the suppression circuit can be determined, and thus the circuit design of the suppression circuit can be completed.
[0082] In the embodiments of this application, the differential-mode and common-mode electromagnetic interference passive suppression device 100 is mainly composed of passive elements such as capacitors and common-mode inductors. That is, it includes a differential-mode capacitor assembly 112, a common-mode capacitor assembly 122, a differential-mode inductor assembly 114, and a common-mode inductor assembly 124. Among them, for capacitors, even if only considering the low-frequency band, an actual capacitor element is not a pure capacitor. When calculating the loss, the first equivalent series resistance 222 (ESR) existing in it cannot be ignored. When considering high frequencies, the influence of parasitic inductance must also be considered.
[0083] As Figure 5 shown, it is the capacitor model of the capacitor element 300, which includes a second equivalent series resistance 310 (equivalent series resistance ESR), a second equivalent series inductance 312 (i.e., equivalent series inductance ESL), a capacitor 320 (static capacitor), an equivalent parallel resistance 330 (equivalent parallel resistance EPR), a dielectric absorption resistance 322 (dielectric absorption resistance Rda), and a dielectric absorption capacitor 324 (dielectric absorption capacitor Cda). Figure 5The equivalent circuit in it can be applied to a very wide frequency range below 1 GHz.
[0084] As Figure 6 shown, for the differential-mode and common-mode electromagnetic interference passive suppression device below 100 MHz, the model of the capacitive element 300 can be simplified to Figure 6 the capacitive element model shown. The frequency-impedance characteristic curve of the capacitive element can be obtained by using an impedance analyzer. The static capacitance C, that is, the static capacitance 200, is calculated by using the low-frequency straight-line segment characteristic, and the equivalent series resistance ESR is obtained from the lowest point of the impedance characteristic curve and its equivalent series inductance ESL is calculated.
[0085] As Figure 7 shown, the common-mode inductance element is the common-mode inductance component 124. In the model applied to the frequency range below 100 MHz, EPR1 and EPR2 are the dielectric losses of the parasitic capacitances between the inductance windings, that is, the first insulation resistance 340 and the second insulation resistance 342, and ESR1 is the first equivalent series resistance 222, that is, the first equivalent series resistance 222. EPC1 and EPC2 are the parasitic capacitances between the inductance windings, specifically the first parasitic capacitance 350 and the second parasitic capacitance 352. The capacitances in the figure represent the parasitic capacitances between the turns of the inductance coil. Although the inter-turn capacitances in the actual coil are dispersed, they can be approximated by a lumped capacitor in parallel with the inductance during analysis.
[0086] As Figure 8 shown, this figure is the equivalent model of the common-mode inductance component 124, which includes a first model resistance 410, a second model resistance 412, a first model inductance 414, a second model inductance 416, a first model capacitance 417, and a second model capacitance 418. The resistance value of the first model resistance 410 is R1, the resistance value of the second model resistance 412 is R2, the value of the first model inductance 414 is L1, the value of the second model inductance 416 is L2, the value of the first model capacitance 417 is C1, and the value of the second model capacitance 418 is C2.
[0087] When R1 = EPR1, that is, when the first insulation resistance 340 is equal to the first model resistance 410, Figure 8 the equivalent model of the common-mode inductance component 124 shown can be equivalent to Figure 7 the common-mode inductance component 124 shown.
[0088] Specifically, when the equation holds, the equation is simplified:
[0089]
[0090] R1×jwL1[jwL1 + R4 + R3] = R3(jwL1 + R4)(jwL1 + R1)
[0091] R1jwL1(R4 + R3) - w 2 L1 2 R1 = R3(R4R1 + jwL1R4 + jwL1R1 - w 2 L1 2 )
[0092] R1jwL1(R4 + R3) - w 2 L1 2 R1 = R3jwL1(R4 + R1) + (R1R3R4 - w 2 L1 2 R3)
[0093] The following two equations should be satisfied simultaneously:
[0094] R1(R4 + R3) = R3(R4 + R1)
[0095] w 2 L1 2 R1 = R3(w 2 L1 2 -R1R4), that is, R1 = R3R4 = 0.
[0096] Specifically, an LCR impedance tester can be used to measure the impedance characteristics of the common-mode inductance component 124 below 100 kHz, and the S-parameters measured by a vector network analyzer can be used to obtain the impedance characteristics of the common-mode inductance above 100 kHz, so as to obtain the impedance characteristic curve of the common-mode inductance component 124. Due to the leakage inductance existing in the common-mode inductance component 124, it not only plays a role in the power common-mode conducted interference suppression circuit, but also plays a role in the power differential-mode conducted interference suppression circuit, improving the suppression efficiency and product performance.
[0097] Such as Figure 9 and Figure 10 shown, when measuring the common-mode characteristic parameters of the common-mode inductance, the arrangement relationship of the common-mode inductance component 124 shown in Figure 9 can be adopted. When measuring the differential-mode characteristic parameters of the common-mode inductance, the arrangement relationship of the common-mode inductance component 124 shown in Figure 10 can be adopted.
[0098] Such as Figure 11As shown, when implementing the power conduction interference suppression circuit of the differential-mode and common-mode electromagnetic interference passive suppression device 100, materials can be selected according to parameters. Specifically: By studying the sources and paths of differential and common-mode conduction interference at the power line output end, the power conduction interference suppression method can be mastered. And for the unknown and changing impedance characteristics of electronic devices, a two-stage π-type filter topology circuit is studied, which not only realizes impedance matching, optimal filtering performance, reduces the inductance value of the common-mode inductance component 124 to make the filtering circuit easy to implement in engineering, but also ensures the suppression performance under the condition of serious impedance mismatch of 0.1Ω / 100Ω and 100Ω / 0.1Ω. A mathematical model of the differential and common-mode conduction interference suppression circuit is established, and the functional relationship between the differential and common-mode filter cut-off frequencies and the parameters in the differential-mode and common-mode electromagnetic interference passive suppression device 100 is obtained by solving. The functional relationship between the insertion loss value and the differential and common-mode filter cut-off frequencies is established to realize the solution path from theoretical calculation to engineering practice. The specific parameter table is shown in the following table:
[0099] Table 1-1
[0100]
[0101]
[0102] In addition to the above embodiments, the present application also includes:
[0103] According to the insertion loss design index, determine the differential and common-mode filter cut-off frequencies and clarify the passive component parameters.
[0104] The following table shows the technical index requirements for the differential and common-mode insertion loss of the present invention.
[0105] Table 1-2
[0106]
[0107] Substitute the insertion loss requirement values at each frequency point in the above table into the formula to calculate the filter cut-off frequency corresponding to meeting the insertion loss requirement at this frequency point.
[0108] As shown in the following table, the corresponding table of the filter cut-off frequency of the two-stage π-type filter topology circuit and the insertion loss index can be calculated.
[0109] Table 1-3
[0110]
[0111]
[0112] It can be seen from the above table that to meet the insertion loss at the lowest frequency point of 0.01 MHz (i.e., 10 kHz), the required filter cut-off frequency is also the lowest.
[0113] like Figure 4 As shown in the figure, the amplitude-frequency characteristic curve of the two-stage π-type filter topology circuit shows that the insertion loss value corresponding to the filter corner frequency is 0dB. Above the filter corner frequency, the higher the frequency, the greater the insertion loss value. The insertion loss value below the filter corner frequency is negative, indicating that it not only cannot attenuate the interference, but also plays the role of "amplifying" the interference.
[0114] Therefore, from the above table, it can be concluded that the design target value of the differential mode filter corner frequency of the present invention is 7.1 kHz, and the design target value of the common mode filter corner frequency is 7.6 kHz.
[0115] After the filter corner frequency is determined, The parameters of the passive components of the differential-mode and common-mode electromagnetic interference passive suppression device 100 and the passive components of the differential-mode and common-mode electromagnetic interference passive suppression device 100 are determined respectively. Since the differential-mode inductor component 114 of the passive-mode and common-mode electromagnetic interference passive suppression device 100 comes from the differential-mode inductor component 124 of the common-mode suppression component 120, the passive component parameters of the common-mode suppression component 120 in the passive-mode and common-mode electromagnetic interference passive suppression device 100 are determined first, and then the passive component parameters of the differential-mode suppression component 110 are determined.
[0116] As shown in Table 1-4 below, f ccm =7.6×10 3 , R cm =25, and we get L cm1 ×L cm2 ×C y1 ×C y2 ×C y3 =2.01374×10 -26 Constraints are calculated to deduce the parameters of passive components of the power supply common-mode conducted disturbance suppression circuit. Considering that the large common-mode capacitance leads to excessive leakage current and cannot meet the relevant standard limit requirements, the power supply common-mode conducted disturbance suppression circuit uses a 30mH common-mode inductor (L cm1 , L cm2 ).
[0117] Table 1-4
[0118]
[0119] The differential mode inductance of a 30mH common mode inductor is 15uH. According to formula (3), f cdm =7.1×10 3 , R dm =100, and we get L dm1 ×L dm2 ×C x1 ×C x2×C x3 = 5.6599×10 -26 Constraint conditions are used to further calculate the parameters of the passive components of the power supply differential-mode conducted interference suppression circuit. The following table is the calculation table for the parameters of the passive components of the power supply differential-mode conducted interference suppression circuit.
[0120] Table 1-5
[0121]
[0122] In addition, the withstand voltage test voltage between lines of the power supply conducted interference suppression circuit is 1500 VDC, and the duration is 1 minute. Taking the discharge resistor R1 = 1 MΩ, the power of R1 is:
[0123]
[0124] Therefore, the discharge resistor is selected as the metal film resistor RI41-3W-1MΩ-J.
[0125] Through calculation, the value range of the passive component parameters is limited. Considering the performance requirements such as rated voltage, rated current, temperature range, withstand voltage insulation, etc., the selection of each passive component of the power supply conducted interference suppression circuit of the present invention is shown in Table 1-6 below.
[0126] Among them, as Figure 11 shown, the common-mode inductance component 124 includes: inductance L cm1 , inductance L cm2 ; the common-mode capacitance component 122 includes capacitance C y11 , capacitance C y12 , capacitance C y21 , capacitance C y22 , capacitance C y31 , capacitance C y32 , and the differential-mode capacitance can be capacitance C x11 , capacitance C x12 , capacitance C x21 , capacitance C x22 , capacitance C x31 , capacitance C x32 . The first power generation resistor can be R1. The differential and common-mode insertion loss performance test of the physical object of the present invention can be carried out by using the standard method of GB / T 7343-2017 / IEC / CISPR 17:2011, which meets the technical index requirements of the differential and common-mode insertion loss. The following Table 1-7 is the specific test data table.
[0127] Table 1-6
[0128]
[0129] Table 1-7
[0130]
[0131] The above is the differential-mode insertion loss of the power conduction interference suppression circuit of the differential-mode and common-mode electromagnetic interference passive suppression device 100 in this application.
[0132] Table 1-8
[0133]
[0134]
[0135] The above is the common-mode insertion loss of the power conduction interference suppression circuit of the differential-mode and common-mode electromagnetic interference passive suppression device 100 in this application.
[0136] Specifically, it can be confirmed through simulation that the π-type filter topology circuit can solve the problem of affecting the insertion loss performance due to impedance mismatch. At high frequencies, due to the influence of circuit parasitic parameters, the circuit impedance changes greatly. At the same time, the impedance of the load-side circuit is related to the working state of the device, which are likely to cause the actual insertion loss value of the power conduction interference suppression circuit to be lower than the design value.
[0137] Use MYDB simulation software, and set the source impedance to 0.1Ω and the load impedance to 100Ω, as well as two cases of serious mismatch with the source impedance of 100Ω and the load impedance of 0.1Ω, and simulate whether the insertion loss of the two-stage π-type filter topology circuit in the asymmetric (common-mode) mode meets the index requirements under these two cases of serious impedance mismatch.
[0138] As Figure 12 shown, curve A1 is the technical index requirement of the common-mode insertion loss, curve A2 is the insertion loss curve of the present invention under the condition of source impedance of 50Ω and load impedance of 50Ω; curve A3 is its insertion loss curve under the condition of source impedance of 0.1Ω and load impedance of 100Ω, and curve A4 is its insertion loss curve under the condition of source impedance of 100Ω and load impedance of 0.1Ω. Since curve A3 and curve A4 almost coincide, and based on the simulation results, even under the condition of serious impedance mismatch, although the common-mode insertion loss decreases after 600kHz, it still meets the design requirements. The simulation verifies that the present invention can better solve the problem of affecting the insertion loss performance due to impedance mismatch. Curve A1 is of the type of target differential loss (common-mode), named "Target Differential Loss_CM{Current Target}", with a frequency of 9.77K; curve A2 is of the type of simulated differential loss, named "ZY601-4#-CM-50Ω", with a frequency of 9.77K; curve A3 is of the type of simulated differential loss, named "ZY601-4#-CM-0.1-100Ω", with a frequency of 9.77K; curve A4 is of the type of simulated differential loss, named "ZY601-4#-CM-100-0.1Ω", with a frequency of 9.77K.
[0139] In addition, simulation models of two-stage π-type, two-stage LC, two-stage CL, and two-stage T-type filter topologies are established using the same passive component parameters, and the insertion loss performance of these four types of filter topologies is compared through simulation.
[0140] As Figure 13 shown, it is a comparative simulation diagram of the differential-mode insertion loss performance of four types of filter topologies. Curve B1 is the technical index requirement, curve B2 is the two-stage π-type filter, curve B3 is the two-stage T-type, curve B4 is the two-stage LC type, and curve B5 is the two-stage CL type. It can be seen from the figure that the two-stage LC type (curve B4) and the two-stage CL type (curve B5) almost coincide. The two-stage π-type (curve B2) has a lower insertion loss value than other topologies before 7 MHz and lags behind the two-stage T-type after 7 MHz. However, as the frequency increases, the two-stage π-type gradually coincides with the two-stage T-type. Therefore, compared with other filter topologies such as T-type, LC, and CL, the π-type filter topology has the best comprehensive performance in terms of insertion loss. The two-stage π-type filter topology selected in the present invention can reduce the inductance value requirement of a single common-mode inductor, which is easier to implement in engineering. At the same time, in the low-frequency band, the two-stage filtering is better than the single-stage filtering.
[0141] Curve B1 is of the type of target differential loss (common mode), named "Target Differential Loss_CM{Current Target}", with a frequency of 18.40 M and an amplitude of 24.7639 dB; curve B2 is of the type of simulated differential loss, named "ZY601-4#-DM-50Ω", with a frequency of 18.40 M and an amplitude of 121.18 dB; curve B3 is of the type of simulated differential loss, named "ZY601-T-DM-50Ω", with a frequency of 18.40 M and an amplitude of 126.042 dB; curve B4 is of the type of simulated differential loss, named "ZY601-LC-DM-50Ω", with a frequency of 18.40 M and an amplitude of 98.0606 dB; curve B5 is of the type of simulated differential loss, named "ZY601-CL-DM-50Ω", with a frequency of 18.40 M and an amplitude of 98.0606 dB.
[0142] As Figure 14 shown, taking the selected 1 uF differential-mode capacitor as an example based on Table 2-1 below, the frequency-impedance characteristic curve of the capacitor is measured using a HIOKI LCR impedance analyzer.
[0143] Table 2-1
[0144]
[0145]
[0146] As Figure 15 shown, at the straight line of the capacitor frequency-impedance characteristic curve, (100 Hz, 1700 Ω) is selected. From the formula The capacitance value of the test capacitor 510 is calculated to be 0.94 uF. The parallel resonance point of the capacitor (300 KHz, 0.716 Ω) is selected. From the formula the test equivalent series inductance 520 is calculated to be 0.3 uH. The test equivalent series resistance 530 is 0.716 Ω. Therefore, through testing and calculation, the high-frequency distribution parameter model of a 1 uF differential-mode capacitor is obtained.
[0147] Table 2-2
[0148]
[0149] As Figure 16 shown, the high-frequency distribution parameter model of the 2.2 uF differential-mode capacitor component 112 can be extracted from Table 2-2.
[0150] In the high-frequency distribution parameter model of the 2.2 uF differential-mode capacitor component 112, the capacitance value of the test capacitor 510 is 1.91 uF. The test equivalent series inductance 520 is 0.46 uH. The test equivalent series resistance 530 is 0.7 Ω.
[0151] As Figure 14 , Figure 16 , Figure 17 , Figure 18 and Figure 19 shown, the abscissa is the frequency (unit: logf), and the ordinate is the impedance (unit: dBΩ).
[0152] As Figure 17 shown, based on Table 2-3 below, the high-frequency distribution parameter model of the 10 nF common-mode capacitor component 122.
[0153] Table 2-3
[0154]
[0155]
[0156] Specifically, in the high-frequency distribution parameter model of the 10 nF common-mode capacitor component 122, the capacitance value of the test capacitor 510 is 9.7 uF. The test equivalent series inductance 520 is 0.72 uH. The test equivalent series resistance 530 is 6.84 Ω.
[0157] As Figure 18 shown, based on Table 2-4 below, the low-frequency common-mode impedance characteristics of the 30 mH common-mode inductor are tested using a HIOKI LCR impedance meter.
[0158] Table 2-4
[0159]
[0160] AsFigure 19 As shown in Table 2-5 below, the measured differential-mode impedance characteristics in the low-frequency band are obtained.
[0161] Table 2-5
[0162]
[0163]
[0164] As Figure 20 shown, the common-mode impedance characteristics of a 30 mH common-mode inductor are measured using a ZND vector network analyzer in the high-frequency band.
[0165] As Figure 21 shown, the differential-mode impedance characteristics are measured. The abscissa is frequency (unit: Hz), and the ordinate is impedance (unit: dBΩ).
[0166] After measuring the common-mode and differential-mode impedance characteristic curves of the common-mode inductor, a point on the low-frequency straight-line segment of the impedance characteristic curve is selected. For example, for the common mode, (50 kHz, 8110 Ω) is selected, and for the differential mode, (10 kHz, 1.39 Ω) is selected. According to the formula Z L = 2πfL, the common-mode inductance L1 (25.8 mH) and differential-mode inductance L1 (22.12 μH) of the common-mode inductor are calculated.
[0167] As Figure 20 shown, the resonance points of the common-mode impedance characteristics obtained from the curve are (223.2 kHz, 14.741 kΩ), (25.995 MHz, 22.013 Ω), and (57.768 MHz, 942.083 Ω).
[0168] As Figure 21 shown, the resonance points of the differential-mode impedance characteristics obtained from the curve are (10.588 MHz, 7.836 kΩ), (36.375 MHz, 71.402 Ω), and (57.098 MHz, 2.19 kΩ).
[0169] Using the first parallel resonance point, the EPC1 values are calculated from the formula : the common-mode EPC1 (19.7 pF) and the differential-mode EPC1 (10.21 pF).
[0170] Using two parallel resonance points and one series resonance point, a set of simultaneous equations is established, and the values of L2, EPC2, EPR1, and EPR2 are solved using MATLAB.
[0171] As Figure 22As shown, the first experimental resistor R13 (R13 = 24900), the first experimental inductor L10 (L10 = 25.8 mH), the first experimental capacitor C10 (C10 = 19.7 pF), the second experimental resistor R14 (R14 = 135170), the second experimental inductor L11 (L11 = 2.29 uH), and the second experimental capacitor C11 (C11 = 3.32 pF) form the common-mode model of the 30 mH common-mode inductor component 124.
[0172] As Figure 23 As shown, the third experimental resistor R16 (R16 = 127660 meg), the second experimental inductor L11 (L11 = 22.123 uH), the second experimental capacitor C11 (C11 = 10.213 pF), the third experimental resistor R17 (R17 = 37.3 meg), the third experimental inductor L12 (L12 = 2.4293 uH), and the third experimental capacitor C12 (C12 = 3.1982 pF) form the model of the differential-mode inductor component 114 of the 30 mH common-mode inductor. Thus, the common-mode model and the differential-mode model of the high-frequency distribution parameters of the 30 mH common-mode inductor are obtained. And simulation models are respectively established for the power supply common-mode conducted interference suppression circuit and the power supply differential-mode conducted interference suppression circuit in the differential-mode and common-mode electromagnetic interference passive suppression device 100, and the Cadence / PSpice simulation tool is used to simulate whether the common-mode insertion loss and the differential-mode insertion loss meet the design requirements.
[0173] The common-mode suppression component 120 in the differential-mode and common-mode electromagnetic interference passive suppression device 100 includes two paths for the power supply common-mode conducted interference suppression circuit. One path is from the 220V live wire 102 to the reference ground, and the other path is from the 220V neutral wire 104 to the reference ground. The circuit models of the two loops are the same.
[0174] As Figure 24As shown in the figure, the figure shows the power common-mode conducted interference suppression circuit model of the differential-mode and common-mode electromagnetic interference passive suppression device 100. The multiple equivalent inductances composed of the first experimental resistor R13 (R13 = 24900), the first experimental inductor L10 (L10 = 25.8 mH), the first experimental capacitor C10 (C10 = 19.7 pF), the second experimental resistor R14 (R14 = 135170), the second experimental inductor L11 (L11 = 2.29 μH), the second experimental capacitor C11 (C11 = 3.32 pF), the fifth experimental resistor R15 (R15 = 24900), the third experimental inductor L12 (L12 = 25.8 mH), the third experimental capacitor C12 (C10 = 19.7 pF), the third experimental resistor R16 (R16 = 135170), the fourth experimental inductor L13 (L13 = 2.29 μH), and the fourth experimental capacitor C13 (C13 = 3.32 pF) are shown in the figure. The seventh experimental resistor R4 (R4 = 6.84), the fifth experimental inductor L3 (L3 = 0.72 μH), the fifth experimental capacitor C3 (C3 = 9.7 n), the eighth experimental resistor R5 (R5 = 6.84), the sixth experimental inductor L4 (L4 = 0.72 μH), the sixth experimental capacitor C4 (C4 = 9.7 n), the ninth experimental resistor R6 (R6 = 6.84), the seventh experimental inductor L5 (L5 = 0.72 μH), the seventh experimental capacitor C5 (C5 = 9.7 n), and the tenth experimental resistor R10 (R10 equals 50).
[0175] As Figure 25 shown, the curve in the figure is the simulation result of the common-mode insertion loss of the differential-mode and common-mode electromagnetic interference passive suppression device 100.
[0176] As Figure 26As shown, in the differential-mode and common-mode electromagnetic interference passive suppression device 100, in the circuit model of the differential-mode suppression component 110, the differential-mode capacitance component 112 includes a plurality of equivalent capacitances composed of the eleventh experimental resistor R1 (R1 = 0.716), the eighth experimental inductor L1 (L1 = 0.3 uH), the eighth experimental capacitor C1 (C1 = 0.94 u), the twelfth experimental resistor R11 (R11 = 0.716), the ninth experimental inductor L7 (L7 = 0.3 uH), the ninth experimental capacitor C7 (C7 = 0.94 u), the thirteenth experimental resistor R12 (R12 = 0.716), the tenth experimental inductor L8 (L8 = 0.3 uH), the tenth experimental capacitor C8 (C8 = 0.94 u), the fourteenth experimental resistor R2 (R2 = 0.702), the eleventh experimental inductor L2 (L2 = 0.46 uH), the eleventh experimental capacitor C2 (C2 = 1.91 u), the first experimental resistor R13 (R1 = 0.716), the twelfth experimental inductor L9 (L9 = 0.3 uH), the twelfth experimental capacitor C9 (C9 = 0.94 u), the second experimental resistor R14 (R1 = 0.716), the first experimental inductor L10 (L10 = 0.3 uH), and the first experimental capacitor C10 (C10 = 0.94 u). And the tenth experimental resistor R10 (R10 equals 50), and a plurality of equivalent inductances composed of the third experimental resistor R16 (R16 = 127660 meg), the second experimental inductor L11 (L11 = 22.123 uH), the second experimental capacitor C11 (C11 = 10.213 pF), the third experimental resistor R17 (R17 = 37.3 meg), the third experimental inductor L12 (L12 = 2.4293 uH), the third experimental capacitor C12 (C12 = 3.1982 pF), the fifteenth experimental resistor R18 (R18 = 127660 meg), the fourth experimental inductor L13 (L13 = 22.123 uH), the fourth experimental capacitor C13 (C13 = 10.213 pF), the sixteenth experimental resistor R19 (R19 = 37.3 meg), the thirteenth experimental inductor L14 (L14 = 2.4293 uH), and the thirteenth experimental capacitor C14 (C14 = 3.1982 pF).
[0177] As Figure 27As shown, in the differential-mode insertion loss simulation results of the differential-mode and common-mode electromagnetic interference passive suppression device 100, the insertion loss oscillates back and forth at frequencies above 500 kHz, indicating that the amplitude attenuation of the circuit in the differential-mode and common-mode electromagnetic interference passive suppression device 100 is too large and exceeds the test range. Based on the curve in the figure, it can be seen that at this time, the differential-mode and common-mode electromagnetic interference passive suppression device 100, that is, the differential and common-mode insertion losses of the power conduction interference suppression circuit, both meet the design index requirements. At the same time, the simulation shows that within the frequency range of 10 kHz to 30 MHz, there are two series resonance points in the power differential and common-mode conduction interference suppression circuit of the present invention. 14.388 kHz and 20.559 MHz are the common-mode series resonance points, and 13.397 kHz and 29.04 MHz are the differential-mode series resonance points. The series resonance point is the lowest point of the insertion loss value of the power differential and common-mode conduction interference suppression circuit, which characterizes the frequency point where the suppression effect of the circuit is the lowest. Mastering the position of the series resonance point has good guiding value for the application of the power conduction interference suppression circuit. Such as Figure 25 and Figure 27 shown, the abscissa is the frequency (unit: logf), and the ordinate is the insertion loss (unit: dBΩ).
[0178] The above are the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.
Claims
1. A differential-mode and common-mode electromagnetic interference passive suppression device (100), characterized in that, The differential-mode and common-mode electromagnetic interference passive suppression device (100) is disposed at the power input end of an electronic device. The differential-mode and common-mode electromagnetic interference passive suppression device (100) includes: A differential-mode suppression component (110) for reducing the differential-mode harassment voltage at the power input end. The differential-mode suppression component (110) includes a differential-mode capacitor component (112) and a differential-mode inductor component (114). The first end of the differential-mode capacitor component (112) is connected to the live wire (102), and the second end of the differential-mode capacitor component (112) is connected to the neutral wire (104). A common-mode suppression component (120) for reducing the common-mode harassment voltage at the power input end. The common-mode suppression component (120) includes a common-mode capacitor component (122) and a common-mode inductor component (124). The common-mode inductor component (124) includes a first common-mode inductor (126) and a second common-mode inductor (128). The first end of the common-mode capacitor component (122) is connected to the live wire (102) or the neutral wire (104), and the second end of the common-mode capacitor component (122) is connected to the ground wire (106). Wherein, the first input end of the first common-mode inductor is connected to the live wire (102), the second input end is connected to the neutral wire (104), the first output end is connected to the live wire (102), and the second output end is connected to the neutral wire (104). The first input end of the second common-mode inductor is connected to the live wire (102), the second input end is connected to the neutral wire (104), the first output end is connected to the live wire (102), and the second output end is connected to the neutral wire (104).
2. The differential and common mode electromagnetic interference passive suppression device (100) according to claim 1, characterized in that The differential-mode inductor component (114) includes a first inductor (132) and a second inductor (134). The first inductor (132) is disposed on the live wire (102), and the second inductor (134) is disposed on the neutral wire (104).
3. The differential-mode and common-mode electromagnetic interference passive suppression device (100) according to claim 1, wherein, The differential-mode capacitor component (112) includes a first capacitor module (140), a second capacitor module (142), and a third capacitor module (144). The first end of the first capacitor module (140) is connected to the live wire (102), the second end of the first capacitor module (140) is connected to the neutral wire (104), the first end of the second capacitor module (142) is connected to the live wire (102), the second end of the second capacitor module (142) is connected to the neutral wire (104), the first end of the third capacitor module (144) is connected to the live wire (102), and the second end of the third capacitor module (144) is connected to the neutral wire (104).
4. The differential-mode and common-mode electromagnetic interference passive suppression device (100) according to claim 3, characterized in that, The common-mode capacitance component (122) includes a fourth capacitance module (146), a fifth capacitance module (148), and a sixth capacitance module (150). A first end of the fourth capacitance module (146) is connected to the live wire (102), and a second end of the fourth capacitance module (146) is connected to the ground wire (106). A first end of the fifth capacitance module (148) is connected to the live wire (102), and a second end of the fifth capacitance module (148) is connected to the ground wire (106). A first end of the sixth capacitance module (150) is connected to the live wire (102), and a second end of the sixth capacitance module (150) is connected to the ground wire (106).
5. The differential-mode and common-mode electromagnetic interference passive suppression device (100) according to claim 4, characterized in that, The fourth capacitance module (146) includes a first common-mode capacitor (160) and a second common-mode capacitor (162). The fifth capacitance module (148) includes a third common-mode capacitor (164) and a fourth common-mode capacitor (165). The sixth capacitance module (150) includes a fifth common-mode capacitor (166) and a sixth common-mode capacitor (168); Wherein, a first end of the first common-mode capacitor (160) is connected to the live wire (102), and a second end of the first common-mode capacitor (160) is connected to the ground wire (106); A first end of the second common-mode capacitor (162) is connected to the neutral wire (104), and a second end of the second common-mode capacitor (162) is connected to the ground wire (106); A first end of the third common-mode capacitor (164) is connected to the live wire (102), and a second end of the third common-mode capacitor (164) is connected to the ground wire (106); A first end of the fourth common-mode capacitor (165) is connected to the neutral wire (104), and a second end of the fourth common-mode capacitor (165) is connected to the ground wire (106); A first end of the fifth common-mode capacitor (166) is connected to the live wire (102), and a second end of the fifth common-mode capacitor (166) is connected to the ground wire (106); A first end of the sixth common-mode capacitor (168) is connected to the neutral wire (104), and a second end of the sixth common-mode capacitor (168) is connected to the ground wire (106).
6. The differential-mode and common-mode electromagnetic interference passive suppression device (100) according to claim 1, characterized in that, The differential-mode suppression component (110) includes a first discharge resistor (170). A first end of the first discharge resistor (170) is connected to the live wire (102), and a second end of the first discharge resistor (170) is connected to the neutral wire (104); The common-mode suppression component (120) includes a second discharge resistor (172). A first end of the second discharge resistor (172) is connected to the live wire (102), and a second end of the second discharge resistor (172) is connected to the ground wire (106).
7. The differential-mode and common-mode electromagnetic interference passive suppression device (100) according to claim 2, wherein The first inductor (132) or the second inductor (134) is composed of the leakage inductance of the common-mode inductor component (124).
8. The differential-mode and common-mode electromagnetic interference passive suppression device (100) according to claim 1, characterized in that, The differential-mode capacitance component (112) includes: A static capacitor (200). A first end of the static capacitor (200) is connected to the live wire (102); The first equivalent series inductance (220), a first end of the first equivalent series inductance (220) is connected to a second end of the static capacitor (200), a second end of the first equivalent series inductance (220) is connected to one end of a first equivalent series resistance (222), and the other end of the first equivalent series resistance (222) is connected to the neutral line (104).
9. The differential-mode and common-mode electromagnetic interference passive suppression device (100) according to claim 6, characterized in that, The differential-mode inductance of the common-mode inductance component (124) is 0.5% of the inductance of the common-mode inductance component (124).
10. The differential-mode and common-mode electromagnetic interference passive suppression device (100) according to claim 1, wherein, The differential-mode and common-mode electromagnetic interference passive suppression device (100) is a π-type filter topology circuit.
11. An electromagnetic compatibility control device, characterized in that, Comprising the differential-mode and common-mode electromagnetic interference passive suppression device (100) according to any one of claims 1 to 10.