Series resonance high-voltage-controlled gain low-phase-noise voltage-controlled oscillator

Abstract

The invention also provides a series resonance high-voltage-controlled gain low-phase-noise voltage-controlled oscillator, and the oscillator comprises a low-noise voltage adjustment module which is used for suppressing the noise of an external power supply and supplying power to the interior; the voltage-controlled resonant cavity circuit comprises two parallel resonant branches, each resonant branch comprises multiple stages of resonant structures which are formed by variable capacitors and first inductors and are sequentially connected in series, and the variable capacitors carry out capacitance value adjustment through a voltage control end; and the radio frequency output buffer circuit is used for suppressing a harmonic signal in an output signal of the voltage-controlled resonant cavity circuit. A frequency calibration algorithm is not needed, the frequency calibration time is saved, and rapid phase locking is realized; the method can be used for avoiding nonlinearity caused by frequency segmentation switching in broadband frequency modulation, and high-linearity frequency modulation is achieved.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and particularly to a low-phase-noise voltage-controlled oscillator with series resonance and high voltage-controlled gain. Background Art

[0002] As a key unit in frequency synthesizers and clock generation circuits, phase-locked loops are widely used in analog, digital, and radio frequency chips. When the phase-locked loop is in a closed-loop locked state, its closed-loop phase noise reflects the contributions of the noises of each key unit of the phase-locked loop according to the closed-loop transfer function. At small frequency offsets, the noise of the reference crystal oscillator dominates, and the main source of out-of-band phase noise is the phase noise of the voltage-controlled oscillator with high-pass characteristics. Therefore, to achieve the design of a low-phase-noise frequency synthesizer, it is necessary to break through the design difficulties of on-chip integrated low-phase-noise voltage-controlled oscillators, optimize the noise contributions of the resonant cavity due to the low Q value of on-chip passive devices and the inherent noise of active devices, and break through the design technology of low-phase-noise voltage-controlled oscillators through methods such as structural innovation and optimized design of passive devices.

[0003] Traditional voltage-controlled oscillators are usually LC voltage-controlled oscillators. However, such oscillators need to be paired with an additional automatic frequency calibration algorithm and need to select the required frequency band before starting phase locking, which takes a certain amount of calibration time and makes it impossible for the phase-locked loop to achieve fast phase locking. Moreover, when performing broadband frequency modulation, the LC voltage-controlled oscillator needs to frequently switch frequency bands, and the frequency modulation cannot achieve a linear transition. Summary of the Invention

[0004] In view of the above problems existing in the prior art, the present invention proposes a low-phase-noise voltage-controlled oscillator with series resonance and high voltage-controlled gain, which mainly solves the problems that it is difficult for the voltage-controlled oscillator to achieve fast phase locking and the frequency modulation cannot achieve a linear transition.

[0005] To achieve the above and other purposes, the technical solution adopted by the present invention is as follows.

[0006] The present application also provides a low-phase-noise voltage-controlled oscillator with series resonance and high voltage-controlled gain, including: a low-noise voltage adjustment module for suppressing the noise of the external power supply and supplying power internally; a voltage-controlled resonant cavity circuit including two parallel resonant branches, each of the resonant branches including multiple levels of resonant structures composed of variable capacitors and first inductors connected in series in sequence, wherein the variable capacitors are adjusted in capacitance value through a voltage control terminal; and a radio frequency output buffer circuit for suppressing the harmonic signals in the output signal of the voltage-controlled resonant cavity circuit.

[0007] In an embodiment of the present application, the voltage-controlled resonant cavity circuit further includes: two cross-coupled transistors for providing negative resistance for the resonant branches.

[0008] In an embodiment of the present application, the gates and drains of the two transistors are cross-coupled through coupling capacitors respectively, and the gates of the two transistors are respectively connected to one of the resonant branches, and the sources of the two transistors are connected to each other.

[0009] In an embodiment of the present application, the transistor includes a PMOS transistor or an NMOS transistor. When the transistor is a PMOS transistor, the source of the transistor is connected to a bias voltage. When the transistor is an NMOS transistor, the source of the transistor is grounded.

[0010] In an embodiment of the present application, the coupling capacitors include a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The two transistors are respectively denoted as a first transistor and a second transistor. The gate of the first transistor is sequentially connected to the gate of the second transistor through the first capacitor, the second capacitor, the third capacitor, and the fourth capacitor. And the first end of the first capacitor is connected to the gate of the first transistor, and the second end is connected to the drain of the second transistor; the first end of the fourth capacitor is connected to the gate of the second transistor, and the second end is connected to the drain of the first transistor.

[0011] In an embodiment of the present application, the second capacitor and the third capacitor are voltage-controlled variable capacitors, and the connection end of the second capacitor and the third capacitor is connected to the voltage control end.

[0012] In an embodiment of the present application, the drains of the two transistors are connected to each other through a second adjustable inductor. When the transistor is a PMOS transistor, the control end of the second adjustable inductor is grounded; when the transistor is an NMOS transistor, the common-mode end of the second adjustable inductor is connected to a bias voltage.

[0013] In an embodiment of the present application, the voltage control end is directly connected to the common-mode point of the variable capacitors in the two resonant branches and / or is connected to the common-mode point of the variable capacitors through a first bias inductor.

[0014] In an embodiment of the present application, the common-mode ends of the first inductors in the two resonant branches are grounded and / or connected to a bias voltage through a second bias inductor.

[0015] As described above, a series-resonant high-voltage-controlled gain low-phase-noise voltage-controlled oscillator proposed by the present application has the following beneficial effects.

[0016] This application replaces the traditional parallel resonance structure with a series resonance structure, which can greatly improve the Q value of the resonant cavity of the LC voltage-controlled oscillator, achieving high-frequency broadband and low phase noise. By adopting a multi-stage variable capacitor series connection method, a high voltage control gain of more than 2.1 GHz / V is achieved, avoiding the use of a fixed capacitor array for frequency segmentation, eliminating the need for a frequency calibration algorithm, saving frequency calibration time, and realizing fast phase locking. It can be used to avoid the non-linearity caused by frequency segmentation switching in broadband frequency modulation and achieve high-linear frequency modulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 FIG. is a schematic circuit diagram of a low-phase-noise voltage-controlled oscillator with series resonance and high voltage control gain in an embodiment of the present application.

[0018] Figure 2 FIG. is an equivalent circuit diagram of a traditional parallel resonance.

[0019] Figure 3 FIG. is an equivalent circuit diagram of a traditional series resonance.

[0020] Figure 4 FIG. is a schematic diagram of a series resonance circuit in an embodiment of the present application.

[0021] Figure 5 FIG. is a schematic diagram of a series resonance circuit in another embodiment.

[0022] Figure 6 FIG. is a schematic diagram showing the relationship between the oscillation amplitude, phase noise and current magnitude of a voltage-controlled oscillator in an embodiment of the present application.

[0023] Figure 7 FIG. is a schematic diagram of a series resonance high voltage control gain resonant cavity circuit in another embodiment of the present application.

[0024] Figure 8 FIG. is a schematic diagram of the phase noise curve of a voltage-controlled oscillator at an oscillation frequency of 20.25 GHz in an embodiment of the present application.

[0025] Figure 9 FIG. is a schematic diagram of the frequency tuning curve of a voltage-controlled oscillator in an embodiment of the present application.

[0026] Figure 10 FIG. is the voltage control gain curve of the voltage-controlled oscillator. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0027] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0028] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0029] The inventors have found that:

[0030] On-chip integrated voltage-controlled oscillators can be divided into ring oscillators and LC-type voltage-controlled oscillators. Among them, the LC-type voltage-controlled oscillator has a high operating frequency and low phase noise, and has a wide range of applications. The core part of the LC-type voltage-controlled oscillator is usually composed of negative resistance active devices and passive devices such as inductors, capacitors, and resistors. Passive devices such as inductors, capacitors, and resistors form a resonant circuit, which forms oscillations through feedback. The negative resistance active device is used to compensate for the energy loss of the resonant circuit oscillation, thereby generating a continuous and stable oscillation signal.

[0031] The phase noise of an LC voltage-controlled oscillator usually depends on the Q value of the resonant cavity. To design a voltage-controlled oscillator circuit with low phase noise, the most famous Leeson phase noise model must be referred to:

[0032]

[0033] Where: F is the negative resistance circuit in (Δω) -2 The contribution of the region to the phase noise; ω0 is the oscillation frequency, Δω is the frequency deviation, Q is the Q value (quality factor) of the resonant cavity, P sig is the oscillator signal energy, is the oscillator in (Δω) -3 Phase noise performance in this area.

[0034] From Leeson's phase noise model, we can conclude that increasing the Q value of the resonant cavity and the oscillation amplitude of the oscillator as much as possible can be used to reduce phase noise. The relationship between the power, oscillation amplitude, current, and equivalent parallel resistance of the LC voltage-controlled oscillator oscillation signal is shown below. When the parallel effective resistance such as the resonant cavity inductance is fixed, the oscillation signal power of the voltage-controlled oscillator depends on the oscillation amplitude.

[0035] V OSC = I tank * R tank

[0036]

[0037] During the phase noise optimization process, it is necessary to reduce the equivalent parallel resistance R of the resonator tank of the resonator. Reducing R tank , and correspondingly increasing the magnitude of the current can ensure that the amplitude remains unchanged, while the power of the oscillation signal is increased and the phase noise is optimized.

[0038] On the other hand, in order to expand the oscillation frequency range of the LC voltage-controlled oscillator, a fixed capacitor array is usually used to segmentally control the oscillation frequency of the LC voltage-controlled oscillator. This method reduces the voltage-controlled gain of the voltage-controlled oscillator to improve the phase noise performance. However, the segmented-controlled LC voltage-controlled oscillator usually needs to be additionally equipped with an automatic frequency calibration algorithm to select the required frequency segment before starting phase locking, which requires a certain amount of frequency calibration time and makes the phase-locked loop unable to achieve fast phase locking. On the other hand, for frequency modulation applications, when the segmented-controlled LC voltage-controlled oscillator performs broadband frequency modulation, since it is necessary to frequently switch frequency segments, linear transition cannot be achieved during the frequency segment switching.

[0039] Please refer to Figure 1 , Figure 1 , which is a schematic diagram of the circuit architecture of a low-phase-noise voltage-controlled oscillator with a series resonance high voltage-controlled gain in an embodiment of the present application. The voltage-controlled oscillator of the embodiment of the present application includes: a low-noise voltage adjustment module, which is used to suppress the noise of the external power supply and supply power internally; a voltage-controlled resonator circuit, which includes two parallel resonance branches, and each of the resonance branches includes multiple resonance structures composed of variable capacitors and first inductors and connected in series in sequence, wherein the variable capacitor adjusts its capacitance value through a voltage control terminal; and a radio frequency output buffer circuit, which is used to suppress the harmonic signals in the output signal of the voltage-controlled resonator circuit. Specifically, the low-noise voltage adjustment module is used to provide a supply voltage for the voltage-controlled resonator circuit. This voltage adjustment module adopts a low-noise and high power supply rejection ratio design, which can effectively suppress the noise of the external power supply and provide a low-noise supply voltage for the resonator of the voltage-controlled oscillator. The series resonator circuit composed of the first inductor and the variable capacitor is the core oscillation circuit of the voltage-controlled oscillator, and adopts a series resonance high voltage-controlled gain design method to achieve a broadband oscillation frequency. The radio frequency output buffer circuit adopts a band-pass filter design, which can be used to filter out the harmonic signals of the oscillation frequency of the voltage-controlled oscillator and achieve high harmonic suppression.

[0040] Please refer to Figure 2 and Figure 3 , Figure 2 , which is an equivalent circuit diagram of a traditional parallel resonance.Figure 3 It is the equivalent circuit diagram of a traditional series resonance. Regarding the Q value of the resonator cavity, according to different LC resonance methods adopted, the calculation methods of the Q value are different. For an LC resonance circuit, its quality factor Q value can be defined as the ratio of the reactive power generated by the inductor or capacitor during oscillation to the average power consumed by the resistor. The parallel resonance circuit commonly used in traditional voltage-controlled oscillators has the following calculation formula:

[0041]

[0042] Regarding the series resonance circuit, its Q value calculation formula is as follows:

[0043]

[0044] For an on-chip integrated LC resonance circuit, the resistor in the resonator cavity is usually small. At the same time, the inductance L value is at the nH level, and the capacitance C value is at the pF level. It can be seen that the Q value of the resonator cavity under the series resonance structure is higher than that of the parallel resonance structure.

[0045] In one embodiment, the gates and drains of the two transistors are cross-coupled through coupling capacitors respectively, and the gates of the two transistors are respectively connected to one of the resonance branches, and the sources of the two transistors are connected to each other.

[0046] In one embodiment, the transistor includes a PMOS transistor or an NMOS transistor. When the transistor is a PMOS transistor, the source of the transistor is connected to the bias voltage. When the transistor is an NMOS transistor, the source of the transistor is grounded.

[0047] In one embodiment, the coupling capacitors include a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The two transistors are respectively denoted as a first transistor and a second transistor. The gate of the first transistor is sequentially connected to the gate of the second transistor through the first capacitor, the second capacitor, the third capacitor, and the fourth capacitor. And the first end of the first capacitor is connected to the gate of the first transistor, and the second end is connected to the drain of the second transistor; the first end of the fourth capacitor is connected to the gate of the second transistor, and the second end is connected to the drain of the first transistor. The second capacitor and the third capacitor are voltage-controlled variable capacitors, and the connection end of the second capacitor and the third capacitor is connected to the voltage control terminal. The drains of the two transistors are connected to each other through a second adjustable inductor. When the transistor is a PMOS transistor, the control terminal of the second adjustable inductor is grounded; when the transistor is an NMOS transistor, the common-mode terminal of the second adjustable inductor is connected to the bias voltage.

[0048] In one embodiment, the voltage control terminal is directly connected to the common-mode point of the variable capacitors in the two resonance branches and / or to the common-mode point of the variable capacitors through a first bias inductor.

[0049] In one embodiment, the common-mode terminals of the first inductors in the two resonance branches are grounded and / or connected to a bias voltage through a second bias inductor.

[0050] Specifically, please refer to Figure 4 and Figure 5 , Figure 4 which is a schematic diagram of a series resonance circuit in an embodiment of the present application. Figure 5 is a schematic diagram of a series resonance circuit in another embodiment. Two MOS transistors are used to form a resonant negative resistance device. The structure of the PMOS transistor is as shown in Figure 3 and the structure of the NMOS transistor is as shown in Figure 4 . The gates and drains of the two MOS transistors are cross-coupled through capacitors to form a differential negative resistance to provide energy replenishment for the oscillator. At the gates of the MOS transistors, an LC series resonance circuit is formed by the series connection of multiple first inductors and variable capacitors. The number of the first inductors and variable capacitors can be flexibly selected according to the oscillation frequency and the overall layout area requirements. At the same time, the positions of the first inductors and variable capacitors can also be swapped. To facilitate the voltage tuning of the oscillation frequency, the variable capacitor can be a voltage-controlled variable capacitor, and the voltage tuning terminal is connected to the capacitor common-mode point or connected through a bias inductor. On the one hand, it can provide a variable DC voltage to adjust the capacitance value of the capacitor to achieve frequency tuning. On the other hand, it can avoid the output impedance of the voltage tuning terminal from affecting the resonant cavity.

[0051] Specifically, please refer to Figure 6 , Figure 6 which is a schematic diagram of the relationship between the oscillation amplitude, phase noise and current magnitude of a voltage-controlled oscillator in an embodiment of the present application. As the current increases, the voltage-controlled oscillator will enter the voltage-limited region from the current-limited region; in the current-limited region, the phase noise of the voltage-controlled oscillator will be significantly optimized as the oscillation amplitude increases; after entering the voltage-limited region, the phase noise of the voltage-controlled oscillator will gradually deteriorate as the current increases. Therefore, the design of the voltage-controlled oscillator should effectively reduce Rtank and increase the magnitude of the current so that the oscillation of the voltage-controlled oscillator is in a state where the amplitude is close to the voltage-limited region. Compared with parallel resonance, in series resonance at the resonance frequency, the impedances of the inductor and capacitor cancel each other out, the circuit presents a pure resistance characteristic, the impedance is the smallest, and the current is the largest. Therefore, during the resonance process of the circuit, the amplitude of the voltage-controlled oscillator can reach close to the voltage-limited region, thereby obtaining the best phase noise characteristic.

[0052] Meanwhile, in order to achieve voltage tuning, a voltage-controlled oscillator usually uses a voltage-controlled variable capacitor in the circuit to form a resonant capacitor. This voltage-controlled variable capacitor is generally a MOS-type or PN-junction type variable capacitor, and its capacitance value changes with the voltage difference across the capacitor. In practical applications, a fixed capacitor is usually connected in series with a variable capacitor and then connected to the resonant cavity. One end of the variable capacitor is connected to the tuning voltage, and the other end is connected to a fixed reference voltage through a bias inductor or a bias resistor. The capacitance value of the variable capacitor changes with the difference between the tuning voltage and the fixed reference voltage, and the capacitance value actually connected to the resonant cavity is the capacitance value after the fixed capacitor and the voltage-controlled variable capacitor are connected in series. To achieve a high voltage control gain design, it is necessary to expand the capacitance change range as much as possible to achieve broadband tuning. In this traditional design method, since the capacitance value connected to the resonant cavity is the capacitance value after the fixed capacitor and the voltage-controlled variable capacitor are connected in series, the capacitance change range is limited by the size of the fixed capacitor, and the actual tuning sensitivity is less than the sensitivity of the variable capacitor.

[0053] Compared with the traditional method of connecting a fixed capacitor in series with a voltage-controlled variable capacitor, in the inductance-capacitance series resonant circuit of the present invention, a fixed capacitor is not connected in series, but multiple voltage-controlled variable capacitors are connected in series for tuning. The actual tuning sensitivity of this method is equal to the sensitivity of the variable capacitor, effectively expanding the capacitance range of voltage tuning and achieving a high voltage control gain design.

[0054] If the traditional fixed capacitor C is connected in series with a voltage-controlled variable capacitor for frequency tuning, the oscillation frequency calculation formula is as follows:

[0055]

[0056] If multiple voltage-controlled variable capacitors in series in the embodiment of the present application are used for tuning, assuming that there are N voltage-controlled variable capacitors in series in the circuit and the effective series resonant inductance value is L, for the oscillation frequency of this resonant circuit, the calculation formula is as follows:

[0057]

[0058] Assuming that all the series variable capacitors are of the same size, the above formula can be simplified to:

[0059]

[0060] Assuming the inductance L = 1 nH, the variable capacitor C var1The adjustable capacitance range is from 1 pF to 3 pF. The number of series-connected voltage-controlled variable capacitors N = 3, the value of the fixed capacitor C is 3 pF, and the adjustable capacitance range of the variable capacitors Cvar of the same type is from 0.33 pF to 1 pF. Through calculation, it can be seen that the oscillation frequency tuning range when three-stage voltage-controlled variable capacitors are connected in series is from 5.035 GHz to 8.720 GHz, and the frequency tuning ratio is 53.6%. When a fixed capacitor C is connected in series with a voltage-controlled variable capacitor, the oscillation frequency range is from 5.814 GHz to 9.240 GHz, and the frequency tuning ratio is 45.5%. It can be seen that adopting the series connection method of voltage-controlled variable capacitors can effectively expand the tuning range and achieve a high voltage control gain design.

[0061] Please refer to Figure 7 , Figure 7 which is a schematic diagram of a series-resonant high-voltage control gain resonant cavity circuit in another embodiment of the present application. This resonant cavity circuit uses two PMOS devices PM1 and PM2 to form a negative resistance device for resonance. The gates of PM1 and PM2 are cross-coupled through capacitors C1 and C2 respectively and connected to the drains of each other. Capacitors C1 and C2 can separate the gate-drain DC operating points of PMOS devices PM1 and PM2. By setting the gate-drain DC operating points of PM1 and PM2 respectively, a transconductance linearization design is achieved to suppress the inherent noise of PM1 and PM2. Inductors L1 and L2 are three-terminal inductors. One end of L1 is connected to the gate of PM1, one end of L2 is connected to the gate of PM2, the other end of L1 is connected to the positive pole of variable capacitor Cvar3, and the other end of L2 is connected to the positive pole of variable capacitor Cvar5. L9 and L10 are two-terminal inductors, which respectively provide a high AC impedance to ground as the bias inductors of L1 and L2. One end of L9 is connected to the common-mode terminal of L1, one end of L10 is connected to the common-mode terminal of L2, and the other ends of L9 and L10 are directly grounded, so that the gate DC operating points of PM1 and PM2 are zero to ensure that PM1 and PM2 are in the on state. Cvar3 and Cvar4, Cvar5 and Cvar6 are voltage-controlled variable capacitors, which are connected in series. Their negative terminals are respectively connected to the Vtune voltage control terminal through two-terminal inductors L5 and L6. The positive terminals of Cvar4 and Cvar6 are respectively connected to three-terminal inductors L3 and L4. L7 and L8 are two-terminal inductors, which respectively provide a high AC impedance to ground as the bias inductors of L3 and L4. One end of L7 is connected to the common-mode terminal of L3, one end of L8 is connected to the common-mode terminal of L4, and the other ends of L7 and L8 are connected to an external bias voltage. Cvar7 and Cvar8 are variable capacitors, whose positive terminals are respectively connected to L3 and L4, and the negative terminals are connected to the voltage-controlled tuning terminal Vtune. Cvar1 and Cvar2 are drain variable capacitors, whose positive terminals are respectively connected to the drains of PM1 and PM2, and the negative terminals are connected to the voltage-controlled tuning terminal Vtune.

[0062] In this series-resonant high-voltage controlled-gain resonant cavity circuit, PM1 and PM2 are cross-connected through gate-drain coupling capacitors to provide oscillation negative resistance. Inductors L1, L3 are connected in series with variable capacitors Cvar3, Cvar4, and Cvar7 to form a half circuit of series resonance. Correspondingly, inductors L2, L4 are also connected in series with variable capacitors Cvar5, Cvar6, and Cvar8 to form a half circuit of series resonance, and the two together form a differential oscillation circuit. Dual-ended inductors L5, L6, L7, L8, L9, L10 are respectively used to provide AC high resistance and DC operating points for the series inductors and series variable capacitors.

[0063] Please refer to Figure 8 , Figure 8 which is a schematic diagram of the phase noise curve of the voltage-controlled oscillator in an embodiment of this application at an oscillation frequency of 20.25 GHz. The phase noise reaches -118.6 dBc / Hz (@1 MHz offset, 20.25 GHz), achieving a low-phase-noise design.

[0064] Please refer to Figure 9 , Figure 9 which is a schematic diagram of the frequency tuning curve of the controlled oscillator in an embodiment of this application. In the voltage-controlled voltage range of 0.5V to 1.3V, the frequency covers 18.7 GHz to 20.5 GHz, achieving a high-voltage-controlled-gain design.

[0065] By taking the derivative of the Figure 9 frequency tuning curve, the voltage-controlled gain curve in the frequency control range (0.5V to 1.3V) can be obtained, as shown in Figure 10 . It can be seen from Figure 10 that the voltage-controlled gain of this voltage-controlled oscillator in the frequency control range (0.5V to 1.3V) reaches 2.1 GHz / V to 2.3 GHz / V, achieving a high-voltage-controlled-gain design.

[0066] Based on the technical solutions of the embodiments of the present application above, the low-noise voltage regulation module is used to provide a power supply voltage for the voltage-controlled resonator circuit. This voltage regulation module adopts a low-noise and high power supply rejection ratio design, which can effectively suppress the noise of the external power supply and provide a low-noise power supply voltage for the voltage-controlled oscillator resonator. The voltage-controlled resonator circuit is the core oscillation circuit of the voltage-controlled oscillator. It adopts a series resonance high voltage control gain design method to achieve a wideband oscillation frequency. The radio frequency output buffer circuit adopts a band-pass filter design, which can be used to filter out the harmonic signals of the oscillation frequency of the voltage-controlled oscillator and achieve high harmonic suppression. The voltage-controlled resonator circuit adopts a multi-stage inductor-capacitor series resonance. Compared with the traditional parallel resonance circuit, it can greatly improve the Q value of the resonator. Moreover, in series resonance at the resonance frequency, the impedance of the inductor and the capacitor cancels each other out, the circuit presents a pure resistance characteristic, the impedance is the smallest, and the current is the largest. Therefore, during the resonance process of the circuit, the amplitude of the voltage-controlled oscillator can reach close to the voltage-limited region, thereby obtaining the best phase noise characteristics. On the other hand, by adopting a multi-stage voltage-controlled variable capacitor in series, the adjustable range of the capacitor can be greatly improved, high voltage control gain can be achieved, and there is no need for segmented frequency control, which can improve the linearity of wideband frequency modulation.

[0067] The above embodiments merely illustrate the principles and effects of the present invention and are not used to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A low-phase-noise voltage-controlled oscillator with series-resonant high-voltage controlled gain, characterized in that, Comprising: A low-noise voltage regulation module for suppressing the noise of an external power supply and supplying power internally; A voltage-controlled resonator circuit, which includes two parallel resonant branches, each of the resonant branches includes multiple levels of resonant structures composed of a variable capacitor and a first inductor and connected in series in sequence, wherein the variable capacitor adjusts its capacitance value through a voltage control terminal; A radio frequency output buffer circuit for suppressing harmonic signals in the output signal of the voltage-controlled resonator circuit.

2. The voltage-controlled oscillator with high-voltage controlled gain in series resonance and low phase noise according to claim 1, characterized in that The voltage-controlled resonator circuit further includes: two cross-coupled transistors for providing negative resistance for the resonant branch.

3. The voltage-controlled oscillator with high-voltage controlled gain and low phase noise in series resonance according to claim 2, characterized in that, The gates and drains of the two transistors are cross-coupled through coupling capacitors respectively, and the gates of the two transistors are respectively connected to one of the resonant branches, and the sources of the two transistors are connected to each other.

4. The voltage-controlled oscillator with high-voltage controlled gain in series resonance and low phase noise according to claim 3, wherein The transistor includes a PMOS transistor or an NMOS transistor. When the transistor is a PMOS transistor, the source of the transistor is connected to a bias voltage. When the transistor is an NMOS transistor, the source of the transistor is grounded.

5. The voltage-controlled oscillator with high-voltage controlled gain in series resonance and low phase noise according to claim 3, characterized in that The coupling capacitors include a first capacitor, a second capacitor, a third capacitor and a fourth capacitor. The two transistors are respectively denoted as a first transistor and a second transistor. The gate of the first transistor is connected to the gate of the second transistor through the first capacitor, the second capacitor, the third capacitor and the fourth capacitor in sequence, and the first end of the first capacitor is connected to the gate of the first transistor, and the second end is connected to the drain of the second transistor; the first end of the fourth capacitor is connected to the gate of the second transistor, and the second end is connected to the drain of the first transistor.

6. The voltage-controlled oscillator with high-voltage controlled gain and low phase noise in series resonance according to claim 5, wherein The second capacitor and the third capacitor adopt voltage-controlled variable capacitors, and the connection end of the second capacitor and the third capacitor is connected to the voltage control terminal.

7. The voltage-controlled oscillator with high-voltage controlled gain in series resonance and low phase noise according to any one of claims 4-6, characterized in that The drains of the two transistors are connected to each other through a second adjustable inductor. When the transistor is a PMOS transistor, the control terminal of the second adjustable inductor is grounded; when the transistor is an NMOS transistor, the common-mode terminal of the second adjustable inductor is connected to a bias voltage.

8. The voltage-controlled oscillator with high-voltage controlled gain in series resonance and low phase noise according to claim 1, characterized in that The voltage control terminal is directly connected to the common-mode point of the variable capacitors in the two resonant branches and / or is connected to the common-mode point of the variable capacitors through a first bias inductor.

9. The voltage-controlled oscillator with high-voltage controlled gain in series resonance and low phase noise according to claim 1, characterized in that, The common-mode terminals of the first inductors in the two resonant branches are grounded and / or connected to a bias voltage through a second bias inductor.

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