HgCdTe chip and manufacturing method thereof

Abstract

The invention belongs to the field of semiconductor materials, and discloses a tellurium-cadmium-mercury chip and a manufacturing method thereof, and the method comprises the steps: sequentially carrying out the glue uniformizing, drying, exposing and developing on the surface of the chip, forming a first photoetching hole in a photoresist layer on the surface of the chip, then etching an etching hole in the chip along the first photoetching hole, and then removing the photoresist; the photoresist is evenly distributed on the surface of the chip again, the etching hole is filled with the photoresist, then drying, exposure and development are sequentially carried out, a second photoetching hole is formed in the etching hole in a sleeved mode, the depth of the second photoetching hole is equal to that of the etching hole, and the diameter of the second photoetching hole is smaller than that of the etching hole; and then sequentially carrying out corrosion and detection to complete the manufacturing of the tellurium-cadmium-mercury chip. According to the method, through the process of combining secondary photoetching with wet etching, inversion in the hole caused by dry etching can be effectively removed, and the performance of the chip is improved; moreover, the manufacturing method provided by the invention can prevent the ZnS layer and the CdTe layer from being corroded by a corrosive liquid during wet etching, avoids a step-shaped gap, and further improves the performance of the chip.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor materials, and relates to a manufacturing method of a chip, specifically to a mercury cadmium telluride chip and its manufacturing method. Background Art

[0002] Conventionally, dry etching process is usually used to open holes on the surface of a semiconductor chip. The dry etching process transfers a pattern to the chip through a photolithography process, then ionizes a gas into positively charged ions by glow discharge, and then uses a bias voltage to accelerate the ions to sputter on the surface of the etched chip substrate. After the etching is completed, the photoresist is removed, and thus the required chip pattern is formed.

[0003] When producing an n-on-p type mercury cadmium telluride detector, due to ion bombardment, CdTe material will be bombarded onto the surface of the N-type layer, covering the surface of the N-type layer under the etching hole with a thin P-type layer (CdTe material) of the inverted layer in the hole, changing the chip structure to an n-p-on-p structure and affecting the chip performance. Summary of the Invention

[0004] In view of the defects and deficiencies existing in the prior art, on the one hand, the present invention provides a manufacturing method of a mercury cadmium telluride chip; on the other hand, the present invention provides a mercury cadmium telluride chip.

[0005] On the first aspect, the present invention provides a manufacturing method of a mercury cadmium telluride chip, including the following steps: Step 1: Spin coat, dry, expose, and develop on the chip surface in sequence to form a first photolithography hole in the photoresist layer on the chip surface. Then, etch into the chip along the first photolithography hole to form an etching hole, and then remove the photoresist. Step 2: Spin coat on the chip surface again, fill the etching hole with photoresist, and then dry, expose, and develop in sequence to inscribe a second photolithography hole in the etching hole. The depth of the second photolithography hole is equal to that of the etching hole, and the diameter of the second photolithography hole is smaller than that of the etching hole. Step 3: Immerse the chip in an etching solution for etching, then place it in flowing pure water for standing, and then soak the chip in an acetone solution and absolute ethanol in sequence, and then remove the photoresist on the chip. Step 4: Measure the depth of the second photolithography hole. When the depth of the second photolithography hole meets the standard, enter the wafer processing; when the hole depth does not meet the standard, discard it.

[0006] Preferably, in Step 1 and Step 2, during the first photolithography and the second photolithography, spin coat a layer of photoresist on the chip surface. After spin coating is completed, dry the chip to harden the photoresist on the chip surface. Subsequently, perform contact exposure and development, with the developed pattern being the first photolithography hole or the second photolithography hole, and then perform subsequent operations.

[0007] Further preferably, in step 1, during etching, the lithographed chip is placed in an etching machine, and argon, methane, and hydrogen are introduced for etching; the etching duration is 5 - 10 min.

[0008] Preferably, in step 1, the thickness of the photoresist is 1.4 - 1.8 μm; the diameter of the first photolithography hole is 2.5 - 3.5 μm, and the depth of the first photolithography hole is the same as the thickness of the photoresist.

[0009] Preferably, the mercury cadmium telluride chip comprises a ZnS layer, a CdTe layer, and an N-type layer from top to bottom; in step 1, the diameter of the etching hole is the same as the diameter of the first photolithography hole, and the depth of the etching hole is greater than or equal to the sum of the thicknesses of the ZnS layer and the CdTe layer, and less than the sum of the ZnS layer, the CdTe layer, and the N-type layer.

[0010] Further preferably, the depth of the etching hole is 550 - 600 nm.

[0011] Preferably, in step 2, the thickness of the photoresist is 2.5 - 3.5 μm.

[0012] Preferably, in step 2, the diameter of the second photolithography hole is 0.8 - 1 μm smaller than the diameter of the etching hole.

[0013] Further preferably, the diameter of the second photolithography hole is 1.5 - 2.8 μm.

[0014] Preferably, the second photolithography hole and the etching hole are coaxial.

[0015] Preferably, in step 2, the depth of the second photolithography hole is the same as that of the etching hole.

[0016] Preferably, in step 3, the etching solution comprises chromium trioxide, hydrofluoric acid, phosphoric acid, and water.

[0017] Preferably, in step 3, the molar ratio of chromium trioxide, hydrofluoric acid, phosphoric acid, and water in the etching solution is 50 - 70∶20 - 40∶60 - 80∶800 - 1200.

[0018] Preferably, in step 3, the chip is etched at room temperature; the etching time is 5 - 20 s.

[0019] Preferably, in step 3, the chip is washed with flowing pure water for 40 - 80 min.

[0020] Preferably, in step 3, the chip is soaked in an acetone solution for 5 - 10 min.

[0021] Preferably, in step 3, the chip is soaked in absolute ethanol for 5 - 10 min.

[0022] In a second aspect, the present invention provides a mercury cadmium telluride chip prepared by the above preparation method.

[0023] Compared with the prior art, the present invention has the following obvious beneficial effects: (1) Through the process of secondary lithography combined with wet etching, the present invention can effectively remove the inverted P-type layer in the holes caused by dry etching, improving the chip performance; moreover, the manufacturing method provided by the present invention can avoid the etching solution from corroding the ZnS layer and the CdTe layer during wet etching, avoiding the occurrence of stepped gaps and further improving the chip performance.

[0024] (2) By adjusting the composition and proportion of the etching solution, on the one hand, the inventors can control the etching rate to be relatively moderate, improving stability and controllability. On the other hand, it is beneficial for the etching solution to etch laterally along the second photolithography hole, reducing the possibility of etching dead corners and thus improving the chip performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic structural diagram of the chip after secondary lithography in a specific embodiment of the present invention; Figure 2 It is an SEM image of the chip obtained in Example 1; Figure 3 It is an SEM image of the chip obtained in Comparative Example 1. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0026] The present invention provides the following specific technical solutions.

[0027] In a first aspect, the present invention provides a manufacturing method for a mercury cadmium telluride chip, including the following steps: Step 1: Spin coat, dry, expose, and develop on the chip surface in sequence to form a first photolithography hole in the photoresist layer on the chip surface. Then, etch an etching hole into the chip along the first photolithography hole, and then remove the photoresist; Step 2: Spin coat the chip surface again, fill the etching hole with photoresist, and then dry, expose, and develop in sequence to etch a second photolithography hole inside the etching hole. The depth of the second photolithography hole is equal to that of the etching hole, and the diameter of the second photolithography hole is smaller than that of the etching hole; Step 3: Immerse the chip in the etching solution for etching, then place it in flowing pure water for standing. Then, soak the chip in an acetone solution and absolute ethanol in sequence, and then remove the photoresist on the chip; Step 4: Measure the depth of the second photolithography hole. When the depth of the second photolithography hole meets the standard, enter the wafer processing; when the hole depth does not meet the standard, discard it.

[0028] In the prior art, in order to avoid the influence of the inversion layer on the chip performance, it is necessary to remove the inversion layer. Usually, the inversion layer is removed by means of etching after photolithography. The specific etching process is as follows: photolithography holes are opened on the chip, and then etching is carried out into the chip. The etching depth is greater than the sum of the thicknesses of the ZnS layer and the CdTe layer, and less than the sum of the thicknesses of the ZnS layer, the CdTe layer and the N-type layer. Then the chip is immersed in the etching solution, and the etching solution etches the inversion layer. During the etching process, the etching solution also contacts the ZnS layer and the CdTe layer, causing certain corrosion to the ZnS layer and the CdTe layer, which affects the chip performance. Because the etching solution has different etching performances on different materials, the etching rate of the etching solution on the CdTe layer is faster, and stepped voids appear on the etched chip, which affects the chip performance.

[0029] The inventors have found through research that through two photolithography processes, a layer of photoresist can be adhered to the side wall surface of the etching hole. When the etching solution etches the inversion layer, the photoresist can protect the ZnS layer and the CdTe layer from being etched, and by controlling the etching time, the diameter of the etching hole in the N-type layer after etching can be made the same as the diameter of the etching hole, improving the effect of removing the P-type layer, and thus improving the chip performance.

[0030] Preferably, in steps 1 and 2, during the first photolithography and the second photolithography, a layer of photoresist is evenly spread on the chip surface. After the photoresist spreading is completed, the chip is dried, so that the photoresist on the chip surface is dried and hardened. Subsequently, contact exposure and development are carried out, and the developed pattern is the first photolithography hole or the second photolithography hole, and then subsequent operations can be carried out.

[0031] Preferably, in step 1, during etching, the photolithographed chip is placed in an etching machine, and argon, methane, and hydrogen are introduced for etching; the etching duration is 5 - 10 min.

[0032] Preferably, in step 1, the thickness of the photoresist is 1.4 - 1.8 μm; the diameter of the first photolithography hole is 2.5 - 3.5 μm, and the depth of the first photolithography hole is the same as the thickness of the photoresist.

[0033] In practical applications, the depth of the first photolithography hole is the same as the thickness of the photoresist, which is convenient for etching the chip.

[0034] Preferably, the mercury cadmium telluride chip is successively composed of a ZnS layer, a CdTe layer, and an N-type layer from top to bottom; in step 1, the diameter of the etching hole is the same as the diameter of the first photolithography hole, and the depth of the etching hole is greater than or equal to the sum of the thicknesses of the ZnS layer and the CdTe layer, and less than the sum of the ZnS layer, the CdTe layer, and the N-type layer.

[0035] In a specific embodiment of the present invention, the model of the used mercury cadmium telluride chip is 640×512, where the thickness of the ZnS layer is 300 nm, the thickness of the CdTe layer is 200 nm, and the thickness of the N-type layer is 1 μm.

[0036] In theory, the depth of the etching hole is greater than or equal to 500 nm and less than 1500 nm.

[0037] Further preferably, the depth of the etching hole is 550 - 600 nm.

[0038] In practical applications, the depth of the etching hole needs to be determined according to the structure and actual requirements of the chip. At the same time, the etching effect of the etching solution also needs to be considered. If the etching hole penetrates too deep into the N-type layer and there is too little remaining margin for etching in the N-type layer, it is easy to penetrate through the N-type layer, which will also affect the chip performance. If the possibility of penetrating through the N-type layer is to be reduced by shortening the immersion time of the chip in the etching solution, it may result in incomplete removal of the P-type layer.

[0039] The photoresist attached to the inner wall of the etching hole has a certain thickness. There is a certain diameter difference between the photoresist and the etching hole. The area of the diameter difference is the partial annular region where the bottom of the photoresist covers the bottom surface of the etching hole. The P-type layer still exists on the surface of this partial annular region, and it is easy to form an etching dead corner in the annular region, resulting in incomplete etching. Slightly deepening the etching hole into the N-type layer is beneficial for the etching solution to etch the annular region blocked by the photoresist.

[0040] Preferably, in step 2, the thickness of the photoresist is 2.5 - 3.5 μm.

[0041] In actual operation, more photoresist is used before the second lithography to ensure that the etching hole is filled with photoresist, so that the photoresist can completely cover the side wall of the etching hole after the second lithography, reducing the possibility of the ZnS layer and the CdTe layer being corroded by the etching solution.

[0042] Preferably, the diameter of the second photolithography hole is 0.8 - 1 μm smaller than the diameter of the etching hole.

[0043] In theory, the diameter of the second photolithography hole is slightly smaller than that of the etching hole, so that the photoresist coats the side wall of the first photolithography hole, avoiding the ZnS layer and the CdTe layer from being corroded by the etching solution. The inventor has found through research that the diameter of the second photolithography hole is preferably 0.8 - 1 μm smaller than that of the etching hole. On the one hand, it can ensure the stability of the photoresist, avoiding the photoresist from being too thin and easily falling off due to the too large diameter of the second photolithography hole, thus enabling the etching solution to contact the ZnS layer and the CdTe layer. On the other hand, in practical applications, there may be some residual photoresist at the bottom of the first and second photolithography holes after photolithography. In order to completely expose the bottoms of the first and second photolithography holes, a plasma machine tool is usually used to process the residual photoresist after photolithography. During the processing, the photoresist adhered to the inner wall of the etching hole will also be affected. Within the above preferred range, the influence during the processing of the residual photoresist can be reduced. On the third hand, within this preferred range, by controlling the etching time, on the premise of ensuring that the P-layer is completely corroded, the P-layer in the annular area covered by the photoresist at the bottom of the first photolithography hole is also completely corroded. If the diameter of the second photolithography hole is too small, the part of the photoresist that has not been removed by photolithography at the bottom of the etching hole still adheres to the bottom of the etching hole, resulting in the P-layer remaining in a ring shape on the surface of the N-type layer not being corroded, which may have a certain impact on the performance of the chip.

[0044] Further preferably, the diameter of the second photolithography hole is 1.5 - 2.8 μm.

[0045] Preferably, in step 2, the second photolithography hole and the etching hole are coaxial.

[0046] Preferably, in step 2, the depth of the second photolithography hole is the same as that of the etching hole.

[0047] In the actual application process, during the second photolithography, only the photoresist at the bottom of the etching hole needs to be removed, so that the P-type layer on the surface of the N-type layer can be exposed, facilitating subsequent etching.

[0048] Preferably, in step 3, the etching solution includes chromium trioxide, hydrofluoric acid, phosphoric acid and water.

[0049] Preferably, in step 3, the molar ratio of chromium trioxide, hydrofluoric acid, phosphoric acid and water in the etching solution is 50 - 70∶20 - 40∶60 - 80∶800 - 1200.

[0050] The inventor has found through research that by adjusting the composition and ratio of the etching solution, on the one hand, the etching rate can be controlled to be relatively moderate, improving stability and controllability. On the other hand, it is beneficial for the etching solution to etch laterally along the second photolithography hole, reducing the possibility of etching dead corners, thereby improving the performance of the chip, facilitating industrial mass production and controlling product quality.

[0051] Preferably, in step 3, the chip is etched at room temperature; the etching time is 5 - 20 s.

[0052] In practical applications, the etching time needs to comprehensively consider the thickness of the photoresist attached to the inner wall of the etched hole after the second lithography, the etching performance of the etching solution, the hole depth of the second photolithography hole, and the thickness of the N-type layer of the chip. The preferred range proposed by the inventor for the etching time is 5 - 20 s. Within this range, the P-type layer on the surface of the N-type layer can be completely etched, while avoiding penetration of the N-type layer.

[0053] After etching with the etching solution for 5 - 20 s, the etching depth is detected. An ideal etching situation is achieved when the measured etching depth is 5 - 20 nm.

[0054] Preferably, in step 3, the chip is washed with flowing pure water for 40 - 80 min to wash away the remaining solution in the holes; then the chip is immersed in an acetone solution for 5 - 10 min to remove the photoresist on the chip surface; and then the chip is immersed in absolute ethanol for 5 - 10 min to remove the remaining acetone and dehydrate the chip, making it easier to dry.

[0055] In a second aspect, the present invention provides a mercury cadmium telluride chip prepared by the above preparation method.

[0056] To make the technical problems, technical solutions, and technical advantages to be solved by the present invention clearer, the following will be described in detail with specific examples, but the protection scope of the present invention is not limited to the following specific embodiments.

[0057] Unless otherwise defined, all the professional terms used hereinafter have the same meaning as commonly understood by those skilled in the art. The professional terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the protection scope of the present invention.

[0058] Unless otherwise specifically stated, various raw materials, reagents, instruments, and equipment used in the present invention can be obtained through market purchases or can be prepared by existing methods.

[0059] For ease of understanding, Figure 1 FIG. 1 is a schematic cross-sectional structure diagram of the mercury cadmium telluride chip prepared in Example 1 of the present invention (after etching but without removing the photoresist). The model of the mercury cadmium telluride chip is 640×512. The mercury cadmium telluride chip includes a ZnS layer, a CdTe layer, and an N-type layer from top to bottom. The thickness of the ZnS layer is 300 nm, the thickness of the CdTe layer is 200 nm, and the thickness of the N-type layer is 1 μm. The hole depth of the etched hole is greater than the sum of the thicknesses of the ZnS layer and the CdTe layer, and less than the sum of the ZnS layer, the CdTe layer, and the N-type layer. In step 3, after coating the photoresist to fill the etched hole, a second lithography is performed. The diameter of the second photolithography hole is smaller than that of the etched hole, and the second photolithography hole and the etched hole are coaxial. The second lithography removes the photoresist at the bottom of the etched hole, and then the mercury cadmium telluride chip is immersed in the etching solution for etching to remove the P-type layer on the surface of the N-type layer.

[0060] Example 1: A method for manufacturing a mercury cadmium telluride chip, comprising the following steps: Step 1, prepare an etching solution by mixing chromium trioxide, hydrofluoric acid, phosphoric acid and water, wherein the molar ratio of chromium trioxide, hydrofluoric acid, phosphoric acid and water is 60:30:70:1000.

[0061] Step 2, spin coat a layer of photoresist on the chip, the thickness of the photoresist is 1.6 μm. After spin coating, dry the chip to harden the photoresist on the chip surface. Then, perform contact exposure and development to obtain a first photolithography hole, the diameter of the first photolithography hole is 3 μm, and the depth of the first photolithography hole is the same as the thickness of the photoresist. Then, place the chip in a plasma tool to pass oxygen for 10 min to remove the unexposed photoresist film on the chip surface, and then place the chip in an etching tool for dry etching to etch an etching hole, and the depth of the photolithography hole is 580 nm.

[0062] Step 3, perform secondary photolithography. Spin coat a layer of photoresist on the chip, the thickness of the photoresist is 3 μm. After spin coating, dry the chip to harden the photoresist on the chip surface. Then, perform contact exposure and development to etch a second photolithography hole in the etching hole. The second photolithography hole is coaxial with the etching hole, the diameter of the second photolithography hole is 2.45 μm, and the depth of the second photolithography hole is the same as that of the etching hole. Then, place the chip in a plasma tool to pass oxygen for 10 min to remove the unexposed photoresist film at the bottom of the etching hole.

[0063] Step 4, immerse the chip in the etching solution at room temperature for 15 s, then transfer the chip to flowing pure water and let it stand for 60 min. Then, immerse the chip cleaned with pure water in an acetone solution for 8 min, and then transfer the chip to alcohol and soak it for 8 min.

[0064] Step 5, take out the chip, dry it and then test the overall hole depth (the sum of the etching hole depth and the corrosion depth) on the chip. If the overall hole depth is between 600 and 650 nm, it is qualified.

[0065] Comparative Example 1: A method for manufacturing a mercury cadmium telluride chip, comprising the following steps: Step 1, prepare an etching solution by mixing chromium trioxide, hydrofluoric acid, phosphoric acid and water, wherein the molar ratio of chromium trioxide, hydrofluoric acid, phosphoric acid and water is 60:30:70:1000.

[0066] Step 2: Spin-coat a layer of photoresist on the chip. The thickness of the photoresist is 1.6 μm. After spin-coating, dry the chip to harden the photoresist on the chip surface. Then, perform contact exposure and development to obtain a first photolithography hole with a diameter of 3 μm. The depth of the first photolithography hole is the same as the thickness of the photoresist. Then, place the chip in a plasma chamber and introduce oxygen for 10 minutes to remove the un-developed photoresist film on the chip surface. Next, place the chip in an etching machine for dry etching to create an etching hole with a depth of 580 nm.

[0067] Step 3: Immerse the chip in the etching solution at room temperature for 15 s. Then, transfer the chip to flowing pure water and let it stand for 60 min. Next, immerse the chip cleaned with pure water in acetone solution water for 8 min, and then transfer the chip to alcohol and soak it for 8 min.

[0068] Step 4: Take out the chip, dry it, and measure the depth of the photolithography hole. If the overall hole depth is between 600 and 650 nm, it is qualified.

[0069] Example 2: A method for manufacturing a mercury cadmium telluride chip, comprising the following steps: Step 1: Prepare the etching solution by mixing chromium trioxide, hydrofluoric acid, phosphoric acid, and water. The molar ratio of chromium trioxide, hydrofluoric acid, phosphoric acid, and water is 50∶20∶60∶1200.

[0070] Step 2: Spin-coat a layer of photoresist on the chip. The thickness of the photoresist is 1.4 μm. After spin-coating, dry the chip to harden the photoresist on the chip surface. Then, perform contact exposure and development to obtain a first photolithography hole with a diameter of 2.5 μm. The depth of the first photolithography hole is the same as the thickness of the photoresist. Then, place the chip in a plasma chamber and introduce oxygen for 10 minutes to remove the un-developed photoresist film on the chip surface. Next, place the chip in an etching machine for dry etching to create an etching hole with a depth of 550 nm.

[0071] Step 3: Perform secondary photolithography. Spin-coat a layer of photoresist on the chip. The thickness of the photoresist is 2.5 μm. After spin-coating, dry the chip to harden the photoresist on the chip surface. Then, perform contact exposure and development to etch a second photolithography hole coaxially with the etching hole in the etching hole. The diameter of the second photolithography hole is 1.5 μm, and the depth of the second photolithography hole is the same as that of the etching hole. Then, place the chip in a plasma chamber and introduce oxygen for 10 minutes to remove the un-developed photoresist film at the bottom of the etching hole.

[0072] Step 4: Immerse the chip in the etching solution at room temperature for 5 s. Then, transfer the chip to flowing pure water and let it stand for 40 min. Next, immerse the chip cleaned with pure water in acetone solution water for 5 min, and then transfer the chip to alcohol and soak it for 5 min.

[0073] Step 5: Take out the chip, dry it, and then measure the overall hole depth (the sum of the etched holes and the corrosion depth) on the chip. If the overall hole depth is between 600 and 650 nm, it is qualified.

[0074] Example 3: A method for manufacturing a mercury cadmium telluride chip, comprising the following steps: Step 1: Prepare an etching solution by mixing chromium trioxide, hydrofluoric acid, phosphoric acid, and water, where the molar ratio of chromium trioxide, hydrofluoric acid, phosphoric acid, and water is 70:40:80:800.

[0075] Step 2: Spin coat a layer of photoresist on the chip. The thickness of the photoresist is 1.8 μm. After spin coating, dry the chip to harden the photoresist on the chip surface. Then, perform contact exposure and development to obtain a first photolithographic hole. The diameter of the first photolithographic hole is 3.5 μm, and the depth of the first photolithographic hole is the same as the thickness of the photoresist. Then, place the chip in a plasma machine and pass oxygen for 10 min to remove the unexposed photoresist film on the chip surface. Next, place the chip in an etching machine for dry etching to create etched holes. The depth of the photolithographic hole is 600 nm.

[0076] Step 3: Perform secondary photolithography. Spin coat a layer of photoresist on the chip. The thickness of the photoresist is 3.5 μm. After spin coating, dry the chip to harden the photoresist on the chip surface. Then, perform contact exposure and development to etch a second photolithographic hole within the etched holes. The second photolithographic hole is coaxial with the etched holes. The diameter of the second photolithographic hole is 2.8 μm, and the depth of the second photolithographic hole is the same as that of the etched holes. Then, place the chip in a plasma machine and pass oxygen for 10 min to remove the unexposed photoresist film at the bottom of the etched holes.

[0077] Step 4: Immerse the chip in the etching solution at room temperature for 20 s, then transfer the chip to flowing pure water and let it stand for 80 min. Next, place the chip cleaned with pure water in an acetone solution and soak it for 10 min, and then transfer the chip to alcohol and soak it for 10 min.

[0078] Step 5: Take out the chip, dry it, and then measure the overall hole depth (the sum of the etched holes and the corrosion depth) on the chip. If the overall hole depth is between 600 and 650 nm, it is qualified.

[0079] Figure 2 SEM image of the chip prepared in Example 1, from Figure 2 It can be seen that in the etching process of the method for manufacturing a mercury cadmium telluride chip provided by the present invention, the ZnS layer and the CdTe layer are not corroded, which proves that the preparation method provided by the present invention can obtain a mercury cadmium telluride chip with more stable structure and better quality.

[0080] Figure 3SEM image of the chip prepared in Comparative Example 1, from Figure 3 it can be observed that the ZnS layer and the CdTe layer are corroded, and the corrosion effect of the CdTe layer is stronger, showing stepped voids. It can be reasonably inferred that the performance of the chip is affected.

[0081] Comparison Figure 2 and Figure 3 further proves that the manufacturing method of the mercury cadmium telluride chip provided by the present invention can produce a mercury cadmium telluride chip with a more stable structure and better quality.

[0082] The above-described embodiments are only preferred specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope of the present invention, according to the technical solution and its concept of the present invention, makes equivalent substitutions or changes, and should be covered by the protection scope of the present invention.

Claims

1. A manufacturing method of a mercury cadmium telluride chip, characterized in that, It includes the following steps: Step 1: Spin coat, dry, expose, and develop on the chip surface in sequence to form a first photolithography hole in the photoresist layer on the chip surface. Then, etch an etching hole into the chip along the first photolithography hole. After that, remove the photoresist. Step 2: Spin coat on the chip surface again so that the photoresist fills the etching hole. Then, dry, expose, and develop in sequence to inscribe a second photolithography hole in the etching hole. The depth of the second photolithography hole is equal to that of the etching hole, and the diameter of the second photolithography hole is smaller than that of the etching hole. Step 3: Immerse the chip in the etching solution for corrosion, then place it in flowing pure water and let it stand. Then, soak the chip in acetone solution and anhydrous ethanol in sequence, and then remove the photoresist on the chip. Step 4: Measure the depth of the second photolithography hole. When the depth of the second photolithography hole meets the standard, enter the wafer processing; when the hole depth does not meet the standard, discard it.

2. The manufacturing method of the mercury cadmium telluride chip according to claim 1, characterized in that, In Step 1, the thickness of the photoresist is 1.4 - 1.8 μm; the diameter of the first photolithography hole is 2.5 - 3.5 μm, and the depth of the first photolithography hole is the same as the thickness of the photoresist.

3. The manufacturing method of the mercury cadmium telluride chip according to claim 1, characterized in that, The mercury cadmium telluride chip includes a ZnS layer, a CdTe layer, and an N-type layer from top to bottom in sequence; in Step 1, the diameter of the etching hole is the same as that of the first photolithography hole, and the depth of the etching hole is greater than or equal to the sum of the thicknesses of the ZnS layer and the CdTe layer, and less than the sum of the ZnS layer, the CdTe layer, and the N-type layer.

4. The manufacturing method of the mercury cadmium telluride chip according to claim 1, wherein, In Step 2, the thickness of the photoresist is 2.5 - 3.5 μm; the depth of the second photolithography hole is the same as that of the etching hole; the diameter of the second photolithography hole is 0.8 - 1 μm smaller than that of the etching hole.

5. The manufacturing method of the mercury cadmium telluride chip according to claim 4, characterized in that, In Step 2, the diameter of the second photolithography hole is 1.5 - 2.8 μm.

6. The manufacturing method of the mercury cadmium telluride chip according to claim 1, characterized in that, In Step 2, the second etching hole and the etching hole are coaxial.

7. The manufacturing method of the mercury cadmium telluride chip according to claim 1, wherein, In Step 3, the etching solution includes chromium trioxide, hydrofluoric acid, phosphoric acid, and water; the molar ratio of chromium trioxide, hydrofluoric acid, phosphoric acid, and water in the etching solution is 50 - 70∶20 - 40∶60 - 80∶800 - 1200.

8. The manufacturing method of the mercury cadmium telluride chip according to claim 1, characterized in that, In Step 3, the chip is corroded at room temperature; the corrosion time is 5 - 20 s.

9. A mercury cadmium telluride chip, characterized in that, Prepared by the manufacturing method according to any one of claims 1 - 8.

Images