Process method of furnace tube

By leaving gap grooves in the vertical furnace tube and inserting adjustment wafers, the membrane layer growth rate is adjusted using the trench structure, and the problem that the difference in membrane layer thickness in the vertical furnace tube greatly affects the performance of the device, achieving uniformity of membrane layer growth rate and optimization of device performance.

CN120384274APending Publication Date: 2025-07-29SEMICON MFG INT (BEIJING) CORP +1
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Patent Information

Application Number
CN202410117583.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-01-26
Publication Date
2025-07-29

AI Technical Summary

Technical Problem

In semiconductor manufacturing, the thickness of membrane deposition at different locations in vertical furnace tubes varies greatly, which affects device performance. How to adjust the growth rate of membrane layer at different locations in the furnace tube cavity to optimize the load effect.

Method used

After forming a film layer on the product wafer surface, a gap groove is reserved and an adjustment wafer is placed in the gap groove. The adjustment wafer surface has multiple trenches. The depth and density of the grooves are proportional to the thickness of the film layer, and the adjustment wafer surface area is proportional to the surface area of the product wafer. After insertion, the film layer is deposited on the adjustment wafer surface, consuming reactants to adjust the growth rate of the film layer.

Benefits of technology

By adjusting the trench structure of the wafer, the load effect in the furnace tube is optimized, the difference in membrane growth rate is reduced, and the consistency of device performance is improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a process method of a furnace tube. The process method comprises the following steps: providing a plurality of product wafers; putting the plurality of product wafers into a reaction cavity of a furnace tube, forming film layers on the surfaces of the product wafers, and reserving gap grooves between adjacent product wafers; obtaining the thicknesses of the film layers on the surfaces of the plurality of product wafers; according to the thickness of the film layer on the surface of each product wafer, a corresponding adjusting wafer is placed in the gap groove adjacent to the product wafer, a plurality of grooves are formed in the surface of the adjusting wafer, and the surface area of the adjusting wafer is in direct proportion to the thickness of the film layer on the surface of the corresponding product wafer; the film growth speed of the surfaces of product wafers at different positions in the furnace tube cavity is optimized, and the load effect of the furnace tube is eliminated.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a process method for a furnace tube. Background Art

[0002] In the semiconductor manufacturing process, in order to fabricate discrete devices and integrated circuits, different types of thin films need to be deposited on the surface of a wafer. Among various thin film deposition methods, Low Pressure Chemical Vapor Deposition (LPCVD) is a commonly used method and has been widely applied to various thin film deposition processes. In the LPCVD process, the current mainstream equipment is a vertical furnace tube. The process of depositing a thin film on the surface of a wafer using a vertical furnace tube is generally as follows: loading the wafer onto a susceptor; lifting the susceptor loaded with the wafer into the furnace tube, and supplying reaction gases through a reaction gas pipeline, and the reaction gases are deposited on the surface of the wafer to form a thin film.

[0003] In the traditional process, wafer processing is mainly planar processing. The load differences of wafers mainly come from the light transmittance or the density of patterns of different products, and the positions in the furnace tube. However, after entering the 2.5D and 3D three-dimensional structure processes, due to the development of patterns in the depth direction, the surface area to be deposited with a thin film is increased by dozens to hundreds of times compared with the existing mature processes. For different wafers, the load differences at different positions in the furnace tube become larger and larger, and the differences in the deposition thickness of the film layer are large, which will seriously affect the device performance.

[0004] Therefore, how to adjust the film growth rate at different positions in the furnace tube cavity and optimize the furnace tube load effect is a technical problem that needs to be solved urgently at present. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a process method for a furnace tube, which optimizes the film growth rate on the surface of product wafers at different positions in the furnace tube cavity and eliminates the furnace tube load effect.

[0006] To solve the above problems, the present invention provides a process method for a furnace tube, including: providing a plurality of product wafers; placing the plurality of product wafers into a reaction chamber of the furnace tube, forming a film layer on the surface of the product wafers, and leaving a gap groove between adjacent product wafers; obtaining the thickness of the film layer on the surfaces of the plurality of product wafers; according to the thickness of the film layer on the surface of each product wafer, placing a corresponding adjustment wafer into the gap groove adjacent to the product wafer, the surface of the adjustment wafer has a plurality of grooves, and the surface area of the adjustment wafer is proportional to the thickness of the film layer on the surface of the corresponding product wafer.

[0007] Optionally, the depth of the groove is in a proportional relationship with the thickness of the film layer.

[0008] Optionally, the depth of the trench ranges from 0.5 um to 40 um.

[0009] Optionally, the device density of the trench is directly proportional to the thickness of the film layer.

[0010] Optionally, the device density of the trench is 3% to 40%.

[0011] Optionally, the method for forming the adjustment wafer includes: providing a wafer; cleaning the wafer; forming an oxide film layer on the surface of the cleaned wafer; forming a patterned layer on the surface of the oxide film layer; etching the oxide film layer and a part of the thickness of the wafer with the patterned layer as a mask to form a trench in the wafer; removing the patterned layer and the oxide film layer to form the adjustment wafer.

[0012] Optionally, further comprising: forming an interface layer on the sidewall surface and the bottom surface of the trench and the surface of the adjustment wafer before placing the adjustment wafer into the gap groove.

[0013] Optionally, the thickness of the interface layer is 5 angstroms to 1000 angstroms.

[0014] Optionally, the material of the interface layer includes silicon nitride and silicon oxide.

[0015] Optionally, the process parameters of the furnace tube include: the temperature of the reaction chamber is 400°C to 1200°C, the deposition time of the film layer is 10 minutes to 600 minutes, the reactants in the furnace tube include oxygen, nitrogen, and ammonia, and the gas flow rate range of the reaction chamber is 1 sccm to 10000 sccm..

[0016] Optionally, the parameters of the furnace tube correspondingly form the film layer with the maximum thickness.

[0017] Optionally, after obtaining the thickness of the film layer and before placing the adjustment wafer, further comprising: comparing the thickness of the film layer with the thickness of a preset film layer; when the thickness of the film layer is greater than the preset film layer, placing the adjustment wafer into the corresponding gap groove of the product wafer.

[0018] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0019] In the process method of the furnace tube of the technical solution of the present invention, the product wafer is placed in the reaction chamber of the furnace tube, a film layer is formed on the surface of the product wafer, a gap groove is reserved between adjacent product wafers, and the thicknesses of the film layers on the surfaces of multiple product wafers are obtained; according to the thicknesses of the film layers on the surfaces of the respective product wafers, corresponding adjustment wafers are placed in the gap grooves adjacent to the product wafers. The surface of the adjustment wafer has a plurality of grooves, and the surface area of the adjustment wafer is proportional to the thickness of the film layer on the surface of the corresponding product wafer; after inserting the adjustment wafer into the gap groove, a film layer is deposited on the surface of the adjustment wafer, consuming the reactants near the product wafer corresponding to the adjustment wafer, reducing the growth rate of the film layer on the surface of the product wafer, so that the growth rates of the film layers on the surfaces of the product wafers at different positions in the reaction chamber of the furnace tube can be adjusted, optimizing the load effect in the furnace tube, and having a wide range of applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a process flow chart of a process method of a furnace tube according to the present invention;

[0021] Figure 2 is a schematic structural diagram of the inside of the reaction chamber of the furnace tube according to an embodiment of the present invention;

[0022] Figures 3 to 8 is a structural diagram of the preparation process of the adjustment wafer in an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] As in the background art, currently, there are large differences in the speeds of forming film layers on the surfaces of product wafers at different positions in the reaction chamber of the furnace tube, and the load differences at different positions in the furnace tube are becoming larger and larger, which will seriously affect the performance of the product wafers.

[0024] On this basis, the present invention provides a process method for a furnace tube. The product wafer is placed in the reaction chamber of the furnace tube, a film layer is formed on the surface of the product wafer, a gap groove is reserved between adjacent product wafers, and the thicknesses of the film layers on the surfaces of multiple product wafers are obtained; according to the thicknesses of the film layers on the surfaces of the respective product wafers, corresponding adjustment wafers are placed in the gap grooves adjacent to the product wafers. The surface of the adjustment wafer has a plurality of grooves, and the surface area of the adjustment wafer is proportional to the thickness of the film layer on the surface of the corresponding product wafer; after inserting the adjustment wafer into the gap groove, a film layer is deposited on the surface of the adjustment wafer, consuming the reactants near the product wafer corresponding to the adjustment wafer, reducing the growth rate of the film layer on the surface of the product wafer, so that the growth rates of the film layers on the surfaces of the product wafers at different positions in the reaction chamber of the furnace tube can be adjusted, optimizing the load effect in the furnace tube, and having a wide range of applications.

[0025] In order to make the above objects, features, and advantages of the present invention more obvious and understandable, the following detailed description of the specific embodiments of the present invention will be given with reference to the accompanying drawings.

[0026] First, please refer to Figures 1 to 2 , a process method for a furnace tube, comprising: Step S1: providing a plurality of the product wafers 102; Step S2: placing the plurality of the product wafers 102 into the reaction chamber 101 of the furnace tube 100 to form a film layer on the surface of the product wafers 102, and leaving the gap grooves 103 between adjacent product wafers 102; Step S3: obtaining the thickness of the film layer on the surfaces of the plurality of product wafers 102; Step S4: according to the thickness of the film layer on the surface of each product wafer 102, placing the corresponding adjustment wafer 104 into the adjacent gap groove 103 of the product wafer 102, the surface of the adjustment wafer 104 having a plurality of grooves 105, and the surface area of the adjustment wafer 104 being proportional to the thickness of the film layer on the surface of the corresponding product wafer 102.

[0027] In this embodiment, after inserting the adjustment wafer 104 into the gap groove 103, a film layer is deposited on the surface of the adjustment wafer 104, consuming the reactants near the corresponding product wafer 102 of the adjustment wafer 104, reducing the growth rate of the film layer on the surface of the product wafer 102, so that the growth rate of the film layer on the surfaces of the product wafers 102 at different positions in the reaction chamber 101 of the furnace tube 100 can be adjusted, optimizing the load effect in the furnace tube 100, and having a wide range of applications.

[0028] In this embodiment, the process parameters of the furnace tube include: the temperature of the reaction chamber is 400°C to 1200°C, the deposition time of the film layer is 10 minutes to 600 minutes, the reactants in the furnace tube include oxygen, nitrogen, and ammonia, and the gas flow rate range of the reaction chamber is 1 sccm to 10000 sccm.

[0029] In this embodiment, the parameters of the furnace tube 100 correspond to forming the film layer with the maximum thickness on the surface of the product wafer 102.

[0030] In this embodiment, after obtaining the thickness of the film layer and before placing the adjustment wafer 104, it further includes: comparing the thickness of the film layer with the thickness of a preset film layer; when the thickness of the film layer is greater than the preset film layer, placing the adjustment wafer 104 into the corresponding gap groove 103 of the product wafer 102.

[0031] When the thickness of the film layer is much larger than the thickness of the preset film layer, insert the adjusting wafer 104 with a large surface area into the corresponding gap groove 103; when the thickness of the film layer is larger than the thickness of the preset film layer, insert the adjusting wafer 104 with a relatively large surface area into the corresponding gap groove 103; when the thickness of the film layer is smaller than the thickness of the preset film layer, do not place the adjusting wafer 104 into the gap groove 103 near the product wafer 102 at this position, so as to adjust the growth rate of the film layer on the surface of the product wafer 102 at different positions in the reaction chamber 101 of the furnace tube 100, and optimize the loading effect in the furnace tube 100.

[0032] In this embodiment, the depth of the groove 105 is in a direct proportion relationship with the thickness of the film layer; when the thickness of the film layer on the surface of the product wafer 102 is thicker, it is necessary to insert the adjusting wafer 104 with a larger depth into the corresponding gap groove 103 near the product wafer 102. Since the greater the depth of the groove 105, the larger the surface area that the adjusting wafer 104 can provide, and the more reactants can be consumed, thereby reducing the formation rate of the film layer on the surface of the corresponding product wafer 102 and playing a corresponding adjusting role.

[0033] In this embodiment, the device density of the groove 105 is in a direct proportion relationship with the thickness of the film layer, where the device density of the groove 105 refers to the sparsity of the channels formed on the surface of the adjusting wafer 104.

[0034] In this embodiment, the greater the device density of the groove 105, the larger the surface area that the adjusting wafer 104 can provide, and the more reactants can be consumed, thereby reducing the formation rate of the film layer on the surface of the corresponding product wafer 102 and playing a corresponding adjusting role.

[0035] In this embodiment, for the forming method of the adjusting wafer 104, please refer to Figures 3 to 8 .

[0036] Please refer to Figure 3 , and provide the wafer 106.

[0037] In this embodiment, the material of the wafer 106 is silicon.

[0038] In other embodiments, the material of the wafer 106 can also be some other semiconductor materials, etc., not limited to silicon materials.

[0039] Please refer to Figure 4 , clean the wafer 106, and form an oxide film layer 107 on the surface of the cleaned wafer 106.

[0040] In this embodiment, the oxide film layer 107 protects the flatness of the surface of the unetched wafer 106.

[0041] Please refer to Figure 5 , a patterned layer 108 is formed on the surface of the oxide film layer 107.

[0042] In this embodiment, the material of the patterned layer 108 is photoresist. There is a pattern opening 108' in the patterned layer 108, and the pattern opening 108' exposes part of the surface of the oxide film layer 107.

[0043] Please refer to Figure 6 , using the patterned layer 108 as a mask to etch the oxide film layer 107 and a part of the thickness of the wafer 106, and a trench 105 is formed in the wafer 106.

[0044] In this embodiment, a dry etching process is used to etch the oxide film layer 107 and a part of the thickness of the wafer.

[0045] In other embodiments, a wet etching process is used to etch the oxide film layer 107 and a part of the thickness of the wafer.

[0046] Please refer to Figure 7 , removing the patterned layer 108 and the oxide film layer 107 to form the adjustment wafer 104.

[0047] In this embodiment, before removing the patterned layer 108 and the oxide film layer 107, the trench 105 is wet cleaned.

[0048] In this embodiment, the depth H of the trench 105 ranges from 0.5 um to 40 um; when the depth of the trench 105 is less than 0.5 um, the depth of the formed channel is small, the surface area of the adjustment wafer 104 is small, the reaction that can be consumed is less, and the film layer that can be deposited is thinner, thus not playing a good role in adjusting the film layer formation speed on the surface of the product wafer 102; when the depth of the trench 105 is greater than 40 um, the depth of the formed channel is large, the surface area of the adjustment wafer 104 is large, the reaction that can be consumed is more, and the film layer that can be deposited is thicker, and the speed of forming a film layer on the surface of the product wafer 102 is too slow, affecting production efficiency.

[0049] In this embodiment, the device density of the trench 105 is 3% to 40%. When the device density of the trench 105 is less than 3%, too few trenches 105 are formed on the surface of the adjustment wafer 104 at this time. The smaller the surface area that the adjustment wafer 104 can provide, the less reactant can be consumed, and thus the smaller the effect of reducing the film formation rate on the surface of the corresponding product wafer 102, which plays a good adjustment role. When the device density of the trench 105 is greater than 40%, too many trenches 105 are formed on the surface of the adjustment wafer 104 at this time. The larger the surface area that the adjustment wafer 104 can provide, the more reactant can be consumed, and the film formation rate on the surface of the product wafer 102 is too slow, affecting the production efficiency.

[0050] In this embodiment, please refer to Figure 8 , before placing the adjustment wafer 104 into the gap groove 103, an interface layer 109 is formed on the side wall surface and the bottom surface of the trench 105 and the surface of the adjustment wafer 104.

[0051] In this embodiment, the thickness of the interface layer is 5 angstroms to 1000 angstroms.

[0052] In this embodiment, the material of the interface layer includes silicon nitride and silicon oxide.

[0053] In this embodiment, the process for forming the interface layer 109 is an atomic layer deposition process.

[0054] In other embodiments, the process for forming the interface layer 109 can also be a chemical vapor deposition process, a physical vapor deposition process, and so on.

[0055] In this embodiment, the purpose and function of forming the interface layer 109 is to serve as a stress buffer layer for the subsequent film layer, reducing the stress between the film layer deposition and the product wafer.

[0056] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be determined by the scope defined by the claims.

Claims

1. A process method for a furnace tube, characterized in that, Including: Providing a plurality of product wafers; Placing the plurality of product wafers into a reaction chamber of a furnace tube to form a film layer on the surface of the product wafers, and leaving a gap groove between adjacent product wafers; Obtaining the thickness of the film layer on the surfaces of the plurality of product wafers; According to the thickness of the film layer on the surface of each product wafer, placing a corresponding adjustment wafer into the gap groove adjacent to the product wafer. The surface of the adjustment wafer has a plurality of grooves, and the surface area of the adjustment wafer is proportional to the thickness of the film layer on the surface of the corresponding product wafer.

2. The process method of the furnace tube according to claim 1, characterized in that The depth of the groove is proportional to the thickness of the film layer.

3. The process method of the furnace tube according to claim 2, characterized in that, The depth range of the groove is 0.5um to 40um.

4. The process method of the furnace tube according to claim 1, characterized in that, The device density of the groove is proportional to the thickness of the film layer.

5. The process method of the furnace tube according to claim 4, characterized in that The device density of the groove is 3% to 40%.

6. The process method of the furnace tube according to claim 1, characterized in that, The forming method of the adjustment wafer includes: providing a wafer; cleaning the wafer; forming an oxide film layer on the surface of the cleaned wafer; forming a patterned layer on the surface of the oxide film layer; etching the oxide film layer and a part of the thickness of the wafer with the patterned layer as a mask to form grooves in the wafer; removing the patterned layer and the oxide film layer to form the adjustment wafer.

7. The process method of the furnace tube according to claim 6, characterized in that, Also including: Before placing the adjustment wafer into the gap groove, forming an interface layer on the side wall surface and the bottom surface of the groove and on the surface of the adjustment wafer.

8. The process method of the furnace tube according to claim 7, characterized in that, The thickness of the interface layer is 5 angstroms to 1000 angstroms.

9. The process method of the furnace tube according to claim 7, characterized in that, The material of the interface layer includes silicon nitride and silicon oxide.

10. The process method of the furnace tube according to claim 1, characterized in that, The process parameters of the furnace tube include: the temperature of the reaction chamber is 400°C to 1200°C, the deposition time of the film layer is 10 minutes to 600 minutes, the reactants in the furnace tube include oxygen, nitrogen, and ammonia, and the gas flow rate range of the reaction chamber is 1 sccm to 10000 sccm.

11. The process method of the furnace tube as described in claim 10, characterized in that, The parameters of the furnace tube correspondingly form the film layer with the maximum thickness.

12. The process method of the furnace tube as described in claim 1, characterized in that, After obtaining the thickness of the film layer and before placing the adjustment wafer, it further includes: comparing the thickness of the film layer with the thickness of a preset film layer; when the thickness of the film layer is greater than the preset film layer, placing the adjustment wafer into the gap groove corresponding to the product wafer.