Passive phased array row and column phase extraction method and system

Abstract

The invention discloses a passive phased array row and column phase extraction method and system, and the method comprises the steps: carrying out the line-by-line and column-by-column far-field optimization through controlling a passive phased array with a far-field array and a maximum gain value as optimization targets, and obtaining a maximum gain phase matrix; performing increment control by taking the maximum gain phase matrix as a 0-degree matrix, and recording corresponding far field and gain phase values after each increment to obtain a large VP matrix; initializing the row and column phases of the large VP matrix; 0-360-degree phase traversal is carried out on each row and column of the large VP matrix in sequence, amplitude and phase data are stored at the same time, non-test row and column phases of the large VP matrix are adjusted step by step, 0-360-degree phase traversal is carried out on each row and column of the large VP matrix in sequence, and amplitude and phase data are stored at the same time. According to the passive phased array row and column phase extraction method and system provided by the invention, the precision of phase adjustment and the integrity of data storage can be improved, so that the requirement of complex signal processing is met.

Description

Technical Field

[0001] This application relates to the technical field of passive phased array signal processing, and particularly to a method and system for extracting row and column phases of a passive phased array. Background Art

[0002] A passive phased array is a phased array technology that does not rely on an external power source for phase control. Usually, by utilizing the natural radiation characteristics of the antenna array, beam control and adjustment can be achieved. This technology has important applications in fields such as radar, communication, and radio wave detection. In a passive phased array system, precise adjustment of the phase of the array and data storage are the keys to achieving specific signal processing tasks.

[0003] Traditional passive phased array phase adjustment methods usually adopt a point-by-point adjustment method, and the phase of each array element is adjusted manually or through a simple automation program. This method is not only inefficient, but also due to the lack of a systematic optimization strategy and the relatively close distance between the probe and the antenna, the adjusted phase accuracy and accuracy are often insufficient, resulting in its inability to meet the requirements of complex signal processing. In addition, traditional methods also have defects in data storage, and can only record limited phase data, unable to comprehensively reflect the phase characteristics of the array under different working conditions.

[0004] In summary, the traditional passive phased array phase adjustment method has the following defects:

[0005] 1. Low phase adjustment accuracy: Traditional methods are difficult to accurately adjust the phase and extract data, resulting in poor signal processing effects;

[0006] 2. Incomplete data storage: Unable to comprehensively record phase data, which is not conducive to subsequent analysis and optimization;

[0007] 3. Lack of systematicness: There is no complete set of processes and methods, and it is unable to effectively guide practical applications. Summary of the Invention

[0008] Therefore, this application provides a method and system for extracting row and column phases of a passive phased array to solve the problems of low adjustment accuracy and incomplete data storage existing in the passive phased array phase adjustment method of the prior art.

[0009] To achieve the above object, this application provides the following technical solutions:

[0010] In a first aspect, a method for extracting row and column phases of a passive phased array includes:

[0011] Step 1: Control the passive phased array to perform row-by-row and column-by-column far-field optimization with the far-field array and the maximum gain as the optimization targets, and obtain the maximum gain phase matrix;

[0012] Step 2: Perform incremental control with the maximum gain phase matrix as the 0-degree matrix, and record the corresponding far-field and gain phase values after each increment to obtain the large VP matrix;

[0013] Step 3: Initialize the row phases of the large VP matrix;

[0014] Step 4: Perform a 0-to-360-degree phase traversal on each row of the large VP matrix in sequence, while storing amplitude and phase data, and gradually adjust the non-test row phases of the large VP matrix. Then, perform a 0-to-360-degree phase traversal on each row of the large VP matrix in sequence again, while storing amplitude and phase data;

[0015] Step 5: Initialize the column phases of the large VP matrix;

[0016] Step 6: Perform a 0-to-360-degree phase traversal on each column of the large VP matrix in sequence, while storing amplitude and phase data, and gradually adjust the non-test column phases of the large VP matrix. Then, perform a 0-to-360-degree phase traversal on each column of the large VP matrix in sequence again, while storing amplitude and phase data.

[0017] Preferably, in Step 1, when controlling the passive phased array to perform far-field optimization row by row and column by column with the far-field array and maximum gain as the optimization targets, the element phases are traversed from 0 to 360 degrees row by row and column by column.

[0018] Preferably, Step 1 is specifically as follows:

[0019] Step 101: Control the voltage codes of each row of the passive phased array to gradually increase from phase 0 to phase 360 in sequence, and through far-field testing, find the optimal voltage code for each row;

[0020] Step 102: Control the voltage codes of each column of the passive phased array to gradually increase from phase 0 to phase 360 in sequence, and through far-field testing, find the optimal voltage code for each column;

[0021] Step 103: Obtain the maximum gain phase matrix based on the optimal voltage code for each row and the optimal voltage code for each column.

[0022] Preferably, in Step 2, during the process of performing incremental control with the maximum gain phase matrix as the 0-degree matrix, if the voltage code of an element exceeds the voltage code setting value after the increase, perform a modulo operation on the voltage code.

[0023] Preferably, in Step 4, when gradually adjusting the non-test row phases of the large VP matrix, the phase is increased by 22.5 degrees each time.

[0024] Preferably, in step 4, when performing a 0 to 360-degree phase traversal on each row of the large VP matrix in sequence, far-field amplitude-phase data is collected simultaneously, and based on the far-field amplitude-phase data, the phase of each row is calculated in reverse.

[0025] Preferably, in step 6, when gradually adjusting the phase of each non-test column of the large VP matrix, the phase is increased by 22.5 degrees each time.

[0026] In a second aspect, a passive phased array row-column phase extraction system includes:

[0027] A gain optimization module, configured to control the passive phased array to perform far-field optimization row by row and column by column with the far-field array and the maximum gain as the optimization targets, and obtain a maximum gain phase matrix;

[0028] A test module, configured to perform incremental control with the maximum gain phase matrix as the 0-degree matrix, and record the phase values of the far field and the gain corresponding to each increment, to obtain a large VP matrix;

[0029] A row initialization module, configured to initialize the row phase of the large VP matrix;

[0030] A row phase traversal and storage module, configured to perform a 0 to 360-degree phase traversal on each row of the large VP matrix in sequence, store amplitude and phase data simultaneously, gradually adjust the non-test row phase of the large VP matrix, and then perform a 0 to 360-degree phase traversal on each row of the large VP matrix in sequence, store amplitude and phase data simultaneously;

[0031] A column initialization module, configured to initialize the column phase of the large VP matrix;

[0032] A column phase traversal and storage module, configured to perform a 0 to 360-degree phase traversal on each column of the large VP matrix in sequence, store amplitude and phase data simultaneously, gradually adjust the non-test column phase of the large VP matrix, and then perform a 0 to 360-degree phase traversal on each column of the large VP matrix in sequence, store amplitude and phase data simultaneously.

[0033] In a third aspect, a computer device includes a memory and a processor, the memory stores a computer program, and when the processor executes the computer program, the steps of a passive phased array row-column phase extraction method are implemented.

[0034] In a fourth aspect, a computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of a passive phased array row-column phase extraction method are implemented.

[0035] Compared with the prior art, the present application has at least the following beneficial effects:

[0036] The present application provides a method and system for extracting row and column phases of a passive phased array. By controlling the passive phased array to perform far-field optimization row by row and column by column with the far-field array and the maximum gain as the optimization targets, a maximum gain phase matrix is obtained; using the maximum gain phase matrix as the 0-degree matrix for incremental control, and recording the phase values of the far field and the gain corresponding to each increment, a large VP matrix is obtained; initializing the row and column phases of the large VP matrix; sequentially traversing the phases of each row and each column of the large VP matrix from 0 to 360 degrees, while storing the amplitude and phase data, and gradually adjusting the phases of the non-test rows and non-test columns of the large VP matrix, and then sequentially traversing the phases of each row and each column of the large VP matrix from 0 to 360 degrees, while storing the amplitude and phase data. The method for extracting row and column phases of a passive phased array provided by the present application can improve the accuracy of phase adjustment and the integrity of data storage, so as to meet the requirements of complex signal processing. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] To more intuitively illustrate the prior art and the present application, exemplary drawings are given below. It should be understood that the specific shapes and structures shown in the drawings generally should not be regarded as limiting conditions when implementing the present application; for example, those skilled in the art are capable of making routine adjustments or further optimizations to the addition / removal / attribution division of certain units (components), specific shapes, positional relationships, connection methods, dimensional proportional relationships, etc. based on the technical concept disclosed in the present application and the exemplary drawings.

[0038] Figure 1 FIG. is a basic flowchart of a method for extracting row and column phases of a passive phased array provided in Embodiment 1 of the present application;

[0039] Figure 2 FIG. is a calibration flowchart of a method for extracting row and column phases of a passive phased array provided in Embodiment 1 of the present application;

[0040] Figure 3 FIG. is a schematic diagram showing the influence of row phase traversal on the normal amplitude at different matrices [A] provided in Embodiment 1 of the present application;

[0041] Figure 4 FIG. is a schematic diagram showing the influence of row phase traversal on the normal phase at different matrices [A] provided in Embodiment 1 of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0042] The following further details the present application through specific embodiments in conjunction with the drawings.

[0043] In the description of this application: Unless otherwise specified, "a plurality of" means two or more. Terms such as "first", "second", "third", etc. in this application are intended to distinguish the objects being referred to, and do not have special significance in terms of technical connotations (for example, it should not be understood as emphasizing importance or order, etc.). Expressions such as "including", "comprising", "having", etc. also mean "not limited to" (certain units, components, materials, steps, etc.).

[0044] Terms such as "upper", "lower", "left", "right", "middle", etc. cited in this application are usually indications of the general relative position relationship for the convenience of intuitive understanding with reference to the drawings, and are not absolute limitations on the position relationship in the actual product.

[0045] Embodiment 1

[0046] Please refer to Figure 1 and Figure 2 , this embodiment provides a method for extracting row and column phases of a passive phased array, including:

[0047] S1: Control the passive phased array to perform far-field optimization row by row and column by column with the far-field array and the maximum gain as the optimization targets, and obtain the maximum gain phase matrix;

[0048] This step requires performing row and column gain optimization operations to prepare for subsequent phase adjustment and data processing. During row and column gain, the phase of each array element is traversed from 0 to 360 degrees row by row and column by column, with the far-field array and the maximum gain as the optimization targets, to find the phase matrix with the maximum array gain (i.e., the maximum gain phase matrix), and subsequent adjustments are made based on this. Specifically included are:

[0049] S101: Control the voltage code of each row of the passive phased array to gradually increase from phase 0 to phase 360 in sequence, and through far-field testing, find the optimal voltage code for each row;

[0050] More specifically, increase the voltage code of the first row from phase 0 to phase 360, and through far-field testing, find the voltage code corresponding to the maximum far-field level (optimal voltage code);

[0051] Based on the optimal voltage code of the first row, increase the voltage code of the second row from phase 0 to phase 360, and through far-field testing, find the voltage code corresponding to the maximum far-field level;

[0052] Based on the optimal voltage codes of the first and second rows, increase the voltage code of the third row from phase 0 to phase 360, and through far-field testing, find the voltage code corresponding to the maximum far-field level;

[0053] And so on:......

[0054] Until the optimization of the last line is completed, thus completing the far-field optimization line by line.

[0055] S102: Sequentially control the voltage code of each column of the passive phased array to gradually increase from phase 0 to phase 360, and through far-field testing, find the optimal voltage code for each column;

[0056] Specifically, based on the optimal voltage codes of all rows:

[0057] Gradually increase the voltage code of the first column from phase 0 to phase 360, and through far-field testing, find the voltage code corresponding to the maximum far-field level (optimal voltage code);

[0058] Based on the optimal voltage code of the first column, gradually increase the voltage code of the second column from phase 0 to phase 360, and through far-field testing, find the voltage code corresponding to the maximum far-field level;

[0059] Based on the optimal voltage codes of the first and second columns, gradually increase the voltage code of the third column from phase 0 to phase 360, and through far-field testing, find the voltage code corresponding to the maximum far-field level;

[0060] And so on: ……

[0061] Until the optimization of the last column is completed, thus completing the far-field optimization column by column.

[0062] S103: Obtain the maximum gain phase matrix according to the optimal voltage code of each row and the optimal voltage code of each column.

[0063] Through the above two steps S101 and S102, the row-column optimization can be completed. For example: for a P-row Q-column antenna array, the row-column matrix formed by the voltage codes after row-column optimization, that is, the maximum gain phase matrix is denoted as matrix [A0]:

[0064]

[0065] S2: Perform incremental control with the maximum gain phase matrix as the 0-degree matrix, and record the far-field and gain phase values corresponding to each increment to obtain the large VP matrix;

[0066] In this step, the initialization matrix of the maximum gain phase matrix is used as the 0-degree matrix of the entire array (i.e., taking the maximum gain phase matrix as the starting point, which is the 0-degree matrix). Incremental control is uniformly applied to all array elements within this matrix (for example: if the original matrix is [A], then the next matrix is [A + 1], and the next one is [A + 2]... until the increment reaches the maximum value). Record the corresponding far-field and gain phase values after each increment. Traverse the large table of the matrix and the collected phases, denoted as the large VP. By performing the large VP test in this step, the performance and stability of the system can be verified.

[0067] During the process of incremental control in this step, if the voltage code of an array element exceeds the set value of the voltage code after the increase, a modulo operation is performed on the voltage code. For example: when the set value of the voltage code (i.e., the maximum value of the voltage code) is 256, matrices [A1][A2]...[A255] are generated based on matrix [A0], where:

[0068]

[0069] In matrix [An], if the voltage code of a certain unit is greater than 256, then take the modulo. For example: if PQ + n - 1 = 258, then its actual value is 258 - 256 = 2.

[0070] Then, traverse and input the phase codes for the entire column, collect the signal phase through the far field, and perform normalization processing of the collected phases with the first row as the reference (for example: when the voltage matrix ranges from A0 to A255 and the far-field collected phase values are 169, 172, 176..., after performing normalization processing of the phases with the first row as the reference, the generated Φ0, Φ1, Φ2... are 0, 3, 5... respectively), thereby generating the large VP matrix:

[0071]

[0072] As can be seen from the above formula, the first column of the large VP matrix is the voltage code matrix, and the second column is the phase value.

[0073] S3: Initialize the row phases of the large VP matrix;

[0074] Specifically, initialize the row phases of the large VP matrix to zero to ensure the accuracy of subsequent phase adjustments.

[0075] S4: Perform a 0 to 360-degree phase traversal on each row of the large VP matrix in sequence, store the amplitude and phase data simultaneously, and gradually adjust the non-test row phases of the large VP matrix. Then, perform a 0 to 360-degree phase traversal on each row of the large VP matrix in sequence again, and store the amplitude and phase data simultaneously;

[0076] In this step, a 0 - to - 360 - degree phase traversal operation is performed on each row in sequence, and the phase value is gradually adjusted. When gradually adjusting the phase value, the phases of the array are set to 22.5 degrees (i.e., within the large VP, the matrix corresponding to the phase 22.5 degrees larger than the phase of the original matrix [A]), 45 degrees, 67.5 degrees, 90 degrees... 337.5 degrees, so as to prepare for the next phase traversal. During the phase traversal process, temporary phase data is stored for subsequent analysis and processing. Specifically, it includes:

[0077] S401: When Φ = 0 in the large VP matrix, find the corresponding matrix [A]; because Φ has been normalized, when Φ = 0, [A] = [A0]; in the matrix [A0], except for the first row from which the phase is to be extracted, the other voltage codes remain unchanged. For the voltage code of the first row, the increment ranges from 0 to 256. If it exceeds 255 during the increment process, take the modulus. Complete the code traversal of the first row under the [A0] matrix, and the traversed code matrix is:

[0078]

[0079] Specifically, while traversing the code matrix, collect the far - field amplitude - phase data, and based on the far - field data, inversely calculate the phase of this row. For example: for a 16 * 8 array antenna, when collecting the minimum far - field amplitude value, the phase of this row is inversely superimposed with the phases of the other rows. That is, when the far - field amplitude is at the minimum value, the phase of this row is 180 degrees; when the phase appears at the first maximum value, the phase of this row is 94 degrees, and when the subsequent minimum value appears, the phase of this row is 266 degrees.

[0080] S402: When Φ = 22.5 in the large VP matrix, find the corresponding matrix A i ; in the matrix A i except for the first row from which the phase is to be extracted, the other voltage codes remain unchanged. For the voltage code of the first row, the increment ranges from 0 to 256. If it exceeds 255 during the increment process, take the modulus, thereby completing the code traversal of the first row under the A i matrix;

[0081] Specifically, while traversing the code matrix, collect the far - field amplitude - phase data, and based on the far - field data, inversely calculate the phase of this row. For example: for a 16 * 8 array antenna, when collecting the minimum far - field amplitude value, the phase of this row is inversely superimposed with the phases of the other rows. That is, when the far - field amplitude is at the minimum value, the phase of this row is 180 + 22.5 = 202.5 degrees; when the phase appears at the first maximum value, the phase of this row is 94 + 22.5 = 116.5 degrees, and when the subsequent minimum value appears, the phase of this row is 266 + 22.5 = 288.5 degrees.

[0082] S403: Based on the same method as in S401 to S402, find the matrices corresponding to Φ = 45, 67.5, ……, 337.5 in the large VP matrix, and calculate the actual phase shift corresponding to the different voltage codes in the first row of the corresponding matrix, so as to obtain the phase data of the first row.

[0083] Based on the same method above, perform row phase traversal and storage on the second row, third row, fourth row, ……, last row, so as to obtain the actual phase shift corresponding to the different voltage codes in the remaining rows. In this embodiment, the schematic diagram of the influence of row phase traversal on the normal amplitude and normal phase when different matrices [A] are involved can be seen in Figure 3 and Figure 4 .

[0084] S5: Initialize the column phase of the large VP matrix;

[0085] Specifically, in this step, the column phase of the large VP matrix is initialized to zero, so as to ensure the accuracy of subsequent phase adjustment.

[0086] S6: Perform 0 to 360 - degree phase traversal on each column of the large VP matrix in turn, store the amplitude and phase data at the same time, and gradually adjust the non - test column phase of the large VP matrix. Then perform 0 to 360 - degree phase traversal on each column of the large VP matrix in turn again, and store the amplitude and phase data at the same time.

[0087] Specifically, the method of extracting column - by - column phase is the same as the method of extracting row - by - row phase, which will not be elaborated here. After the phase traversal and data storage operations for all rows and columns are completed, the process ends.

[0088] In this embodiment, according to the far - field synthesis theory, when the phase of a certain row or column is 180° different from the phases of the remaining arrays, the synthesis gain is the smallest. Therefore, by changing the overall array phase and combining with the minimum value of the far - field synthesis gain, the accurate phase of this row or column within the array can be calculated. For the discrete array phase, the discrete phase distributions of multiple such rows or columns can be tested and calculated. Through the tested discrete phase distributions, the 0 - 360 - degree phase distribution of this row or column can be simulated. This testing method is all valid phases, that is, the real phases within the array, which has guiding significance for antenna calibration.

[0089] This embodiment can also extract the phases of m rows and n columns, and through relevant convolution, obtain the unit VP curve of the m - th row and n - th column, so as to realize the full calibration of the array.

[0090] A method for extracting row and column phases of a passive phased array provided in this embodiment can improve the accuracy of phase adjustment and the integrity of data storage, so as to meet the requirements of complex signal processing. Specifically:

[0091] 1. High phase adjustment accuracy: By traversing and storing the phase row by row and column by column, the phase of each array element can be precisely adjusted, significantly improving the phase adjustment accuracy.

[0092] 2. Complete data storage: During the phase traversal process, the phase data of each array element is comprehensively recorded, providing rich data support for subsequent analysis and optimization.

[0093] 3. Introduced large VP testing to ensure the performance and stability of the system, providing a reliable guarantee for phase adjustment.

[0094] 4. Through the gradual adjustment and data storage of the array phase, comprehensive calibration of the passive phased array is achieved, improving the signal processing effect.

[0095] 5. Strong systematicness: A complete set of processes and methods is formed, which can effectively guide practical applications and improve work efficiency.

[0096] Embodiment 2

[0097] [[ID=IO=18]]This embodiment provides a passive phased array row-column phase extraction system, including:

[0098] A gain optimization module, used to control the passive phased array to perform row-by-row and column-by-column far-field optimization with the far-field array and the maximum gain as the optimization targets, and obtain the maximum gain phase matrix.

[0099] A testing module, used to perform incremental control with the maximum gain phase matrix as the 0-degree matrix, and record the phase values of the far field and gain corresponding to each increment to obtain the large VP matrix.

[0100] A row initialization module, used to initialize the row phase of the large VP matrix.

[0101] A row phase traversal and storage module, used to sequentially perform 0 to 360-degree phase traversal on each row of the large VP matrix, while storing the amplitude and phase data, and gradually adjust the non-test row phase of the large VP matrix, and then sequentially perform 0 to 360-degree phase traversal on each row of the large VP matrix, while storing the amplitude and phase data.

[0102] A column initialization module, used to initialize the column phase of the large VP matrix.

[0103] A column phase traversal and storage module, used to sequentially perform 0 to 360-degree phase traversal on each column of the large VP matrix, while storing the amplitude and phase data, and gradually adjust the non-test column phase of the large VP matrix, and then sequentially perform 0 to 360-degree phase traversal on each column of the large VP matrix, while storing the amplitude and phase data.

[0104] For the specific implementation content of each module in a passive phased array row-column phase extraction system, reference can be made to the limitations on a passive phased array row-column phase extraction method in the above text, which will not be elaborated here.

[0105] Embodiment III

[0106] This embodiment provides a computer device, including a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, the steps of a passive phased array row-column phase extraction method are implemented.

[0107] Embodiment IV

[0108] This embodiment provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of a passive phased array row-column phase extraction method are implemented.

[0109] The technical features of the above embodiments can be combined arbitrarily (as long as there is no contradiction in the combination of these technical features). For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described; these embodiments not explicitly written out should also be considered to be within the scope described in this specification.

Claims

1. A passive phased array row-column phase extraction method, characterized in that Including: Step 1: Control the passive phased array to perform row-by-row and column-by-column far-field optimization with the far-field array and the maximum gain as the optimization targets, and obtain the maximum gain phase matrix; Step 2: Perform incremental control with the maximum gain phase matrix as the 0-degree matrix, and record the phase values of the far field and the gain corresponding to each increment to obtain the large VP matrix; Step 3: Initialize the row phases of the large VP matrix; Step 4: Sequentially perform 0 to 360-degree phase traversals on each row of the large VP matrix, while storing amplitude and phase data, and gradually adjust the non-test row phases of the large VP matrix. Then, sequentially perform 0 to 360-degree phase traversals on each row of the large VP matrix, while storing amplitude and phase data; Step 5: Initialize the column phases of the large VP matrix; Step 6: Sequentially perform 0 to 360-degree phase traversals on each column of the large VP matrix, while storing amplitude and phase data, and gradually adjust the non-test column phases of the large VP matrix. Then, sequentially perform 0 to 360-degree phase traversals on each column of the large VP matrix, while storing amplitude and phase data.

2. The passive phased array row-column phase extraction method according to claim 1, characterized in that In Step 1, when controlling the passive phased array to perform row-by-row and column-by-column far-field optimization with the far-field array and the maximum gain as the optimization targets, traverse the element phases from 0 to 360 degrees row by row and column by column.

3. The passive phased array row-column phase extraction method according to claim 2, wherein Step 1 is specifically: Step 101: Sequentially control the voltage codes of each row of the passive phased array to gradually increase from phase 0 to phase 360, and through far-field testing, find the optimal voltage code for each row; Step 102: Sequentially control the voltage codes of each column of the passive phased array to gradually increase from phase 0 to phase 360, and through far-field testing, find the optimal voltage code for each column; Step 103: Obtain the maximum gain phase matrix according to the optimal voltage code for each row and the optimal voltage code for each column.

4. The passive phased array row-column phase extraction method according to claim 1, characterized in that In Step 2, during the process of performing incremental control with the maximum gain phase matrix as the 0-degree matrix, if the voltage code of an element exceeds the voltage code setting value after the increase, perform a modulo operation on the voltage code.

5. The passive phased array row-column phase extraction method according to claim 1, characterized in that In Step 4, when gradually adjusting the non-test row phases of the large VP matrix, the phase is increased by 22.5 degrees each time.

6. The passive phased array row-column phase extraction method according to claim 1, characterized in that In Step 4, when sequentially performing 0 to 360-degree phase traversals on each row of the large VP matrix, collect far-field amplitude-phase data at the same time, and based on the far-field amplitude-phase data, inversely calculate the phase of each row.

7. The passive phased array row-column phase extraction method according to claim 1, wherein In Step 6, when gradually adjusting the non-test column phases of each column of the large VP matrix, the phase is increased by 22.5 degrees each time.

8. A passive phased array row-column phase extraction system, characterized in that, Including: A gain optimization module, used to control the passive phased array to perform row-by-row and column-by-column far-field optimization with the far-field array and the maximum gain as the optimization targets, and obtain the maximum gain phase matrix; A test module, used to perform incremental control with the maximum gain phase matrix as the 0-degree matrix, and record the phase values of the far field and the gain corresponding to each increment to obtain the large VP matrix; A row initialization module, used to initialize the row phases of the large VP matrix; A row phase traversal storage module, which is used to perform a 0 to 360-degree phase traversal on each row of the large VP matrix in sequence, store amplitude and phase data simultaneously, gradually adjust the phase of the non-test rows of the large VP matrix, and then perform a 0 to 360-degree phase traversal on each row of the large VP matrix in sequence, while storing amplitude and phase data; A column initialization module, which is used to initialize the column phase of the large VP matrix; A column phase traversal storage module, which is used to perform a 0 to 360-degree phase traversal on each column of the large VP matrix in sequence, store amplitude and phase data simultaneously, gradually adjust the phase of the non-test columns of the large VP matrix, and then perform a 0 to 360-degree phase traversal on each column of the large VP matrix in sequence, while storing amplitude and phase data.

9. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the method according to any one of claims 1 to 7.

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