Device test circuit and device test method

Abstract

The invention discloses a device test circuit and a device test method, and belongs to the technical field of semiconductors. In the embodiment of the invention, the target device is driven to be switched on through the driving control circuit, and under the condition that the target device is switched on, the target device is controlled to work in the linear region through the power supply control circuit. When a target device works in a linear region, by taking the MOS tube as an example, the MOS tube working in the linear region can correspondingly generate large drain-source current under the action of large drain-source voltage. Therefore, the target device can bear large voltage and large current for a certain time at the same time by testing the current through the device, so that the target device is subjected to large thermal stress, the junction temperature of the target device is rapidly improved, the junction temperature can reach 200 DEG C or above, and deep defects in the device can be found. And the large current generated by the target device working in the linear region is far smaller than the current used when the device is screened in a large current mode, so that complicated heat dissipation equipment is not needed correspondingly.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of semiconductor technology, and in particular to a device testing circuit and a device testing method. Background Art

[0002] To improve the reliability of electronic products, it is usually necessary to test semiconductor power devices such as insulated gate bipolar transistors (IGBTs) and metal-oxide-semiconductor field-effect transistors (MOSFETs) to screen out semiconductor power devices that meet the requirements.

[0003] Related technologies can test semiconductor power devices using high voltage or high current methods. However, these testing methods can only raise the device's junction temperature to 175°C, preventing the detection of deeper defects within the device. Furthermore, high current methods require external heat sinks to dissipate the heat from components carrying high currents, complicating the testing process. Summary of the Invention

[0004] The present invention provides a device testing circuit and device testing method that can not only increase the junction temperature of semiconductor power devices to detect deep defects within the devices, but also eliminate the need for complex heat dissipation equipment. The technical solution is as follows:

[0005] In a first aspect, a device test circuit is provided, comprising a power supply control circuit 1 and a drive control circuit 2. The first output terminal of the drive control circuit 2 is connected to the control terminal of a target device, and the second output terminal of the drive control circuit 2 is connected to the first conduction terminal of the target device. The output terminal of the power supply control circuit 1 is connected to the first conduction terminal of the target device, where the target device is a semiconductor power device to be tested. The drive control circuit 2 is configured to drive the target device to conduct and output the conduction threshold voltage of the target device to a voltage tester. The power supply control circuit 1 is configured to apply a reference voltage to the first conduction terminal of the target device when the target device is conducting, thereby controlling a linear relationship between the current at the second conduction terminal and the voltage at the first conduction terminal of the target device.

[0006] There is a linear relationship between the current at the second conducting end and the voltage at the first conducting end of the control target device, that is, the control target device is controlled to operate in a linear region.

[0007] In the embodiment of the present application, the semiconductor power device is driven to conduct by the drive control circuit. When the semiconductor power device is conducting, the power supply control circuit is used to control the semiconductor power device to operate in the linear region. When the semiconductor power device operates in the linear region, taking the MOS transistor as an example, the MOS transistor operating in the linear region can generate a large drain-source current under the action of a large drain-source voltage. Therefore, by testing the current of this device, the MOS transistor can withstand a large voltage and a large current for a certain period of time, thereby causing the MOS transistor to be subjected to a large thermal stress, and thus rapidly increasing the junction temperature of the MOS transistor. The junction temperature can reach above 200 °C to discover deep defects inside the device. And the large current generated by the MOS transistor operating in the linear region is much smaller than the current used when screening devices by the large current method. Accordingly, there is no need for a complex heat dissipation device.

[0008] Based on the circuit provided in the first aspect, in a possible implementation manner, the power supply control circuit 1 includes a first driver 11 and a power supply control switch 12; the output end of the first driver 11 is connected to the control end of the power supply control switch 12. The input end of the power supply control switch 12 is used to connect to the first voltage source, the first power supply is used to output a reference voltage, and the output end of the power supply control switch 12 is used to connect to the first conduction end of the target device; the first driver 11 is used to drive the power supply control switch to close or open.

[0009] By the first driver 11, the power supply control switch 12 can be controlled to close, so that when the target device is conducting, the power supply control circuit 1 can be used to control the target device to operate in the linear region. And the on-off of the power supply control switch 12 can also be used to control the duration of the reference voltage applied to the first conduction end of the target device, that is, to control the duration of applying a large voltage and a large current to the target device at the same time, thereby improving the device screening effect.

[0010] Based on the circuit provided in the first aspect, in a possible implementation manner, the drive control circuit 2 includes a second driver 21, a first resistor 22, a second resistor 23, and a first diode 24; the output end of the second driver 21 is connected to one end of the first resistor 22. The other end of the first resistor 22 is respectively connected to one end of the second resistor 23 and the anode end of the first diode 24. The cathode end of the first diode 24 is used to connect to the first conduction end of the target device, the other end of the second resistor 23 is used to connect to the second voltage source, and the other end of the first resistor 22 is also used to connect to the control end of the target device; the position between the first resistor and the second resistor is used to output the conduction threshold voltage to the voltage tester.

[0011] Among them, the position between the first resistor and the second resistor is used to output the conduction threshold voltage (abbreviated as Vth) to the voltage tester. In other words, the Vth of the target device can be obtained by testing the voltage at the position between the first resistor and the second resistor. Therefore, the first resistor 22, the second resistor 23, and the first diode 24 can also be referred to as the Vth feedback circuit.

[0012] Based on the circuit provided in the first aspect, in a possible implementation, the device test circuit further includes a current regulation circuit 3. One end of the current regulation circuit 3 is connected to the other end of the first resistor 22, and the other end of the current regulation circuit 3 is connected to the anode of the first diode 24; the current regulation circuit is used to regulate the current at the anode of the first diode.

[0013] The current regulation circuit 3 can reduce the current input to the anode of the first diode, that is, reduce the current input to the first conduction end of the target device, thereby avoiding excessive current at the second conduction end of the target device when testing the conduction threshold voltage.

[0014] Based on the circuit provided in the first aspect, in a possible implementation, the current regulation circuit 3 includes a third resistor 31 and a first transistor 32; the other end of the first resistor 22 is connected to one end of the third resistor 31, and the other end of the first resistor 22 is also connected to the first conduction end of the first transistor 32. The second conduction end of the first transistor 32 is connected to the other end of the second resistor 23, and the control end of the first transistor 32 and the other end of the third resistor 31 are both connected to the anode of the first diode 24.

[0015] Among them, the first transistor 32 is used to shunt the current output by the first resistor 22, thereby reducing the current input to the first diode 24.

[0016] Based on the circuit provided in the first aspect, in a possible implementation, the device test circuit further includes a drive amplifier circuit 4. One end of the drive amplifier circuit 4 is connected to the other end of the first resistor 22, and the other end of the drive amplifier circuit 4 is used to connect to the control end of the target device; the drive amplifier circuit 4 is used to amplify the current at the control end of the target device.

[0017] The drive amplifier circuit 4 is used to amplify the current at the control end of the target device, thereby improving the response speed of the control end of the target device to the applied voltage. In other words, the voltage can be quickly applied to the control end of the target device through the drive amplifier circuit.

[0018] Based on the circuit provided in the first aspect, in a possible implementation, the drive amplification circuit 4 includes a second transistor 41 and a third transistor 42; the other end of the first resistor 22 is respectively connected to the control terminals of the second transistor 41 and the third transistor 42, the first conduction end of the second transistor 41 is used to connect to the third voltage source, the second conduction end of the second transistor 41 is connected to the first conduction end of the third transistor 42, the second conduction end of the third transistor 42 is used to connect to the fourth voltage source, and the second conduction end of the second transistor 41 is also used to connect to the control terminal of the target device.

[0019] In the embodiments of the present application, the current input to the control terminal of the target device can be amplified by two serially connected transistors, thereby increasing the speed of loading the voltage to the control terminal of the target device.

[0020] Based on the circuit provided in the first aspect, in a possible implementation, the device test circuit further includes a leakage test circuit 5, and the output terminal of the leakage test circuit 5 is used to connect to the first conduction end of the target device; the leakage test circuit is used to load a reference current to the first conduction end of the target device to test the leakage current of the second conduction end of the target device.

[0021] In the embodiments of the present application, the leakage current of the target device can also be tested through the device test circuit.

[0022] Based on the circuit provided in the first aspect, in a possible implementation, the leakage test circuit 5 includes a third diode 51; the anode terminal of the third diode 51 is used to connect to the current source, the cathode terminal of the third diode 51 is used to connect to the first conduction end of the target device; the current source is used to output a reference current.

[0023] The reference current output by the current source can be loaded to the first conduction end of the target device through the third diode 51 to test the leakage current of the target device.

[0024] Based on the circuit provided in the first aspect, in a possible implementation, the device test circuit further includes a second diode 6, the anode terminal of the second diode 6 is connected to the output terminal of the power supply control circuit 1, and the cathode terminal of the second diode 6 is used to connect to the first conduction end of the target device.

[0025] The second diode 6 can prevent the current of the current source from flowing to the power supply control circuit when testing the leakage current, so the second diode 6 is also called an anti - reverse diode.

[0026] In a second aspect, a device testing method is provided, which is applicable to any device testing circuit provided in the first aspect. In this method, the device testing circuit is controlled to operate in a first state, a second state, and the first state in sequence, and the physical parameters of the target device in each state are collected respectively; wherein the first state is when the drive control circuit drives the target device to conduct and the power control circuit does not apply a reference voltage to the target device, and the second state is when the drive control circuit drives the target device to conduct and the power control circuit applies a reference voltage to the target device.

[0027] When the device test circuit operates in the first state, the target device is in the Vth real-time test state. When the device test circuit operates in the second state, the target device operates in the linear region, that is, enters the linear conduction region. Therefore, the method provided by the embodiment of the present application can control the target device to operate in the linear region for a period of time after the target device has been in the Vth real-time test state for a period of time, and then return to the Vth real-time test state. This allows the target device's physical parameters to be tested for changes after being subjected to the impact power shock, and then, based on the changes, determines whether there are defects inside the target device, thereby achieving screening of the target device.

[0028] Based on the method provided in the second aspect, in one possible implementation, the physical parameters of the target device include one or more of the voltage of the control terminal of the target device, the voltage of the first conduction terminal of the target device, and the current of the second conduction terminal of the target device.

[0029] After the above physical parameters are collected, they can be analyzed to discover defects in the target device.

[0030] Based on the method provided in the second aspect, in one possible implementation, in the first state, the second driver outputs a third voltage signal to drive the target device to turn on, and the first driver outputs a second voltage signal to drive the power control switch to turn off; in the second state, the second driver outputs a third voltage signal to drive the target device to turn on, and the first driver outputs a first voltage signal to drive the power control switch to close.

[0031] In the embodiment of the present application, the device test circuit can be controlled to operate in different states by controlling the voltage signals output by the first driver and the second driver.

[0032] Based on the method provided in the second aspect, in one possible implementation, the control device test circuit operates in a third state, and collects physical parameters of the target device in the third state; wherein, the third state is that the drive control circuit controls the target device to be cut off, the power supply control circuit does not load a reference voltage to the target device, and the leakage test circuit loads a reference current to the target device.

[0033] In the embodiments of the present application, the leakage of the target device can be tested by operating the device test circuit in the third state.

[0034] In a third aspect, a device test apparatus is provided, and the device test apparatus has a function of implementing the behavior of the device test method in the second aspect above. The device test apparatus includes at least one module, and the at least one module is used to implement the device test method provided in the second aspect above.

[0035] In a fourth aspect, a device test apparatus is provided. The structure of the device test apparatus includes a processor and a memory. The memory is used to store a program for supporting the device test apparatus to execute the device test method provided in the second aspect above, and to store data related to implementing the device test method provided in the second aspect above. The processor is configured to execute the program stored in the memory.

[0036] In a fifth aspect, a computer-readable storage medium is provided. Instructions are stored in the computer-readable storage medium, and when it runs on a computer, the computer is caused to execute the device test method described in the second aspect above.

[0037] In a sixth aspect, a computer program product containing instructions is provided. When it runs on a computer, the computer is caused to execute the device test method described in the second aspect above.

[0038] The technical effects obtained by the corresponding technical means in the third to sixth aspects above are similar to the technical effects of the second aspect, and will not be elaborated here. Description of the Drawings

[0039] Figure 1 is a schematic diagram of a device test circuit provided by an embodiment of the present application;

[0040] Figure 2 is a schematic diagram of a power control circuit 1 provided by an embodiment of the present application;

[0041] Figure 3 is a schematic diagram of another power control circuit 1 provided by an embodiment of the present application;

[0042] Figure 4 is a schematic diagram of a drive control circuit 2 provided by an embodiment of the present application;

[0043] Figure 5 is a schematic diagram of another device test circuit provided by an embodiment of the present application;

[0044] Figure 6 is a schematic diagram of a current regulation circuit 3 provided by an embodiment of the present application;

[0045] Figure 7 It is a schematic diagram of another device test circuit provided by an embodiment of the present application;

[0046] Figure 8 It is a schematic diagram of a driving and amplifying circuit 4 provided by an embodiment of the present application;

[0047] Figure 9 It is a schematic diagram of another device test circuit provided by an embodiment of the present application;

[0048] Figure 10 It is a schematic diagram of a leakage test circuit 5 provided by an embodiment of the present application;

[0049] Figure 11 It is a schematic diagram of another device test circuit provided by an embodiment of the present application;

[0050] Figure 12 It is a schematic diagram of another device test circuit provided by an embodiment of the present application;

[0051] Figure 13 It is a flowchart of a device test method provided by an embodiment of the present application;

[0052] Figure 14 It is a schematic diagram of the timing control of a first driver and a second driver provided by an embodiment of the present application. Detailed implementation manners

[0053] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0054] Before explaining the embodiments of the present application, the application scenarios of the embodiments of the present application will be explained first.

[0055] Currently, the screening of semiconductor power devices such as IGBTs and MOSFETs is mainly achieved through methods such as high voltage or large current. In these methods, the time when large current and high voltage are applied simultaneously is too short, resulting in the device temperature can only rise to the limit of 175°C, and correspondingly, the deep defects hidden in the device cannot be screened out, and then some failed products flow into the market. And in the large current method, a large external heat dissipation device needs to be connected, and there are problems such as difficult device connection and complex devices.

[0056] Based on this, the embodiments of the present application provide a device test circuit and a device test method. On the one hand, it can increase the junction temperature of semiconductor power devices to discover deep defects in the devices, and on the other hand, it does not require a complex heat dissipation device.

[0057] The following will explain the device test circuit and the device test method provided by the embodiments of the present application.

[0058] Figure 1 It is a schematic diagram of a device test circuit provided by an embodiment of the present application. As Figure 1 shown, the device test circuit includes a power control circuit 1 and a drive control circuit 2. The first output end of the drive control circuit 2 is used to connect to the control end of the target device, the second output end of the drive control circuit 2 is used to connect to the first conduction end of the target device, and the output end of the power control circuit 1 is used to connect to the first conduction end of the target device. The target device is a semiconductor power device to be tested.

[0059] The target device can be any semiconductor power device to be tested (i.e., to be screened). A semiconductor power device can be understood as a semiconductor device that processes power for current or voltage. Exemplarily, it includes IGBTs and MOS transistors. The MOS transistor can be a Si (silicon) MOSFET, a SiC (silicon carbide) MOSFET, a GaN (gallium nitride) MOSFET, etc. Figure 1 Here, an N-type MOS transistor is taken as an example of the target device for illustration.

[0060] A semiconductor power device includes three terminals. In the embodiments of the present application, these three terminals are respectively referred to as the control end, the first conduction end, and the second conduction end. Among them, the control end is the terminal used to control the conduction between the two conduction ends of the semiconductor power device. Exemplarily, the control end is the gate of the MOS transistor or the gate of the IGBT. Figure 1 In this case, the gate is marked as G. The first conduction end and the second conduction end are correspondingly the drain and source of the MOS transistor, or the emitter and collector of the IGBT. Figure 1 In this case, the drain is marked as D, and the source is marked as S.

[0061] Among them, the drive control circuit 2 is used to drive the target device to conduct and output the conduction threshold voltage of the target device to the voltage tester. In other words, the drive control circuit 2 provides a voltage test point for the voltage tester to be able to test the conduction threshold voltage of the target device. Among them, the voltage tester can be an oscilloscope exemplarily.

[0062] The power control circuit 1 is used to load a reference voltage to the first conduction end of the target device when the target device conducts, so as to control the current at the second conduction end of the target device to have a linear relationship with the voltage at the first conduction end, that is, to control the target device to operate in the linear region.

[0063] The semiconductor power device is driven to conduct by the drive control circuit. When the semiconductor power device is conducting, the power supply control circuit is used to control the semiconductor power device to operate in the linear region. When the semiconductor power device operates in the linear region, taking the MOS transistor as an example, the MOS transistor operating in the linear region can generate a large drain-source current under the action of a large drain-source voltage. Therefore, by testing the current through this device, the MOS transistor can withstand a large voltage and a large current for a certain period of time, thereby causing the MOS transistor to be subjected to a large thermal stress, and thus rapidly increasing the junction temperature of the MOS transistor, and the junction temperature can reach above 200 °C to discover deep defects in the target device. And the large current generated by the MOS transistor operating in the linear region is much smaller than the current used when screening devices by the large current method, and correspondingly, no complex heat dissipation equipment is required.

[0064] In addition, as Figure 1 shown, when testing the target device, the second conduction end of the target device is connected to a reference voltage of 0 V, or in other words, the second conduction end of the target device is grounded.

[0065] Figure 2 is a schematic diagram of a power supply control circuit 1 provided by an embodiment of the present application. As Figure 2 shown, the power supply control circuit 1 includes a first driver 11 and a power supply control switch 12. The output end of the first driver 11 is connected to the control end of the power supply control switch 12. The input end of the power supply control switch 12 is used to connect to a first voltage source, and the first power supply is used to output a reference voltage. The output end of the power supply control switch 12 is used to connect to the first conduction end of the target device. Among them, the first driver 11 is used to drive the power supply control switch to close or open.

[0066] Figure 2 In bus1 .

[0067] By the first driver 11, the power supply control switch 12 can be controlled to close, so as to control the target device to operate in the linear region through the power supply control circuit 1 when the target device is conducting. And the duration of the reference voltage applied to the first conduction end of the target device can be controlled by controlling the on-off of the power supply control switch 12, that is, the duration of applying a large voltage and a large current to the target device at the same time, thereby improving the device screening effect.

[0068] Exemplarily, the first driver 11 is used to alternately output a first voltage signal and a second voltage signal. The first voltage signal is used to drive the power supply control switch 12 to close, and the second voltage signal is used to drive the power supply control switch 12 to open. For example, the first voltage signal is 15 V and the second voltage signal is -5 V.

[0069] For example, the first driver 11 is used to output a square wave signal, where the voltage of the high level of the square wave signal is 15V and the voltage of the low level is -5V.

[0070] In addition, as Figure 2 shown, the first driver 11 can be implemented by several transistors connected in series. The embodiment of the present application does not limit the internal structure of the first driver 11.

[0071] In addition, as Figure 2 shown, the first driver 11 can also be provided with a reference voltage output terminal that outputs a reference voltage of 0V. In this case, the second conduction end of the power control switch 12 can be connected to the reference voltage output terminal to form a loop between the first driver 11 and the power control switch 12.

[0072] In addition, in the embodiment of the present application, as Figure 3 shown, the power control circuit 1 can include multiple power control switches 12. The input ends of different power control switches 12 are used to connect to different first voltage sources, and the output ends of the multiple power control switches 12 are all used to connect to the first conduction end of the target device.

[0073] By different power control switches 12, the target device can be controlled to work at different positions in the linear region to test more performance of the target device.

[0074] Exemplarily, as Figure 3 shown, the power control circuit 1 includes two power control switches 12. The voltages of the two first voltage sources connected to the input ends of the two power control switches 12 are respectively marked as V bus1 and V bus2 . When the output end of the first driver 11 is connected to the left power control switch 12, the target device is controlled to work at the position corresponding to V bus1 in the linear region, that is, the voltage of the first conduction end of the target device is V bus1 , and the current of the second conduction end of the target device is the current corresponding to V bus1 . When the output end of the first driver 11 is connected to the right power control switch 12, the target device is controlled to work at the position corresponding to V bus2 in the linear region, that is, the voltage of the first conduction end of the target device is V bus2 , and the current of the second conduction end of the target device is the current corresponding to V bus2 .

[0075] It should be noted that Figure 3 the above is described by taking two power control switches 12 as an example. The power control circuit 1 provided by the embodiment of the present application can include a greater number of power control switches 12, and no further examples will be given here.

[0076] Figure 4 It is a schematic diagram of a drive control circuit 2 provided by an embodiment of the present application. As Figure 4 shown, the drive control circuit 2 includes a second driver 21, a first resistor 22, a second resistor 23, and a first diode 24. The output end of the second driver 21 is connected to one end of the first resistor 22, the other end of the first resistor 22 is respectively connected to one end of the second resistor 23 and the anode end of the first diode 24, the cathode end of the first diode 24 is used to connect to the first conduction end of the target device, the other end of the second resistor 23 is used to connect to the second voltage source, and the other end of the first resistor 22 is also used to connect to the control end of the target device.

[0077] Figure 4 In the figure, the first resistor is marked as R1, the second resistor is marked as R2, and the first diode is marked as D1.

[0078] Among them, the position between the first resistor and the second resistor is used to output the conduction threshold voltage (abbreviated as Vth) to the voltage tester. In other words, the Vth of the target device can be obtained by testing the voltage at the position between the first resistor and the second resistor with the voltage tester. Therefore, the first resistor 22, the second resistor 23, and the first diode 24 can also be called the Vth feedback circuit.

[0079] Figure 4 In the figure, the voltage at the position between the first resistor and the second resistor is marked as V gl .

[0080] Through Figure 4 the drive control circuit 2 shown, it can ensure that the Vth feedback circuit forms a closed-loop stable state, that is, by detecting whether Id meets the current required for testing the conduction threshold voltage to adjust V gl , Id is the current at the second conduction end of the target device. When it is detected that Id meets the current required for testing the conduction threshold voltage, V gl =Vth. At this time, Vth = VD1 + Vsw, where VD1 is the voltage drop of the first diode 24, which is basically about 1V, and Vsw is the voltage drop between the first conduction end and the second conduction end when the target device is conducting.

[0081] Among them, adjusting V gl can be achieved by adjusting the first resistor 22 and the second resistor 23. The specific adjustment method can be achieved through the adjustment algorithm of the Vth feedback circuit, which is not limited in the embodiments of the present application.

[0082] In other words, both the first resistor 22 and the second resistor 23 are adjustable resistors. Before testing the target device through the device test circuit, the resistance values of the first resistor 22 and the second resistor 23 can be adjusted first so that the current at the second conduction end of the target device meets the current when the test conduction threshold voltage is satisfied. When testing the performance of the target device subsequently, it can be tested based on the adjusted first resistor 22 and second resistor 23.

[0083] In addition, the second driver 21 is used to drive the target device to conduct or cut off. Exemplarily, the second driver 21 is used to alternately output a third voltage signal and a fourth voltage signal. The third voltage signal is used to drive the target device to conduct, and at this time, the conduction threshold voltage of the target device can be measured through the position between the first resistor and the second resistor. The fourth voltage signal is used to drive the target device to cut off. For example, the third voltage signal is 15V and the fourth voltage signal is -5V.

[0084] For example, the second driver 21 is used to output a square wave signal, and the voltage of the high level of the square wave signal is 15V and the voltage of the low level is -5V.

[0085] In addition, as Figure 4 shown, the second driver 21 can be implemented by several series-connected transistors, and the embodiment of the present application does not limit the internal structure of the second driver.

[0086] In addition, as Figure 4 shown, the second driver 21 can also provide a reference voltage output terminal, and the reference voltage output terminal can output a reference voltage of 0V for other devices to connect.

[0087] In addition, the second voltage source connected to the other end of the second resistor 23 is exemplarily a voltage source of 0V, that is, the other end of the second resistor 23 is connected to a reference voltage of 0V. For example, in Figure 4 , the other end of the second resistor 23 and the second conduction end of the target device can both be connected to the reference voltage output terminal of the second driver 21 to realize grounding of the other end of the second resistor 23 and the second conduction end of the target device.

[0088] Optionally, when the variation range of the conduction threshold voltage of the target device is relatively large, the other end of the second resistor 23 can also be connected to a second voltage source with a lower voltage, such as a voltage source of -5V. For example, in Figure 4 , the second driver 21 can also provide a -5V voltage output terminal, and in this case, the other end of the second resistor 23 can be connected to the -5V voltage output terminal.

[0089] It should be noted that Figure 4This is an example of a drive control circuit 2. The embodiment of the present application does not limit the structure of the drive control circuit 2. Any circuit that can be used to drive the target device to turn on and output a turn-on threshold voltage can be used in the embodiment of the present application.

[0090] In addition, considering that the current of the second conduction terminal of the target device is usually very small when testing the conduction threshold voltage, in order to avoid the current of the second conduction terminal of the target device being too large when testing the conduction threshold voltage, Figure 5 As shown, the device test circuit further includes a current regulating circuit 3, one end of the current regulating circuit 3 is connected to the other end of the first resistor 22, and the other end of the current regulating circuit 3 is connected to the anode end of the first diode 24. The current regulating circuit 3 is used to regulate the current at the anode end of the first diode.

[0091] Specifically, the current regulating circuit 3 can reduce the current input to the anode end of the first diode, that is, reduce the current input to the first conduction end of the target device, thereby avoiding excessive current at the second conduction end of the target device when testing the conduction threshold voltage.

[0092] Figure 6 Schematic diagram of a current regulating circuit 3 provided in an embodiment of the present application. Figure 6 As shown, the current regulating circuit 3 includes a third resistor 31 and a first transistor 32 .

[0093] The other end of the first resistor 22 is connected to one end of the third resistor 31, and the other end of the first resistor 22 is also connected to the first conduction end of the first transistor 32. The second conduction end of the first transistor 32 is connected to the other end of the second resistor 23, and the control end of the first transistor 32 and the other end of the third resistor 31 are both connected to the anode end of the first diode 24.

[0094] The first transistor 32 is used to shunt the current output by the first resistor 22 , thereby reducing the current input to the first diode 24 .

[0095] It should be noted that Figure 6 This is an example of the current regulating circuit 3. The embodiment of the present application does not limit the structure of the current regulating circuit 3. Any circuit that can be used to reduce the current input to the first and second tubes 24 can be used in the embodiment of the present application.

[0096] In addition, in the embodiment of the present application, when the target device is driven to conduct by the driving control circuit 2, in order to improve the response speed of the target device, as shown in FIG. Figure 7 As shown, the device test circuit further includes a driving amplifier circuit 4 , one end of the driving amplifier circuit 4 is connected to the other end of the first resistor 22 , and the other end of the driving amplifier circuit 4 is used to connect to the control end of the target device.

[0097] The driving amplifier circuit 4 is used to amplify the current of the control terminal of the target device, thereby improving the response speed of the control terminal of the target device to the applied voltage. In other words, the driving amplifier circuit can quickly apply voltage to the control terminal of the target device.

[0098] Figure 8 Schematic diagram of a driving amplifier circuit 4 provided in an embodiment of the present application. Figure 8 As shown, the driving amplifier circuit 4 includes a second transistor 41 and a third transistor 42 .

[0099] The other end of the first resistor 22 is connected to the control end of the second transistor 41 and the third transistor 42 respectively, the first conduction end of the second transistor 41 is used to connect to the third voltage source, the second conduction end of the second transistor 41 is connected to the first conduction end of the third transistor 42, the second conduction end of the third transistor 42 is used to connect to the fourth voltage source, and the second conduction end of the second transistor 41 is also used to connect to the control end of the target device.

[0100] The third voltage source is exemplarily 15V, and the fourth voltage source is exemplarily -5V.

[0101] exist Figure 8 In the embodiment, the current input to the control terminal of the target device can be amplified by the two transistors connected in series, thereby increasing the speed of loading the voltage to the control terminal of the target device.

[0102] It should be noted that Figure 8 This is an example of a driving amplifier circuit. The embodiments of the present application do not limit the structure of the driving amplifier circuit. Any circuit that can be used to improve the response speed of the target device can be used in the embodiments of the present application.

[0103] In addition, if Figure 9 As shown, the device test circuit also includes a leakage test circuit 5, the output end of the leakage test circuit 5 is used to connect to the first conduction end of the target device; the leakage test circuit is used to load a reference current to the first conduction end of the target device to test the leakage current of the second conduction end of the target device.

[0104] That is, in the embodiment of the present application, the leakage current of the target device can also be tested through the device testing circuit.

[0105] Figure 10 Schematic diagram of a leakage test circuit 5 provided in an embodiment of the present application. Figure 5 As shown, the leakage test circuit 5 includes a third diode 51. The anode terminal of the third diode 51 is used to connect to the current source, and the cathode terminal of the third diode 51 is used to connect to the first conduction terminal of the target device; the current source is used to output a reference current.

[0106] The reference current output by the current source can be loaded to the first conduction terminal of the target device through the third diode 51 to test the leakage current of the target device.

[0107] When testing the leakage current of the target device, the power control circuit 1 and the drive control circuit 2 are turned off to test the leakage current of the second conducting terminal of the target device through the leakage test circuit 5. The power control circuit 1 and the drive control circuit 2 being turned off can be understood as: the first driver 11 and the second driver 12 both output low-level signals.

[0108] In addition, if Figure 11 As shown, the device test circuit may further include a second diode 6 , an anode terminal of the second diode 6 is connected to the output terminal of the power control circuit 1 , and a cathode terminal of the second diode 6 is used to connect to the first conduction terminal of the target device.

[0109] The second diode 6 can prevent the current of the current source from flowing to the power control circuit when testing the leakage current, so the second diode 6 is also called an anti-reverse diode.

[0110] Below is Figure 12 Take the device test circuit provided in the embodiment of the present application as an example to illustrate.

[0111] in, Figure 12 The connection relationship between the various components can be referred to Figures 1 - 11 The embodiment shown in FIG. 1 is not described in detail here. Figure 12 In the device test circuit shown, a fourth resistor R4 is added between the first resistor 22 and the second resistor 23 in the drive control circuit 1. The fourth resistor R4 is used for voltage division. In this case, the other end of the first resistor 22 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to one end of the second resistor 23. The other end of the fourth resistor R4 is also connected to the control terminals of the second transistor 41 and the third transistor 42 in the drive amplifier circuit 4. In addition, a fifth resistor R5 is added to the anode terminal of the third diode 51 in the leakage test circuit 5. The fifth resistor R5 is also used for voltage division. That is, one end of the fifth resistor R5 is used to connect to the current source, and the other end of the fifth resistor R5 is used to connect to the anode terminal of the second diode 51.

[0112] Figure 12 The device test circuit shown below tests the working principle of the target device as follows:

[0113] After the second driver 21 is turned on (ie, the second driver outputs a high-level voltage signal), it enters the real-time test state of Vth, ie, V gl=Vth, at this time the first driver 11 is in the off state (ie the first driver outputs a low level voltage signal); when the first driver 11 is turned on (ie the first driver outputs a high level signal), V bus1 Forced to the SW position, the voltage at the SW position is raised, and the first diode 24 (D1) enters the cutoff mode. At this time, V gl The voltage divider ratio is R1 / (R4+R2), which is approximately 8 to 12V. This voltage value is between the target device's on-threshold voltage and the target device's saturation threshold voltage, allowing the target device to operate in the linear region and a certain current Id to flow through the target device's second conduction terminal. The pulse width of the high-level signal output by the first driver 11 is controlled. At this time, the target device is subjected to the pulse energy of Vbus1*Id*t1, also known as the impact power impact. t1 is the pulse width of the high-level signal output by the first driver 11. The first driver 11 is then controlled to output a low-level signal (i.e., the first driver 22 is turned off). After the first driver 22 outputs a low-level signal, the device re-enters the real-time test state of Vth.

[0114] When the target device operates in the linear region, the surge power applied to the target device is primarily dissipated into the target device's junction layer. Since the target device's junction layer is at the micron level, the surge power can rapidly heat the junction layer to temperatures exceeding 175°C, potentially reaching temperatures above 300-500°C. If the junction layer is defective, the local junction temperature can be even higher. The surge power shock can drive the target device's junction layer to high temperatures, exacerbating internal defects. This method can cause the defective junction layer to directly breakdown and fail, thereby screening out defective target devices.

[0115] If the target device does not completely fail after being subjected to the impact power shock, then after turning off the first driver 11, the energy of the junction layer that has reached a high temperature transfers heat through the packaging structures such as the substrate, welding layer, and copper base plate. When the back gold layer, welding layer, etc. inside the target device are delaminated or defective, the heat transfer characteristics are different. Therefore, the defects inside the target device can also be analyzed by measuring the physical parameters of the target device after turning off the first driver 11.

[0116] In addition, when the target device operates in the linear region, the current Id of the second conduction terminal of the target device is about 6A, which is much smaller than the current 600A used when screening devices through a high current method, so no complex heat dissipation equipment is required.

[0117] Figure 13 This is a flow chart of a device testing method provided by an embodiment of the present application. Figure 13 As shown, the method includes the following steps.

[0118] Step 1301: The device test circuit works in the first state, the second state, and the first state in sequence, and acquires the physical parameters of the target device in each state; wherein, the first state is that the drive control circuit drives the target device to conduct, and the power supply control circuit does not apply a reference voltage to the target device, and the second state is that the drive control circuit drives the target device to conduct, and the power supply control circuit applies a reference voltage to the target device.

[0119] Based on Figure 12 As can be seen from the circuit shown, when the device test circuit works in the first state, the target device is in the real-time test state of Vth. When the device test circuit works in the second state, the target device works in the linear region, that is, enters the linear conduction region. Therefore, through the above method, after the target device is in the Vth real-time test state for a period of time, the target device can be controlled to work in the linear region for a period of time, and then return to the Vth real-time test state. This is convenient for testing the changes in the physical parameters of the target device after being impacted by the impact power, and then determining whether there are defects inside the target device based on this change, that is, realizing the screening of the target device.

[0120] In some embodiments, the physical parameters of the target device include one or more of the voltage at the control terminal of the target device, the voltage at the first conduction terminal of the target device, and the current at the second conduction terminal of the target device.

[0121] As Figure 12 shown, the voltage at the control terminal of the target device is V gl , the voltage at the first conduction terminal of the target device is the voltage at the SW position, and the current at the second conduction terminal of the target device is Id.

[0122] When the device test circuit works in the first state, V gl is the conduction threshold voltage of the target device, and the voltage at the SW position is basically the same as V gl . When the device test circuit works in the second state, Vgl is the voltage at the control terminal of the target device when it works in the linear region, the voltage at the SW position is the reference voltage V bus1 loaded by the first voltage source. When the target device works in the linear region, the current Id at the second conduction terminal of the target device changes linearly with the change of the voltage at the SW position.

[0123] In addition, in some embodiments, in the first state, the second driver outputs a third voltage signal to drive the target device to conduct, and the first driver outputs a second voltage signal to drive the power supply control switch to open; in the second state, the second driver outputs a third voltage signal to drive the target device to conduct, and the first driver outputs a first voltage signal to drive the power supply control switch to close.

[0124] That is, in the embodiments of the present application, the operation state of the device test circuit can be controlled by controlling the voltage signals output by the first driver and the second driver.

[0125] Figure 14 It is a timing control schematic diagram of a first driver and a second driver provided by an embodiment of the present application. As Figure 14 shown, control the second driver to output a high-level signal for a first duration to drive the target device to conduct; after a second duration starting from when the second driver outputs the high-level signal, control the first driver to output a high-level signal for a third duration to drive the power control switch to close; after the first driver outputs the high-level signal, control the first driver to output a low-level signal for a fourth duration to drive the power control switch to open; wherein, the first duration is greater than or equal to the sum of the second duration, the third duration, and the fourth duration.

[0126] Through this kind of timing control, after the target device is in the Vth real-time test state for a period of time, control the target device to work in the linear region for a period of time, and then re-enter the Vth real-time test state.

[0127] As Figure 14 shown, when the second driver outputs a high-level signal and the first driver outputs a low-level signal, the voltage at SW and V gl are both the conduction threshold voltage of the target device, which is 4.5V. When the second driver outputs a high-level signal and the first driver outputs a high-level signal, the voltage at SW is raised to V bus1 = 800V, so that the first diode is in the reverse cut-off state, and correspondingly V gl is 8V. At this time, the target device works in the linear region. Through the pulse width of the high-level signal output by the first driver and the subsequent measured conduction threshold voltage, the junction temperature change of the target device when it is impacted by the impact power can be calculated. As Figure 14 shown, the junction temperature Tj rises from 25°C to 200°C.

[0128] When the second driver outputs a high-level signal and the first driver outputs a low-level signal again, the voltage at SW and Vgl are both the conduction threshold voltage of the target device. Since the junction temperature of the target device gradually decreases during this process, the measured conduction threshold voltage gradually changes during this process, for example, gradually rises from 3.5V to 4.5V. Among them, the junction temperature change law of the target device during this process can also be calculated, for example, it decreases from 200°C by 25 degrees Celsius.

[0129] Figure 14 such as the voltage at SW, the current Id at the second conduction end of the target device, and the voltage V glIt can be obtained by collecting with an oscilloscope.

[0130] When screening a large number of semiconductor power devices, it can be achieved by Figure 14 comparing the Vth characteristics of different semiconductor power devices through the dynamic data shown in the figure, and then screening out abnormal semiconductor power devices. For example, the Vth characteristics of most semiconductor power devices are shown as Figure 14 the solid-line Vth shown in the figure, and the Vth characteristics of some individual semiconductor power devices are shown as Figure 14 the dashed-line Vth shown in the figure. Then these individual semiconductor devices may be defective devices. Also, for example, the junction temperature characteristics of most semiconductor power devices are shown as Figure 14 the solid-line Tj shown in the figure, and the junction temperature characteristics of some individual semiconductor power devices are shown as Figure 14 the dashed-line Tj shown in the figure. Then these individual semiconductor devices may be defective devices.

[0131] In addition, it can also be used to determine defects such as local point defects, voids in the solder layer, solder delamination, and back gold delamination of the target device, as well as heat transfer characteristics, etc. through the dynamic data shown in Figure 14 the figure. Exemplarily, artificial intelligence (AI) technology can be used to analyze the target device through the dynamic data shown in Figure 14 the figure, which will not be elaborated here.

[0132] In addition, in the embodiments of the present application, the first driver can also be controlled to output high-level signals of different durations to test the changes in the physical parameters of the target device under the impact power of different pulse widths, and then combine these dynamic data to analyze other performances of the target device, which will not be exemplified one by one here.

[0133] In addition, in the embodiments of the present application, the device test circuit can also be controlled to work in the third state in sequence, and the physical parameters of the target device in the third state are collected to implement the leakage test of the target device. Wherein, the third state is that the drive control circuit controls the target device to be cut off, the power supply control circuit does not load the reference voltage to the target device, and the leakage test circuit loads the reference current to the target device.

[0134] In the embodiments of the present application, the leakage condition of the target device can be tested by controlling the device test circuit to work in the third state.

[0135] For example, for Figure 12 the device test circuit shown in the figure, when testing the leakage performance of the target device, control both the first driver and the second driver to be turned off (i.e., both output low-level signals), and then control the current source to load the reference current to the first conduction end of the target device, and collect the current at the second conduction end of the target device to implement the leakage test of the target device.

[0136] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wirelessly (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more integrated available media. The available medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., digital versatile disc (DVD)), or a semiconductor medium (e.g., solid state disk (SSD)), etc.

[0137] Those of ordinary skill in the art can understand that all or part of the steps for implementing the above embodiments can be completed by hardware, or can be completed by instructing relevant hardware through a program. The program can be stored in a computer-readable storage medium. The storage medium mentioned above can be a read-only memory, a magnetic disk, an optical disc, etc.

[0138] The above content is not intended to limit the embodiments of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the embodiments of the present application shall be included in the protection scope of the embodiments of the present application.

Claims

1. A device test circuit, characterized in that, The device test circuit includes a power control circuit (1) and a drive control circuit (2). The first output terminal of the drive control circuit (2) is used to connect to the control terminal of the target device. The second output terminal of the drive control circuit (2) is used to connect to the first conduction terminal of the target device. The output terminal of the power control circuit (1) is used to connect to the first conduction terminal of the target device. The target device is a semiconductor power device to be tested; The drive control circuit (2) is used to drive the target device to conduct and output the conduction threshold voltage of the target device to a voltage tester; The power control circuit (1) is used to apply a reference voltage to the first conduction terminal of the target device when the target device conducts, so as to control the current between the second conduction terminal and the voltage of the first conduction terminal of the target device to be linearly related.

2. The circuit according to claim 1, wherein The power control circuit (1) includes a first driver (11) and a power control switch (12); The output terminal of the first driver (11) is connected to the control terminal of the power control switch (12). The input terminal of the power control switch (12) is used to connect to a first voltage source. The first power source is used to output the reference voltage. The output terminal of the power control switch (12) is used to connect to the first conduction terminal of the target device; The first driver (11) is used to drive the power control switch to close or open.

3. The circuit according to claim 1 or 2, characterized in that, The drive control circuit (2) includes a second driver (21), a first resistor (22), a second resistor (23), and a first diode (24); The output terminal of the second driver (21) is connected to one end of the first resistor (22). The other end of the first resistor (22) is respectively connected to one end of the second resistor (23) and the anode terminal of the first diode (24). The cathode terminal of the first diode (24) is used to connect to the first conduction terminal of the target device. The other end of the second resistor (23) is used to connect to a second voltage source. The other end of the first resistor (22) is also used to connect to the control terminal of the target device; The position between the first resistor and the second resistor is used to output the conduction threshold voltage to the voltage tester.

4. The circuit according to claim 3, wherein The device test circuit further includes a current adjustment circuit (3). One end of the current adjustment circuit (3) is connected to the other end of the first resistor (22), and the other end of the current adjustment circuit (3) is connected to the anode terminal of the first diode (24); The current adjustment circuit is used to adjust the current at the anode terminal of the first diode.

5. The circuit according to claim 4, wherein The current adjustment circuit (3) includes a third resistor (31) and a first transistor (32); The other end of the first resistor (22) is connected to one end of the third resistor (31). The other end of the first resistor (22) is also connected to the first conduction terminal of the first transistor (32). The second conduction terminal of the first transistor (32) is connected to the other end of the second resistor (23). The control terminal of the first transistor (32) and the other end of the third resistor (31) are both connected to the anode terminal of the first diode (24).

6. The circuit according to any one of claims 3-5, characterized in that, The device test circuit further includes a drive and amplification circuit (4). One end of the drive and amplification circuit (4) is connected to the other end of the first resistor (22), and the other end of the drive and amplification circuit (4) is used to connect to the control end of the target device; The drive and amplification circuit (4) is used to amplify the current at the control end of the target device.

7. The circuit according to claim 6, wherein The drive and amplification circuit (4) includes a second transistor (41) and a third transistor (42); The other end of the first resistor (22) is respectively connected to the control ends of the second transistor (41) and the third transistor (42). The first conduction end of the second transistor (41) is used to connect to a third voltage source. The second conduction end of the second transistor (41) is connected to the first conduction end of the third transistor (42). The second conduction end of the third transistor (42) is used to connect to a fourth voltage source. The second conduction end of the second transistor (41) is also used to connect to the control end of the target device.

8. The circuit according to any one of claims 1-7, characterized in that, The device test circuit further includes a leakage test circuit (5). The output end of the leakage test circuit (5) is used to connect to the first conduction end of the target device; The leakage test circuit is used to apply a reference current to the first conduction end of the target device to test the leakage current at the second conduction end of the target device.

9. The circuit according to claim 8, wherein The leakage test circuit (5) includes a third diode (51); The anode end of the third diode (51) is used to connect to a current source, and the cathode end of the third diode (51) is used to connect to the first conduction end of the target device; The current source is used to output the reference current.

10. The circuit according to claim 8 or 9, characterized in that, The device test circuit further includes a second diode (6). The anode end of the second diode (6) is connected to the output end of the power supply control circuit (1), and the cathode end of the second diode (6) is used to connect to the first conduction end of the target device.

11. A device testing method, characterized in that, The method is applied to the device test circuit according to any one of claims 1 - 10. The method includes: Controlling the device test circuit to work in a first state, a second state, and the first state in sequence, and respectively collecting the physical parameters of the target device in each state; Wherein, the first state is that the drive control circuit drives the target device to conduct, and the power supply control circuit does not apply a reference voltage to the target device. The second state is that the drive control circuit drives the target device to conduct, and the power supply control circuit applies a reference voltage to the target device.

12. The method according to claim 11, wherein, The physical parameters of the target device include one or more of the voltage at the control end of the target device, the voltage at the first conduction end of the target device, and the current at the second conduction end of the target device.

13. The method according to claim 11 or 12, wherein In the first state, the second driver outputs a third voltage signal to drive the target device to conduct, and the first driver outputs a second voltage signal to drive the power supply control switch to disconnect; In the second state, the second driver outputs a third voltage signal to drive the target device to turn on, and the first driver outputs a first voltage signal to drive the power control switch to close.

14. The method according to any one of claims 11-13, characterized in that Controlling the device test circuit to operate in a third state, and collecting physical parameters of the target device in the third state; wherein the third state is that the drive control circuit controls the target device to be turned off, the power control circuit does not load a reference voltage to the target device, and the leakage test circuit loads a reference current to the target device.

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