Overlay mark and forming method thereof

By using double-layer structure in the lithography process, the problem of insufficient alignment accuracy in the thick glue process is solved, high-precision alignment is achieved, product yield is improved and cost is reduced.

CN120386145APending Publication Date: 2025-07-29CSMC TECH FAB2 CO LTD
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Patent Information

Application Number
CN202410123011.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-01-29
Publication Date
2025-07-29

AI Technical Summary

Technical Problem

In thick glue process, the alignment accuracy of the engraved marks in the lithography process is difficult to ensure, resulting in large alignment errors and affecting product yields.

Method used

The engraving mark is adopted with a double-layer structure. The first structure is embedded in the target film layer of the device. The second structure includes a counter-bit pattern and a uniformly distributed auxiliary pattern. The auxiliary pattern is located around the counter-bit pattern and the material is photoresist to ensure consistency of deformation.

Benefits of technology

It improves the alignment accuracy during lithography, reduces alignment errors, and improves product yields. It is suitable for high-energy ion implantation and high-temperature processes, reducing cost requirements.

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Abstract

The invention relates to an overlay mark and a forming method thereof, and the overlay mark comprises a first structure which is embedded in a target film layer of a device; the device target film layer is a non-photoresist film layer; the second structure is located on the device target film layer and comprises an alignment pattern and an auxiliary pattern, the alignment pattern is located over the first structure, the auxiliary pattern is located on the periphery of the alignment pattern and is close to the alignment pattern, the auxiliary pattern comprises a plurality of sub-patterns, and the sub-patterns are arranged on the first structure. The sub-patterns are uniformly distributed around the alignment pattern; and the second structure is made of photoresist. According to the invention, the first structure of the front layer is embedded in the target film layer of the device, so that the morphology of the first structure is not easy to distort. The auxiliary patterns are uniformly distributed around the alignment pattern of the current layer, so that the deformation of the alignment pattern in the photoetching process tends to be consistent in all directions, alignment errors are not easy to generate, and the alignment precision is relatively high.
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Description

Technical Field

[0001] This application relates to semiconductor manufacturing, and particularly to a registration mark, and also to a method for forming a registration mark. Background Art

[0002] The lithography process plays an important role in semiconductor manufacturing, and the registration accuracy in the lithography process is one of the key parameters for evaluating the quality of the lithography process. The registration accuracy refers to the alignment accuracy (offset) between the layer pattern and the previous layer pattern. With the continuous development of Moore's Law, the requirement for alignment accuracy is getting higher and higher, and even for some non-critical implantation levels, it is becoming more and more strict. Improving the alignment accuracy has become a challenge. An important factor causing alignment errors is inaccurate registration measurement.

[0003] In the production process of semiconductor devices, some processes (such as deep P-well, deep N-well, etc.) require the use of high-energy ion implantation, and a relatively thick photoresist layer is required in the corresponding lithography process to block the implanted ions. The inventor found that for the lithography alignment of this thick photoresist process, relatively large alignment errors are likely to occur. Summary of the Invention

[0004] Based on this, it is necessary to provide a registration mark that can have a relatively high alignment accuracy in the thick photoresist process.

[0005] A registration mark includes: a first structure embedded in a device target film layer; the device target film layer is a non-photoresist film layer; a second structure located on the device target film layer, including an alignment pattern and an auxiliary pattern, the alignment pattern is directly above the first structure, the auxiliary pattern is located around the alignment pattern and close to the alignment pattern, the auxiliary pattern includes a plurality of sub-patterns, and each of the sub-patterns is evenly distributed around the alignment pattern; the material of the second structure is photoresist.

[0006] The above registration mark adopts a double-layer structure, and the first structure of the previous layer is embedded in the device target film layer, so the morphology of the first structure is not easily distorted. An auxiliary pattern evenly distributed is arranged around the alignment pattern of the current layer, so that the deformation of the alignment pattern during the lithography process can tend to be consistent in all directions, so it is not easy to generate alignment errors and has a relatively high alignment accuracy.

[0007] In one embodiment, the auxiliary pattern is a centrosymmetric figure, and its center of symmetry is the center of the alignment pattern.

[0008] In one embodiment, each of the sub-patterns is a square, and the sizes of the sub-patterns are equal.

[0009] In one embodiment, the center of the alignment pattern is directly above the center of the first structure.

[0010] In one embodiment, the first structure is a first square pattern.

[0011] In one embodiment, the alignment pattern includes a target square and a second square pattern that laterally surrounds the target square.

[0012] In one embodiment, the orthographic projection of the alignment pattern on the plane where the upper surface of the first structure is located completely covers the first structure.

[0013] In one embodiment, the orthographic projection of the second square pattern on the plane where the upper surface of the first square pattern is located completely covers the first square pattern.

[0014] In one embodiment, the first structure and the second structure are disposed in a dicing channel of a wafer.

[0015] In one embodiment, the overlay mark is applied to a thick photoresist process where the thickness of the photoresist is greater than 4 microns.

[0016] It is also necessary to provide a method for forming an overlay mark.

[0017] A method for forming an overlay mark, used to form the overlay mark described in any of the foregoing embodiments, the method includes: forming the device target film layer; forming a recessed area in the device target film layer by patterning; filling the recessed area to form the first structure in the recessed area; forming the second structure on the device target film layer by lithography.

[0018] It is also necessary to provide a photomask combination, including multiple photomasks used in combination, the photomask combination includes the patterns of the first structure and the second structure in the overlay mark described in any of the foregoing embodiments, for forming the overlay mark.

[0019] In the above method for forming an overlay mark, the formed overlay mark is a double-layer structure, and the first structure of the front layer is embedded in the device target film layer, so the morphology of the first structure is not easily distorted. Auxiliary patterns are uniformly distributed around the alignment pattern of the current layer, so that the deformation of the alignment pattern during the lithography process can tend to be consistent in all directions, so it is not easy to generate alignment errors and has a high alignment accuracy.

[0020] It is also necessary to provide a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps in the method described in any of the foregoing embodiments are implemented.

[0021] It is also necessary to provide a computer device, including a memory and a processor. A computer program is stored in the memory. When the processor executes the computer program, the steps in the method described in any of the foregoing embodiments are implemented.

[0022] It is also necessary to provide a computer program product, including a computer program. When the computer program is executed by a processor, the steps of the method described in any of the foregoing embodiments are implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] To better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, one or more drawings may be referred to. Additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the currently described embodiments and / or examples, and the currently understood best mode of these inventions.

[0024] Figure 1 is a schematic diagram of an exemplary overlay mark;

[0025] Figure 2 is a micrograph of the distorted topography of an exemplary overlay mark after lithography;

[0026] Figure 3 is a schematic structural diagram of an overlay mark in an embodiment of the present application;

[0027] Figure 4 is a cross-sectional schematic diagram of a first structure 110 and a registration pattern 210;

[0028] Figure 5 is a flowchart of a method for forming an overlay mark in an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0029] To facilitate the understanding of the present invention, the present invention will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present invention more thorough and comprehensive.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present invention belongs. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0031] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present invention. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, determine the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0032] In the lithography process, when the photoresist is exposed and baked, physical and chemical reactions occur on the surface of the photoresist, generating nitrogen gas and gases formed by solvent volatilization, causing the surface of the photoresist to expand. The expansion rate is affected by factors such as light intensity, film thickness, and photoresist hardness, that is, changes in exposure energy and changes in the surface hardness of the photoresist will both affect the expansion rate. If the expansion rates of the photoresist in different directions are different, the topography of the alignment mark will change after expansion.

[0033] Correlatively, the inventors found in actual production that different graphic environment densities in different directions around the alignment mark will result in different expansion rates of the alignment mark in different directions, causing the topography of the alignment mark to be asymmetric after expansion. See Figure 1 , Figure 1 The directions indicated by the two arrows in Figure 2 are the two sides of an alignment mark. The different graphic environment densities on these two sides result in the deformation of the formed alignment mark, resulting in an asymmetric pattern, as shown in Figure 2 where a square alignment mark tilts to the left ( Figure 2 the direction indicated by the arrow in

[0034] The asymmetry of the alignment mark will cause measurement errors during alignment measurement, resulting in a decrease in alignment accuracy, thereby affecting the product yield.

[0035] Figure 3It is a schematic structural diagram of an overlay mark in an embodiment of the present application. The overlay mark includes a first structure 110 and a second structure. The second structure includes an alignment pattern 210 and an auxiliary pattern 220. Figure 4 It is a schematic cross-sectional view of the first structure 110 and the alignment pattern 210. Please refer to Figure 3 and Figure 4 , the first structure 110 is embedded in the device target film layer 100. The device target film layer 100 is a non-photoresist film layer, which can be, for example, a silicon layer, a silicon oxide layer, etc. The alignment pattern 210 and the auxiliary pattern 220 are located on the device target film layer 100, and the alignment pattern 210 is located directly above the first structure 110. For the convenience of overlay measurement, the center of the alignment pattern 210 can be set directly above the center of the first structure 110. The center of the first structure 110 cannot deviate too far from the vertical axis where the center of the alignment pattern 210 is located (that is, the distance between the center of the first structure 110 and the vertical axis where the center of the alignment pattern 210 is located cannot be greater than the measurement threshold), otherwise measurement cannot be performed. This measurement threshold is related to the measurement ability of the overlay measurement machine. In an embodiment of the present application, the measurement threshold is 0.5 micrometers. Based on this, in an embodiment of the present application, the center of the first structure 110 is arranged close to the center of the alignment pattern 210, so that the distance between the center of the first structure 110 and the vertical axis where the center of the alignment pattern 210 is located is less than this measurement threshold. The auxiliary pattern 220 is located around the alignment pattern 210 and is arranged close to the alignment pattern 210. The auxiliary pattern 220 is separated from the alignment pattern 210. The auxiliary pattern 220 includes a plurality of sub-patterns, and each sub-pattern is evenly distributed around the alignment pattern 220, so that the density of the auxiliary pattern 220 in all directions around the alignment pattern 220 is basically the same. The material of the second structure is photoresist, which will be removed together during the development after lithography and will not remain in the device.

[0036] The above-mentioned overlay mark adopts a double-layer structure, and the first structure 110 of the front layer is embedded in the device target film layer 100. Therefore, the morphology of the first structure 110 is not easily distorted after lithography. An evenly distributed auxiliary pattern 220 is arranged around the alignment pattern 210 of the current layer, so that the deformation (expansion) of the alignment pattern 110 during the lithography process can tend to be consistent in all directions. Therefore, alignment errors are not easily generated, and it has a high alignment accuracy.

[0037] In an embodiment of the present application, the auxiliary pattern 220 is a centrosymmetric pattern, and its center of symmetry is the center of the alignment pattern 210.

[0038] In an embodiment of the present application, each sub-pattern of the auxiliary pattern 220 is a square (furthermore, it can be a square), and the sizes of each sub-pattern are the same. In other embodiments, each sub-pattern can also be other shapes.

[0039] In one embodiment of the present application, the first structure 110 is a square-shaped figure.

[0040] In one embodiment of the present application, the alignment pattern 210 includes a target square 212 and a square-shaped figure 214 that laterally surrounds the target square 212. That is, the alignment pattern 210 has a "hui" character structure, and the square-shaped figure 214 is separated from the target square 212. With the alignment pattern 210 having this structure, it is not prone to morphological distortion after exposure / baking in a thick photoresist process. Figure 3 In order to show the shape of the first structure 110, the square-shaped figure 214 is made semi-transparent.

[0041] In one embodiment of the present application, the orthographic projection of the alignment pattern 210 on the plane where the upper surface of the first structure 110 is located completely covers the first structure 110. Figure 3 and Figure 4 In the embodiment shown, the overlay mark adopts a "frame in frame" structure, and the orthographic projection of the square-shaped figure 214 on the plane where the upper surface of the first structure 110 is located completely covers the first structure 110.

[0042] In one embodiment of the present application, the first structure 110 and the second structure are arranged in the dicing groove of the wafer.

[0043] In one embodiment of the present application, this overlay mark is applied to a thick photoresist process where the thickness of the photoresist is greater than 4 microns.

[0044] In one embodiment of the present application, the alignment pattern 210 and the auxiliary pattern 220 are formed in the same process step.

[0045] Based on all the above embodiments, the overlay mark of the present application is particularly suitable for a thick photoresist process of high-energy ion implantation. Through the optimized design of the overlay mark structure, the morphology of the overlay mark is not easily affected by the test environment and process conditions, the morphology of the overlay mark is relatively stable, and the data performance is good. The overlay mark of the present application can be measured using a conventional overlay measurement machine tool, without the need to purchase a high-performance overlay measurement machine tool, which can save costs. The overlay mark of the present application can also improve the problem of focus failure during the overlay measurement process. The integrity of the overlay mark pattern is high, the contrast is good, and manual focusing is not required, greatly improving the chip production capacity.

[0046] In one embodiment of the present application, the first structure 110 is not only applicable to a thick photoresist process of high-energy implantation, but also applicable to high-temperature processes such as epitaxial (EPI) buried layers. The morphology stability of the first structure 110 embedded in the device target film layer 100 is relatively good, and the distortion of the pattern during high-temperature treatment is small.

[0047] The present application also provides a photomask combination, including a plurality of photomasks used in combination. The photomask combination includes the patterns of the first structure and the second structure in the overlay marks described in any of the foregoing embodiments, for forming the overlay marks.

[0048] The present application correspondingly provides a method for forming an overlay mark, for forming the overlay mark described in any of the foregoing embodiments. Figure 5 FIG. is a flowchart of a method for forming an overlay mark in an embodiment of the present application, including the following steps:

[0049] S510, form a device target film layer.

[0050] The device target film layer 100 is a non-photoresist film layer, and can be, for example, a silicon layer, a silicon oxide layer, etc.

[0051] S520, form a recessed area in the device target film layer by patterning.

[0052] In an embodiment of the present application, a recessed area having the same shape as the first structure 110 is formed in the device target film layer 100 by lithography and etching.

[0053] S530, fill the recessed area to form a first structure in the recessed area.

[0054] In an embodiment of the present application, the first structure 110 can be formed in the recessed area by deposition. In an embodiment of the present application, the first structure 110 is a square pattern. The size of the first structure 110 cannot be designed too small, otherwise it will be processed into a hole shape due to process capabilities during etching, which is not conducive to overlay measurement.

[0055] S540, form a second structure on the device target film layer by lithography.

[0056] The second structure includes an alignment pattern 210 and an auxiliary pattern 220. The alignment pattern 210 is located directly above the first structure 110. For the convenience of overlay measurement, the center of the alignment pattern 210 can be set directly above the center of the first structure 110. In an embodiment of the present application, the center of the first structure 110 is disposed close to the center of the alignment pattern 210, such that the distance between the center of the first structure 110 and the vertical axis where the center of the alignment pattern 210 is located is less than the measurement threshold. The auxiliary pattern 220 is located around and close to the alignment pattern 210, and the auxiliary pattern 220 is separated from the alignment pattern 210. The auxiliary pattern 220 includes a plurality of sub-patterns, and the sub-patterns are evenly distributed around the alignment pattern 220, such that the density of the auxiliary pattern 220 in all directions around the alignment pattern 220 is substantially the same. The material of the second structure is photoresist.

[0057] In one embodiment of the present application, step S540 includes spin-coating a photoresist on the device target film layer 100 to form a photoresist layer with a thickness greater than 4 microns, baking the photoresist layer, and then exposing it using a corresponding photomask, and then developing to obtain the desired photoresist pattern, which includes the second structure.

[0058] In the above method for forming the alignment mark, the formed alignment mark is a double-layer structure, and the first structure 110 of the front layer is embedded in the device target film layer 100. Therefore, the morphology of the first structure 110 is not easily distorted after photolithography. Auxiliary patterns 220 are uniformly distributed around the alignment pattern 210 of the current layer, so that the deformation (expansion) of the alignment pattern 110 during the photolithography process tends to be consistent in all directions. Therefore, it is not easy to generate alignment errors and has a high alignment accuracy.

[0059] In one embodiment of the present application, after step S540, there is also a step of removing the photoresist. The second structure is removed together during the resist stripping and will not remain in the device.

[0060] In one embodiment of the present application, the auxiliary pattern 220 is a centrosymmetric pattern, and its center of symmetry is the center of the alignment pattern 210.

[0061] In one embodiment of the present application, each sub-pattern of the auxiliary pattern 220 is a square (furthermore, it can be a square), and the sizes of the sub-patterns are equal. In other embodiments, the sub-patterns can also be other shapes.

[0062] In one embodiment of the present application, the first structure 110 is a square frame pattern.

[0063] In one embodiment of the present application, the alignment pattern 210 includes a target square 212 and a square frame pattern 214 that surrounds the target square 212 in the horizontal direction, that is, the alignment pattern 210 is a "hui" character structure, and the square frame pattern 214 is separated from the target square 212. With the alignment pattern 210 of this structure, it is not easily distorted in morphology after exposure / baking in the thick photoresist process.

[0064] In one embodiment of the present application, the orthographic projection of the alignment pattern 210 on the plane where the upper surface of the first structure 110 is located completely covers the first structure 110. In Figure 3 and Figure 4 In the shown embodiment, the alignment mark adopts a "frame in frame" structure, and the orthographic projection of the square frame pattern 214 on the plane where the upper surface of the first structure 110 is located completely covers the first structure 110.

[0065] In one embodiment of the present application, the first structure 110 and the second structure are arranged in the scribing groove of the wafer.

[0066] In one embodiment of the present application, the method for forming the alignment marks is applied to a thick resist process where the thickness of the photoresist is greater than 4 microns.

[0067] In one embodiment of the present application, the first structure 110 is applicable not only to the thick resist process of high-energy implantation, but also to high-temperature processes such as epitaxial buried layer (EPI). The first structure 110 embedded in the device target film layer 100 has good morphological stability and less distortion of the pattern during high-temperature treatment.

[0068] The method for forming the alignment marks in the present application and the alignment marks are based on the same inventive concept. For the content not specifically described in the method for forming the alignment marks, reference can be made to the introduction of the alignment marks above.

[0069] It should be understood that although the steps in the flowchart of the present application are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear description in this article, there is no strict order limit for the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the present application may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or steps or stages in other steps.

[0070] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memories. Non-volatile memories can include read-only memory (ROM), magnetic tapes, floppy disks, flash memories, optical memories, high-density embedded non-volatile memories, resistive random access memories (ReRAM), magnetoresistive random access memories (MRAM), ferroelectric random access memories (FRAM), phase change memories (PCM), graphene memories, etc. Volatile memories can include random access memory (RAM) or external cache memories, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in the present application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., and are not limited thereto. The processors involved in the embodiments provided in the present application can be general-purpose processors, central processors, graphics processors, digital signal processors, programmable logics, data processing logics based on quantum computing, etc., and are not limited thereto.

[0071] The present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps in the method described in any one of the above embodiments are implemented.

[0072] The present application also provides a computer device, including a memory and a processor. A computer program is stored in the memory. When the processor executes the computer program, the steps in the method described in any one of the foregoing embodiments are implemented.

[0073] The present application also provides a computer program product, including a computer program. When the computer program is executed by a processor, the steps of the method described in any one of the foregoing embodiments are implemented.

[0074] In the description of this specification, the descriptions referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0075] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the various technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as within the scope described in this specification.

[0076] The above-described embodiments only represent several implementation manners of the present invention. The descriptions are relatively specific and detailed, but should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent shall be subject to the appended claims.

Claims

1. A registration mark, characterized in that, Comprising: A first structure, embedded in the target film layer of the device; The target film layer of the device is a non-photoresist film layer; A second structure, located on the target film layer of the device, including an alignment pattern and an auxiliary pattern, the alignment pattern being directly above the first structure, the auxiliary pattern being disposed around and adjacent to the alignment pattern, the auxiliary pattern including a plurality of sub-patterns, each of the sub-patterns being evenly distributed around the alignment pattern; the material of the second structure is photoresist.

2. The overlay mark according to claim 1, wherein The auxiliary pattern is a centrosymmetric pattern, and its center of symmetry is the center of the alignment pattern.

3. The overlay mark according to claim 2, wherein Each of the sub-patterns is a square, and the sizes of the sub-patterns are equal.

4. The overlay mark according to claim 1, wherein The center of the alignment pattern is directly above the center of the first structure.

5. The overlay mark according to claim 1, characterized in that, The first structure is a first square pattern.

6. The overlay mark according to claim 5, characterized in that, The alignment pattern includes a target square and a second square pattern that laterally surrounds the target square.

7. The overlay mark according to claim 6, wherein The orthographic projection of the second square pattern on the plane where the upper surface of the first square pattern is located completely covers the first square pattern.

8. The overlay mark according to claim 1, characterized in that, The first structure and the second structure are disposed in the dicing channel of the wafer.

9. The overlay mark according to any one of claims 1-8, characterized in that, Applied to a thick photoresist process where the thickness of the photoresist is greater than 4 microns.

10. A method for forming a registration mark, characterized in that, For forming an overlay mark as described in any one of claims 1-9, the method comprising: Forming the target film layer of the device; Forming a recessed area in the target film layer of the device by patterning; Filling the recessed area to form the first structure in the recessed area; Forming the second structure on the target film layer of the device by lithography.