Server

Abstract

The embodiment of the invention provides a server. The server comprises a first circuit board and a substrate management controller plug-in card, the first circuit board comprises a processor, a first BIOS chip and a first switch module; the substrate management controller plug-in card comprises a substrate management controller chip, a second BIOS chip and a second switch module; a first port, a second port and a third port of the first switch module are respectively connected with the processor, the first BIOS chip and a first port of the second switch module, and a second port and a third port of the second switch module are respectively connected with the second BIOS chip and the substrate management controller chip. The server is used for realizing normal work and communication of the two BIOS chips in the server.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of servers, and in particular, to a server. Background Art

[0002] In the traditional server mode, the BIOS (Basic Input Output System) chip is placed on the motherboard. With the implementation of new specifications such as DC-SCM (DataCenter-ready Secure Control Module), placing the BIOS chip on the BMC (Baseboard Management Controller) card has gradually become the mainstream solution. Therefore, in order to be compatible with the two server modes, a BIOS chip can be set on both the motherboard and the BMC card.

[0003] However, how to enable both of the two BIOS chips in the server to work and communicate normally has become an important problem to be solved urgently. Summary of the Invention

[0004] The embodiments of the present application provide a server to achieve the normal operation and communication of the two BIOS chips in the server.

[0005] On the one hand, the embodiments of the present application provide a server, including: a first circuit board and a baseboard management controller card; the first circuit board includes a processor, a first basic input output system chip, and a first switch module, and the baseboard management controller card includes a baseboard management controller chip, a second basic input output system chip, and a second switch module; wherein,

[0006] Both the first switch module and the second switch module include three ports. The first port of the first switch module is connected to the processor, the second port of the first switch module is connected to the first basic input output system chip, the third port of the first switch module is connected to the first port of the second switch module, the second port of the second switch module is connected to the second basic input output system chip, and the third port of the second switch module is connected to the baseboard management controller chip;

[0007] When the second port and the third port of the first switch module are conducted, and the first port and the third port of the second switch module are conducted, the baseboard management controller chip and the first basic input output system chip are connected;

[0008] When the second port and the third port of the second switch module are conducting, the baseboard management controller chip and the second basic input / output system chip are connected.

[0009] In the above solution, by changing the connection relationship between the three ports of the first switch module and the connection relationship between the three ports of the second switch module, channel switching between the baseboard management controller chip and the first basic input / output system chip and the second basic input / output system chip can be achieved, thereby supporting communication between the baseboard management controller chip on the baseboard management controller card and the first basic input / output system chip on the first circuit board. When the baseboard management controller chips each only include one interface capable of communicating with the basic input / output system chip, it can also support the upgrade of the baseboard management controller chip to the first basic input / output system chip, effectively ensuring the reliable operation of the server.

[0010] In some embodiments, when the first port and the second port of the first switch module are conducting, the processor and the first basic input / output system chip are connected;

[0011] When the first port and the third port of the first switch module are conducting and the first port and the second port of the second switch module are conducting, the processor and the second basic input / output system chip are connected.

[0012] In the above solution, by changing the connection relationship between the three ports of the first switch module and the connection relationship between the three ports of the second switch module, the processor on the first circuit board can start from the second basic input / output system chip on the baseboard management controller card, and the baseboard management controller chip can upgrade the second basic input / output system chip on the baseboard management controller card, realizing the decoupling of the baseboard management controller card and the first circuit board, which is convenient for server maintenance; the processor on the first circuit board can start from the first basic input / output system chip on the first circuit board, and the baseboard management controller chip can upgrade the first basic input / output system chip on the first circuit board, which can be compatible with the traditional server mode. Therefore, the compatibility and flexibility of the server can be effectively improved, and it can better meet the needs of various application scenarios.

[0013] In some embodiments, the first switch module receives a first enable signal sent by the baseboard management controller chip, and is used to conduct the connection between the corresponding two ports among the three ports of the first switch module according to the first enable signal;

[0014] The second switch module receives a second enable signal sent by the baseboard management controller chip, and is used to conduct the connection between the corresponding two ports among the three ports of the second switch module according to the second enable signal.

[0015] In the above solution, the baseboard management controller chip can change the connection relationships between the three ports of the first switch module and the connection relationships between the three ports of the second switch module through the first enable signal and the second enable signal, so as to flexibly and accurately switch different communication modes.

[0016] In some embodiments, the first switch module includes a first switch, a second switch, and a third switch, and the second switch module includes a fourth switch, a fifth switch, and a sixth switch; wherein,

[0017] The common terminal of the first switch is connected to the processor, the first terminal of the first switch is connected to the second terminal of the third switch, and the second terminal of the first switch is connected to the first terminal of the second switch;

[0018] The common terminal of the second switch is connected to the first basic input / output system chip, and the second terminal of the second switch is connected to the first terminal of the third switch;

[0019] The common terminal of the third switch is connected to the common terminal of the fourth switch;

[0020] The first terminal of the fourth switch is connected to the first terminal of the sixth switch, and the second terminal of the fourth switch is connected to the first terminal of the fifth switch;

[0021] The common terminal of the fifth switch is connected to the second basic input / output system chip, and the second terminal of the fifth switch is connected to the second terminal of the sixth switch;

[0022] The common terminal of the sixth switch is connected to the baseboard management controller chip.

[0023] In some embodiments, when the common terminal and the second terminal of the second switch are conducting, the common terminal and the first terminal of the third switch are conducting, the common terminal and the first terminal of the fourth switch are conducting, and the common terminal and the first terminal of the sixth switch are conducting, the baseboard management controller chip and the first basic input / output system chip are connected.

[0024] In some embodiments, when the common terminal and the second terminal of the fifth switch are conducting, the common terminal and the second terminal of the sixth switch are conducting, and the common terminal and the first terminal of the first switch are conducting, the baseboard management controller chip and the second basic input / output system chip are connected.

[0025] In some embodiments, when the common terminal of the first switch and the second terminal of the first switch are conducting, the common terminal of the second switch and the first terminal of the second switch are conducting, and the common terminal of the fifth switch and the first terminal of the fifth switch are conducting, the processor is connected to the first basic input / output system chip.

[0026] In some embodiments, when the common terminal of the first switch and the first terminal of the first switch are conducting, the common terminal of the third switch and the second terminal of the third switch are conducting, the common terminal of the fourth switch and the second terminal of the fourth switch are conducting, and the common terminal of the fifth switch and the first terminal of the fifth switch are conducting, the processor is connected to the second basic input / output system chip.

[0027] In the above solutions, both the first switch module and the second switch module are composed of three switches. Each switch can conduct the connection between one of the first terminal or the second terminal of the switch and the common terminal of the switch. The common terminals of the three switches are used as the three ports of each switch module, so that any two ports among the three ports of the first switch module / second switch module can be conducted.

[0028] In some embodiments, the first enable signal includes a first sub-enable signal, a second sub-enable signal, and a third sub-enable signal; the second enable signal includes a fourth sub-enable signal, a fifth sub-enable signal, and a sixth sub-enable signal;

[0029] The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch respectively receive the first sub-enable signal, the second sub-enable signal, the third sub-enable signal, the fourth sub-enable signal, the fifth sub-enable signal, and the sixth sub-enable signal;

[0030] The first switch / the second switch / the third switch / the fourth switch / the fifth switch / the sixth switch is configured to conduct the connection between the common terminal and the first terminal of the switch when the first sub-enable signal / the second sub-enable signal / the third sub-enable signal / the fourth sub-enable signal / the fifth sub-enable signal / the sixth sub-enable signal is enabled; or, conduct the connection between the common terminal and the second terminal of the switch when the first sub-enable signal / the second sub-enable signal / the third sub-enable signal / the fourth sub-enable signal / the fifth sub-enable signal / the sixth sub-enable signal is not enabled.

[0031] In some embodiments, when the second sub-enable signal is disabled, the third sub-enable signal is enabled, the fourth sub-enable signal is enabled, and the sixth sub-enable signal is enabled, the baseboard management controller chip communicates with the first basic input / output system chip.

[0032] In some embodiments, when the first sub-enable signal is enabled, the fifth sub-enable signal is disabled, and the sixth sub-enable signal is disabled, the baseboard management controller chip communicates with the second basic input / output system chip.

[0033] In some embodiments, when the first sub-enable signal is disabled, the second sub-enable signal is enabled, and the fifth sub-enable signal is enabled, the processor communicates with the first basic input / output system chip.

[0034] In some embodiments, when the first sub-enable signal is enabled, the third sub-enable signal is disabled, the fourth sub-enable signal is disabled, and the fifth sub-enable signal is enabled, the processor communicates with the second basic input / output system chip.

[0035] In the above solutions, through the first sub-enable signal, the second sub-enable signal, the third sub-enable signal, the fourth sub-enable signal, the fifth sub-enable signal, and the sixth sub-enable signal, the port connection relationships inside the first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch can be accurately controlled to achieve the conduction between any two of the three ports of the first switch module / second switch module.

[0036] In some embodiments, the first circuit board further includes a first connector, and the baseboard management controller card further includes a second connector. The first connector and the second connector are a pair of male-female connectors.

[0037] The third port of the first switch module is connected to the first connector, and the first port of the second switch module is connected to the second connector.

[0038] In the above solutions, by connecting the third port of the first switch module to the first connector and connecting the first port of the second switch module to the second connector, the purpose of connecting the third port of the first switch module and the first port of the second switch module is achieved.

[0039] In some embodiments, the baseboard management controller chip is configured to send a second enable signal to the second switch module; and send a first enable signal to the first switch module through the second connector and the first connector.

[0040] In the above solution, the baseboard management controller chip can directly send a second enable signal to the second switch module on the baseboard management controller card, and send a first enable signal to the first switch module through the second connector and the first connector, which is easy to implement and does not require additional devices.

[0041] In some embodiments, the first circuit board further includes: a logic device;

[0042] The baseboard management controller chip is configured to send a second enable signal to the second switch module; and send an enable control instruction to the logic device through the second connector and the first connector;

[0043] The logic device is configured to send a first enable signal to the first switch module according to the enable control instruction.

[0044] In the above solution, when the first enable signal needs to occupy multiple communication interfaces, the baseboard management controller chip can use only one communication interface to send an enable control instruction to the logic device. Different communication modes correspond to different enable control instructions, and different first enable signals corresponding to different enable control instructions are preset in the logic device. While accurately controlling the first switch module, the communication interfaces of the baseboard management controller chip can be effectively saved.

[0045] The server provided by the embodiments of the present application can realize channel switching between the processor, the baseboard management controller chip, the first basic input / output system chip, and the second basic input / output system chip by changing the connection relationship between the three ports of the first switch module and the connection relationship between the three ports of the second switch module, so as to support communication between the baseboard management controller chip on the baseboard management controller card and the first basic input / output system chip on the first circuit board. When the baseboard management controller chips each include only one interface capable of communicating with the basic input / output system chip, it can also support the upgrade of the baseboard management controller chip to the first basic input / output system chip, effectively ensuring the reliable operation of the server. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained according to these drawings without creative efforts.

[0047] Figure 1 FIG. is a schematic structural diagram of a server provided by an embodiment of the present application;

[0048] Figure 2 Schematic diagram of another server provided by an embodiment of the present application;

[0049] Figure 3 Scenario schematic diagram of the second mode provided by an embodiment of the present application;

[0050] Figure 4 Scenario schematic diagram of the third mode provided by an embodiment of the present application;

[0051] Figure 5 Scenario schematic diagram of the fourth mode provided by an embodiment of the present application;

[0052] Figure 6 Scenario schematic diagram of the fifth mode provided by an embodiment of the present application.

[0053] Through the above-mentioned drawings, specific embodiments of the present application have been shown, and more detailed descriptions will be given later. These drawings and text descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. Detailed implementation manners

[0054] Here, the exemplary embodiments will be described in detail, and the examples are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementation manners described in the following exemplary embodiments do not represent all implementation manners consistent with the embodiments of the present application. On the contrary, they are only examples of devices and methods consistent with some aspects of the embodiments of the present application as detailed in the appended claims.

[0055] An embodiment of the present application provides a server to support the processor / BMC chip to communicate flexibly with one of the two BIOS chips, so that both of the two BIOS chips in the server can work and communicate normally.

[0056] The technical solutions of the embodiments of the present application will be described in detail below with specific embodiments. These several specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0057] Figure 1 Schematic diagram of a server provided by an embodiment of the present application. Please refer to Figure 1, the server includes: a first circuit board 10 and a baseboard management controller card (BMC card) 20; the first circuit board 10 includes a processor 11, a first basic input / output system chip (BIOS1) 12, and a first switch module 13, and the baseboard management controller card 20 includes a baseboard management controller chip (BMC chip) 21, a second basic input / output system chip (BIOS2) 22, and a second switch module 23; wherein,

[0058] Both the first switch module 13 and the second switch module 23 include three ports. The first port P1 of the first switch module 13 is connected to the processor 11, the second port P2 of the first switch module 13 is connected to the first basic input / output system chip 12, the third port P3 of the first switch module 13 is connected to the first port P4 of the second switch module 23, the second port P5 of the second switch module 23 is connected to the second basic input / output system chip 22, and the third port P6 of the second switch module 23 is connected to the baseboard management controller chip 21;

[0059] When the second port P2 and the third port 93 of the first switch module 13 are turned on, and the first port 94 and the third port 96 of the second switch module 23 are turned on, the baseboard management controller chip 21 and the first basic input / output system chip 12 are connected.

[0060] When the second port P5 and the third port P6 of the second switch module 23 are turned on, the baseboard management controller chip 21 and the second basic input / output system chip 22 are connected.

[0061] Exemplarily, a first switch module 13 can be arranged on the first circuit board 10, and a second switch module 23 can be arranged on the baseboard management controller card 20. The third port P3 of the first switch module 13 is connected to the first port P4 of the second switch module 23, so that the first circuit board 10 and the baseboard management controller card 20 can be connected, supporting communication between the devices on the first circuit board 10 and the devices on the baseboard management controller card 20. The first port P1 of the first switch module 13 is connected to the port of the processor 11 for communicating with the basic input / output system chip, the third port P6 of the second switch module 23 is connected to the port of the baseboard management controller chip 21 for communicating with the basic input / output system chip, the second port P2 of the first switch module 13 is connected to the first basic input / output system chip 12, and the second port P5 of the second switch module 23 is connected to the second basic input / output system chip 22. Any two of the three ports of the first switch module 13 can be conducted, and any two of the three ports of the second switch module 23 can be conducted. Therefore, by changing the connection relationship between the three ports of the first switch module 13 and the connection relationship between the three ports of the second switch module 23, channel switching between the processor 11, the baseboard management controller chip 21 and the first basic input / output system chip 12, the second basic input / output system chip 22 can be realized.

[0062] Among them, when the second port P2 and the third port 93 of the first switch module 13 are conducted, and the first port 94 and the third port 96 of the second switch module 23 are conducted, the baseboard management controller chip 21 and the first basic input / output system chip 12 are connected through the first switch module 13 and the second switch module 23, so that the baseboard management controller chip 21 on the baseboard management controller card 20 can upgrade the first basic input / output system chip 12 on the first circuit board 10.

[0063] When the second port P5 and the third port P6 of the second switch module 23 are conducted, at this time, the baseboard management controller chip 21 and the second basic input / output system chip 22 on the baseboard management controller card 20 are connected, and the baseboard management controller chip 21 can upgrade the second basic input / output system chip 22.

[0064] Exemplarily, the first circuit board 10 can be a main board.

[0065] In the server provided in this embodiment, by changing the connection relationships among the three ports of the first switch module and the connection relationships among the three ports of the second switch module, channel switching between the baseboard management controller chip and the first basic input / output system chip and the second basic input / output system chip can be achieved, thereby supporting communication between the baseboard management controller chip on the baseboard management controller card and the first basic input / output system chip on the first circuit board. When the baseboard management controller chips each include only one interface capable of communicating with the basic input / output system chip, the baseboard management controller chip can also support the upgrade of the first basic input / output system chip, effectively ensuring the reliable operation of the server.

[0066] In some embodiments, when the first port P1 and the second port P2 of the first switch module 13 are conducting, the processor 11 and the first basic input / output system chip 12 are connected.

[0067] When the first port P1 and the third port P3 of the first switch module 13 are conducting and the first port P4 and the second port P5 of the second switch module 23 are conducting, the processor 11 and the second basic input / output system chip 22 are connected.

[0068] For example, when the first port P1 and the second port P2 of the first switch module 13 are conducting, the first basic input / output system chip 12 on the first circuit board 10 and the processor 11 are connected, and the processor 11 can be started from the first basic input / output system chip 12. When the first port P1 and the third port P3 of the first switch module 13 are conducting and the first port P4 and the second port P5 of the second switch module 23 are conducting, the processor 11 and the second basic input / output system chip 22 on the baseboard management controller card 20 are connected, and at this time the processor 11 can be started from the second basic input / output system chip 22.

[0069] In the server provided in this embodiment, by controlling the first switch module 13 and the second switch module 23 to conduct the connection between the corresponding two ports among the three ports of the switch module, the processor 11 on the first circuit board 10 can be started from the second basic input / output system chip 22 on the baseboard management controller card 20, and the baseboard management controller chip 21 can upgrade the second basic input / output system chip 22 on the baseboard management controller card 20, realizing the decoupling of the baseboard management controller card 20 and the first circuit board 10, which is convenient for the maintenance of the server; the processor 11 on the first circuit board 10 can be started from the first basic input / output system chip 12 on the first circuit board 10, and the baseboard management controller chip 21 can upgrade the first basic input / output system chip 12 on the first circuit board 10, being able to be compatible with the traditional server mode. Therefore, the compatibility and flexibility of the server can be effectively improved, and it can better meet the requirements of various application scenarios.

[0070] In some embodiments, the first switch module 13 receives the first enable signal sent by the baseboard management controller chip 21, and is used to conduct the connection between the corresponding two ports among the three ports of the first switch module 13 according to the first enable signal;

[0071] The second switch module 23 receives the second enable signal sent by the baseboard management controller chip 21, and is used to conduct the connection between the corresponding two ports among the three ports of the second switch module 23 according to the second enable signal.

[0072] Among them, when the first port P1 and the second port P2 of the first switch module 13 are conducted, the processor 11 is connected to the first basic input / output system chip 12 on the first circuit board 10; when the first port P1 and the third port P3 of the first switch module 13 are conducted, the processor 11 is connected to the baseboard management controller card 20; when the second port P2 and the third port P3 of the first switch module 13 are conducted, the first basic input / output system chip 12 is connected to the baseboard management controller card 20; when the first port P4 and the second port P5 of the second switch module 23 are conducted, the second basic input / output system chip 22 on the baseboard management controller card 20 is connected to the first circuit board 10; when the first port P4 and the third port P6 of the second switch module 23 are conducted, the baseboard management controller chip 21 is connected to the first circuit board 10; when the second port P5 and the third port P6 of the second switch module 23 are conducted, the second basic input / output system chip 22 on the baseboard management controller card 20 is connected to the baseboard management controller chip 21.

[0073] Therefore, by sending a first enable signal and a second enable signal to the first switch module 13 and the second switch module 23 respectively, the baseboard management controller chip 21 can control the first switch module 13 to conduct the connection between the corresponding two ports among the three ports of the first switch module 13, and control the second switch module 23 to conduct the connection between the corresponding two ports among the three ports of the second switch module 23, so as to realize the communication inside the first circuit board 10 or the baseboard management controller card 20 and the communication between the first circuit board 10 and the baseboard management controller card 20.

[0074] The baseboard management controller chip 21 can configure the first enable signal and the second enable signal according to the two devices to be communicated. For example, when the two devices to be communicated are the processor 11 and the first basic input / output system chip 12, the baseboard management controller chip 21 controls the first port P1 and the second port P2 of the first switch module 13 to conduct through the first enable signal; when the two devices to be communicated are the processor 11 and the second basic input / output system chip 22, the baseboard management controller chip 21 controls the first port P1 and the third port P3 of the first switch module 13 to conduct through the first enable signal and the second enable signal, and controls the first port P4 and the second port P5 of the second switch module 23 to conduct; when the two devices to be communicated are the baseboard management controller chip 21 and the first basic input / output system chip 12, the baseboard management controller chip 21 controls the second port P2 and the third port P3 of the first switch module 13 to conduct through the first enable signal and the second enable signal, and controls the second port P5 and the third port P6 of the second switch module 23 to conduct; when the two devices to be communicated are the baseboard management controller chip 21 and the second basic input / output system chip 22, the baseboard management controller chip 21 controls the second port P5 and the third port P6 of the second switch module 23 to conduct through the second enable signal.

[0075] Figure 2 It is a schematic structural diagram of another server provided by an embodiment of the present application. Please refer to Figure 2 In some embodiments, the first switch module 13 includes a first switch 131, a second switch 132, and a third switch 133, and the second switch module 23 includes a fourth switch 134, a fifth switch 135, and a sixth switch 136; wherein,

[0076] The common terminal of the first switch 131 is connected to the processor 11, the first terminal of the first switch 131 is connected to the second terminal of the third switch 133, and the second terminal of the first switch 131 is connected to the first terminal of the second switch 132;

[0077] The common terminal of the second switch 132 is connected to the first basic input / output system chip 12, and the second terminal of the second switch 132 is connected to the first terminal of the third switch 133;

[0078] The common terminal of the third switch 133 is connected to the common terminal of the fourth switch 134;

[0079] The first terminal of the fourth switch 134 is connected to the first terminal of the sixth switch 136, and the second terminal of the fourth switch 134 is connected to the first terminal of the fifth switch 135;

[0080] The common terminal of the fifth switch 135 is connected to the second basic input / output system chip 22, and the second terminal of the fifth switch 135 is connected to the second terminal of the sixth switch 136;

[0081] The common terminal of the sixth switch 136 is connected to the baseboard management controller chip 21.

[0082] In a specific implementation, both the first switch module 13 and the second switch module 23 may include three switches. Each switch includes a common terminal, a first terminal, and a second terminal, and can conduct the connection between one of the first terminal and the second terminal of the switch and the common terminal of the switch according to an enable signal. As Figure 2 shown, Figure 2 the first terminal of each switch is marked as 1, and the second terminal of each switch is marked as 0. The common terminals of the first switch 131, the second switch 132, the third switch 133, the fourth switch 134, the fifth switch 135, and the sixth switch 136 are respectively used as the first port P1, the second port P2, the third port P3 of the first switch module 13, and the first port P4, the second port P5, the third port P6 of the second switch module 23. The first terminal of the first switch 131 is connected to the second terminal of the third switch 133, the second terminal of the first switch 131 is connected to the first terminal of the second switch 132, the second terminal of the second switch 132 is connected to the first terminal of the third switch 133, the first terminal of the fourth switch 134 is connected to the first terminal of the sixth switch 136, the second terminal of the fourth switch 134 is connected to the first terminal of the fifth switch 135, and the second terminal of the second switch 132 is connected to the second terminal of the sixth switch 136. Thus, by controlling the connection between one of the first terminal and the second terminal of each switch and the common terminal of the switch, the connection between the common terminals of any two switches in the first switch module 13 / second switch module 23 can be conducted, and further the connection between the corresponding two ports among the three ports of the first switch module 13 / second switch module 23 can be achieved.

[0083] Exemplarily, the first switch 131, the second switch 132, the third switch 133, the fourth switch 134, the fifth switch 135, and the sixth switch 136 are all analog switches.

[0084] Based on the above embodiments, in order to control the connection between the first terminal and the second terminal of each switch and the common terminal of the switch, corresponding enable signals can be sent to each switch respectively. In some embodiments, the first enable signal includes a first sub-enable signal K1, a second sub-enable signal K2, and a third sub-enable signal K3; the second enable signal includes a fourth sub-enable signal S1, a fifth sub-enable signal S2, and a sixth sub-enable signal S3;

[0085] The first switch 131, the second switch 132, the third switch 133, the fourth switch 134, the fifth switch 135, and the sixth switch 136 respectively receive the first sub-enable signal K1, the second sub-enable signal K2, the third sub-enable signal K3, the fourth sub-enable signal S1, the fifth sub-enable signal S2, and the sixth sub-enable signal S3;

[0086] The first switch 131 / the second switch 132 / the third switch 133 / the fourth switch 134 / the fifth switch 135 / the sixth switch 136 is configured to conduct the connection between the common terminal and the first terminal of the switch when the first sub-enable signal K1 / the second sub-enable signal K2 / the third sub-enable signal K3 / the fourth sub-enable signal S1 / the fifth sub-enable signal S2 / the sixth sub-enable signal S3 is enabled; or, conduct the connection between the common terminal and the second terminal of the switch when the first sub-enable signal K1 / the second sub-enable signal K2 / the third sub-enable signal K3 / the fourth sub-enable signal S1 / the fifth sub-enable signal S2 / the sixth sub-enable signal S3 is not enabled.

[0087] In a specific implementation, the first sub-enable signal K1, the second sub-enable signal K2, the third sub-enable signal K3, the fourth sub-enable signal S1, the fifth sub-enable signal S2, and the sixth sub-enable signal S3 can be used to control the first switch 131, the second switch 132, the third switch 133, the fourth switch 134, the fifth switch 135, and the sixth switch 136 to conduct the connection between one of the first terminal and the second terminal of the switch and the common terminal of the switch, so as to conduct the connection between the corresponding two ports among the three ports of the first switch module 13 / the second switch module 23. Among them, when the first sub-enable signal K1 / the second sub-enable signal K2 / the third sub-enable signal K3 / the fourth sub-enable signal S1 / the fifth sub-enable signal S2 / the sixth sub-enable signal S3 is enabled, the first switch 131 / the second switch 132 / the third switch 133 / the fourth switch 134 / the fifth switch 135 / the sixth switch 136 conducts the connection between the common terminal and the first terminal of the switch; when the first sub-enable signal K1 / the second sub-enable signal K2 / the third sub-enable signal K3 / the fourth sub-enable signal S1 / the fifth sub-enable signal S2 / the sixth sub-enable signal S3 is not enabled, the first switch 131 / the second switch 132 / the third switch 133 / the fourth switch 134 / the fifth switch 135 / the sixth switch 136 conducts the connection between the common terminal and the second terminal of the switch.

[0088] Based on the above embodiments, in some embodiments, when the first sub-enable signal K1 is not enabled, the second sub-enable signal K2 is enabled, and the fifth sub-enable signal S2 is enabled, the processor 11 and the first basic input / output system chip 12 are connected.

[0089] When the first sub-enable signal K1 is enabled, the third sub-enable signal K3 is not enabled, the fourth sub-enable signal S1 is not enabled, and the fifth sub-enable signal S2 is enabled, the processor 11 and the second basic input / output system chip 22 are connected.

[0090] When the second sub-enable signal K2 is not enabled, the third sub-enable signal K3 is enabled, the fourth sub-enable signal S1 is enabled, and the sixth sub-enable signal S3 is enabled, the baseboard management controller chip 21 and the first basic input / output system chip 12 are connected.

[0091] When the first sub-enable signal K1 is enabled, the fifth sub-enable signal S2 is not enabled, and the sixth sub-enable signal S3 is not enabled, the baseboard management controller chip 21 and the second basic input / output system chip 22 are connected.

[0092] Exemplarily, the fifth sub-enable signal S2 and the sixth sub-enable signal S3 are the same.

[0093] It can be understood that, since the second terminals of the fifth switch 135 and the sixth switch 136 are connected, when the second port P5 and the third port P6 of the second switch module 23 are connected, the second terminal of the fifth switch 135 is connected to the common terminal of the fifth switch 135, and the second terminal of the sixth switch 136 is connected to the common terminal of the sixth switch 136. At this time, both the fifth sub-enable signal S2 and the sixth sub-enable signal S3 are configured to be disabled; when the first port P4 and the third port P6 of the second switch module 23 are connected, the first terminal of the fourth switch 134 is connected to the common terminal of the fourth switch 134, and the first terminal of the sixth switch 136 is connected to the common terminal of the sixth switch 136. At this time, the sixth sub-enable signal S3 is configured to be enabled, and the enable state of the fifth sub-enable signal S2 is not limited; when the first port P4 and the second port P5 of the second switch module 23 are connected, the second terminal of the fourth switch 134 is connected to the common terminal of the fourth switch 134, and the first terminal of the fifth switch 135 is connected to the common terminal of the fifth switch 135. At this time, the fifth sub-enable signal S2 is configured to be enabled, and the enable state of the sixth sub-enable signal S3 is not limited.

[0094] Therefore, in order to simplify the control logic, the enable states of the fifth sub-enable signal S2 and the sixth sub-enable signal S3 can be set to be the same.

[0095] Furthermore, the fifth sub-enable signal S2 can be used as the sixth sub-enable signal S3, that is, the fifth sub-enable signal S2 is sent to both the fifth switch 135 and the sixth switch 136. In this way, with only one enable signal, the fifth sub-enable signal S2, accurate control of the fifth switch 135 and the sixth switch 136 can be achieved, effectively simplifying the control logic of the switch and facilitating the saving of computing resources. In addition, the baseboard management controller chip 21 can send the fifth sub-enable signal S2 through only one communication interface, which can effectively save the communication interface resources of the baseboard management controller chip 21.

[0096] The following combines Table 1 and Figures 3 - 4 , and describes the enable states of each enable signal in different modes.

[0097] Table 1 Enable Signal Truth Table

[0098]

[0099] Table 1 is the enable signal truth table provided by the embodiment of the present application. Among them, an enable signal truth value of 1 indicates that the enable signal is enabled, an enable signal truth value of 0 indicates that the enable signal is not enabled, and an enable signal truth value of X indicates that the enable state of the enable signal is not limited. Figure 3 is a schematic diagram of the scenario of the first mode provided by the embodiment of the present application. Figure 4 is a schematic diagram of the scenario of the second mode provided by the embodiment of the present application. Figure 5Schematic diagram of the scenario of the third mode provided by the embodiments of the present application. Figure 6 Schematic diagram of the scenario of the fourth mode provided by the embodiments of the present application.

[0100] As shown in Table 1 and Figure 3 As shown, in the first mode, the first sub-enable signal K1 is not enabled, the second sub-enable signal K2 is enabled, the second terminal of the first switch 131 is connected to the common terminal of the first switch 131, the first terminal of the second switch 132 is connected to the common terminal of the second switch 132, the first port P1 and the second port P2 of the first switch module 13 are conducted, the processor 11 is connected to the first basic input / output system chip 12, and the processor 11 starts from the first basic input / output system chip 12 on the first circuit board 10. To prevent the second basic input / output system chip 22 from being modified, the fifth sub-enable signal S2 can be configured to be enabled, so that the second basic input / output system chip 22 is in a floating state and is not connected to the processor 11 or the baseboard management controller chip 21. The enable states of the third sub-enable signal K3 and the fourth sub-enable signal S1 are not limited.

[0101] As shown in Table 1 and Figure 4 As shown, in the second mode, the first sub-enable signal K1 is enabled, the third sub-enable signal K3 is enabled, the fourth sub-enable signal S1 is not enabled, the fifth sub-enable signal S2 is enabled, the first terminal of the first switch 131 is connected to the common terminal of the first switch 131, the second terminal of the third switch 133 is connected to the common terminal of the third switch 133, the second terminal of the fourth switch 134 is connected to the common terminal of the fourth switch 134, the first terminal of the fifth switch 135 is connected to the common terminal of the fifth switch 135, the first port P1 and the third port P3 of the first switch module 13 are conducted, the first port P4 and the second port P5 of the second switch module 23 are conducted, the processor 11 is connected to the second basic input / output system chip 22, and the processor 11 starts from the second basic input / output system chip 22 on the baseboard management controller card 20. The enable state of the second sub-enable signal K2 is not limited.

[0102] As shown in Table 1 and Figure 5As shown, in the third mode, the second sub-enable signal K2 is disabled, the third sub-enable signal K3 is enabled, the fourth sub-enable signal S1 is enabled, and the sixth sub-enable signal S3 is enabled (i.e., the fifth sub-enable signal S2 is enabled). The second terminal of the second switch 132 is connected to the common terminal of the second switch 132. The first terminal of the third switch 133 is connected to the common terminal of the third switch 133. The first terminal of the fourth switch 134 is connected to the common terminal of the fourth switch 134. The first terminal of the sixth switch 136 is connected to the common terminal of the sixth switch 136. The second port P2 and the third port P3 of the first switch module 13 are conducting. The first port P4 and the third port P6 of the second switch module 23 are conducting. The baseboard management controller chip 21 is connected to the first basic input / output system chip 12 on the first circuit board 10, and the baseboard management controller chip 21 can upgrade the first basic input / output system chip 12. The enabling state of the first sub-enable signal K1 is not limited.

[0103] As shown in Table 1 and Figure 6 As shown, in the fourth mode, the fifth sub-enable signal S2 is disabled, and the sixth sub-enable signal S3 is disabled (i.e., the fifth sub-enable signal S2 is disabled). The second terminal of the fifth switch 135 is connected to the common terminal of the fifth switch 135. The second terminal of the sixth switch 136 is connected to the common terminal of the sixth switch 136. The second port P5 and the third port P6 of the second switch module 23 are conducting. The baseboard management controller chip 21 on the baseboard management controller card 20 is connected to the second basic input / output system chip 22, and the baseboard management controller chip 21 can upgrade the second basic input / output system chip 22. To prevent the first basic input / output system chip 12 from being modified, the first sub-enable signal K1 can be configured to be enabled, so that the first basic input / output system chip 12 is in a floating state and not connected to the processor 11 or the baseboard management controller chip 21. The enabling states of the second sub-enable signal K2, the third sub-enable signal K3, and the fourth sub-enable signal S1 are not limited.

[0104] In some embodiments, the first circuit board 10 further includes a first connector 14, and the baseboard management controller card 20 further includes a second connector 24. The first connector 14 and the second connector 24 are a pair of male-female connectors.

[0105] The third port P3 of the first switch module 13 is connected to the first connector 14, and the first port P4 of the second switch module 23 is connected to the second connector 24.

[0106] In a specific implementation, when the baseboard management controller card 20 is connected to the first circuit board 10, the first connector 14 and the second connector 24 are connected. Therefore, the devices on the first circuit board 10 can communicate with the devices on the baseboard management controller card 20 through the first connector 14 and the second connector 24. By connecting the third port P3 of the first switch module 13 to the first connector 14 and the first port P4 of the second switch module 23 to the second connector 24, the connection between the third port P3 of the first switch module 13 and the first port P4 of the second switch module 23 can be achieved.

[0107] Exemplarily, the processor and BMC chip both communicate with the BIOS chip via the SPI interface, the third port P3 of the first switch module 13 is connected to the SPI interface of the first connector 14 , and the first port P4 of the second switch module 23 is connected to the SPI interface of the second connector 24 .

[0108] In some embodiments, the baseboard management controller chip 21 is configured to send a second enable signal to the second switch module 23 ; and send a first enable signal to the first switch module 13 through the second connector 24 and the first connector 14 .

[0109] In a specific implementation, the baseboard management controller chip 21 can directly send a second enable signal to the second switch module 23 on the baseboard management controller card 20, and send a first enable signal to the first switch module 13 through the second connector 24 and the first connector 14, which is easy to implement without the need for additional devices.

[0110] However, when the first enable signal includes multiple sub-enable signals, more communication interfaces of the baseboard management controller chip 21 will be occupied. In other embodiments, a logic device 15 can be provided on the first circuit board 10 to send the first enable signal to the first switch module 13 via the logic device 15. Figures 1 - 6 As shown, the first circuit board 10 further includes: a logic device 15;

[0111] The baseboard management controller chip 21 is configured to send a second enable signal to the second switch module 23; and to send an enable control instruction to the logic device 15 through the second connector 24 and the first connector 14;

[0112] The logic device 15 is configured to send a first enable signal to the first switch module 13 according to the enable control instruction.

[0113] In a specific implementation, the baseboard management controller chip 21 directly sends a second enable signal to the second switch module 23 on the baseboard management controller card 20, and sends an enable control instruction to the logic device 15 through the second connector 24 and the first connector 14; the logic device 15 sends a first enable signal to the first switch module 13 according to the enable control instruction. Therefore, the baseboard management controller chip 21 can send an enable control instruction to the logic device 15 using only one communication interface. Different communication modes correspond to different enable control instructions, and different first enable signals corresponding to different communication modes are preset in the logic device 15, which can effectively save the communication interfaces of the baseboard management controller chip 21.

[0114] Exemplarily, the baseboard management controller chip 21 sends a second enable signal to the second switch module 23 through a General Purpose Input / Output (GPIO) interface.

[0115] Exemplarily, the baseboard management controller chip 21 uses an Inter-Integrated Circuit (I2C) interface to send an enable control instruction to the logic device 15, and the logic device 15 receives the enable control instruction through the I2C interface.

[0116] The embodiment of the present application also provides a computer-readable storage medium. Computer-executable instructions are stored in the computer-readable storage medium. When the computer-executable instructions are executed by a processing chip, they can be used to execute the data transmission method shown in the above method embodiment. The implementation principle and technical effect are similar and will not be elaborated here.

[0117] All or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions. The foregoing program can be stored in a readable memory. When the program is executed, it executes the steps including the above method embodiments; and the foregoing memory (storage medium) includes: read-only memory (ROM), RAM, flash memory, hard disk, solid-state drive, magnetic tape, floppy disk, optical disc, and any combination thereof.

[0118] Embodiments of the present application are described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, and the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processing unit of a general-purpose computer, a special-purpose computer, an embedded processing unit, or other programmable terminal devices to generate a machine, such that the instructions executed by the processing unit of the computer or other programmable terminal devices generate a device for implementing the functions specified in one process Figure 1 one process or multiple processes and / or blocks Figure 1 or a device for implementing the functions specified in multiple blocks.

[0119] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable terminal device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device, and the instruction device implements the functions specified in one process Figure 1 one process or multiple processes and / or blocks Figure 1 or a device for implementing the functions specified in multiple blocks.

[0120] These computer program instructions can also be loaded onto a computer or other programmable terminal device, such that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one process Figure 1 one process or multiple processes and / or blocks Figure 1 or a device for implementing the functions specified in multiple blocks.

[0121] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalent technologies, the embodiments of the present application are also intended to include these modifications and variations.

[0122] In the embodiments of the present application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising an …" does not exclude the presence of additional identical elements in the process, method, article or device comprising the element. The term "or" and its variants may mean "and / or". In the embodiments of the present application, terms such as "first", "second", etc. are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. In the embodiments of the present application, "a plurality of" means two or more. "And / or" describes the association relationship of associated objects and indicates that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0123] After considering the specification and the invention disclosed in the practice, those skilled in the art will readily conceive of other embodiments of the present application. The embodiments of the present application are intended to cover any variations, uses or adaptations of the embodiments of the present application that follow the general principles of the embodiments of the present application and include the common general knowledge or conventional technical means in the technical field not disclosed in the embodiments of the present application.

Claims

1. A server, characterized in that, Comprising: A first circuit board and a baseboard management controller card; the first circuit board includes a processor, a first basic input / output system chip, and a first switch module, and the baseboard management controller card includes a baseboard management controller chip, a second basic input / output system chip, and a second switch module; wherein, Both the first switch module and the second switch module include three ports. The first port of the first switch module is connected to the processor, the second port of the first switch module is connected to the first basic input / output system chip, the third port of the first switch module is connected to the first port of the second switch module, the second port of the second switch module is connected to the second basic input / output system chip, and the third port of the second switch module is connected to the baseboard management controller chip; When the second port and the third port of the first switch module are conducting, and the first port and the third port of the second switch module are conducting, the baseboard management controller chip and the first basic input / output system chip are connected; When the second port and the third port of the second switch module are conducting, the baseboard management controller chip and the second basic input / output system chip are connected.

2. The server according to claim 1, characterized in that When the first port and the second port of the first switch module are conducting, the processor and the first basic input / output system chip are connected; When the first port and the third port of the first switch module are conducting, and the first port and the second port of the second switch module are conducting, the processor and the second basic input / output system chip are connected.

3. The server according to claim 1, characterized in that The first switch module receives a first enable signal sent by the baseboard management controller chip, and is used to conduct the connection between the corresponding two ports among the three ports of the first switch module according to the first enable signal; The second switch module receives a second enable signal sent by the baseboard management controller chip, and is used to conduct the connection between the corresponding two ports among the three ports of the second switch module according to the second enable signal.

4. The server according to claim 3, wherein The first switch module includes a first switch, a second switch, and a third switch, and the second switch module includes a fourth switch, a fifth switch, and a sixth switch; wherein, The common terminal of the first switch is connected to the processor, the first terminal of the first switch is connected to the second terminal of the third switch, and the second terminal of the first switch is connected to the first terminal of the second switch; The common terminal of the second switch is connected to the first basic input / output system chip, and the second terminal of the second switch is connected to the first terminal of the third switch; The common terminal of the third switch is connected to the common terminal of the fourth switch; The first terminal of the fourth switch is connected to the first terminal of the sixth switch, and the second terminal of the fourth switch is connected to the first terminal of the fifth switch; The common terminal of the fifth switch is connected to the second basic input / output system chip, and the second terminal of the fifth switch is connected to the second terminal of the sixth switch; The common terminal of the sixth switch is connected to the baseboard management controller chip.

5. The server according to claim 4, characterized in that, When the common terminal and the second terminal of the second switch are conducting, the common terminal and the first terminal of the third switch are conducting, the common terminal and the first terminal of the fourth switch are conducting, and the common terminal and the first terminal of the sixth switch are conducting, the baseboard management controller chip and the first basic input / output system chip are connected; When the common terminal and the second terminal of the fifth switch are conducting, the common terminal and the second terminal of the sixth switch are conducting, and the common terminal and the first terminal of the first switch are conducting, the baseboard management controller chip and the second basic input / output system chip are connected.

6. The server according to claim 4, wherein The first enable signal includes a first sub-enable signal, a second sub-enable signal, and a third sub-enable signal; the second enable signal includes a fourth sub-enable signal, a fifth sub-enable signal, and a sixth sub-enable signal; The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch respectively receive the first sub-enable signal, the second sub-enable signal, the third sub-enable signal, the fourth sub-enable signal, the fifth sub-enable signal, and the sixth sub-enable signal; The first switch / the second switch / the third switch / the fourth switch / the fifth switch / the sixth switch is used to conduct the connection between the common terminal and the first terminal of the switch when the first sub-enable signal / the second sub-enable signal / the third sub-enable signal / the fourth sub-enable signal / the fifth sub-enable signal / the sixth sub-enable signal is enabled; or, when the first sub-enable signal / the second sub-enable signal / the third sub-enable signal / the fourth sub-enable signal / the fifth sub-enable signal / the sixth sub-enable signal is not enabled, conduct the connection between the common terminal and the second terminal of the switch.

7. The server according to claim 6, wherein When the second sub-enable signal is not enabled, the third sub-enable signal is enabled, the fourth sub-enable signal is enabled, and the sixth sub-enable signal is enabled, the baseboard management controller chip and the first basic input / output system chip are connected; When the first sub-enable signal is enabled, the fifth sub-enable signal is not enabled, and the sixth sub-enable signal is not enabled, the baseboard management controller chip and the second basic input / output system chip are connected.

8. The server according to any one of claims 3-7, characterized in that, The first circuit board further includes a first connector, and the baseboard management controller card further includes a second connector. The first connector and the second connector are a pair of male-female connectors. The third port of the first switch module is connected to the first connector, and the first port of the second switch module is connected to the second connector.

9. The server according to claim 8, wherein The baseboard management controller chip is configured to send a second enable signal to the second switch module; and send a first enable signal to the first switch module through the second connector and the first connector.

10. The server according to claim 8, wherein The first circuit board further includes: a logic device; The baseboard management controller chip is configured to send a second enable signal to the second switch module; and send an enable control instruction to the logic device through the second connector and the first connector. The logic device is configured to send a first enable signal to the first switch module according to the enable control instruction.

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