Data sequence number remapping method, electronic equipment and storage medium

Abstract

The invention relates to the technical field of chip design, in particular to a data sequence number remapping method, electronic equipment and a storage medium, which comprises the following steps of: remapping a data sequence number Rtagi bound with ith data sent by a second verification module and a data sequence number Ctagi bound with ith data sent by a first verification module; taking the Rtagi as a unique index identifier, taking the Ctagi as associated data, storing the Rtagi and the Ctagi into a storage structure, and establishing a mapping relation; replacing the Ctagi with the Rtagi to obtain updated data, and enabling the verification environment to pass verification based on the updated data; when the verification environment returns the response data of the CData to the first verification module, the Rtagi is used as the address index to take out the Ctagi stored in the strck, and the Ctagi is returned to the first verification module, so that the problem of backspacing logic is avoided, and the development period is shortened.

Description

Technical Field

[0001] The present invention relates to the technical field of chip design, and particularly to a method for remapping data sequence numbers, an electronic device, and a storage medium. Background Art

[0002] In a co-simulation mechanism, the design verification of complex hardware and software systems allows different simulation tools or models to work together. Taking cmodel (software model) and RTL (Register-Transfer Level) as examples, the two can run together in the same simulation environment to jointly verify the system.

[0003] In the system simulation mechanism, for the output interfaces I1-In of the system, each group of interfaces has a corresponding data sequence number (tag) t1-tn. Among them, the tag has no actual meaning and is only used for recycling. For example, an interface sends a read / write request, and this read / write request corresponds to a tag. When the verification platform receives this read / write request, although the data is sent in order, the data is returned in disorder. When returning the data, it is necessary to determine which response corresponds to the i-th request sent by the current interface according to the tag, and the returned tag can be reused. During the co-simulation process, the tags of cmodel and RTL need to be exactly the same, that is, the data of the two is the same. However, in the face of complex scenarios, some abnormal situations may occur, resulting in different tags for the two. For example, since the speed of cmodel is faster than that of RTL, the number of tags sent by cmodel is greater than that of RTL, or when the hardware has an interruption or restart, etc., at this time, the tags will not match, resulting in an error. The unused tags need to be recycled and the code needs to be rolled back to the position where the tags are the same to start verification again. At this time, a large amount of additional logic overhead is required for both cmodel and RTL to recycle the tags. However, there are tens of thousands of pieces of data during the verification process, and the tags are constantly recycled and reused. The rollback logic is quite complex, and each rollback takes two weeks or even longer, resulting in a long development cycle. Therefore, there is an urgent need for a method that can avoid the need to process rollback logic due to the non-return of tags. Summary of the Invention

[0004] In view of the above technical problems, the technical solution adopted by the present invention is: A method for remapping data sequence numbers, the method comprising the following steps: S100, the verification platform receives the data sent by the first verification module and stores it in the buffer. When receiving the i-th piece of data Rdata k sent by the k-th interface inter iWhen, search for the k-th interface inter of the first verification module saved in the cache k The i-th piece of data Cdata sent i .

[0005] S200, compare Rdata i and Cdata i to check if the data parts are the same. If they are the same, obtain the data sequence number Rtag i bound to Rdata i and the data sequence number Ctag i bound to Cdata i , and remap Rtag i and Ctag i . The steps of the remapping include: S210, construct a storage structure strc k , use Rtag i as the unique index identifier, and use Ctag i as the associated data and store it in the strc k , establishing a one-to-one mapping relationship with Rtag i as the index and Ctag i as the associated value.

[0006] S220, replace the data sequence number Ctag i bound to Cdata i with Rtag i , obtaining the updated Cdata i ´, so that the verification environment passes the verification of Rdata i and Cdata i ´.

[0007] S230, when the verification environment returns the response data of Cdata i ´ to the first verification module, use Rtag i as the address index to retrieve the Ctag k saved in the strc i , and return the Ctag i to the first verification module.

[0008] In addition, the present invention also provides a non-transitory computer-readable storage medium, in which at least one instruction or at least one program segment is stored, and the at least one instruction or the at least one program segment is loaded and executed by a processor to implement the above method.

[0009] In addition, the present invention also provides an electronic device, including a processor and the above non-transitory computer-readable storage medium.

[0010] The present invention has at least the following beneficial effects: The present invention provides a method for remapping data serial numbers, an electronic device, and a storage medium. It ingeniously establishes a mapping relationship between data serial numbers through a remapping method and returns data serial numbers through an index retrieval method to solve the problem of data return. Compared with the prior art, it no longer requires the data serial numbers to be exactly the same, and the data serial numbers are no longer the conditions for judging whether the verification passes. Whether the data serial numbers are returned or recycled will not affect the verification result. Therefore, it avoids the problem of having to process the rollback logic due to the non-return of data serial numbers, saves a large amount of time for processing the rollback logic, and shortens the development cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0012] Figure 1 It is a flowchart of a method for remapping data serial numbers provided by an embodiment of the present invention; Figure 2 It is a flowchart of the steps of remapping provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0013] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present invention.

[0014] Unless otherwise defined, all technical and scientific terms used in the embodiments of the present invention have the same meaning as commonly understood by those of ordinary skill in the art.

[0015] Please refer to Figure 1 , which shows a flowchart of a method for remapping data serial numbers. The method includes the following steps: S100, the verification platform receives the data sent by the first verification module and stores it in the cache. When receiving the i-th data Rdata k sent by the k-th interface inter i of the second verification module, search for the i-th data Cdata k sent by the k-th interface interi 。

[0016] In one embodiment, the verification platform is a cosim verification platform, which can combine different simulation environments to achieve co-simulation and testing between software and hardware. Other types of verification platforms that can jointly use two different verification platforms fall within the protection scope of the present invention.

[0017] Among them, the first verification module and the second verification module are both models of the same chip to be tested. Therefore, the k-th interface inter of the first verification module k and the k-th interface inter of the second verification module k have the same interface number configuration and the data they send, etc.

[0018] In one embodiment, the second verification module is RTL (Register Transfer Level model) or VHDL (Very-High-Speed Integrated Circuit Hardware Description Language model). Other types of register transfer level verification modules fall within the protection scope of the present invention.

[0019] In one embodiment, the first verification module is a Cmodel model, a SystemC model, a Python model, or a gate-level netlist verification model, etc. Other types of verification models also fall within the protection scope of the present invention.

[0020] When the second verification module is RTL or VHDL, the first verification module can be any one of a Cmodel model, a SystemC model, a Python model, or a gate-level netlist verification model, etc. It should be noted that in another embodiment, the second verification module is a Cmodel model, a SystemC model, a Python model, or a gate-level netlist verification model, etc., and the first verification module is RTL or VHDL.

[0021] In one embodiment, Rdata i is read request data or write request data. Similarly, Cdata i is read request data or write request data.

[0022] In one embodiment, the cache is a first-in-first-out queue (FIFO).

[0023] S200, compare Rdata i and Cdata iWhether the data parts are the same. If so, obtain Rdata i The bound data serial number Rtag i and Cdata i The bound data serial number Ctag i , and for Rtag i and Ctag i perform remapping.

[0024] Among them, when the data parts are different, the verification platform will directly report an error. This error is caused by the actual difference in the data parts and is a real error, which has nothing to do with the data serial number.

[0025] It should be noted that the data serial number is only used to identify which data is the current data sent by the current interface, rather than the data part itself. Therefore, when comparing data, it should be the data itself that is compared, not the data serial number. Whether the data serial numbers match has no substantial meaning. Therefore, when the data parts are the same, it has actually passed the verification. However, in order to match the verification mechanism of the verification platform and the correct return logic of the data, remapping is required.

[0026] Furthermore, please combine with Figure 2 , Figure 2 which shows the remapping steps. The remapping steps include: S210, construct a storage structure strc k , use Rtag i as the unique index identifier, and use Ctag i as the associated data and store it in the strc k , establish a one-to-one mapping relationship with Rtag i as the index and Ctag i as the associated value.

[0027] In one implementation, the first verification module includes multiple interfaces, and a storage structure is configured for each interface. It should be noted that the data serial numbers of each interface are independent, and there is no relationship between the data serial numbers of different interfaces. Correspondingly, the storage structures of each interface are also independent.

[0028] Among them, the storage structure includes an associative array or two lists, and other storage structures established through mapping relationships also fall within the protection scope of the present invention.

[0029] In one implementation, strc k in S210 is an associative array, where Rtag i is the array index, and Ctag i is stored in the associative array strc k [Rtag i .

[0030] Among them, an associative array, also known as a dictionary or hash table, is a data structure that can associate keys and values, and allows strings or other complex data types to be used as array indices. Among them, using Rtag i as the address index and Ctag i as the data, storing Ctag i as the data into the associative array indexed by Rtag i actually establishes a mapping relationship between Rtag i and Ctag i , that is, assigns a corresponding Ctag i to each Rtag i . Regardless of the size of the associative array, the time required to find the Ctag i corresponding to a specific Rtag i basically remains unchanged, and the required data can be quickly located. The established mapping relationship not only has concise code but also can clearly show the corresponding relationship between Rtag i and Ctag i , and the complexity of dynamically adding, deleting, and modifying the mapping relationship is low.

[0031] In one implementation, strc k is two lists, using the two lists to store Rtag i and Ctag i respectively, and establishing a mapping relationship between Rtag i and Ctag i through the same index position. When looking up, first find the index of Ctag i in the Ctag list, and then obtain Rtag i from the Rtag list through this index.

[0032] S220, replace the data sequence number Ctag i bound to Cdata i with Rtag i to obtain the updated Cdata i ´, so that the verification environment passes the verification of Rdata i and Cdata i ´.

[0033] Among them, after replacing the identifier Ctag i in Cdata i with Rtag i , it can make the data sequence number in Cdata i ´ the same as that in Rdatai have the same data serial numbers in, that is, Rdata i and Cdata i ´ have the same data parts and data serial numbers, and the verification platform determines Rdata i and Cdata i ´ have the same comparison results, and the verification passes. That is, through this method, not only can the mapping relationship of the data serial numbers in the second verification module and the first verification module be re-established, but also the interference of the data serial numbers on the verification results can be removed, so that the verification results will not be rolled back due to the mismatch of the data serial numbers.

[0034] S230, when the verification environment returns Cdata i ´ response data to the first verification module, using Rtag i as the address index to take out Ctag k [Rtag i saved in, and return the Ctag i to the first verification module. i

[0035] Among them, since when the verification environment returns the response data to the first verification module, the response data is returned to inter k which data entry is determined by the data serial number when the data is sent, so the original data serial number needs to be returned. The original data serial number is saved in assoc k [Rtag i , and it can be ensured to be correctly returned to the first verification module according to Ctag i .

[0036] ​It should be noted that for the handling of abnormal situations, since the speed at which the first verification module sends data is greater than that of the second verification module, assuming the first verification module sends 10 pieces of data and the second verification module sends 5 pieces of data, and there are abnormal situations such as reset for the remaining 5 pieces of data of the second verification module, then these 5 pieces of data with abnormal situations will be discarded; since the method provided by the present invention no longer requires the data sequence numbers to be equal, and the data sequence number is no longer a condition for passing verification, but instead re - establishes the mapping relationship between data sequence numbers, when the first verification module sends subsequent data, it can be numbered in sequence, and the data sequence number of the first verification module does not need to roll back to the 5th piece of data of the second verification module, directly avoiding various roll - back problems caused by whether the data sequence numbers are equal or not. In addition, since the data sequence number is no longer a condition for passing verification, and it is no longer required that the data sequence numbers of two identical pieces of data be exactly the same, the data sequence number only needs to be numbered in sequence when sending data, and the data sequence numbers after use can be reused, without the need for a complex roll - back management logic, thus simplifying the management logic of the original system.

[0037] In summary, the present invention provides a method for remapping data sequence numbers. By re - establishing the mapping relationship between the data sequence numbers of two pieces of data, replacing the data sequence number of the first verification module with that of the second verification module to pass verification, and then retrieving and returning the data sequence number of the first verification module through the mapping relationship; this method ingeniously resolves the problem of data return by establishing the mapping relationship between data sequence numbers through the remapping method and retrieving the data sequence number through indexing. It no longer requires the data sequence numbers to be exactly the same, and the data sequence number is no longer a condition for judging whether verification passes or not. Whether the data sequence number is returned or recycled will not affect the verification result. Therefore, it avoids the problem of having to handle the roll - back logic due to the non - return of the data sequence number, saves a large amount of time for handling the roll - back logic, and shortens the development cycle.

[0038] An embodiment of the present invention also provides a non - transitory computer - readable storage medium, which can be set in an electronic device to store at least one instruction or at least one segment of a program related to a method for implementing a method in the method embodiment. The at least one instruction or the at least one segment of the program is loaded and executed by the processor to implement the method provided in the above - mentioned embodiment.

[0039] An embodiment of the present invention also provides an electronic device, including a processor and the aforementioned non - transitory computer - readable storage medium.

[0040] An embodiment of the present invention also provides a computer program product, which includes program code. When the program product runs on an electronic device, the program code is used to cause the electronic device to execute the steps in the method according to various exemplary embodiments of the present invention described above in this specification.

[0041] Those skilled in the art can clearly understand that, for the convenience and conciseness of description, only the above-mentioned division of each functional unit and module is used as an example. In actual applications, the above functions can be allocated to different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above.

[0042] Although some specific embodiments of the present invention have been described in detail by way of examples, those skilled in the art should understand that the above examples are only for illustration and not for limiting the scope of the present invention. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of the present invention. The scope disclosed by the present invention is defined by the appended claims.

Claims

1. A method for remapping data sequence numbers, characterized in that, The method includes the following steps: S100, the verification platform receives the data sent by the first verification module and stores it in the cache. When the i-th data Rdata k sent by the k-th interface inter i of the second verification module is received, search for the i-th data Cdata k sent by the k-th interface inter i ; S200, compare Rdata i and the data part in Cdata i to check if they are the same. If they are, obtain the data sequence number Rtag i bound to Rdata i and the data sequence number Ctag i bound to Cdata i , and remap Rtag i and Ctag i . The steps of the remapping include: S210, construct a storage structure strc k , use Rtag i as the unique index identifier, and store Ctag i as the associated data into the said strc k , and establish a one-to-one mapping relationship with Rtag i as the index and Ctag i as the associated value; S220, replace the Cdata i with the bound data sequence number Ctag i by Rtag i to obtain the updated Cdata i ´, such that the verification environment passes the verification for Rdata i and Cdata i ´; S230, when the verification environment returns the response data of Cdata to the first verification module, use Rtag i as the address index to retrieve the Ctag i stored in strc k , and return the Ctag i to the first verification module. i ​ 2. The method according to claim 1, wherein The first verification module includes a plurality of interfaces, and a storage structure is configured for each interface.

3. The method according to claim 1, wherein strc in S210 k is an associative array, where Rtag i is the array index, and Ctag i is stored in the associative array strc k [Rtag i .

4. The method according to claim 1, characterized in that, strc k For two lists, use the two lists to store Rtag i and Ctag i respectively, and establish the mapping relationship between Rtag i and Ctag i through the same index position.

5. The method according to claim 1, wherein The second verification module is an RTL model or a VHDL model.

6. The method according to claim 1, wherein The first verification module is a Cmodel model, a SystemC model, a Python model or a gate-level netlist verification model.

7. The method according to claim 1, characterized in that The verification platform is a cosim verification platform.

8. A non-transitory computer-readable storage medium storing at least one instruction or at least one program segment, characterized in that, The at least one instruction or the at least one program segment is loaded and executed by a processor to implement the method according to any one of claims 1-7.

9. An electronic device, characterized in that, It includes a processor and the non-transitory computer-readable storage medium described in claim 8.

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