LED array driving system and driving method
The LED array driving system connecting microcontrollers, integrated circuit switching devices and driver devices through a daisy chain architecture, solves the flexible and efficient driving control problem of large array high-brightness LED arrays, and achieves efficient brightness adjustment and system cost reduction.
Patent Information
- Application Number
- CN202410124472.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-29
- Publication Date
- 2025-07-29
AI Technical Summary
The prior art is difficult to provide flexible and efficient driving control and intelligent brightness adjustment for large array high-brightness LED arrays.
The LED array driving system including microcontrollers and monolithic integrated circuit switching devices is adopted. The microcontroller, integrated circuit switching devices and integrated circuit drivers are connected through a daisy chain architecture to achieve flexible control and efficient driving of the LED array.
The flexibility and maintainability of LED arrays are achieved, system costs are reduced, and interchangeability and maintainability are improved.
Smart Images
Figure CN120388529A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to electronic circuits, and more particularly to an LED large array driving system and a driving method. Background Art
[0002] Large array high-brightness light-emitting diodes (LEDs) have a good market in applications such as high-brightness pixelated light sources, high-brightness LED array displays, and motor vehicle headlight systems. Because it is desired to provide flexible and efficient drive control for different LED arrays and intelligently adjust their brightness. Summary of the Invention
[0003] In view of one or more problems existing in the prior art, an object of the present invention is to provide an LED array driving system including a monolithic integrated circuit switching device, which has very high flexibility and maintainability.
[0004] An LED array driving system according to an embodiment of the present invention, the LED array driving system includes: a microcontroller, having a processor and a first digital interface, providing a write data transfer packet through the first digital interface; and the monolithic integrated circuit switching device, including: a first terminal connected to receive a supply voltage from a power supply module; M scanning terminals coupled to M scanning lines in the LED array; a second digital interface connected to the first digital interface of the microcontroller to receive the write data transfer packet, wherein each bit of the encoded data included in the write data transfer packet is transmitted in each clock cycle of the system clock signal, the write data transfer packet at least includes M switch control codes for determining M switch control signals; and M power switches respectively connected to the M scanning terminals, in response to the M switch control signals, controlling the corresponding power switches to connect the corresponding scanning terminals and the first terminal in a preset order, and controlling the LEDs of the M scanning lines to be illuminated row by row in a preset order.
[0005] According to another embodiment of the present invention, an LED array driving system includes K*M scan lines and L*N channels. The LED array driving system includes: K integrated circuit switching devices, each integrated circuit switching device includes a digital interface for receiving a set write data transmission packet, and each integrated circuit switching device controls the M rows of LEDs in the LED array to light up row by row; L integrated circuit driving devices, each integrated circuit driving device includes a digital interface for receiving a write data transmission packet, and each integrated circuit driving device provides driving current for the LEDs in N channels in the LED array; and a microcontroller having a processor, a memory, and a digital interface for providing write data transmission packets, wherein the digital interface of the microcontroller, the K digital interfaces of the K integrated circuit switching devices, and the L digital interfaces of the L integrated circuit driving devices are connected in series in sequence to form a daisy chain architecture, and the write data transmission packet is transmitted to the next digital interface in the daisy chain architecture via one digital interface.
[0006] According to another embodiment of the present invention, a method for driving an LED array includes: connecting a first terminal of a monolithic integrated circuit switching device to a power supply module to receive a power supply voltage; connecting M scan terminals of the monolithic integrated circuit switching device to M scan lines in an LED array; connecting a digital interface of the monolithic integrated circuit switching device to a digital interface of a microcontroller to receive a set write data transmission packet, wherein each bit of the code contained in the write data transmission packet is sent in each clock cycle of a system clock signal; after receiving the write data transmission packet, the monolithic integrated circuit switching device loads the M switch control codes in the write data transmission packet into a first storage unit to provide M switch control signals; and in response to the M switch control signals, connecting the first terminal of the monolithic integrated circuit switching device to a corresponding one of the M scan terminals in a preset sequence to control the LEDs of the M scan lines in the LED array to light up row by row in the preset sequence.
[0007] In an embodiment of the present invention, the integrated circuit switching devices, integrated circuit driving devices, and microcontroller in the driving system of the LED array are connected in series to form a ring structure, which easily realizes data transmission and synchronization. Moreover, both the control and driving devices adopt the design of integrated circuits, which not only has great design flexibility but also facilitates large-scale production, improves interchangeability and maintainability, and reduces system costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 is a schematic diagram of an LED driving system 100 according to an embodiment of the present invention;
[0009] Figure 2 Schematic diagram of a data transmission architecture of an LED driving system 100 according to an embodiment of the present invention;
[0010] Figure 3 is a circuit block diagram of a monolithic integrated circuit switching device 201A according to an embodiment of the present invention;
[0011] Figure 4 is a circuit diagram of a clamping circuit 21-x for a monolithic integrated circuit switching device 201A according to an embodiment of the present invention;
[0012] Figure 5 is a circuit schematic diagram of an LED driving system 100B according to another embodiment of the present invention;
[0013] Figure 6 is a circuit schematic diagram of an LED driving system 100C according to still another embodiment of the present invention;
[0014] Figure 7 is a schematic diagram of a data transmission architecture of an LED driving system 100C according to an embodiment of the present invention;
[0015] Figure 8 is a method flowchart of a driving method 600 of an LED driving system according to an embodiment of the present invention. Detailed Embodiments
[0016] Specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described here are only for illustrative purposes and do not limit the present invention. In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known circuits, materials, or methods have not been specifically described to avoid obscuring the present invention.
[0017] Throughout the specification, references to "one embodiment", "an embodiment", "one example" or "an example" mean that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in at least one embodiment of the present invention. Thus, the phrases "in one embodiment", "in an embodiment", "one example" or "an example" that appear throughout the specification do not necessarily all refer to the same embodiment or example. Additionally, the particular features, structures, or characteristics may be combined in any suitable combination and / or sub-combination in one or more embodiments or examples. Further, those of ordinary skill in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale. It should be understood that when an element is referred to as being "connected to" or "coupled to" another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, no intervening elements are present. The same reference numerals indicate the same elements. The term "and / or" used herein includes any and all combinations of one or more of the associated listed items.
[0018] Figure 1 FIG. 4 is a schematic diagram of an LED driving system 100 according to an embodiment of the present invention. As Figure 1 shown, the LED array driving system 100 is configured to drive an LED array 401. In Figure 1 the embodiment shown, the LED array 401 includes an LED array arranged in M rows and N columns, where M and N can be positive integers greater than 1 selected according to actual application requirements. The LED array 401 generally defines the horizontally arranged direction as the scan line and the vertically arranged direction as the channel line. To help better understand, Figure 1 an LED array 401 composed of 4 scan lines and 48 LED channels is schematically shown, that is, M = 4 and N = 48.
[0019] In Figure 1 the embodiment shown, the LED array driving system 100 further includes an image processor 11, a microcontroller 101, a monolithic integrated circuit switching device 201, and a monolithic integrated circuit driving device 301. The image processor 11 receives image data from an external device, processes the received image data, and outputs at least one of a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, and a clock signal to the microcontroller 101.
[0020] The microcontroller 101 has a processor, a memory, and a first digital interface, processes the received signals, and provides a set write data transfer packet, a system clock signal, a load control signal, etc. through the first digital interface to meet the requirements of image display. Each bit of the encoding included in the write data transfer packet is sent in each clock cycle of the system clock signal.
[0021] exist Figure 1 In the illustrated embodiment, the monolithic integrated circuit switch device 201 includes a first terminal VLED, four scan terminals SW1-SW4, a second digital interface, and four power switches S1-S4. The first terminal VLED is connected to receive a supply voltage from a power supply module to provide driving voltage for the LED array 401. The four scan terminals SW1-SW4 correspond one-to-one to the four scan lines of the LED array 401: scan terminal SW1 is connected to line 1 of the LED array 401, scan terminal SW2 is connected to line 2 of the LED array 401, scan terminal SW3 is connected to line 3 of the LED array 401, and scan terminal SW4 is connected to line 4 of the LED array 401. The second digital interface of the monolithic integrated circuit switch device 201 is connected to the first digital interface of the microcontroller 101 and receives at least write data transmission packets and a system clock signal. In one embodiment, the second digital interface can include an I2C interface, an SPI interface, or other types. Each bit of the code contained in the write data transmission packet is transmitted during each clock cycle of the system clock signal. The write data transmission packet contains at least four switch control codes that determine the four switch control signals.
[0022] The four power switches S1 to S4 are respectively connected to the four scan terminals SW1 to SW4, and in response to the four switch control signals, the first terminal VLED is electrically connected to the corresponding scan terminal in turn but without overlap. In response to the four switch control signals, a corresponding power switch is controlled to connect the corresponding scan terminal and the first terminal in a preset sequence, and the LEDs of the four scan lines are controlled to light up row by row in a preset sequence. The preset sequence mentioned here should be understood by those skilled in the art as a selectable sequence provided by product designers or users based on the needs of different application scenarios. In one embodiment, the lighting of the four scan line LEDs of the LED array 401 is not limited to the order of lines 1 to 4.
[0023] exist Figure 1 In the illustrated embodiment, the monolithic integrated circuit driver device 301 includes 48 drive terminals LED1-LED48 and a third digital interface. The 48 drive terminals LED1-LED48 are respectively coupled to 48 channels in the LED array 401, providing drive current to the LEDs in each of the 48 channels in the LED array 401. The third digital interface of the monolithic integrated circuit driver device 301 is connected to the second digital interface of the monolithic integrated circuit switch device 201 to receive write data transmission packets. The write data transmission packets are transmitted from the second digital interface to the third digital interface. The write data transmission packets contain at least a grayscale control code that determines the grayscale of the N channels in the LED array.
[0024] exist Figure 1 In the illustrated embodiment, the first digital interface of the microcontroller 101, the second digital interface of the monolithic integrated circuit switching device 201, and the third digital interface of the monolithic integrated circuit switching device 301 are connected in a daisy chain architecture.
[0025] Figure 1 Only one integrated circuit switching device 201 and one integrated circuit driving device 301 are shown for the purpose of clear description. In other embodiments, the LED driving system 100 may include K integrated circuit switching devices and L integrated circuit driving devices to drive an LED array of K*M rows and L*N columns. The K digital interfaces of the K integrated circuit switching devices and the L digital interfaces of the L integrated circuit driving devices are sequentially connected in a daisy chain architecture.
[0026] Figure 2 It is a schematic diagram of the data transmission architecture of the LED driving system 100 according to an embodiment of the present invention. As Figure 2 shown, the microcontroller 101 serves as the main control unit in the daisy chain architecture, sends a write data transmission packet to the monolithic integrated circuit switching device 201, and receives the returned status data from the integrated circuit driving device 301.
[0027] Specifically, in one embodiment, the first digital interface, the second digital interface, and the third digital interface all have input terminals and output terminals, where the output terminal of the first digital interface is connected to the input terminal of the second digital interface, the output terminal of the second digital interface is connected to the input terminal of the third digital interface, and the output terminal of the third digital interface is connected to the input terminal of the first digital interface.
[0028] Due to the daisy chain architecture, the monolithic integrated circuit switching device 201 and the integrated circuit driving device 301 have an operating mechanism similar to a relay race. As Figure 2 shown, the first write data transmission packet passes through the second digital interface of the integrated circuit switching device 201 and is passed into the third digital interface of the integrated circuit driving device 301, while the second digital interface of the integrated circuit switching device 201 receives the second write data transmission packet. In one embodiment, the first write data transmission packet contains a gray scale control code that determines the gray scale of the LEDs in N channels of the LED array, and the second write data transmission packet contains M switch control codes that determine M switch control signals. In another embodiment, both the first write data transmission packet and the second write data transmission packet contain at least M switch control codes and N gray scale control codes. Those skilled in the art should understand that each bit of the set write data transmission packet may also contain other codes (not exhaustively listed or limited here) required according to actual applications.
[0029] In Figure 2In the illustrated embodiment, the first write data transfer packet and the second write data transfer packet are taken as a whole and sequentially sent by the first digital interface of the microcontroller 101 until all the bits of the encoding contained in the two write data transfer packets are completely sent, and one round of transmission of the write data transfer packet is completed. In one embodiment, the output terminal of the microcontroller 101 is connected to the input terminal of the integrated circuit switching device 201 to sequentially send the first write data transfer packet and the second write data transfer packet.
[0030] Each bit of the encoding contained in the write data transfer packet sent by the microcontroller 101 is sent in each clock cycle of the system clock signal. The system clock signal can be used to synchronize the write data transfer between the microcontroller 101 and the integrated circuit switching device 201 clock cycle by clock cycle (one clock cycle after another), and to synchronize the write data transfer between the integrated circuit switching device 201 and the integrated circuit driving device 301 clock cycle by clock cycle, having an operating mechanism similar to a relay race.
[0031] The system clock signal can have a first transition edge (such as a rising edge) and a second transition edge opposite to the first transition edge (such as a falling edge) in each clock cycle. Those of ordinary skill in the art should understand that in other embodiments, the first transition edge can be a falling edge and the second transition edge can be a rising edge, depending on specific application requirements.
[0032] In another embodiment, the microcontroller 101 further provides a load control signal Latch. After the microcontroller 101 finishes transmitting all the bits contained in the first write data transfer packet and the second write data transfer packet, one round of transmission of the write data transfer packet in the daisy chain architecture is completed, and the microcontroller 101 issues the load control signal Latch. When the rising edge of the load control signal Latch arrives, the load control signal Latch becomes valid, and the single-chip integrated circuit switching device 201 loads the switch control encoding in the second write data transfer packet into the first storage unit, and the single-chip integrated circuit driving device 301 loads the gray scale control encoding into the second storage unit.
[0033] According to an embodiment of the present disclosure, the write data transfer packet can further include a 1-bit return status flag encoding. In one embodiment, when a specific bit of the write data transfer packet is configured as "1" and the load control signal Latch is valid, the integrated circuit switching device 201 or the integrated circuit driving device 301 loads the encoding required by the application into the corresponding storage unit. When a specific bit of the write data transfer packet is configured as "0" and the load control signal Latch is valid, the integrated circuit switching device 201 and the integrated circuit driving device 301 not only load the encoding required by the application, but also load the status bit into the write data transfer packet and return it to the microcontroller 101 in subsequent transmissions. Specifically, as Figure 2As shown, the integrated circuit switch device 201 can load the status bit information stored in the first storage unit into the second write data transmission packet and return it to the microcontroller 101 via the third digital interface of the integrated circuit driving device 301. In one embodiment, the integrated circuit driving device 301 can load the status bit information stored in the second storage unit into the first write data transmission packet. Under the control of the system clock signal, the microcontroller 101 receives the feedback status data from the integrated circuit driving device 301 through the input terminal and starts the transmission of the next round of write data transmission packets.
[0034] Figure 3 FIG. is a circuit block diagram of an integrated circuit switch device 201A according to an embodiment of the present invention. As Figure 3 shown, the monolithic integrated circuit switch device 201A has a plurality of terminals and M power switches S1 to SM. The plurality of terminals include: a first terminal VLED, M scan terminals SW1 to SWM, a second terminal SCLK, a third terminal SIN, a fourth terminal LATCH, a fifth terminal SOUT, a sixth terminal FF, a seventh terminal VCC, and an eighth terminal EN. The first terminal VLED is connected to receive the supply voltage from the power supply module. Each power switch Sx has a first end, a second end, and a control end, where the first end is coupled to the first terminal VLED, the second end is coupled to the scan terminal SWx, and the control end receives the corresponding switch control signal. The second terminal SCLK is connected to receive the system clock signal in the daisy chain architecture. The system clock signal has a first type of transition edge and a second type of transition edge opposite to the first type of transition edge in each clock cycle. The third terminal SIN is connected to receive the write data transmission packet, where each bit of the encoded data contained in the write data transmission packet is transmitted at the first type of transition edge of each clock cycle of the system clock signal. The fourth terminal LATCH is used to share the load control signal Latch in the daisy chain architecture. When the load control signal Latch is valid, the M switch control codes in the write data transmission packet are loaded into the first storage unit to provide M switch control signals to the M power switches S1 to SM. The fifth terminal SOUT is connected to output the write data transmission packet. In response to one of the M switch control signals, the corresponding power switch Sx connects the first terminal VLED and the scan terminal SWx to turn on the LED of the scan line connected to the scan terminal SWx.
[0035] In Figure 3 the embodiment shown, the monolithic integrated circuit switch device 201 further includes a low dropout regulator LDO. The low dropout regulator LDO receives the supply voltage on the first terminal VLED and generates an operating voltage (such as 3.3V) on the seventh terminal VCC. The eighth terminal EN receives the enable control signal to determine whether to enable the integrated circuit switch device 201A.
[0036] Due to the parasitic capacitance existing on the scan lines of the LED array, when the power switch Sx corresponding to the scan line x is about to turn off or has turned off (for example, the switch control signal of the power switch SWx changes from high level to low level), there is charge on the parasitic capacitance of the scan line x. As a result, when the power switch S(x + 1) corresponding to the next scan line (for example, scan line x + 1) is turned on, the LEDs on the scan line x will be faintly lit. Therefore, in Figure 3 In the embodiment shown, the monolithic integrated circuit switching device 201A further includes discharge circuits 20-1 to 20-M. Each discharge circuit 20-x is configured to provide a discharge path from the scan node SWx to ground when the corresponding power switch Sx is to be turned off or has been turned off, so as to ensure that there is no residual charge on the scan line x and ensure that the LEDs on the scan line x are completely extinguished.
[0037] Specifically, during the normal conduction of the power switch Sx, the other power switches remain off, and the discharge path from the scan line x to ground always remains open. When the conduction of the power switch Sx is about to end or has ended, the discharge circuit 20-x controls the conduction of the discharge path from the scan terminal SWx to ground, quickly reducing the voltage of the scan terminal SWx to a voltage equal to or close to zero, so as to prevent current tailing caused by the residual charge still remaining on the parasitic capacitance of the scan terminal SWx. In one embodiment, the discharge circuit 20-x includes a discharge switch tube coupled between the scan terminal and ground. In one embodiment, the discharge switch tube is a field effect transistor. In other embodiments, the discharge switch tube can include any one of various other types of transistors, such as gallium nitride, silicon carbide, BJT, or IGBT, etc.
[0038] In Figure 3 In the embodiment shown, the sixth terminal FF of the monolithic integrated circuit switching device 201A is configured to report fault status information such as undervoltage, overvoltage, overtemperature, short circuit, etc. to Figure 1 the microcontroller 101 shown, and output a fault indication signal. When the microcontroller 101 receives and processes this fault indication signal, it controls the operation of the monolithic integrated circuit switching device 201A. In one of the embodiments, the integrated circuit switching device 201A includes a fault detection circuit, such as a short circuit detection circuit. The short circuit detection circuit is enabled during the turn-off period of the power switch Sx, detects and determines whether the voltage difference between the scan terminal SWx and the first terminal VLED is less than the short circuit threshold voltage, and provides the fault indication signal according to the detection and determination results.
[0039] In actual applications, the monolithic integrated circuit switching device 201A performs a discharge operation on the scan line that is about to be turned off or has just been turned off (for example, line 1), and pre-charges the scan line that is about to be lit (for example, line 2). This ensures that the LED on line 1 is completely off when the LED on line 2 is lit, and also ensures that line 2 can reach the full voltage output state in a timely manner, avoiding the ghost phenomenon caused by parasitic capacitance and the grayscale burr phenomenon caused by voltage climb. However, since the voltage of line 1 is pulled to zero voltage and the voltage of line 2 is full voltage, the LED coupled between line 1 and line 2 may be subjected to reverse voltage at this time. To this end, the monolithic integrated circuit switching device 201A includes the following: Figure 4 The clamping circuit 21-x is shown.
[0040] Figure 4 FIG. 2 is a circuit diagram of a clamping circuit 21-x for an integrated circuit switching device 201A according to an embodiment of the present invention. Figure 4 As shown, the clamp circuit 21 - x includes a charging current source Isx, a resistor divider circuit 12 - x consisting of resistors R1 and R2 , an operational amplifier OPx, and a transistor Mx.
[0041] The charging current source Isx has a power supply terminal and an output terminal, wherein the power supply terminal receives an internal power supply voltage VP, and the output terminal is coupled to the scan terminal SWx. The resistor voltage divider circuit 12-x has an input terminal and an output terminal, wherein the input terminal is coupled between the scan terminal SWx and ground, and the output terminal is coupled to the non-inverting input terminal of the operational amplifier OPx. The inverting input terminal of the operational amplifier OPx is coupled to receive the clamping threshold voltage Vref, and the output terminal is coupled to the control terminal of the transistor Mx. The transistor Mx has a first terminal, a second terminal, and a control terminal, wherein the first terminal is coupled to the scan terminal SWx, and the second terminal is coupled to ground.
[0042] According to the present invention Figure 4 In the illustrated embodiment, after the voltage of the scan terminal SWx is reduced to zero, the clamp circuit 21-x is enabled to restore the voltage of the scan terminal SWx and clamp it above the clamping threshold voltage Vref. In one embodiment, the clamping threshold voltage Vref is 2V. In other embodiments, the clamping threshold voltage Vref can be any other voltage greater than zero to meet customer requirements.
[0043] Figure 5 FIG. 1 is a circuit diagram of an LED driving system 100B according to another embodiment of the present invention. Figure 5In the illustrated embodiment, the LED array 401B is an M-row, 2-column LED array, where M = 4 and N = 48. To drive the LED array 401B, the LED driving system 100B may include an integrated circuit switching device 201B, two integrated circuit driver devices 301B and 301B, and a microcontroller 101B.
[0044] The microcontroller 101B has a processor, a memory, and a digital interface. Figure 5 In the illustrated embodiment, the digital interface is configured with a plurality of terminals, including: a data output terminal DATA, a clock signal terminal CLK, a load control terminal LATCH, a dimming clock terminal PCLK, a fault indication terminal FF, a data input terminal STATUS, and an enable terminal EN. Figure 5 The monolithic integrated circuit switching device 201B is shown with Figure 3 The integrated circuit switch device 201A shown is basically the same and will not be described again here.
[0045] exist Figure 5 In the illustrated embodiment, both monolithic integrated circuit driver devices 301B and 301B have a digital interface. This digital interface is configured with multiple terminals, including a data input terminal SIN, a clock signal terminal SCLK, a load control terminal LATCH, a dimming clock terminal PCLK, a fault indication terminal FF, an enable terminal EN, and a data output terminal SOUT. The dimming clock terminal PCLK is used to receive a pulse-width modulation (PWM) dimming clock signal, which can be used to adjust the LED's grayscale by providing a modulated voltage to the LED. When the PWM signal is high, the LED is illuminated, and when the PWM signal is low, the LED is extinguished. Changing the PWM duty cycle results in a change in the LED's grayscale.
[0046] like Figure 5 As shown, the microcontroller 101B, the monolithic integrated circuit switching device 201B, and the monolithic integrated circuit driving devices 301B and 302B are sequentially connected in a daisy chain architecture.
[0047] Due to the daisy-chain architecture, the integrated circuit converter 201B and integrated circuit driver devices 301B and 302B in the LED array driver system 100B operate similarly to a relay race, implemented via a SOUT→SIN loop. The SOUT terminal of each integrated circuit device connects to the SIN terminal of the next integrated circuit device in the daisy-chain architecture to provide write data transmission packets. Within a cycle, the LEDs in the corresponding scan lines are illuminated one by one in a predetermined sequence.
[0048] like Figure 5As shown, the data input terminals SIN1 to SIN3 are respectively connected to the data output terminal DATA of the microcontroller 101B, the data output terminal SOUT1 of the integrated circuit switch device 201B, and the data output terminal SOUT2 of the integrated circuit driver device 301B, and the data output terminal SOUT3 is connected to the data input terminal STATUS of the microcontroller 101B to follow the loop transmission in the daisy chain architecture. Figure 5 As shown, terminals SCLK1 through SCLK3 are collectively connected to the clock signal terminal CLK of microcontroller 101B to share the system clock signal. Each encoded bit contained in the write data transmission packet provided by microcontroller 101B is transmitted during each clock cycle of the system clock signal. Terminals LATCH1 through LATCH3 are collectively coupled to the load control terminal LATCH of microcontroller 101B to share the load control signal Latch. Terminals FF1 through FF3 are collectively coupled to the fault detection terminal FF of microcontroller 101B to receive a fault indication signal. Terminals EN1 through EN3 are collectively connected to the enable terminal EN of microcontroller 101B to receive an enable control signal.
[0049] Figure 6 FIG2 is a schematic circuit diagram of an LED driver system 100C according to yet another embodiment of the present invention. In the illustrated embodiment, an LED array 401C comprises 2*M rows and 2*N columns, where M = 4 and N = 48. To drive LED array 401C, LED driver system 100C may include two integrated circuit switching devices 201C and 202C, two integrated circuit driver devices 301C and 301C, and a microcontroller 101C.
[0050] Figure 6 The LED driving system 100C shown is Figure 5 The connections of the LED driving system 100B are basically similar and will not be described in detail here. Figure 5 As shown, the microcontroller 101C, the monolithic integrated circuit switch device 201C, the monolithic integrated circuit switch device 202C, and the monolithic integrated circuit driver devices 301C and 302C are sequentially connected in a daisy-chain architecture, having an operating mechanism similar to a relay race, which is achieved through the SOUT→SIN loop.
[0051] Figure 7 FIG. 1 is a schematic diagram of a data transmission architecture of an LED driving system 100C according to an embodiment of the present invention. Figure 7 As shown, the microcontroller 101C acts as the master control unit in the daisy-chain architecture, sending write data transmission packets to the monolithic integrated circuit switch device 201C and receiving status data in return from the integrated circuit driver device 301C.
[0052] Specifically, the first to fourth write data transfer packets are sent in sequence by the microcontroller 101C as a whole until all the bits of the encoding contained in the 4 write data transfer packets are completely sent under the control of the system clock signal, and one round of transmission of the write data transfer packets is completed. After the transmission is completed, the microcontroller 101C provides a valid load control signal Latch. The monolithic integrated circuit switch device 201C loads the switch control encoding in the fourth write data transfer packet into the first storage unit, and the monolithic integrated circuit switch device 202C loads the switch control encoding in the third write data transfer packet into the second storage unit. At the same time, the monolithic integrated circuit driving device 301C loads the gray scale control encoding in the second write data transfer packet into the third storage unit, and the monolithic integrated circuit driving device 302C loads the gray scale control encoding in the first write data transfer packet into the fourth storage unit.
[0053] In one embodiment, assuming that the LED array has K*M rows and L*N columns of LEDs, the LED array driving system requires K monolithic integrated circuit switch devices 201 and L integrated circuit driving devices 301 to jointly drive. And these K+L integrated circuit devices are connected in a daisy chain structure, and the microcontroller sequentially sends K+L write transfer data packets to the integrated circuit devices to drive the LED array.
[0054] Figure 8 It is a flowchart of a driving method 600 of an LED driving system according to an embodiment of the present invention. As Figure 8 shown, the driving method 600 of the LED array includes steps 601 to 605.
[0055] In step 601, connect the first terminal of a monolithic integrated circuit switch device to the power supply module to receive the supply voltage.
[0056] In step 602, connect the M scanning terminals of the monolithic integrated circuit switch device to M scanning lines in the LED array respectively.
[0057] In step 603, connect the digital interface of the monolithic integrated circuit switch device to the digital interface of the microcontroller to receive the set write data transfer packet. Each bit of the encoding contained in the write data transfer packet is sent in each clock cycle of the system clock signal.
[0058] In step 604, after receiving the write data transfer packet, the monolithic integrated circuit switch device loads the M switch control encodings in the write data transfer packet into the first storage unit to provide M switch control signals.
[0059] In step 605, in response to M switch control signals, the first terminal of the monolithic integrated circuit switching device is connected to a corresponding one of the M scanning terminals in a preset order, so as to control the LEDs on M scanning lines in the LED array to be lit row by row in a preset order. In one embodiment, the monolithic integrated circuit switching device includes M power switches. In response to one of the M switch control signals, the first terminal is connected to the corresponding scanning terminal through the corresponding power switch.
[0060] In one embodiment, the driving method 600 further includes: when a power switch is turned off, a discharge path from the scanning terminal corresponding to the power switch to the ground is conducted, and then the voltage of the scanning terminal is restored and clamped at the clamping threshold voltage.
[0061] In one embodiment, the driving method 600 further includes: connecting N driving terminals of a monolithic integrated circuit driving device to N channels in the LED array; connecting the digital interface of the monolithic integrated circuit driving device to the digital interface of the monolithic integrated circuit switching device to receive the write data transmission packet, where each bit of the encoded data included in the write data transmission packet is sent in each clock cycle of the system clock signal; and after receiving the write data transmission packet, the monolithic integrated circuit driving device loads N gray scale control codes in the write data transmission packet into the second storage unit to provide driving current for the LEDs in N channels of the LED array.
[0062] In one embodiment, the digital interfaces of the microcontroller, the monolithic integrated circuit switching device, and the monolithic integrated circuit driving device are connected in a daisy chain architecture.
[0063] In one embodiment, the loading of the gray scale control code and the switch control code both occur when the loading control signal is valid.
[0064] In the specification, related terms such as first and second etc. may be only used to distinguish one entity or action from another entity or action, and do not necessarily or mean any such relationship or order between these entities or actions. Digital orders such as "first", "second", "third", etc. only refer to different individuals among a plurality, and do not mean any order or sequence, unless the claim language has specific limitations. The order of the text in any one claim does not mean that the processing steps must be carried out in a temporal or logical order according to this order, unless the claim language has specific provisions. Without departing from the scope of the present invention, these processing steps can be interchanged in any order, as long as such interchange does not make the claim language contradictory and does not result in logical absurdity.
[0065] The above description and embodiments are merely exemplary and are not intended to limit the scope of the present invention. Variations and modifications to the disclosed embodiments are possible, and other feasible alternative embodiments and equivalent variations of the elements in the embodiments will be apparent to those skilled in the art. Other variations and modifications to the disclosed embodiments do not exceed the spirit and scope of the present invention.
Claims
1. An LED array driving system, the LED array driving system comprising: A microcontroller having a processor and a first digital interface, and providing a write data transmission packet through the first digital interface; And The monolithic integrated circuit switching device, comprising: A first terminal connected to receive a supply voltage from a power supply module; M scanning terminals coupled to M scanning lines in the LED array; A second digital interface connected to the first digital interface of the microcontroller to receive the write data transmission packet, wherein each bit of the encoded data contained in the write data transmission packet is transmitted in each clock cycle of the system clock signal, and the write data transmission packet at least includes M switch control codes for determining M switch control signals; and M power switches respectively connected to the M scanning terminals, and in response to the M switch control signals, controlling the corresponding power switches to connect the corresponding scanning terminals and the first terminal in a preset order, and controlling the LEDs on the M scanning lines to be lit row by row in a preset order.
2. The LED array driving system according to claim 1, further comprising a monolithic integrated circuit driving device, the monolithic integrated circuit driving device comprising: A third digital interface connected to the second digital interface of the monolithic integrated circuit switching device, wherein the write data transmission packet is transmitted from the second digital interface to the third digital interface, and the write data transmission packet at least includes gray scale control codes for determining the gray scale of the LEDs in N channels of the LED array; And N driving terminals respectively coupled to the N channels in the LED array to provide driving current for the LEDs in the N channels.
3. The LED array driving system according to claim 2, wherein the first digital interface, the second digital interface and the third digital interface are connected in a daisy chain architecture.
4. The LED array driving system according to claim 3, wherein both the monolithic integrated circuit switching device and the monolithic integrated circuit driving device include loading control terminals for receiving loading control signals, wherein after a round of transmission of the write data transmission packet in the daisy chain architecture is completed, when the first rising edge of the loading control signal arrives, the monolithic integrated circuit switching device loads the switch control code into the first storage unit, and the monolithic integrated circuit driving device loads the gray scale control code into the second storage unit.
5. The LED array driving system according to claim 1, wherein the monolithic integrated circuit switching device further comprises: M discharge circuits corresponding to the M scanning terminals one by one, wherein each discharge circuit is coupled between the corresponding scanning terminal and the ground, and provides a discharge path from the corresponding scanning terminal to the ground when the conduction of the corresponding power switch ends.
6. The LED array driving system according to claim 1, wherein the monolithic integrated circuit switching device further comprises M clamping circuits, and each clamping circuit comprises: A charging current source having a power supply terminal and an output terminal, wherein the power supply terminal receives an internal supply voltage, and the output terminal is coupled to the scanning terminal; A resistive voltage dividing circuit having an input terminal and an output terminal, wherein the input terminal is coupled between the scanning terminal and the ground; An operational amplifier having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is coupled to receive a reference voltage, and the second input terminal is coupled to an output terminal of a resistive voltage divider circuit; and a transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal is coupled to a scan terminal, the second terminal is coupled to ground, and the control terminal is coupled to the output terminal of the operational amplifier.
7. The LED array driving system according to claim 2, wherein the monolithic integrated circuit switching device further includes a fault indication terminal for outputting a fault indication signal, and after receiving and processing the signal, the microcontroller controls the operation of the monolithic integrated circuit switching device.
8. The LED array driving system according to claim 7, wherein the monolithic integrated circuit switching device further includes a short-circuit detection circuit, which during the turn-off period of a certain power switch, determines whether the voltage between the corresponding scan terminal and the first terminal is less than a short-circuit threshold voltage, and provides a fault indication signal according to the determination result.
9. An LED array driving system, the LED array including K*M scan lines and L*N channels, the LED array driving system including: K integrated circuit switching devices, each integrated circuit switching device including a digital interface for receiving a set write data transmission packet, and each integrated circuit switching device controls M rows of LEDs in the LED array to be lit row by row; L integrated circuit driving devices, each integrated circuit driving device including a digital interface for receiving a write data transmission packet, and each integrated circuit driving device provides drive current for the LEDs in N channels of the LED array; and a microcontroller having a processor, a memory, and a digital interface for providing a write data transmission packet, wherein the digital interface of the microcontroller, the K digital interfaces of the K integrated circuit switching devices, and the L digital interfaces of the L integrated circuit driving devices are sequentially connected in series in a daisy chain architecture, and the write data transmission packet is passed to the next digital interface in the daisy chain architecture via one digital interface.
10. The LED array driving system according to claim 9, wherein each bit of the encoded data included in the write data transmission packet is sent in each clock cycle of the system clock signal.
11. The LED array driving system according to claim 10, wherein the write data transmission packet received by the integrated circuit switching device includes at least M switch control encodings.
12. The LED array driving system according to claim 10, wherein the write data transmission packet received by the integrated circuit driving device includes at least N gray scale control encodings.
13. The LED array driving system according to claim 10, wherein each monolithic integrated circuit switching device includes: a first terminal connected to receive a supply voltage from a power supply module; M scan terminals respectively coupled to M scan lines in the LED array; a second terminal connected to receive a system clock signal, the system clock signal having a first type of transition edge and a second type of transition edge opposite to the first type of transition edge in each clock cycle; A third terminal is connected to receive a write data transmission packet, wherein each bit of the encoding contained in the write data transmission packet is transmitted at the first type of transition edge of each clock cycle of the system clock signal; A fourth terminal is connected to receive a load control signal, and when the load control signal is valid, loads M switch control encodings in the write data transmission packet to a first storage unit to provide M switch control signals; A fifth terminal is connected to output the write data transmission packet; and M power switches are respectively coupled to the M scan terminals, and in response to one of the M switch control signals, control the corresponding power switch to connect the corresponding scan terminal and the first terminal to control the LED on that scan line to light up.
14. The LED array driving system according to claim 13, wherein a single-chip integrated circuit driving device includes: N driving terminals are coupled to N channels in the LED array to provide driving current for the LEDs in the N channels of the LED array; and A first terminal is connected to receive the system clock signal; A second terminal is connected to the fifth terminal of a single-chip integrated circuit switching device to receive a write data transmission packet, wherein each bit of the encoding contained in the write data transmission packet is transmitted at the first type of transition edge of each clock cycle of the system clock signal; A third terminal is connected to receive a load control signal, and when the load control signal is valid, loads N gray scale control encodings in the write data transmission packet to a second storage unit; A fourth terminal is connected to receive a dimming clock signal; and A fifth terminal is connected to output the write data transmission packet.
15. A driving method for an LED array, comprising: Connect a first terminal of a single-chip integrated circuit switching device to a power supply module to receive a supply voltage; Connect the M scan terminals of the single-chip integrated circuit switching device to M scan lines in the LED array; Connect the digital interface of the single-chip integrated circuit switching device to the digital interface of a microcontroller to receive a set write data transmission packet, wherein each bit of the encoding contained in the write data transmission packet is transmitted at each clock cycle of the system clock signal; After receiving the write data transmission packet, the single-chip integrated circuit switching device loads M switch control encodings in the write data transmission packet to a first storage unit to provide M switch control signals; and In response to the M switch control signals, connect the first terminal of the single-chip integrated circuit switching device to a corresponding one of the M scan terminals in a preset order to control the LEDs on the M scan lines in the LED array to light up row by row in a preset order.
16. The driving method according to claim 15, further comprising: Connect N driving terminals of a single-chip integrated circuit driving device to N channels in the LED array; Connect the digital interface of the single-chip integrated circuit driving device to the digital interface of the single-chip integrated circuit switching device to receive the write data transmission packet, wherein each bit of the encoding contained in the write data transmission packet is transmitted at each clock cycle of the system clock signal; and After receiving the write data transmission packet, the single-chip integrated circuit driving device loads N gray-scale control codes in the write data transmission packet into the second storage unit to provide drive currents for the LEDs in N channels of the LED array.
17. The driving method according to claim 16, wherein the digital interfaces of the microcontroller, the digital interface of the single-chip integrated circuit switching device, and the digital interface of the single-chip integrated circuit driving device are connected in a daisy-chain architecture.
18. The driving method according to claim 16, wherein the loading of both the gray-scale control code and the switching control code occurs when the loading control signal is valid.
19. The driving method according to claim 16, wherein the single-chip integrated circuit switching device includes M power switches, and by controlling the M power switches, the first terminal is connected to a corresponding one of the M scanning terminals.
20. The driving method according to claim 19, further comprising: When a power switch is turned off, the discharge path from the scanning terminal corresponding to the power switch to the ground is turned on; and recovering and clamping the voltage of the scanning terminal above the clamping threshold voltage again.