Packaging structure and packaging method

Abstract

The invention discloses a packaging structure and a packaging method. The packaging structure comprises a substrate; the interconnection column is mounted on the substrate; the light-transmitting plate is arranged on the side, away from the substrate, of the interconnection column, so that a cavity is defined by the light-transmitting plate, the interconnection column and the substrate, the light-transmitting plate comprises a mounting surface, and the mounting surface faces the substrate; and the chip is mounted on one side of the mounting surface of the light-transmitting plate so as to be located in the cavity, and the chip is electrically connected with the substrate through the interconnection columns. According to the invention, the integration level of the packaging structure is improved.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of semiconductor packaging, and in particular, to a packaging structure and a packaging method. Background Art

[0002] With the continuous progress of social informatization, the current electronics industry has higher and higher requirements for the integration of products. The industrial community hopes to integrate more devices in the smallest possible area, which poses more challenges to electronic packaging technology.

[0003] With the development of mobile terminals such as smart phones and tablet computers, optical devices such as proximity sensors and ambient light sensors have become standard sensors for mobile terminals. As mobile terminals become more and more integrated and lightweight, the overall thickness of the machine is getting thinner and the internal devices are getting more, so the requirements for device miniaturization are getting more and more stringent. Summary of the Invention

[0004] The problem solved by the embodiments of the present invention is to provide a packaging structure and a packaging method, which are beneficial to improving the integration of the packaging structure.

[0005] To solve the above problems, embodiments of the present invention provide a packaging structure, including: a substrate; an interconnecting column mounted on the substrate; a light-transmitting plate disposed on a side of the interconnecting column away from the substrate, such that the light-transmitting plate, the interconnecting column, and the substrate enclose a cavity, the light-transmitting plate includes a mounting surface facing the substrate; a chip mounted on a side of the mounting surface of the light-transmitting plate to be located in the cavity, and the chip is electrically connected to the substrate through the interconnecting column.

[0006] Optionally, the light-transmitting plate on the side of the mounting surface includes mounting areas respectively located around the chip, and a first interconnecting structure extending horizontally is formed on the light-transmitting plate in the mounting area, one end of the first interconnecting structure is electrically connected to the chip, and the other end is electrically connected to the interconnecting column.

[0007] Optionally, the first interconnecting structure is located on the surface of the mounting area on the mounting surface.

[0008] Optionally, a first groove recessed from the mounting surface is formed in the mounting area of the light-transmitting plate; the first interconnecting structure is located in the first groove.

[0009] Optionally, the interconnecting column includes a support column and a second interconnecting structure penetrating the support column longitudinally, one end of the second interconnecting structure is electrically connected to the first interconnecting structure, and the other end is electrically connected to the substrate.

[0010] Optionally, the second interconnecting structure is located on the inner surface of the support column facing the chip.

[0011] Optionally, a second groove recessed from the inner surface is formed on a side of the support column facing the chip; the second interconnecting structure is located in the second groove.

[0012] Optionally, the second interconnect structure and the first interconnect structure are an integral structure.

[0013] Optionally, the second interconnect structure is located in the support pillar.

[0014] Optionally, the support pillar and the light-transmitting plate are an integral structure.

[0015] Optionally, the support pillar and the substrate are an integral structure.

[0016] Optionally, the material of the support pillar is a light-transmitting material.

[0017] Optionally, a photosensitive area is formed on one side of the chip, and the photosensitive area faces the light-transmitting plate.

[0018] Optionally, the material of the light-transmitting plate includes glass.

[0019] Correspondingly, an embodiment of the present invention further provides a packaging method, including: providing a light-transmitting plate, the light-transmitting plate including a mounting surface; providing a substrate; forming interconnecting pillars disposed on one side of the mounting surface of the light-transmitting plate; mounting the chip on the mounting surface of the light-transmitting plate; mounting the light-transmitting plate on the substrate through the interconnecting pillars located on four sides of the chip, one end of the interconnecting pillar is in contact with the substrate and the other end is in contact with the light-transmitting plate, and the chip is electrically connected to the substrate through the interconnecting pillars, with the mounting surface facing the substrate, so that the chip is located in a cavity surrounded by the light-transmitting plate, the interconnecting pillars and the substrate.

[0020] Optionally, in the step of providing the light-transmitting plate, the light-transmitting plate on one side of the mounting surface includes mounting areas respectively located around the chip; before mounting the chip on the mounting surface of the light-transmitting plate, it further includes: forming a first interconnect structure extending transversely on the mounting areas of the light-transmitting plate, one end of the first interconnect structure is electrically connected to the chip and the other end is electrically connected to the interconnecting pillar.

[0021] Optionally, in the step of forming a first interconnect structure extending transversely on the mounting areas of the light-transmitting plate, the first interconnect structure is located on the surface of the mounting areas on the mounting surface.

[0022] Optionally, before forming a first interconnect structure extending transversely on the mounting areas of the light-transmitting plate, it further includes: forming a first groove recessed from the mounting surface in the mounting areas of the light-transmitting plate; in the step of forming a first interconnect structure extending transversely on the mounting areas of the light-transmitting plate, forming the first interconnect structure in the first groove.

[0023] Optionally, in the step of providing the light-transmitting plate, support pillars integrated with the light-transmitting plate are formed in the mounting areas on one side of the mounting surface of the light-transmitting plate; the step of forming interconnecting pillars disposed on one side of the mounting surface of the light-transmitting plate includes: forming a second interconnect structure longitudinally penetrating the support pillars, one end of the second interconnect structure is electrically connected to the first interconnect structure and the other end is electrically connected to the substrate.

[0024] Optionally, in the step of providing a substrate, support pillars integrally formed with the substrate are formed on the substrate, and the support pillars and the substrate enclose a groove; the step of forming the interconnecting pillars on one side of the light-transmitting plate mounting surface includes: forming a second interconnecting structure longitudinally penetrating the support pillars, with one end of the second interconnecting structure electrically connected to the first interconnecting structure and the other end electrically connected to the substrate.

[0025] Optionally, the step of forming the interconnecting pillars on one side of the light-transmitting plate mounting surface includes: forming support pillars in the mounting area on one side of the light-transmitting plate mounting surface; forming a second interconnecting structure longitudinally penetrating the support pillars, with one end of the second interconnecting structure electrically connected to the first interconnecting structure and the other end electrically connected to the substrate.

[0026] Optionally, the step of forming the second interconnecting structure longitudinally penetrating the support pillars includes: forming the second interconnecting structure on the inner surface of the support pillar facing the chip; or, the step of forming the second interconnecting structure longitudinally penetrating the support pillars includes: forming a second groove recessed from the inner surface on the side of the support pillar facing the chip; forming the second interconnecting structure in the second groove.

[0027] Optionally, in the step of providing a light-transmitting plate, support pillars integrally formed with the light-transmitting plate are formed in the mounting area on one side of the light-transmitting plate mounting surface; in the step of forming the first interconnecting structure extending transversely on the mounting area of the light-transmitting plate, the first interconnecting structure is located on the surface of the mounting area on the mounting surface; in the same step, the first interconnecting structure and the second interconnecting structure are formed.

[0028] Optionally, the step of forming the second interconnecting structure longitudinally penetrating the support pillars includes: forming a through hole longitudinally penetrating the support pillars; filling the through hole to form the second interconnecting structure.

[0029] Optionally, in the step of providing a light-transmitting plate, support pillars integrally formed with the light-transmitting plate are formed in the mounting area on one side of the light-transmitting plate mounting surface; before forming the first interconnecting structure extending transversely on the mounting area of the light-transmitting plate, it further includes: forming a first groove recessed from the mounting surface in the mounting area of the light-transmitting plate, the first groove transversely penetrating the support pillars; in the step of forming a through hole longitudinally penetrating the support pillars, the through hole communicates with the first groove; the step of forming the first interconnecting structure extending transversely on the mounting area of the light-transmitting plate includes: forming a first sub-interconnecting structure filling the first groove on the side of the support pillar in the mounting area; forming a second sub-interconnecting structure filling the first groove at the bottom of the support pillar in the mounting area, and the second sub-interconnecting structure and the first sub-interconnecting structure serve as the first interconnecting structure.

[0030] Optionally, in the step of mounting the chip on the mounting surface of the light-transmitting plate, a photosensitive area is formed on one side of the chip, and the photosensitive area faces the light-transmitting plate.

[0031] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0032] In the packaging structure provided by the embodiment of the present invention, the interconnecting posts are mounted on the substrate, and the light-transmitting plate is disposed on the side of the interconnecting posts away from the substrate, so that the light-transmitting plate, the interconnecting posts and the substrate enclose a cavity. The light-transmitting plate includes a mounting surface facing the substrate; the chip is mounted on one side of the mounting surface of the light-transmitting plate to be located in the cavity, and the chip is electrically connected to the substrate through the interconnecting posts. In the embodiment of the present invention, the chip is placed in the cavity enclosed by the light-transmitting plate, the interconnecting posts and the substrate, and light can be transmitted to the chip through the light-transmitting plate. Moreover, since the chip is electrically connected to the substrate through the interconnecting posts, the interconnecting posts not only support the light-transmitting plate but also interconnect the chip and the substrate. Compared with the solution of additionally adding bonding wires to interconnect the chip and the substrate, this solution is beneficial to reducing the height and space occupied by the chip interconnection, thereby facilitating the reduction of the packaging thickness and further improving the integration degree of the packaging structure.

[0033] In the packaging method provided by the embodiment of the present invention, a light-transmitting plate is provided, the light-transmitting plate includes a mounting surface, a substrate is provided, interconnecting posts are formed on one side of the mounting surface of the light-transmitting plate, the chip is mounted on the mounting surface of the light-transmitting plate, and the light-transmitting plate is mounted on the substrate through the interconnecting posts located on the four sides of the chip. One end of the interconnecting posts contacts the substrate and the other end contacts the light-transmitting plate, and the chip is electrically connected to the substrate through the interconnecting posts. The mounting surface faces the substrate, so that the chip is located in the cavity enclosed by the light-transmitting plate, the interconnecting posts and the substrate. In the embodiment of the present invention, the chip is placed in the cavity enclosed by the light-transmitting plate, the interconnecting posts and the substrate, and light can be transmitted to the chip through the light-transmitting plate. Moreover, since the chip is electrically connected to the substrate through the interconnecting posts, the interconnecting posts not only support the light-transmitting plate but also interconnect the chip and the substrate. Compared with the solution of additionally adding bonding wires to interconnect the chip and the substrate, this solution is beneficial to reducing the height and space occupied by the chip interconnection, thereby facilitating the reduction of the packaging thickness and further improving the integration degree of the packaging structure. Description of the Drawings

[0034] Figure 1 is a schematic structural diagram of a packaging structure;

[0035] Figure 2 is a schematic structural diagram corresponding to the first embodiment of the packaging structure of the present invention;

[0036] Figure 3 is a schematic structural diagram corresponding to the second embodiment of the packaging structure of the present invention;

[0037] Figure 4 is a schematic structural diagram corresponding to the third embodiment of the packaging structure of the present invention;

[0038] Figure 5 is a schematic structural diagram corresponding to the fourth embodiment of the packaging structure of the present invention;

[0039] Figures 6 to 12It is a schematic structural diagram corresponding to each step in the first embodiment of the encapsulation method of the present invention;

[0040] Figures 13 to 16 It is a schematic structural diagram corresponding to each step in the second embodiment of the encapsulation method of the present invention;

[0041] Figures 17 to 20 It is a schematic structural diagram corresponding to each step in the third embodiment of the encapsulation method of the present invention;

[0042] Figures 21 to 25 It is a schematic structural diagram corresponding to each step in the fourth embodiment of the encapsulation method of the present invention. Detailed implementation manners

[0043] Currently, the integration degree of the encapsulation structure is not good. Now, in combination with an encapsulation structure, the reasons for the poor integration degree are analyzed.

[0044] Figure 1 It is a schematic structural diagram of an encapsulation structure.

[0045] Reference Figure 1 , the encapsulation structure includes: a substrate 10; a chip 30, mounted on the substrate 10, the chip 30 includes a photosensitive area 30a, and the photosensitive area 30a faces away from the substrate 10; a metal cover 20, mounted on the substrate 10 on the four sides of the chip 30, the metal cover 20 spans across the chip 30 above the chip 30, and an opening is formed in the metal cover 20 above the photosensitive area 30a; a light-transmitting plate 40, mounted on the inner surface of the opening of the metal cover 20 and covering the opening along the transverse direction.

[0046] When the light-transmitting plate 40 is mounted on the inner surface of the metal cover 20, glue bonding is usually used. When the product is singulated, the product is likely to fall off due to insufficient glue bonding, resulting in a poor cutting yield of the product. At the same time, the glue for sticking the light-transmitting plate 40 is likely to overflow from the joint to contaminate the surface of the light-transmitting plate 40, and it is also likely to fall into the cavity to contaminate the chip 30, thereby reducing the product performance. Moreover, a groove is formed between the opening of the light-transmitting plate 40 and the metal cover 20, and dust and water vapor are likely to accumulate in the groove to block light transmission, resulting in a reduction in product performance. In addition, the chip 30 and the substrate 10 are electrically connected by wire bonding, resulting in a relatively large space occupied both horizontally and vertically, thereby leading to a relatively large volume of the encapsulation, and further resulting in a poor integration degree of the encapsulation structure.

[0047] To solve the above technical problems, the present invention provides an encapsulation structure, including: a substrate; an interconnecting post, mounted on the substrate; a light-transmitting plate, disposed on a side of the interconnecting post away from the substrate, such that the light-transmitting plate, the interconnecting post, and the substrate enclose a cavity, the light-transmitting plate includes a mounting surface facing the substrate; a chip, mounted on a side of the mounting surface of the light-transmitting plate to be located in the cavity, and the chip is electrically connected to the substrate through the interconnecting post, and the chip is located in the cavity.

[0048] In an embodiment of the present invention, the chip is placed in a cavity formed by a light-transmitting plate, interconnecting posts, and a substrate. Light can be transmitted to the chip through the light-transmitting plate. Moreover, the chip is electrically connected to the substrate through the interconnecting posts. The interconnecting posts not only support the light-transmitting plate but also interconnect the chip and the substrate. Compared with the solution of additionally adding bonding wires to interconnect the chip and the substrate, this solution helps reduce the height and space occupied by chip interconnection, thereby helping reduce the package thickness and further helping improve the integration degree of the package structure.

[0049] To make the above objects, features, and advantages of the embodiments of the present invention more obvious and understandable, the following specifically describes the embodiments of the present invention with reference to the accompanying drawings.

[0050] Figure 2 It is a schematic structural diagram corresponding to the first embodiment of the package structure of the present invention.

[0051] Refer to Figure 2 , the package structure includes: a substrate 402; interconnecting posts 202 mounted on the substrate 402; a light-transmitting plate 102 disposed on a side of the interconnecting posts 202 away from the substrate 402, such that a cavity is formed by the light-transmitting plate 102, the interconnecting posts 202, and the substrate 402. The light-transmitting plate 102 includes a mounting surface 102a facing the substrate 402; a chip 302 mounted on a side of the mounting surface 102a of the light-transmitting plate 102 to be located in the cavity, and the chip 302 is electrically connected to the substrate 402 through the interconnecting posts 202.

[0052] The substrate 402 is used to provide a process operation basis for mounting the light-transmitting plate 102.

[0053] In this embodiment, the substrate 402 includes a base and an interconnecting layer on the base, and the exposed surface of the interconnecting layer is a process operation platform.

[0054] The interconnecting layer is used to electrically connect to the interconnecting posts 202 and is also used to electrically connect to the base, thereby correspondingly enabling electrical connection between the interconnecting posts 202 and the base.

[0055] In this embodiment, the interconnecting layer is a redistribution layer (RDL). Specifically, the redistribution layer may include one or more redistribution interconnecting layers.

[0056] The base is used to electrically connect to the interconnecting posts 202 through the interconnecting layer, thereby correspondingly enabling electrical connection to an external structure, realizing electrical connection between the interconnecting posts 202 and the external structure, and correspondingly realizing electrical connection between the chip 302 and the external structure.

[0057] Specifically, in this embodiment, the substrate is a packaging substrate, and the packaging substrate can adopt existing ceramic substrates, or laminated substrates, or MIS (Molded Interconnect System) plastic packaging interconnect substrates, or re - wiring stacked layers, etc. These substrate materials and technologies have their own characteristics: ceramic substrates have excellent thermal conductivity and mechanical strength, and are suitable for high - power and high - reliability scenarios; laminated substrates achieve high - density interconnection through multi - layer wiring and are suitable for complex circuit designs; MIS plastic packaging interconnect substrates combine injection molding and interconnect technologies and have the advantages of high integration and low cost; re - wiring stacked layers achieve higher integration density and performance optimization through vertical stacking and re - wiring technologies.

[0058] In this embodiment, the periphery of the mounting surface 102a of the light - transmissive plate 102 is a mounting area 102t. On the light - transmissive plate 102 in the mounting area 102t, a first interconnect structure 312 extending in the transverse direction (such as Figure 2 the X - direction shown in the figure) is formed. One end of the first interconnect structure 312 is electrically connected to the chip 302, and the other end is electrically connected to the interconnect post 202.

[0059] On the light - transmissive plate 102 in the mounting area 102t, a first interconnect structure 312 extending in the transverse direction is formed, so that the chip 302 is electrically connected to the interconnect post 202 through the first interconnect structure 312.

[0060] In this embodiment, the first interconnect structure 312 is located on the surface of the mounting area 102t on the mounting surface 102a. An insulating dielectric layer (not shown in the figure) is provided between the first interconnect structures 312 on the surface of the mounting area 102t.

[0061] That is, during the packaging process, the first interconnect structure 312 and the transparent insulating dielectric layer can be directly formed on the mounting surface 102a through the RDL process. The forming process is relatively simple and easy to operate. The insulating dielectric layer can be made of a transparent material, which is beneficial to expanding the light penetration range.

[0062] In other embodiments, the first interconnect structure can also be directly embedded in the surface of the mounting surface of the light - transmissive plate, eliminating the need for an additional insulating dielectric layer, and is beneficial to reducing the packaging height from the light - transmissive plate to the substrate and improving the packaging integration.

[0063] In this embodiment, the projection of the first interconnect structure 312 on the mounting surface 102a penetrates the projection of the interconnect post 202 on the mounting surface 102a.

[0064] The projection of the first interconnect structure 312 on the mounting surface 102a penetrates the projection of the interconnect posts 202 on the mounting surface 102a. Correspondingly, the first interconnect structure 312 contacts the end face of the interconnect posts 202, so that the first interconnect structure 312 is electrically connected to the interconnect posts 202. The part of the first interconnect structure 312 extending into the cavity contacts the chip 302 for electrical connection. The interconnection between the transparent light plate 102 and the interconnect posts 202 can be achieved by solder interconnection or by hybrid bonding process.

[0065] In other embodiments, the first interconnect structure may also laterally contact a part of the end face of the interconnect posts.

[0066] The interconnect posts 202 are used to support the transparent light plate 102 and also to achieve the electrical connection between the chip 302 and the substrate 402.

[0067] In this embodiment, the interconnect posts 202 include support posts 212 and a second interconnect structure 322 that penetrates the support posts 202 longitudinally (as shown in the Y direction in Figure 2 One end of the second interconnect structure 322 is electrically connected to the first interconnect structure 312 and the other end is electrically connected to the substrate 402.

[0068] The support posts 212 are used to support the transparent light plate 102.

[0069] In this embodiment, the support posts 212 and the transparent light plate 102 are independent structures, and the support posts 212 and the substrate 402 are also independent structures.

[0070] The second interconnect structure 322 penetrates the support posts 212 longitudinally, is electrically connected to the chip 302 by electrically connecting one end to the first interconnect structure 312, and is electrically connected to the substrate 402 at the other end, so as to achieve the electrical connection between the chip 302 and the substrate 402 through the second interconnect structure 322.

[0071] In this embodiment, the material of the support posts 212 is a light-transmissive material.

[0072] The material of the support posts 212 being a light-transmissive material allows light to also pass through the support posts 212 into the cavity, which is beneficial for expanding the light penetration range.

[0073] As an example, in this embodiment, the material of the support posts 212 is silicon or glass, and the second interconnect structure 322 is a through-silicon via structure (TSV) or a through-glass via structure (TGV).

[0074] In this embodiment, the second interconnect structure 322 is located in the support posts 212.

[0075] That is, the second interconnection structure 322 is exposed through the support posts along the longitudinal direction.

[0076] In other embodiments, the second interconnection structure may also be located on the inner surface of the support posts facing the chip, that is, the second interconnection structure is exposed from the inner surface of the support posts facing the chip.

[0077] The light-transmitting plate 102 is used to transmit light to the chip 302 to realize the basic photosensitive function of the chip 302.

[0078] In this embodiment, the light-transmitting plate 102, the interconnection posts 202 and the substrate 402 enclose a cavity, and the cavity provides a spatial position for placing the chip 302.

[0079] In this embodiment, the light-transmitting plate 102 includes the mounting surface 102a, and the mounting surface 102a is the surface where the light-transmitting plate 102 is mounted to the interconnection posts 202 and the surface where the light-transmitting plate 102 is mounted to the chip 302.

[0080] In this embodiment, on one side of the mounting surface 102a, the light-transmitting plate 102 includes a mounting area 102t located at the periphery.

[0081] The mounting area 102t is an area for mounting the chip 302 and the interconnection posts 202.

[0082] In this embodiment, the outer sidewall of the light-transmitting plate 102 is flush with the outer sidewall of the interconnection posts 202.

[0083] Among them, the outer sidewall of the light-transmitting plate 102 refers to the sidewalls on both sides of the light-transmitting plate 102, and the outer sidewall of the interconnection posts 202 refers to the sidewall of the interconnection posts 202 facing away from the chip 302.

[0084] The outer sidewall of the light-transmitting plate 102 being flush with the outer sidewall of the interconnection posts 202 makes the cavity enclosed by the light-transmitting plate 102 and the interconnection posts 202 sufficient to place the chip 302, and also makes the size of the light-transmitting plate 102 in the transverse direction adapted to the chip 302 to avoid waste of the size of the light-transmitting plate 102 as much as possible. Moreover, the outer sidewall of the light-transmitting plate 102 being flush with the outer sidewall of the interconnection posts 202 is also beneficial to maximizing the light-transmitting area of the light-transmitting plate 102, so that the entire light-transmitting plate 102 above the chip 302 transmits light to the chip 302, which is beneficial to maximizing the acquisition of light sources.

[0085] In this embodiment, the material of the light-transmitting plate 102 includes glass.

[0086] The light-transmitting plate 102 made of glass has a good light-transmitting effect and a low cost.

[0087] The chip 302 is used to realize the basic functions of the packaging structure.

[0088] In this embodiment, the chip 302 is placed in the cavity formed by the transparent light plate 102, the interconnecting posts 202, and the substrate 402. Light can be transmitted to the chip 302 through the transparent light plate 102. Moreover, the chip 302 is electrically connected to the substrate 402 through the interconnecting posts 202. Therefore, while the interconnecting posts 202 support the transparent light plate 102, they also interconnect the chip 302 and the substrate 102. Compared with the solution of additionally adding bonding wires to interconnect the chip and the substrate, this solution helps reduce the height and space occupied by the interconnection of the chip 302, thus facilitating the reduction of the package thickness and further improving the integration of the package structure.

[0089] In this embodiment, a photosensitive area 302a is formed on one side of the chip 302, and the photosensitive area 302a faces the transparent light plate 102.

[0090] The photosensitive area 302a is the area where the chip 302 receives light. Since the photosensitive area 302a faces the transparent light plate 102, the photosensitive area 302a can receive the light transmitted by the transparent light plate 102. The projection of the photosensitive area 302a on the mounting surface 102a does not overlap with the projection of the mounting area 102t on the mounting surface 102a.

[0091] In this embodiment, a sealing layer 412 is further formed between the interconnecting posts 202 and the substrate 402 to seal the electrical connection bumps between the interconnecting posts 202 and the substrate 402.

[0092] In this embodiment, the material of the sealing layer 412 includes glue or underfiller.

[0093] Figure 3 It is a schematic structural diagram corresponding to the second embodiment of the packaging structure of the present invention.

[0094] The similarities between this embodiment and the previous embodiments will not be elaborated here. The difference between this embodiment and the previous embodiments lies in the different interconnecting post structures.

[0095] Refer to Figure 3 , the support post 210 and the transparent light plate 100 are of an integral structure.

[0096] In this embodiment, a first interconnecting structure 310 and a second interconnecting structure 320 are respectively provided on the surface of the mounting area 100t on the mounting surface 100a of the transparent light plate 100 and on the inner surface of the support post.

[0097] In this embodiment, the first interconnecting structure 310 is located on the surface of the mounting area 100t, and the second interconnecting structure 320 is located on the inner surface of the support post 210 facing the chip 300.

[0098] An insulating dielectric layer (not shown in the figure) is provided between the first interconnect structures 310, and an insulating dielectric layer (not shown in the figure) is provided between the second interconnect structures 320. The first interconnect structure 310 and the second interconnect structure 320 are of an integral structure, such that the first interconnect structure 310 and the second interconnect structure 320 are electrically connected.

[0099] The insulating dielectric layer is a transparent material, and the support pillars 210 and the light-transmitting plate 100 are of an integral structure, that is, the support pillars 210 can be obtained while obtaining the light-transmitting plate 100, without additionally forming the support pillars 210, making it easy to mount the light-transmitting plate 100 on the substrate 400 through the support pillars 210, and making the combination of the light-transmitting plate 100 and the support pillars 210 relatively stable. At the same time, since the support pillars 210 and the light-transmitting plate 100 are of an integral structure, that is, the support pillars 210 are also made of a light-transmitting material, the photosensitive area 300a of the chip 300 can also obtain light from the support pillars 210, which is beneficial to making the light obtained by the chip 300 more sufficient.

[0100] Moreover, since the support pillars 210 and the light-transmitting plate 100 are of an integral structure, it is also easy to implement the first interconnect structure 310 and the second interconnect structure 320 of an integral structure.

[0101] In other embodiments, the second interconnect structure may also be embedded in the inner surface of the support pillar facing the chip. Specifically, a second groove recessed from the inner surface is formed on the side of the support pillar facing the chip, and the second interconnect structure is located in the second groove.

[0102] Figure 4 It is a schematic structural diagram corresponding to the third embodiment of the packaging structure of the present invention.

[0103] The same parts of this embodiment and the foregoing embodiments will not be described herein again. The difference between this embodiment and the foregoing embodiments lies in the different interconnect pillar structures.

[0104] Reference Figure 4 As shown in [reference], a first groove 341 recessed from the mounting surface 101a is formed in the light-transmitting plate 101 of the mounting area 101t.

[0105] The first groove 341 is used to provide a spatial position for the formation of the first interconnect structure 311.

[0106] Correspondingly, in this embodiment, the first interconnect structure 311 is located in the first groove 341.

[0107] The first interconnect structure 311 is located in the first trench 341, that is, the first interconnect structure 311 is embedded in the light-transmitting plate 101, which is beneficial to reducing the longitudinal packaging height from the light-transmitting plate 101 to the substrate 401, thereby being beneficial to improving the packaging integration degree.

[0108] In this embodiment, the second interconnect structure 321 is located in the support pillar 211.

[0109] That is, in the interconnect pillar 201 formed by the second interconnect structure 321 and the support pillar 211, the second interconnect structure 321 penetrates through the support pillar 211 longitudinally and is exposed.

[0110] In this embodiment, the support pillar 211 and the light-transmitting plate 101 are of an integral structure. Then, in the packaging process, the first trench 341 is formed in the light-transmitting plate 101 transversely from the outer sidewall of the light-transmitting plate 101. The formed first trench 341 penetrates through the support pillar 211 transversely and extends into the light-transmitting plate 101 exposed at the inner part of the support pillar 211. Correspondingly, the first interconnect structure 311 penetrates through the support pillar 211 transversely and extends into the light-transmitting plate 101 exposed at the inner part of the support pillar 211. The first interconnect structure 311 that penetrates through the support pillar 211 transversely is electrically connected to the second interconnect structure 321, and the first interconnect structure 311 that extends into the light-transmitting plate 101 exposed at the inner part of the support pillar 211 is electrically connected to the chip 301.

[0111] Specifically, in this embodiment, the first interconnect structure 311 includes a first sub-interconnect structure 351 and a second sub-interconnect structure 361. The first sub-interconnect structure 351 is located in the first trench 341 exposed at the inner part of the support pillar 211, and the second sub-interconnect structure 361 is located in the first trench 341 between the contact surface of the support pillar 211 and the light-transmitting plate 101. Correspondingly, the second sub-interconnect structure 361 is electrically connected to the second interconnect structure 321, and the first sub-interconnect structure 351 is electrically connected to the chip 301.

[0112] Figure 5 It is a schematic structural diagram corresponding to the fourth embodiment of the packaging structure of the present invention.

[0113] The same parts of this embodiment and the foregoing embodiments will not be described herein again. The difference between this embodiment and the foregoing embodiments lies in: the difference in the interconnect pillar structure.

[0114] Refer to Figure 5 , the support pillar 213 and the substrate 403 are of an integral structure.

[0115] The support column 213 and the substrate 403 are of an integral structure, that is, when the substrate 403 is obtained, the support column 213 can be obtained at the same time, without the need to additionally form the support column 213. That is, the step of mounting the support column 213 on the substrate 403 can be omitted, and there is no need for a sealing layer to bond the support column 213 and the substrate 403. This not only helps to simplify the process steps, improve the process efficiency, and save the process cost, but also can improve the stability between the substrate 403 and the support column 213.

[0116] In this embodiment, a first groove 343 recessed from the mounting surface 103a is formed in the mounting area 103t of the light-transmitting plate 103.

[0117] The first groove 343 is used to provide a spatial position for the formation of the first interconnect structure 313.

[0118] Correspondingly, in this embodiment, the first interconnect structure 313 is located in the first groove 343.

[0119] The first interconnect structure 313 is located in the first groove 343, that is, the first interconnect structure 313 is embedded in the light-transmitting plate 103, which is beneficial to reducing the longitudinal packaging height from the light-transmitting plate 103 to the substrate 403, and thus is beneficial to improving the packaging integration degree.

[0120] In this embodiment, the second interconnect structure 323 is located in the support column 213.

[0121] That is, in the interconnect column 203 composed of the second interconnect structure 323 and the support column 213, the second interconnect structure 323 penetrates through the support column 213 longitudinally and is exposed.

[0122] In this embodiment, one end of the second interconnect structure 323 is interconnected with the circuit in the substrate 403, and the other end is electrically connected to the first interconnect structure 313.

[0123] Figures 6 to 12 It is a schematic structural diagram corresponding to each step in an embodiment of the packaging method of the present invention.

[0124] Refer to Figure 6 , a light-transmitting plate 102 is provided, and the light-transmitting plate 102 includes a mounting surface 102a.

[0125] The light-transmitting plate 102 is used to transmit light to the chip subsequently to realize the basic photosensitive function of the chip.

[0126] In this embodiment, the light-transmitting plate 102 includes the mounting surface 102a, and the mounting surface 102a is the surface for the light-transmitting plate 102 to be subsequently mounted with the interconnect column and the surface for the light-transmitting plate 102 to be subsequently mounted with the chip.

[0127] In this embodiment, in the step of providing the light-transmissive plate 102, on one side of the mounting surface 102a, the light-transmissive plate 102 includes a mounting area 102t located at the periphery.

[0128] The mounting area 102t is an area for subsequently mounting chips and interconnecting posts.

[0129] In this embodiment, in the step of providing the light-transmissive plate 102, the material of the light-transmissive plate 102 includes glass.

[0130] The light-transmissive plate 102 made of glass has a good light-transmitting effect and a low cost.

[0131] Reference Figure 7 , before subsequently mounting the chip on the mounting surface 102a of the light-transmissive plate 102, it further includes: forming a first interconnect structure 312 extending in the lateral direction (such as shown in the X direction in Figure 7 ) on the mounting area 102t of the light-transmissive plate 102, one end of the first interconnect structure 312 is subsequently electrically connected to the chip and the other end is subsequently electrically connected to the interconnecting post.

[0132] In this embodiment, in the step of forming the first interconnect structure 312 extending in the lateral direction on the mounting area 102t of the light-transmissive plate 102, the first interconnect structure 312 is located on the surface of the mounting area 102t on the mounting surface 102a, and an insulating dielectric layer is provided between the first interconnect structures 312.

[0133] That is, during the encapsulation process, the first interconnect structure 312 and the insulating dielectric layer are directly formed on the mounting surface 102a by the RDL process, and the forming process is relatively simple and easy to operate.

[0134] In other embodiments, a first trench is formed on the mounting area surface of the light-transmissive plate, and a first interconnect structure extending in the lateral direction is formed in the first trench. Correspondingly, the first interconnect structure is embedded in the first trench on the mounting area surface, which can not only omit the additional setting of the insulating dielectric layer, but also is beneficial to reducing the encapsulation height from the light-transmissive plate to the substrate and improving the encapsulation integration.

[0135] Combined with reference Figure 8 and Figure 9 , an interconnecting post 202 is formed on one side of the mounting surface 102a of the light-transmissive plate 102.

[0136] Forming the interconnecting post 202 on one side of the mounting surface 102a of the light-transmissive plate 102 means that regardless of the forming process of the interconnecting post 202, in the design of the encapsulation structure, the interconnecting post 202 is located on one side of the mounting surface 102a of the light-transmissive plate 102.

[0137] The interconnecting posts 202 are used to support the transparent light plate 102 subsequently, and are also used to electrically connect the chip and the substrate subsequently.

[0138] Specifically, referring to Figure 8 , the steps of forming the interconnecting posts 202 disposed on one side of the mounting surface 102a of the transparent light plate 102 include: mounting the support posts 212 in the mounting area 102t on one side of the mounting surface 102a of the transparent light plate 102.

[0139] The support posts 212 are used to support the transparent light plate 102 subsequently.

[0140] In this embodiment, the preformed support posts 212 are directly mounted in the mounting area 102t on one side of the mounting surface 102a of the transparent light plate 102.

[0141] In this embodiment, the support posts 212 and the transparent light plate 102 are independent structures from each other, and the support posts 212 and the substrate are also independent structures from each other.

[0142] Referring to Figure 9 , a second interconnecting structure 322 is formed to penetrate the support posts 212 longitudinally (as shown in the Y direction in Figure 9 ). One end of the second interconnecting structure 322 is electrically connected to the first interconnecting structure 312, and the other end is electrically connected to the substrate subsequently.

[0143] The second interconnecting structure 322 penetrates the support posts 212 longitudinally, so as to be electrically connected to the chip subsequently by one end being electrically connected to the first interconnecting structure 312, and the other end is electrically connected to the substrate subsequently, so as to realize the electrical connection between the chip and the substrate through the second interconnecting structure 322 subsequently.

[0144] In this embodiment, the material of the support posts 212 is a transparent material.

[0145] The material of the support posts 212 is a transparent material, so that light can also penetrate through the support posts 212 into the cavity, which is beneficial to expanding the penetration range of light.

[0146] As an example, in this embodiment, the material of the support posts 212 is silicon or glass, and the second interconnecting structure 322 is a through-silicon via structure (TSV) or a through-glass via structure (TGV).

[0147] In other embodiments, the steps of forming the interconnecting posts disposed on one side of the mounting surface of the transparent light plate include: first forming the support posts and the second interconnecting structure penetrating the support posts longitudinally, and then mounting the preformed support posts and the second interconnecting structure as a whole in the mounting area on one side of the mounting surface of the transparent light plate.

[0148] In this embodiment, in the step of forming the second interconnect structure 322 that longitudinally penetrates the support column 212, the projection of the first interconnect structure 312 on the mounting surface 102a penetrates the projection of the interconnect column 202 on the mounting surface 102a.

[0149] The projection of the first interconnect structure 312 on the mounting surface 102a penetrates the projection of the interconnect column 202 on the mounting surface 102a. Correspondingly, the first interconnect structure 312 contacts the end face of the interconnect column 202, so that the first interconnect structure 312 contacts the second interconnect structure 322 for electrical connection, and the part of the first interconnect structure 312 extending to the light-transmitting plate 102 on the side of the interconnect column 202 subsequently contacts the chip for electrical connection.

[0150] In this embodiment, the light-transmitting plate 102 and the interconnect column 202 can be interconnected by solder interconnect or by a hybrid bonding process.

[0151] In other embodiments, in the step of forming the second interconnect structure that longitudinally penetrates the support column, the first interconnect structure can also laterally contact a part of the end face of the interconnect column.

[0152] Specifically, in this embodiment, the step of forming the second interconnect structure 322 that longitudinally penetrates the support column 212 includes: forming a through hole 332 that longitudinally penetrates the support column 212.

[0153] The through hole 332 is used to provide a spatial position for the formation of the second interconnect structure 322.

[0154] Correspondingly, in this embodiment, the through hole 332 is filled to form the second interconnect structure 322.

[0155] That is to say, in this embodiment, the second interconnect structure 322 is located in the support column 212.

[0156] That is, the second interconnect structure 322 longitudinally penetrates the support column and is exposed.

[0157]

[0157] In other embodiments, the second interconnect structure can also be formed on the inner surface of the support column facing the chip, that is, the second interconnect structure can also be exposed from the inner surface of the support column facing the chip.

[0158] Specifically, in this embodiment, the second interconnect structure 322 and the insulating dielectric layer are formed on the inner surface of the support column facing the chip by the RDL process.

[0159] Reference Figure 10 , the chip 302 is mounted on the mounting surface 102a of the light-transmitting plate 102.

[0160] The chip 302 is used to implement the basic functions of the packaging structure.

[0161] Specifically, in this embodiment, the chip 302 is mounted on the mounting surface 102a of the light-transmitting plate 102, so that the chip 302 is electrically connected to the first interconnecting structure 312, thereby realizing the electrical connection between the chip 302 and the interconnecting posts 202.

[0162] In the step of mounting the chip 302 on the mounting surface 102a of the light-transmitting plate 102 in this embodiment, a photosensitive area 302a is formed on one side of the chip 302, and the photosensitive area 302a faces the light-transmitting plate 102.

[0163] The photosensitive area 302a is the area where the chip 302 receives light. The photosensitive area 302a faces the light-transmitting plate 102, so that the photosensitive area 302a receives the light transmitted by the light-transmitting plate 102.

[0164] Reference Figure 11 , a substrate 402 is provided.

[0165] The substrate 402 is used to provide a process operation basis for subsequent mounting of the light-transmitting plate 102.

[0166] In this embodiment, the substrate 402 includes a base and an interconnecting layer located on the base. The exposed surface of the interconnecting layer is a process operation platform.

[0167] The interconnecting layer is used to realize electrical connection with the interconnecting posts 202, and the interconnecting layer is also used to realize electrical connection with the base, so as to correspondingly realize the electrical connection between the interconnecting posts 202 and the base.

[0168] In this embodiment, the interconnecting layer is a redistribution layer (RDL). Specifically, the redistribution structure may include one or more redistribution interconnecting layers.

[0169] The base realizes electrical connection with the interconnecting posts 202 through the interconnecting layer, and can correspondingly be electrically connected to an external structure, thereby realizing the electrical connection between the interconnecting posts 202 and the external structure, and correspondingly realizing the electrical connection between the chip 302 and the external structure.

[0170] Specifically, in this embodiment, the substrate is a packaging substrate, and the packaging substrate can be an existing ceramic substrate, or a stacked substrate, or a MIS (Molded Interconnect System) plastic packaging interconnect substrate, or a redistribution stack layer, etc. These substrate materials and technologies have their own characteristics: ceramic substrates have excellent thermal conductivity and mechanical strength and are suitable for high-power and high-reliability scenarios; stacked substrates achieve high-density interconnection through multi-layer wiring and are suitable for complex circuit designs; MIS plastic packaging interconnect substrates combine injection molding and interconnect technologies and have the advantages of high integration and low cost; redistribution stack layers achieve higher integration density and performance optimization through vertical stacking and redistribution technologies.

[0171] Continue to refer to Figure 11 , and mount the side of the interconnect post 202 away from the light-transmitting plate 102 on the substrate 402, so that one end of the interconnect post 202 is connected to the substrate 402 and the other end is connected to the light-transmitting plate 102.

[0172] Among them, one end of the interconnect post 202 is connected to the substrate 402 and the other end is connected to the light-transmitting plate 102, that is, the interconnect post 202 is electrically connected by being connected to the substrate 402, and the interconnect post 202 is electrically connected by being connected to the first interconnect structure 312.

[0173] In this embodiment, the chip 302 is flip-chip mounted on the light-transmitting plate 102 and forms an electrical connection with the substrate 402 through the first interconnect structure 312 and the interconnect post 202 on the light-transmitting plate 102. It can not only transmit light to the chip 302 through the light-transmitting plate 102, but also, compared with the solution of realizing the interconnection between the chip and the substrate through the wire bonding process, this solution is beneficial to reducing the height and space occupied by the interconnection of the chip 302, thereby being beneficial to reducing the packaging thickness, and further being beneficial to improving the integration degree of the packaging structure.

[0174] In this embodiment, in the step of mounting the light-transmitting plate 102 on the substrate 402 through the interconnect posts 202 located on the four sides of the chip 302, the outer sidewall of the light-transmitting plate 102 is flush with the outer sidewall of the interconnect posts 202.

[0175] Among them, the outer sidewall of the light-transmitting plate 102 refers to the sidewalls on both sides of the light-transmitting plate 102, and the outer sidewall of the interconnect post 202 refers to the sidewall of the interconnect post 202 facing away from the chip 302.

[0176] The outer sidewall of the light-transmitting plate 102 is flush with the outer sidewall of the interconnecting column 202, so that there is sufficient cavity formed by the light-transmitting plate 102 and the interconnecting column 202 for placing the chip 302. Also, the size of the light-transmitting plate 102 in the transverse direction is adapted to the chip 302 to avoid waste of the size of the light-transmitting plate 102 as much as possible. Moreover, the outer sidewall of the light-transmitting plate 102 being flush with the outer sidewall of the interconnecting column 202 is also conducive to maximizing the light-transmitting area of the light-transmitting plate 102, enabling the light-transmitting plate 102 above the entire chip 302 to transmit light to the chip 302, which is beneficial to maximizing the acquisition of light sources.

[0177] Reference Figure 12 , a sealing layer 412 is formed between the interconnecting column 202 and the substrate 402.

[0178] The sealing layer 412 is used to seal the electrical connection bumps between the interconnecting column 202 and the substrate 402.

[0179] In this embodiment, in the step of forming the sealing layer 412 between the interconnecting column 202 and the substrate 402, the material of the sealing layer 412 includes glue or underfiller.

[0180] Figures 13 to 16 is a schematic structural diagram corresponding to each step in the second embodiment of the packaging method of the present invention;

[0181] The same parts of this embodiment and the foregoing embodiments will not be described herein again. The difference between this embodiment and the foregoing embodiments lies in the difference in the formation of the interconnecting columns.

[0182] Reference Figure 13 , in the step of providing the light-transmitting plate 100, support columns 210 integrally formed with the light-transmitting plate 100 are formed in the mounting area 100t on the side of the mounting surface 100a of the light-transmitting plate 100.

[0183] The support columns 210 are integrally formed with the light-transmitting plate 100, that is, the support columns 210 can be obtained while obtaining the light-transmitting plate 100 without the need to additionally form the support columns 210, making it easy to mount the light-transmitting plate 100 on the substrate 400 through the support columns 210, and making the combination of the light-transmitting plate 100 and the support columns 210 relatively stable. At the same time, the support columns 210 are integrally formed with the light-transmitting plate 100, that is, the support columns 210 are also made of light-transmitting materials, so that the photosensitive area of the subsequent chip can also obtain light from the support columns 210, which is beneficial to making the light obtained by the chip more sufficient.

[0184] Reference Figure 14In the step of forming the first interconnect structure 310 extending in the lateral direction on the light-transmitting plate 100 in the mounting area 100t, the first interconnect structure 310 is formed on the surface of the mounting area 100t of the mounting surface 100a.

[0185] That is, during the encapsulation process, the first interconnect structure 310 and the insulating dielectric layer are directly formed on the mounting surface 100a by the RDL process. The forming process is relatively simple and easy to operate.

[0186] In other embodiments, in the step of forming the first interconnect structure extending in the lateral direction on the light-transmitting plate in the mounting area, the first interconnect structure is embedded in the surface of the mounting surface of the light-transmitting plate. Specifically, a first trench is formed on the surface of the mounting area, and then the first interconnect structure is formed in the first trench. The first interconnect structure formed in this way is embedded in the surface of the mounting area, which can not only omit an additional insulating dielectric layer, but also is beneficial to reducing the encapsulation height from the light-transmitting plate to the substrate and improving the encapsulation integration.

[0187] Continue to refer to Figure 14 The step of forming the interconnecting posts 200 provided on one side of the mounting surface 100a of the light-transmitting plate 100 includes: forming a second interconnect structure 320 that longitudinally penetrates the support post 210. One end of the second interconnect structure 320 is electrically connected to the first interconnect structure 310, and the other end is subsequently electrically connected to the substrate.

[0188] Forming the second interconnect structure 320 that longitudinally penetrates the support post 210 means that, longitudinally, the second interconnect structure 320 is exposed at both ends of the support post 210.

[0189] In this embodiment, the step of forming the second interconnect structure 320 that longitudinally penetrates the support post 210 includes: forming the second interconnect structure 320 on the inner surface of the support post 210 facing the chip 300.

[0190] That is, in the interconnecting post 200 composed of the second interconnect structure 320 and the support post 210, the second interconnect structure 320 is exposed from the inner surface of the support post 210 longitudinally.

[0191] In this embodiment, to form the second interconnect structure 320 on the inner surface of the support post 210 facing the chip 300, specifically, the second interconnect structure 322 and the insulating dielectric layer are formed on the inner surface of the support post facing the chip by the RDL process.

[0192] In other embodiments, alternatively, the step of forming the second interconnect structure that longitudinally penetrates the support post includes: forming the second interconnect structure embedded in the inner surface of the support post facing the chip. Specifically, a second trench recessed from the inner surface is formed on one side of the support post facing the chip, and then the second interconnect structure is formed in the second trench.

[0193] It should be noted that in this embodiment, the support column 210 and the light-transmitting plate 100 are of an integral structure, which also makes it easy to form the first interconnect structure 310 and the second interconnect structure 320 in the same step.

[0194] Refer to Figure 15 , and mount the chip 300 on the mounting surface 100a of the light-transmitting plate 100.

[0195] Mount the chip 300 on the mounting surface 100a of the light-transmitting plate 100 to achieve electrical connection between the chip 300 and the first interconnect structure 310.

[0196] In this embodiment, in the step of mounting the chip 300 on the mounting surface 100a of the light-transmitting plate 100, the photosensitive area 300a of the chip 300 faces the light-transmitting plate 100.

[0197] Refer to Figure 16 , and mount the integral light-transmitting plate 100 and the support column 210 on the substrate 400 through the support column 210, with the mounting surface 100a facing the substrate 400, and the chip 300 is located in the cavity surrounded by the light-transmitting plate 100, the interconnect column 200 and the substrate 400.

[0198] Mounting the integral light-transmitting plate 100 and the support column 210 on the substrate 400 through the support column 210 is relatively stable.

[0199] Figures 17 to 20 It is a schematic structural diagram corresponding to each step in the third embodiment of the encapsulation method of the present invention;

[0200] The same parts of this embodiment and the foregoing embodiments will not be described herein again. The difference between this embodiment and the foregoing embodiments lies in the different formation of the interconnect columns.

[0201] Refer to Figure 17 , in the step of providing the light-transmitting plate 101, a support column 211 integral with the light-transmitting plate 101 is formed in the mounting area 101t on one side of the mounting surface 101a of the light-transmitting plate 101.

[0202] The support column 211 and the light-transmitting plate 101 are of an integral structure, that is, the support column 211 can be obtained while obtaining the light-transmitting plate 101, without the need to additionally form the support column 211, which makes it easy to mount the light-transmitting plate 101 on the substrate through the support column 211 subsequently, and makes the combination of the light-transmitting plate 101 and the support column 211 relatively stable. At the same time, the support column 211 and the light-transmitting plate 101 are of an integral structure, that is, the support column 211 is also made of a light-transmitting material, so that the photosensitive area of the subsequent chip can also obtain light from the support column 211, which is beneficial to making the light obtained by the chip more sufficient.

[0203] Continue to refer to Figure 17 , before forming the first interconnect structure extending transversely on the mounting area 101t of the light-transmitting plate 101 subsequently, it further includes: forming a first groove 341 recessed from the mounting surface 101a in the mounting area 101t of the light-transmitting plate 101.

[0204] The first groove 341 is used to provide a spatial position for the subsequent formation of the first interconnect structure.

[0205] In this embodiment, a laser process is used to form the first groove 341 recessed from the mounting surface 101a in the mounting area 101t of the light-transmitting plate 101.

[0206] Specifically, the first groove 341 is formed by laser from the outer side wall of the light-transmitting plate 101 transversely into the light-transmitting plate 101, so that the formed first groove 341 transversely penetrates the support column 211 and extends into the light-transmitting plate 101 exposed on the side of the support column 211.

[0207] Continue to refer to Figure 17 , the step of forming the second interconnect structure longitudinally penetrating the support column 211 includes: forming a through hole 331 longitudinally penetrating the support column 211.

[0208] The through hole 331 is used to provide a spatial position for the subsequent formation of the second interconnect structure.

[0209] In this embodiment, in the step of forming the through hole 331 longitudinally penetrating the support column 211, the through hole 331 communicates with the first groove 341.

[0210] The through hole 331 communicates with the first groove 341, so that the subsequently formed first interconnect structure and the second interconnect structure are in contact and electrically connected.

[0211] With reference to Figure 18 and Figure 19 , in the step of forming the first interconnect structure 311 extending transversely on the mounting area 101t of the light-transmitting plate 101, the first interconnect structure 311 is formed in the first groove 341.

[0212] The first interconnect structure 311 is formed in the first groove 341, that is, the first interconnect structure 311 is embedded in the light-transmitting plate 101, which is beneficial to reducing the longitudinal packaging height from the light-transmitting plate 101 to the substrate, and thus is beneficial to improving the packaging integration degree.

[0213] In this embodiment, the formed first trench 341 penetrates the support pillar 211 transversely and extends into the light-transmitting plate 101 exposed at the inner side of the support pillar 211. Correspondingly, the first interconnect structure 311 penetrates the support pillar 211 transversely and extends into the light-transmitting plate 101 exposed at the inner side of the support pillar 211. The first interconnect structure 311 that penetrates the support pillar 211 transversely is electrically connected to the second interconnect structure, and the first interconnect structure 311 that extends into the light-transmitting plate 101 exposed at the inner side of the support pillar 211 is electrically connected to the chip.

[0214] Specifically, referring to Figure 18 , the step of forming the first interconnect structure 311 extending transversely on the mounting area 101t of the light-transmitting plate 101 includes: forming a first sub-interconnect structure 351 that fills the first trench 341 on the side of the support pillar 211 in the mounting area 101t.

[0215] The first sub-interconnect structure 351 is used for subsequent electrical connection with the chip. The first sub-interconnect structure 351 is also used to facilitate, when forming the second sub-interconnect structure subsequently, the situation where the interconnect structure material overflows into the space enclosed by the light-transmitting plate 101 and the support pillar 211 as much as possible, thereby facilitating reducing the probability of the subsequently mounted chip being contaminated.

[0216] Referring to Figure 19 , a second sub-interconnect structure 361 that fills the first trench 341 in the mounting area 101t at the bottom of the support pillar 211 is formed. The second sub-interconnect structure 361 and the first sub-interconnect structure 351 serve as the first interconnect structure 311.

[0217] The second sub-interconnect structure 361 is used for subsequent electrical connection with the second interconnect structure.

[0218] Referring to Figure 20 , the through hole 331 is filled to form the second interconnect structure 321.

[0219] The through hole 331 is filled to form the second interconnect structure 321. The second interconnect structure 321 and the support pillar 211 form an interconnect pillar 201.

[0220] That is to say, in this embodiment, the second interconnect structure 321 is located in the support pillar 211, and the second interconnect structure 321 penetrates and exposes from the support pillar 211 longitudinally.

[0221] Figures 21 to 25 It is a schematic structural diagram corresponding to each step in the fourth embodiment of the packaging method of the present invention;

[0222] The same parts of this embodiment and the foregoing embodiments will not be described herein again. The difference between this embodiment and the foregoing embodiments lies in: the different formation of the interconnect pillar.

[0223] Reference Figure 21 Before forming the first interconnect structure extending transversely on the mounting area 103t of the light-transmitting plate 103, it further includes: forming a first groove 343 recessed from the mounting surface 103a in the mounting area 103t of the light-transmitting plate 103.

[0224] The first groove 343 is used to provide a spatial position for the formation of the first interconnect structure.

[0225] Reference Figure 22 In the step of forming the first interconnect structure 313 extending transversely on the mounting area 103t of the light-transmitting plate 103, the first interconnect structure 313 is formed in the first groove 343.

[0226] The first interconnect structure 313 is located in the first groove 343, that is, the first interconnect structure 313 is embedded in the light-transmitting plate 103, which is beneficial to reducing the longitudinal packaging height from the light-transmitting plate 103 to the substrate, thereby being beneficial to improving the packaging integration.

[0227] Reference Figure 23 In the step of providing the substrate 403, a support column 213 integrally formed with the substrate 403 is formed on the substrate 403, and the support column 213 and the substrate 403 enclose a groove 413.

[0228] The groove 413 is used to provide a spatial position for subsequent chip bonding.

[0229] The support column 213 and the substrate 403 are of an integral structure, that is, the support column 213 can be obtained while obtaining the substrate 403, without the need to additionally form the support column 213, making it easy to mount the light-transmitting plate 103 on the substrate 403 through the support column 213, and making the combination of the substrate 403 and the support column 213 relatively stable.

[0230] Moreover, since the support column 213 and the substrate 403 are of an integral structure, the step of mounting the support column 213 on the substrate 403 can be omitted, and there is no need to bond the support column 213 and the substrate 403 with a sealing layer, which is beneficial to simplifying the process steps, improving the process efficiency, and saving the process cost.

[0231] In this embodiment, the step of forming the interconnect column 203 disposed on one side of the mounting surface 103a of the light-transmitting plate 103 includes: forming a second interconnect structure 323 longitudinally penetrating the support column 213, and the second interconnect structure 323 is of an integral structure with the circuit layer in the substrate 403.

[0232] That is to say, in this embodiment, when forming the substrate 403 and the support pillars 213, the second interconnect structure 323 is formed synchronously in the support pillars 213, and the second interconnect structure 323 penetrates through the support pillars 213 longitudinally and is exposed.

[0233] It should be noted that forming the interconnect pillars 203 on the side of the mounting surface 103a of the light-transmitting plate 103 means that regardless of the formation process of the interconnect pillars 203, in the design of the packaging structure, the interconnect pillars 203 are all located on the side of the mounting surface 103a of the light-transmitting plate 103. That is to say, in this embodiment, although the interconnect pillars 203 are formed on the substrate 403, after the light-transmitting plate 103 is mounted on the substrate through the interconnect pillars 203, the interconnect pillars 203 are all located on the side of the mounting surface 103a of the light-transmitting plate 103.

[0234] Reference Figure 24 , the chip 303 is mounted on the mounting surface 103a of the light-transmitting plate 103.

[0235] The chip 303 is mounted on the mounting surface 103a of the light-transmitting plate 103 to realize the electrical connection between the chip 303 and the first interconnect structure 313.

[0236] Reference Figure 25 , the light-transmitting plate 103 is mounted on the interconnect pillars 203 so as to be mounted on the substrate 403 through the interconnect pillars 203. The mounting surface 103a of the light-transmitting plate 103 faces the substrate 403 so that the chip 303 is located in the groove 413, so that the chip 303 is located in the cavity surrounded by the light-transmitting plate 103, the interconnect pillars 203 and the substrate 403.

[0237] Mounting the light-transmitting plate 103 on the interconnect pillars 203 means that there is no need to bond the support pillars 213 and the substrate 403 with a sealing layer, which is beneficial to simplifying the process steps, improving the process efficiency and saving the process cost.

[0238] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. An encapsulation structure, characterized in that, Comprising: A substrate; Interconnecting posts mounted on the substrate; A light-transmitting plate disposed on a side of the interconnecting posts away from the substrate, such that the light-transmitting plate, the interconnecting posts and the substrate enclose a cavity, the light-transmitting plate includes a mounting surface facing the substrate; A chip mounted on a side of the mounting surface of the light-transmitting plate to be located in the cavity, and the chip is electrically connected to the substrate through the interconnecting posts.

2. The encapsulation structure according to claim 1, wherein The light-transmitting plate on the side of the mounting surface includes mounting areas respectively located around the chip, and a first interconnecting structure extending transversely is formed on the light-transmitting plate of the mounting area, one end of the first interconnecting structure is electrically connected to the chip and the other end is electrically connected to the interconnecting post.

3. The encapsulation structure according to claim 2, wherein The first interconnecting structure is located on the surface of the mounting area on the mounting surface.

4. The encapsulation structure according to claim 2, wherein A first groove recessed from the mounting surface is formed in the mounting area of the light-transmitting plate; The first interconnecting structure is located in the first groove.

5. The encapsulation structure according to claim 2, characterized in that, The interconnecting post includes a support post and a second interconnecting structure longitudinally penetrating the support post, one end of the second interconnecting structure is electrically connected to the first interconnecting structure and the other end is electrically connected to the substrate.

6. The encapsulation structure according to claim 5, characterized in that, The second interconnecting structure is located on the inner surface of the support post facing the chip.

7. The encapsulation structure according to claim 5, wherein A second groove recessed from the inner surface is formed on a side of the support post facing the chip; The second interconnecting structure is located in the second groove.

8. The encapsulation structure according to claim 6 or 7, characterized in that, The second interconnecting structure and the first interconnecting structure are of an integral structure.

9. The encapsulation structure according to claim 5, wherein The second interconnecting structure is located in the support post.

10. The encapsulation structure according to claim 5, characterized in that, The support post and the light-transmitting plate are of an integral structure.

11. The encapsulation structure according to claim 5, wherein The support post and the substrate are of an integral structure.

12. The encapsulation structure according to claim 5, wherein The material of the support post is a light-transmitting material.

13. The encapsulation structure according to claim 1, characterized in that, A photosensitive area is formed on one surface of the chip, and the photosensitive area faces the light-transmitting plate.

14. The encapsulation structure according to claim 1, characterized in that, The material of the light-transmitting plate includes glass.

15. A packaging method, characterized in that, Comprising: Providing a light-transmitting plate, the light-transmitting plate includes a mounting surface; Providing a substrate; Forming interconnecting posts disposed on a side of the mounting surface of the light-transmitting plate; Mounting a chip on the mounting surface of the light-transmitting plate; Mounting the light-transmitting plate on the substrate through the interconnecting posts located on four sides of the chip, one end of the interconnecting posts is connected to the substrate and the other end is connected to the light-transmitting plate, the chip is electrically connected to the substrate through the interconnecting posts, the mounting surface faces the substrate, such that the chip is located in the cavity enclosed by the light-transmitting plate, the interconnecting posts and the substrate.

16. The encapsulation method according to claim 15, characterized in that, In the step of providing the light-transmitting plate, the light-transmitting plate on the side of the mounting surface includes mounting areas respectively located around the chip; Before mounting the chip on the mounting surface of the light-transmitting plate, further comprising: forming a first interconnecting structure extending transversely on the mounting area of the light-transmitting plate, one end of the first interconnecting structure is electrically connected to the chip and the other end is electrically connected to the interconnecting post.

17. The encapsulation method according to claim 16, wherein In the step of forming a first interconnecting structure extending transversely on the mounting area of the light-transmitting plate, the first interconnecting structure is located on the surface of the mounting area on the mounting surface.

18. The encapsulation method according to claim 16, wherein Before forming a first interconnecting structure extending transversely on the mounting area of the light-transmitting plate, further comprising: forming a first groove recessed from the mounting surface in the mounting area of the light-transmitting plate; In the step of forming a first interconnect structure extending transversely on the mounting area of the light-transmitting plate, the first interconnect structure is formed in the first trench.

19. The encapsulation method according to claim 16, wherein In the step of providing the light-transmitting plate, support posts integrally formed with the light-transmitting plate are formed in the mounting area on one side of the mounting surface of the light-transmitting plate; The step of forming interconnect posts provided on one side of the mounting surface of the light-transmitting plate includes: forming a second interconnect structure longitudinally penetrating the support posts, one end of the second interconnect structure being electrically connected to the first interconnect structure and the other end being electrically connected to the substrate.

20. The encapsulation method according to claim 16, wherein In the step of providing the substrate, support posts integrally formed with the substrate are formed on the substrate, and the support posts and the substrate enclose a groove; The step of forming interconnect posts provided on one side of the mounting surface of the light-transmitting plate includes: forming a second interconnect structure longitudinally penetrating the support posts, one end of the second interconnect structure being electrically connected to the first interconnect structure and the other end being electrically connected to the substrate.

21. The encapsulation method according to claim 16, characterized in that, The step of forming interconnect posts provided on one side of the mounting surface of the light-transmitting plate includes: forming support posts in the mounting area on one side of the mounting surface of the light-transmitting plate; Forming a second interconnect structure longitudinally penetrating the support posts, one end of the second interconnect structure being electrically connected to the first interconnect structure and the other end being electrically connected to the substrate.

22. The encapsulation method according to any one of claims 19, 20 or 21, characterized in that The step of forming a second interconnect structure longitudinally penetrating the support posts includes: forming a second interconnect structure on the inner surface of the support post facing the chip; Or, The step of forming a second interconnect structure longitudinally penetrating the support posts includes: forming a second trench recessed from the inner surface on the side of the support post facing the chip; Forming the second interconnect structure in the second trench.

23. The encapsulation method according to claim 22, characterized in that, In the step of providing the light-transmitting plate, support posts integrally formed with the light-transmitting plate are formed in the mounting area on one side of the mounting surface of the light-transmitting plate; In the step of forming a first interconnect structure extending transversely on the mounting area of the light-transmitting plate, the first interconnect structure is located on the surface of the mounting area on the mounting surface; In the same step, the first interconnect structure and the second interconnect structure are formed.

24. The encapsulation method according to any one of claims 19, 20 or 21, characterized in that The step of forming a second interconnect structure longitudinally penetrating the support posts includes: forming a through hole longitudinally penetrating the support posts; Filling the through hole to form the second interconnect structure.

25. The encapsulation method according to claim 24, wherein, In the step of providing the light-transmitting plate, support posts integrally formed with the light-transmitting plate are formed in the mounting area on one side of the mounting surface of the light-transmitting plate; Before forming a first interconnect structure extending transversely on the mounting area of the light-transmitting plate, it further includes: forming a first trench recessed from the mounting surface in the mounting area of the light-transmitting plate, the first trench transversely penetrating the support posts; In the step of forming a through hole longitudinally penetrating the support posts, the through hole communicates with the first trench; The step of forming a first interconnect structure extending transversely on the mounting area of the light-transmitting plate includes: forming a first sub-interconnect structure filling the first trench on the side of the support posts in the mounting area; Forming a second sub-interconnect structure filling the first trench in the mounting area at the bottom of the support posts, and the second sub-interconnect structure and the first sub-interconnect structure serve as the first interconnect structure.

26. The encapsulation method according to claim 15, characterized in that, In the step of mounting the chip on the mounting surface of the light-transmitting plate, a photosensitive area is formed on one side of the chip, and the photosensitive area faces the light-transmitting plate.

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