Packaging module

Abstract

The invention relates to the technical field of chip packaging, and discloses a packaging module, which comprises a substrate having a first surface and a second surface opposite to each other, chip through grooves arranged in an array are arranged in the substrate, and functional chips are arranged in the chip through grooves; the first wiring layer is arranged on the first surface and comprises at least one layer of first metal wiring, and a first target metal wiring is electrically connected with the functional chip; the second wiring layer is arranged on the second surface and comprises at least one layer of second metal wiring, and the second target metal wiring is electrically connected with the functional chip; the at least one functional device is arranged in the first wiring layer and is electrically connected with the first metal wiring; and / or is arranged in the second wiring layer and is electrically connected with the second metal wiring. The packaging module has the beneficial effects that the integration level of the packaging module is remarkably improved, the packaging size of the packaging module is effectively reduced, and the miniaturization requirement of equipment such as a communication terminal can be met.

Description

Technical Field

[0001] The present application relates to the technical field of chip packaging, and particularly to a packaging module. Background Art

[0002] The development of multi-mode wireless communication has promoted the functional expansion of communication terminals. More and more functional devices are integrated into a packaging module to form a communication terminal that supports multi-mode wireless communication, so as to provide communication services for users. In the radio frequency front-end architecture, devices with different functions usually adopt different substrates and packaging processes, making it difficult to integrate these devices into a single chip. Therefore, conventional packaging modules often adopt a multi-chip packaging method to separately implement their respective communication functions. However, with the miniaturization evolution of communication terminals, the multi-chip packaging method has brought an obvious increase in the size of the packaging module, making it difficult for the packaging module to meet the increasingly stringent size requirements. Therefore, there is an urgent need to propose a miniaturized packaging method for high-density multi-chip packaging to meet the miniaturization requirements of packaging modules. Summary of the Invention

[0003] The present application provides a packaging module, which embeds functional chips into chip through-holes of a substrate, and forms electronic devices on the surface of the substrate by using metal wiring and functional devices, significantly improving the integration degree of the packaging module, effectively reducing the packaging size of the packaging module, and thus being able to meet the miniaturization requirements of devices such as communication terminals.

[0004] To achieve the above object, the main technical solutions adopted in the present application include:

[0005] An embodiment of the present application provides a packaging module, including:

[0006] A substrate, the substrate having opposite first and second surfaces, the substrate being provided with chip through-holes arranged in an array, and functional chips being provided in the chip through-holes;

[0007] A first wiring layer, the first wiring layer being disposed on the first surface, the first wiring layer including at least one layer of first metal wiring, and a first target metal wiring in the at least one layer of first metal wiring being electrically connected to the functional chip; wherein, the first target metal wiring is the first metal wiring closest to the pins of the functional chip;

[0008] A second wiring layer, the second wiring layer being disposed on the second surface, the second wiring layer including at least one layer of second metal wiring, and a second target metal wiring in the at least one layer of second metal wiring being electrically connected to the functional chip; wherein, the second target metal wiring is the second metal wiring closest to the pins of the functional chip;

[0009] At least one functional device, which is disposed within the first wiring layer and electrically connected to the first metal wiring; and / or the functional device is disposed within the second wiring layer and electrically connected to the second metal wiring.

[0010] In the packaging module provided by the embodiment of the present application, a chip through-hole for embedding a functional chip is provided in the substrate, so that the functional chip can be hidden in the substrate, thereby not occupying an additional height of the packaging module, effectively reducing the packaging thickness of the packaging module. The present application also forms metal wiring on the surface of the substrate, and uses the metal wiring to connect the functional device and the functional chip, thereby forming an electronic device with corresponding functions on the surface of the substrate, reducing the processing steps for installing the electronic device, improving the integration degree of the packaging module, and further reducing the size of the packaging module. Compared with the related art, the present application realizes the integration of multiple chips and multi-functional devices through the chip through-holes arranged in an array in the substrate and multiple wiring layers on the surface of the substrate, improves the integration degree of the packaging module, and on the basis of high-density integration, effectively reduces the packaging size of the packaging module, thereby meeting the requirements of thinning applications for devices such as communication terminals.

[0011] Optionally, the number of layers of the at least one layer of first metal wiring is two or more, and different layers of the first metal wiring are electrically connected through interconnecting wiring.

[0012] Optionally, the number of layers of the at least one layer of second metal wiring is two or more, and different layers of the second metal wiring are electrically connected through interconnecting wiring.

[0013] Optionally, a wiring through-hole is provided in the substrate, and the first metal wiring and the second metal wiring are electrically connected through the wiring through-hole.

[0014] Optionally, the packaging module further includes an external interface, which is disposed on the side of the first wiring layer or the second wiring layer away from the substrate, and the external interface is electrically connected to the wiring layer closest to it in the first wiring layer and the second wiring layer.

[0015] Optionally, the packaging module further includes a protective layer, which is disposed on the side of the first wiring layer or the second wiring layer away from the substrate, and the protective layer and the external interface are respectively disposed on both sides relative to the substrate.

[0016] Optionally, the thickness of the packaging module is the sum of the thicknesses of the substrate, the first wiring layer, the second wiring layer, and the protective layer.

[0017] Optionally, the thickness of the substrate matches the height of the functional chip.

[0018] Optionally, the functional chip includes a first chip, the pins of the first chip face the first wiring layer, and the first chip is electrically connected to the first target metal wiring.

[0019] Optionally, the functional chip includes a second chip, the pins of the second chip face the second wiring layer, and the second chip is electrically connected to the second target metal wiring. Description of the Drawings

[0020] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0021] Figure 1a Schematic diagram of the module structure of the traditional packaging technology in the embodiment of the present application;

[0022] Figure 1b Schematic diagram of the module structure of the traditional packaging technology in the embodiment of the present application;

[0023] Figure 2 Schematic diagram of the structure of the packaging module provided by the embodiment of the present application;

[0024] Figure 3 Schematic diagram of the arrangement of the chip through-holes on the substrate surface in the embodiment of the present application;

[0025] Figure 4 Schematic diagram of the wiring structure of the first wiring layer in the embodiment of the present application;

[0026] Figure 5 Schematic diagram of the wiring structure of the second wiring layer in the embodiment of the present application;

[0027] Figure 6 Schematic diagram of the indirect connection between the first chip and the functional device in the second wiring layer in the embodiment of the present application;

[0028] Figure 7 Schematic diagram of the indirect connection between the second chip and the functional device in the first wiring layer in the embodiment of the present application.

[0029] Among them, the reference numerals in the accompanying drawings of the specification are as follows: 100. Substrate, 110. Chip through-hole, 120. Functional chip, 121. First chip, 122. Second chip, 130. Wiring through-hole, 200. First wiring layer, 210. First metal wiring, 211. First target metal wiring, 220. Interconnecting wiring, 300. Second wiring layer, 310. Second metal wiring, 311. Second target metal wiring, 320. Interconnecting wiring, 400. Functional device, 500. External interface, 510. Solder mask layer, 600. Protective layer. Detailed implementation manners

[0030] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant accompanying drawings. Embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used in the specification of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0032] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or part discussed below may be referred to as the second element, component, region, layer or part; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types. For example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0033] Spatial relationship terms such as "under", "below", "lower", "beneath", "above", "upper", etc. can be used herein to describe the relationship of one element or feature shown in the figure with other elements or features. It should be understood that, in addition to the orientations shown in the figure, spatial relationship terms also include different orientations of the device in use and operation. For example, if the device in the drawing is flipped, an element or feature described as "under other elements" or "beneath it" or "under it" will be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "beneath" can include both upper and lower orientations. In addition, the device may also have other orientations (such as, rotated 90 degrees or other orientations), and the spatial descriptors used herein are to be interpreted accordingly.

[0034] As used herein, the singular forms "a", "an", and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that terms such as "comprises / include" or "has" etc. specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the related listed items.

[0035] The development of multi-mode wireless communication has promoted the functional expansion of communication terminals. More and more functional devices are integrated into a single package module to form a communication terminal that supports multi-mode wireless communication to provide communication services for users. In the radio frequency front-end architecture, devices with different functions usually adopt different substrates and packaging processes, making it difficult to integrate these devices into a single chip. Therefore, conventional package modules often adopt a multi-chip packaging method to achieve their respective communication functions separately.

[0036] However, with the miniaturization evolution of communication terminals, the multi-chip packaging method has brought an obvious increase in the size of the package module, making it difficult for the package module to meet the increasingly stringent size requirements. Refer to Figures 1a to 1b , in traditional multi-chip miniaturization packaging technologies, chip stacking packaging or substrate double-sided packaging is usually utilized.

[0037] The way of chip stacking packaging is as Figure 1a shown. Figure 1aTaking four chips as an example, different chips have different functions. During the packaging process, first, according to the chip layout design, chips 2 and 4 are mounted on the surface of the substrate. Secondly, by means of bump solder joints or TSV transfer boards, etc., chip 1 is interconnected with chip 2, and chip 3 is interconnected with chip 4, thereby completing the packaging. This method vertically stacks the chips, greatly saving the space on the surface of the substrate. At the same time, it also interconnects the chips by means of bump solder joints or TSV transfer boards, etc., shortening the communication distance between the chips. However, from Figure 1a it can be clearly seen that as the number of chips increases, the overall thickness of the packaging module obtained by this method will increase significantly, affecting its application in scenarios with strict requirements for packaging size.

[0038] The method of double-sided packaging of the substrate is as Figure 1b shown, Figure 1b Similarly, taking four chips as an example, different chips have different functions. During the packaging process, according to the pre-designed chip layout, chips 1 and 2 are mounted on the surface of the substrate far from the solder balls, and chips 3 and 4 are mounted on the surface of the substrate close to the solder balls. The chips can be interconnected through the through-holes in the substrate, thereby completing the packaging. This method mounts the chips on different surfaces of the substrate respectively, maximizing the use of the space on the surface of the substrate and reducing the thickness of the packaging module. However, in the case of a large number of chips, this method still faces the limitation of the space on the surface of the substrate, and the height of the chips themselves will also increase the thickness of the packaging module, unable to effectively reduce the packaging size of the packaging module.

[0039] Based on the above problems, the present application provides a packaging module, including: the substrate has opposite first and second surfaces, and the substrate is provided with chip through-holes arranged in an array, and functional chips are arranged in the chip through-holes; the first wiring layer is arranged on the first surface and includes at least one layer of first metal wiring, and the first target metal wiring therein is electrically connected to the functional chip; the second wiring layer is arranged on the second surface and includes at least one layer of second metal wiring, and the second target metal wiring therein is electrically connected to the functional chip; at least one functional device is arranged in the first wiring layer and is electrically connected to the first metal wiring; and / or is arranged in the second wiring layer and is electrically connected to the second metal wiring.

[0040] In the packaging module provided by the present application, chip through-holes for embedding functional chips are arranged in the substrate, so that the functional chips can be hidden in the substrate, thus not occupying additional height of the packaging module, effectively reducing the packaging thickness of the packaging module. The present application also forms metal wiring on the surface of the substrate, and uses the metal wiring to connect the functional device and the functional chip, thereby forming an electronic device with corresponding functions on the surface of the substrate, improving the integration degree of the packaging module, and further reducing the size of the packaging module.

[0041] Compared with the related art, the present application realizes the integration of multiple chips and multi-functional devices through the chip through-holes arranged in an array in the substrate and multiple wiring layers on the surface of the substrate, improves the integration degree of the packaging module, and thus effectively reduces the packaging size of the packaging module on the basis of high-density integration, so as to meet the thinning application requirements of devices such as communication terminals.

[0042] The packaging module provided in this specification can be applied to terminal devices with miniaturization requirements, including but not limited to notebooks, desktop computers, smart phones, smart wearable devices (virtual reality glasses, smart watches, etc.) and tablet computers, etc. It can be understood that after being adaptively modified, the present application can also be used in fields with high space utilization requirements for packaging modules, such as data center servers and edge computing devices, etc.

[0043] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the invention. It is thus contemplated that variations in the shapes as illustrated, for example due to manufacturing techniques and / or tolerances. Accordingly, embodiments of the invention should not be limited to the particular shapes of regions shown herein, but include shape deviations, for example, due to manufacturing techniques. For example, an implantation region shown as rectangular will generally have rounded or curved features at its edges and / or an implantation concentration gradient, rather than a binary change from the implanted region to the non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions shown in the figures are substantially schematic, their shapes do not represent the actual shapes of regions of the device, and do not limit the scope of the invention.

[0044] In this embodiment, a packaging module is provided, which can be used for the above-mentioned terminal devices with miniaturization requirements. Referring to Figure 2 As shown, the packaging module includes a substrate, a first wiring layer, a second wiring layer, and at least one functional device. Among them, the substrate has opposite first and second surfaces, and the substrate is provided with chip through-holes arranged in an array, and functional chips are arranged in the chip through-holes; the first wiring layer is arranged on the first surface, and the first wiring layer includes at least one layer of first metal wiring, and the first target metal wiring in at least one layer of first metal wiring is electrically connected to the functional chip; wherein, the first target metal wiring is the first metal wiring closest to the pins of the functional chip; the second wiring layer is arranged on the second surface, and the second wiring layer includes at least one layer of second metal wiring, and the second target metal wiring in at least one layer of second metal wiring is electrically connected to the functional chip; wherein, the second target metal wiring is the second metal wiring closest to the pins of the functional chip; the functional device is arranged in the first wiring layer and is electrically connected to the first metal wiring; and / or the functional device is arranged in the second wiring layer and is electrically connected to the second metal wiring.

[0045] Specifically, the encapsulation module includes a substrate 100, a first wiring layer 200, a second wiring layer 300, and at least one functional device 400. Among them, the substrate 100 is used to carry the functional chip 120 and provide physical support for the functional chip 120 with its own structure. The material of the substrate 100 can be materials such as glass, quartz, or ceramic. A plurality of chip through-holes 110 for setting the functional chip 120 are provided in the substrate 100. The depth direction of the chip through-holes 110 is consistent with the thickness direction of the substrate 100, and the opening size of the chip through-holes 110 matches the size of the functional chip 120. The processing method of the chip through-holes 110 can be grinding, polishing, or other methods, and its dimensional accuracy can be controlled within ±5 μm.

[0046] Furthermore, the functional chip 120 is fixed in the chip through-hole 110, and the position of the functional chip 120 in the thickness direction of the substrate 100 does not exceed the first surface and the second surface, so that the functional chip 120 can be completely hidden in the substrate 100. The fixing method of the functional chip 120 can be conductive silver paste, thermal conductive adhesive, or other methods to ensure that the functional chip 120 will not move in the encapsulation module and ensure that the functional chip 120 can be in the correct position. It should be noted that compared with the method of using a groove to set the functional chip 120, setting the chip through-hole 110 can effectively eliminate the influence of the blind groove depth error on the encapsulation module. When there is an error in the blind groove depth, the inconsistency of the groove depth will cause the height of the functional chip 120 to be inconsistent, which will further cause the electrical connection between the functional chip 120 and the first metal wiring 210 or the second metal wiring 310 to fail, affecting the working process of the encapsulation module. It can be understood that when the functional chip 120 is arranged in the chip through-hole 110, the chip through-hole 110 is also filled with an insulating medium, so that the functional chip 120 is only electrically connected to the first wiring layer 200 or the second wiring layer 300 through pins, reducing the probability of electrical connection errors of the functional chip 120.

[0047] Refer to Figure 3 As shown, taking the number of chip through-holes 110 as 6 as an example, the chip through-holes 110 in the substrate 100 are arranged in an array form, so as to maximize the use of the space on the surface of the substrate 100 and realize the integration of multiple chips in the substrate 100. In other embodiments, the arrangement form of the chip through-holes 110 can also be other forms, and the distance between the chip through-holes 110 can be determined according to actual scenario needs. For example, when the number of functional chips 120 is large, the distance between the chip through-holes 110 can be appropriately reduced to increase the number of chip through-holes 110, so as to be able to accommodate more functional chips 120 in the encapsulation module; or for example, when there are high requirements for the overall yield of module processing, the distance between the chip through-holes 110 can be appropriately increased to improve the mechanical strength of the substrate 100, thereby enhancing the mechanical strength of the encapsulation module, reducing the fragmentation rate and warpage rate during module processing, and improving the overall yield.

[0048] Further, wiring layers are respectively provided on different surfaces of the substrate 100 in the encapsulation module, including a first wiring layer 200 and a second wiring layer 300. The first wiring layer 200 is provided on the first surface of the substrate 100, and the second wiring layer 300 is provided on the second surface of the substrate 100. The first surface and the second surface are two opposite surfaces of the substrate 100. The first wiring layer 200 includes at least one layer of first metal wiring 210. The first metal wiring 210 is formed by the redistribution layer technology. The layers of the first metal wiring 210 can be distributed along the thickness direction of the first wiring layer 200. For any functional chip 120, the metal wiring closest to the pins of the any functional chip 120 in the first metal wiring 210 is used as the first target metal wiring 211. The any functional chip 120 is electrically connected to the first target metal wiring 211 through the pins, realizing the electrical connection between the functional chip 120 and the first wiring layer 200.

[0049] Similarly, the second wiring layer 300 includes at least one layer of second metal wiring 310. The second metal wiring 310 is formed by the redistribution layer technology. The layers of the second metal wiring 310 can be distributed along the thickness direction of the second wiring layer 300. For any functional chip 120, the metal wiring closest to the pins of the any functional chip 120 in the second metal wiring 310 is used as the second target metal wiring 311. The any functional chip 120 is electrically connected to the second target metal wiring 311 through the pins, realizing the electrical connection between the functional chip 120 and the second wiring layer 300.

[0050] Further, the encapsulation module includes at least one functional device 400. The type of the functional device 400 can be a resistor or a Metal-Insulator-Metal Capacitor (MIM capacitor), etc. The functional device 400 can be disposed in the first wiring layer 200 or the second wiring layer 300. When the functional device 400 is disposed in the first wiring layer 200, it is electrically connected to the first metal wiring 210. When the functional device 400 is disposed in the second wiring layer 300, it is electrically connected to the second metal wiring 310. It should be noted that the electrical connection between the functional device 400 and the first metal wiring 210 or the second metal wiring 310 can form electronic devices with corresponding functions on the surface of the substrate 100, such as passive devices such as resistor-capacitor-inductor devices or electrical filters, thereby improving the integration of the encapsulation module and further reducing the size of the encapsulation module.

[0051] It can be understood that in the case where the functional chip 120 is electrically connected to the first metal wiring 210 or the second metal wiring 310, the functional device 400 can also be electrically connected to the functional chip 120 through the first metal wiring 210 or the second metal wiring 310, thereby forming an electronic system capable of performing complex functions.

[0052] In the packaging module provided in this embodiment, a chip through-hole for embedding a functional chip is provided in the substrate, so that the functional chip can be hidden in the substrate, thus not occupying an additional height of the packaging module and effectively reducing the packaging thickness of the packaging module. The present application also forms metal wiring on the surface of the substrate, and uses the metal wiring to connect the functional device and the functional chip, thereby forming an electronic device with corresponding functions on the surface of the substrate, reducing the processing steps for installing the electronic device, reducing the processing steps for installing the electronic device, improving the integration degree of the packaging module, and further reducing the size of the packaging module.

[0053] Compared with the related art, the present application realizes the integration of multiple chips and multiple functional devices through the chip through-holes arranged in an array in the substrate and multiple wiring layers on the surface of the substrate, improves the integration degree of the packaging module, and thus effectively reduces the packaging size of the packaging module on the basis of high-density integration, so as to meet the thin and light application requirements of devices such as communication terminals.

[0054] As an embodiment of the present application, the number of layers of at least one layer of the first metal wiring is two or more, and different layers of the first metal wiring are electrically connected through interconnecting wiring.

[0055] Specifically, when an electronic device with complex functions needs to be formed on the surface of the substrate 100, the first wiring layer 200 may be provided with multiple layers of the first metal wiring 210 with more than one layer, and different layers of the first metal wiring 210 are distributed along the thickness direction of the first wiring layer 200.

[0056] Refer to Figure 4 As shown, the first wiring layer 200 is also filled with an insulating medium. The insulating medium is filled between the first metal wirings 210, and different layers of the first metal wirings 210 and different first metal wirings 210 of the same layer are isolated by the insulating medium, reducing the occurrence of short circuits or mutual interference between the first metal wirings 210. It should be noted that vias are provided in the insulating medium filled between different layers of the first metal wirings 210, and interconnecting wirings 220 are provided in the vias. The interconnecting wirings 220 can be made of metal and are used to realize the electrical connection of different layers of the first metal wirings 210 in the thickness direction of the first wiring layer 200.

[0057] Further, when an electronic device needs to be formed within the first wiring layer 200, one or more functional devices 400 may be provided in the first wiring layer 200 and connected to any one of the first metal wirings 210 in the first wiring layer 200. It can be understood that the positions of the functional devices 400 may be determined according to the layout design of the package module.

[0058] As an embodiment of the present application, the number of layers of at least one layer of the second metal wiring is two or more, and different layers of the second metal wiring are electrically connected through the interconnecting wiring.

[0059] Specifically, when an electronic device with complex functions needs to be formed on the surface of the substrate 100, more than one layer of the second metal wiring 310 may be provided in the second wiring layer 300, and different layers of the second metal wiring 310 are distributed along the thickness direction of the second wiring layer 300.

[0060] Refer to Figure 5 As shown, an insulating medium is also filled in the second wiring layer 300. The insulating medium is filled between the second metal wirings 310. Different layers of the second metal wirings 310 and different second metal wirings 310 of the same layer are isolated by the insulating medium, reducing the occurrence of short circuits or mutual interference between the second metal wirings 310. It should be noted that vias are provided in the insulating medium filled between different layers of the second metal wirings 310, and interconnecting wirings 320 are provided in the vias. The interconnecting wirings 320 may be made of a metal material and are used to realize the electrical connection of different layers of the second metal wirings 310 in the thickness direction of the second wiring layer 300.

[0061] Further, when an electronic device needs to be formed within the second wiring layer 300, one or more functional devices 400 may be provided in the second wiring layer 300 and connected to any one of the second metal wirings 310 in the second wiring layer 300. It can be understood that the positions of the functional devices 400 may be determined according to the layout design of the package module.

[0062] As an embodiment of the present application, a wiring through-hole is provided in the substrate, and the first metal wiring and the second metal wiring are electrically connected through the wiring through-hole.

[0063] Specifically, the wiring vias 130 in the substrate 100 are filled with a conductive material to achieve electrical connection between the wiring layers on both sides of the substrate 100. Exemplarily, when the material of the substrate 100 is glass, the wiring vias 130 in the glass substrate can be obtained by using the Through Glass Via (TGV via) technology. It can be understood that in the case where any functional chip 120 is electrically connected to the first wiring layer 200 and another functional chip 120 is electrically connected to the second wiring layer 300, the electrical connection between any functional chip 120 and another functional chip 120 can also be achieved through the wiring vias 130, improving the flexibility of electrical connection in the packaging module.

[0064] As an embodiment of the present application, the packaging module further includes an external interface, which is disposed on the side of the first wiring layer or the second wiring layer away from the substrate, and the external interface is electrically connected to the wiring layer closest to it in the first wiring layer and the second wiring layer.

[0065] Specifically, the form of the external interface 500 can be an I / O pad or a ball grid array, which is used to connect the packaging module to the outside to integrate the packaging module into a terminal device. The external interface 500 can be disposed on the side of the first wiring layer 200 away from the substrate 100 and is electrically connected to the first metal wiring 210 in the first wiring layer 200 to be electrically connected to the electronic devices formed in the packaging module. Similarly, the external interface 500 can also be disposed on the side of the second wiring layer 300 away from the substrate 100 and is electrically connected to the second metal wiring 310 in the second wiring layer 300 to be electrically connected to the electronic devices formed in the packaging module.

[0066] Furthermore, a solder mask layer 510 is also disposed on the surface where the external interface 500 is located. The solder mask layer 510 is used to protect the packaging module and reduce the impact of the soldering process on the packaging module when connecting the packaging module to an external device by soldering, improving the reliability of the packaging module.

[0067] As an embodiment of the present application, the packaging module further includes a protective layer, which is disposed on the side of the first wiring layer or the second wiring layer away from the substrate, and the protective layer and the external interface are respectively disposed on both sides relative to the substrate.

[0068] Specifically, the protective layer 600 in the encapsulation module is disposed on the side of the first wiring layer 200 or the second wiring layer 300 away from the substrate 100, and the protective layer 600 and the external interface 500 are respectively located on both sides with respect to the substrate 100. That is, when the external interface 500 is disposed on the side of the first wiring layer 200 away from the substrate 100, the protective layer 600 is disposed on the side of the second wiring layer 300 away from the substrate 100, or when the external interface 500 is disposed on the side of the second wiring layer 300 away from the substrate 100, the protective layer 600 is disposed on the side of the first wiring layer 200 away from the substrate 100. The protective layer 600 is used to protect the encapsulation module and reduce the interference of the external environment on the structure or working process of the encapsulation module. By providing the protective layer 600, the encapsulation process in the production process of the encapsulation module can be reduced, and the production cost of the encapsulation module can be significantly reduced.

[0069] As an embodiment of the present application, the thickness of the encapsulation module is the sum of the thicknesses of the substrate, the first wiring layer, the second wiring layer, and the protective layer.

[0070] Refer to Figure 2 As shown, the functional chip 120 is fixed in the chip through-hole 110, and the position of the functional chip 120 in the thickness direction of the substrate 100 does not exceed the first surface and the second surface, so that the functional chip 120 is completely hidden in the substrate 100. In addition, the functional device 400 is disposed in the first wiring layer 200 or the second wiring layer 300, and the functional device 400 does not occupy an additional height in the encapsulation module, effectively reducing the thickness of the encapsulation module. It can be understood that the thickness of the encapsulation module is the sum of the thicknesses of the substrate 100, the first wiring layer 200, the second wiring layer 300, and the protective layer 600, and is not affected by the number or thickness of the functional chip 120 or the functional device 400, effectively ensuring the miniaturization and thinness of the encapsulation module.

[0071] As an embodiment of the present application, the thickness of the substrate matches the height of the functional chip.

[0072] Specifically, for the functional chip 120 in the chip through-hole 110, its position in the thickness direction of the substrate 100 does not exceed the first surface and the second surface, so that the functional chip 120 is completely hidden in the substrate 100. Therefore, the height of the functional chip 120 can be less than the thickness of the substrate 100. In order to maximize the utilization of the space in the thickness direction of the substrate 100, the thickness of the substrate 100 can match the height of the functional chip 120, so that the functional chip 120 fully utilizes the space in the chip through-hole 110 and improves the space utilization rate of the substrate 100.

[0073] As an embodiment of the present application, the functional chip includes a first chip, the pins of the first chip face the first wiring layer, and the first chip is electrically connected to the first target metal wiring.

[0074] Specifically, the functional chip 120 disposed in the chip through slot 110 can be electrically connected to the first wiring layer 200 or the second wiring layer 300 respectively. When the functional chip 120 is electrically connected to the first wiring layer 200, it is regarded as the first chip 121, with its pins facing the first wiring layer 200, and is electrically connected to the first target metal wiring 211 in the first wiring layer 200 through the pins.

[0075] Referring to Figure 6 As shown, for the first chip 121, when the functional device 400 is disposed in the second wiring layer 300, the first chip 121 can also be connected to the functional device 400 through the first target metal wiring 211, the wiring through hole 130, and the second metal wiring 310, improving the flexibility of electrical connection in the package module.

[0076] As an embodiment of the present application, the functional chip includes a second chip, the pins of the second chip face the second wiring layer, and the second chip is electrically connected to the second target metal wiring.

[0077] Specifically, the functional chip 120 disposed in the chip through slot 110 can be electrically connected to the first wiring layer 200 or the second wiring layer 300 respectively. When the functional chip 120 is electrically connected to the second wiring layer 300, it is regarded as the second chip 122, with its pins facing the second wiring layer 300, and is electrically connected to the second target metal wiring 311 in the second wiring layer 300 through the pins.

[0078] Referring to Figure 7 As shown, for the second chip 122, when the functional device 400 is disposed in the first wiring layer 200, the second chip 122 can also be connected to the functional device 400 through the second target metal wiring 311, the wiring through hole 130, and the first metal wiring 210, improving the flexibility of electrical connection in the package module.

[0079] It should also be noted that the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, commodity or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of another identical element in the process, method, commodity or device including the said element.

[0080] Each embodiment in this specification is described in a progressive manner. For the same or similar parts among the embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and for the relevant parts, reference can be made to the description of the method embodiment.

[0081] The above are only the embodiments of the present application and are not intended to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.

[0082] Although the embodiments of the present application are described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present application, and such modifications and variations fall within the scope defined by the appended claims.

Claims

1. An encapsulation module, characterized in that Comprising: A substrate having opposite first and second surfaces, with chip vias arranged in an array in the substrate, and functional chips disposed in the chip vias; A first wiring layer disposed on the first surface, the first wiring layer including at least one layer of first metal wiring, and a first target metal wiring in the at least one layer of first metal wiring being electrically connected to the functional chip; wherein, the first target metal wiring is the first metal wiring closest to the pins of the functional chip; A second wiring layer disposed on the second surface, the second wiring layer including at least one layer of second metal wiring, and a second target metal wiring in the at least one layer of second metal wiring being electrically connected to the functional chip; wherein, the second target metal wiring is the second metal wiring closest to the pins of the functional chip; At least one functional device, the functional device being disposed within the first wiring layer and electrically connected to the first metal wiring; and / or the functional device being disposed within the second wiring layer and electrically connected to the second metal wiring.

2. The encapsulation module according to claim 1, wherein The number of layers of the at least one layer of first metal wiring is two or more, and different layers of the first metal wiring are electrically connected through interconnect wirings.

3. The encapsulation module according to claim 1, wherein The number of layers of the at least one layer of second metal wiring is two or more, and different layers of the second metal wiring are electrically connected through interconnect wirings.

4. The encapsulation module according to claim 1, characterized in that, Wiring vias are provided in the substrate, and the first metal wiring and the second metal wiring are electrically connected through the wiring vias.

5. The encapsulation module according to claim 1, wherein The package module further includes an external interface, the external interface being disposed on the side of the first wiring layer or the second wiring layer away from the substrate, and the external interface being electrically connected to the wiring layer closest to it in the first wiring layer and the second wiring layer.

6. The encapsulation module according to claim 5, wherein The package module further includes a protective layer, the protective layer being disposed on the side of the first wiring layer or the second wiring layer away from the substrate, and the protective layer and the external interface are respectively disposed on two sides relative to the substrate.

7. The encapsulation module according to claim 6, wherein The thickness of the package module is the sum of the thicknesses of the substrate, the first wiring layer, the second wiring layer, and the protective layer.

8. The encapsulation module according to claim 1, wherein, The thickness of the substrate matches the height of the functional chip.

9. The encapsulation module according to claim 1, wherein, The functional chip includes a first chip, the pins of the first chip facing the first wiring layer, and the first chip being electrically connected to the first target metal wiring.

10. The encapsulation module according to claim 1, wherein The functional chip includes a second chip, the pins of the second chip facing the second wiring layer, and the second chip being electrically connected to the second target metal wiring.

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