Voltage division adjusting circuit of stacked power amplifier and amplifier circuit

Abstract

The embodiment of the invention discloses a voltage division adjusting circuit of a stacked power amplifier and an amplifier circuit. The stacked power amplifier comprises a plurality of stacked transistors, and the output end of the previous transistor is connected with the input end of the next transistor; the voltage division adjusting circuit comprises a voltage swing detection module connected with the output end of each transistor, the voltage swing detection module comprises a voltage detection unit and a difference unit, and the voltage swing detection module is used for detecting and comparing the voltage swing between the input end and the output end of the transistor and outputting a plurality of voltage swings; the swing comparison module is connected with the output end of the voltage swing detection module and is used for comparing the voltage swings of the two transistors and outputting an operation result; the swing comparison module is connected with the control module; the control module outputs a control signal based on an operation result; and the adjusting module is connected with the control end of the transistor and is used for controlling the bias voltage of the control end of the transistor and / or controlling the capacitance value of the grounding capacitor of the control end of the transistor according to the control signal.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to the field of electronic devices, and relate to, but are not limited to, a voltage divider adjustment circuit and an amplifier circuit of a stacked power amplifier. Background Art

[0002] With the continuous development of modern CMOS (Complementary Metal-Oxide-Semiconductor) integrated circuit technology, the channel length of transistors is getting smaller and smaller. The reduction in size can increase the operating speed of the device, thereby achieving better high-frequency performance. However, correspondingly, the maximum power supply voltage (V DD ) also continues to decrease as the size decreases, which brings challenges to the design of analog RF circuits, especially the design of modules such as PA (Power Amplifier) that require large output power.

[0003] Traditionally, high-power PAs are designed using a III-V compound process, as these transistors offer higher voltage resistance, enabling greater power output. The PA is then integrated with other silicon-based modules. However, to reduce costs and increase chip integration, designing using a silicon-based process is becoming more attractive. To address these requirements, and considering the lower voltage resistance of silicon-based transistors, a stacked transistor approach is often used for silicon-based high-power PA design.

[0004] Stacked power amplifiers require uniform voltage division across each transistor to maximize swing amplitude and achieve optimal amplification performance. However, in scenarios such as when the power supply voltage is increased, uneven voltage division across each transistor in the voltage divider circuit often occurs, reducing amplifier performance and even creating reliability risks such as transistor breakdown. Therefore, achieving uniform voltage division across each transistor in stacked power amplifiers remains a technical challenge in this field. Summary of the invention

[0005] In view of this, the embodiments of the present disclosure provide a voltage divider adjustment circuit and an amplifier circuit for a stacked power amplifier, which can make the voltage division of each stage transistor of various stacked power amplifiers uniform, so that each stacked transistor has the maximum swing, and while ensuring the reliability of the transistor, the performance of the power amplifier is improved as much as possible.

[0006] In one aspect, an embodiment of the present disclosure provides a voltage divider regulation circuit for a stacked power amplifier, wherein the stacked power amplifier includes a plurality of stacked transistors, wherein the output end of a preceding transistor is connected to the input end of a succeeding transistor; the voltage divider regulation circuit includes: A voltage swing detection module is used to detect the voltage swing between the input end and the output end of the transistor. The voltage swing detection module includes a voltage detection unit and a difference unit. Among them, the voltage detection unit is connected to the output end of the transistor, and based on the power or amplitude of the signal at the output end of the transistor, it detects the voltage magnitudes of the output ends of multiple transistors to obtain multiple output voltages. The difference unit calculates the difference between adjacent output voltages to obtain the voltage swing between the input end and the output end of the transistor. A swing comparison module is connected to the output end of the voltage swing detection module, compares the magnitudes of the voltage swings of two transistors, and outputs an operation result. The swing comparison module is connected to a control module, and the control module outputs a control signal based on the operation result. An adjustment module is connected to the control end of the transistor and is used to control the bias voltage of the control end of the transistor and / or the capacitance value of the grounding capacitor at the control end of the transistor according to the control signal.

[0007] In the embodiments of the present disclosure, by detecting the voltage swing of stacked transistors and adjusting the voltage swing of transistors by adjusting the bias voltage or capacitance of the transistors, the voltage equalization of each stage of transistors can be achieved, and the reliability and performance of the stacked power amplifier can be improved.

[0008] On the other hand, the embodiments of the present disclosure also provide an amplifier circuit, including: A stacked power amplifier includes multiple stacked transistors, and the output end of the previous transistor is connected to the input end of the next transistor. Any one of the voltage division adjustment circuits is connected to the stacked power amplifier.

[0009] In the voltage division adjustment circuit provided by the embodiments of the present disclosure, through the collaborative work of the voltage swing detection module, the swing comparison module, and the adjustment module, the voltage swing detection module can detect the voltage swing of the transistors in the stacked power amplifier in real time and automatically. The swing comparison module can detect in real time whether the voltage swings of the transistors are equal. Once the difference between the voltage swings of adjacent transistors is not equal, it means that the voltage division of the transistors is uneven. The adjustment module can adjust the bias voltage of the transistor and / or the capacitance value of the grounding capacitor accordingly to adjust the voltage division of the transistor, automatically realizing the voltage division adjustment of the stacked power amplifier, reducing or even eliminating the difference between the voltage swings of the transistors, thereby achieving uniform voltage division, reducing the risk of transistor breakdown caused by uneven voltage distribution, and at the same time improving the amplifier efficiency and linearity.

[0010] Among them, adjusting the bias voltage of the transistor can change the DC bias of the transistor, thereby changing the DC reference voltage value in the overall voltage output by the transistor to change the voltage division of the transistor. For the transistors of the stacked power amplifier in the common-gate configuration, there is a grounding capacitance from the gate to the ground. This grounding capacitance and the parasitic capacitance between the gate and the source of the transistor itself form a voltage-dividing circuit, and the magnitude of the AC voltage (including RF signals) on the gate depends on the capacitance values of these two capacitances. Therefore, by adjusting the capacitance value of the grounding capacitance of the transistor gate, the amplitude of the AC voltage in the overall voltage of the transistor gate can be changed, thereby changing the voltage division of the transistor. Description of the Drawings

[0011] Figure 1A It is a schematic structural diagram of a stacked power amplifier; Figure 1B It is a schematic diagram of the voltage division by the grounding capacitance of a stacked power amplifier; Figure 2A It is a schematic structural diagram of a voltage division adjustment circuit of a stacked power amplifier provided by an embodiment of the present disclosure; Figure 2B It is a specific schematic structural diagram of a voltage division adjustment circuit of a stacked power amplifier provided by an embodiment of the present disclosure; Figure 3 It is a schematic structural diagram of a voltage swing detection module in the voltage division adjustment circuit provided by an embodiment of the present disclosure; Figure 4 It is a schematic structural diagram of a swing comparison module in the voltage division adjustment circuit provided by an embodiment of the present disclosure; Figure 5 It is a schematic structural diagram of a control module in the voltage division adjustment circuit provided by an embodiment of the present disclosure; Figure 6 It is a schematic structural diagram of an adjustment module in the voltage division adjustment circuit provided by an embodiment of the present disclosure; Figure 7A It is a schematic structural diagram of a bias voltage calibration unit in the voltage division adjustment circuit provided by an embodiment of the present disclosure; Figure 7B It is a schematic structural diagram of a capacitance calibration unit in the voltage division adjustment circuit provided by an embodiment of the present disclosure; Figure 8A It is a flowchart of the adjustment method of a voltage division adjustment circuit of a stacked power amplifier provided by an embodiment of the present disclosure; Figure 8B It is a flowchart of another adjustment method of a voltage division adjustment circuit of a stacked power amplifier provided by an embodiment of the present disclosure; Figure 9A It is a schematic structural diagram of another swing comparison module in the voltage division adjustment circuit provided by an embodiment of the present disclosure; Figure 9B It is a schematic structural diagram of another control module in the voltage division adjustment circuit provided by an embodiment of the present disclosure; Figure 10ASchematic diagram of another swing comparison module in the voltage division regulation circuit provided by the embodiments of the present disclosure; Figure 10B Schematic diagram of another control module in the voltage division regulation circuit provided by the embodiments of the present disclosure; Figure 11 Block diagram of the composition structure of an amplifier circuit provided by the embodiments of the present disclosure. Detailed implementation manners

[0012] To facilitate the understanding of the present disclosure, the present disclosure will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present disclosure is thorough and comprehensive.

[0013] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present disclosure belongs. The terms used herein in the description of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. The term "and / or" used herein includes any and all combinations of one or more of the related listed items. In the embodiments of the present disclosure, the terms "first", "second", "third", and "fourth" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, features defined with "first", "second", "third", and "fourth" may explicitly or implicitly include one or more of such features.

[0014] It should be understood that in the description of the embodiments of the present disclosure, it should be noted that unless otherwise clearly defined and limited, the terms "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a direct connection or an indirect connection through an intermediate medium, and it may be the communication inside two elements.

[0015] The following are the explanations of the terms related to the embodiments of the present disclosure: Stack Power Amplifier (Stack PA) is a technology used to improve the output power and efficiency of a power amplifier. It stacks multiple transistors together, enabling each transistor to share a part of the voltage, thereby achieving a higher voltage operating ability. The stack power amplifier includes multiple transistors connected in series, and the drain of each transistor is connected to the source of the next transistor. In this way, the power supply voltage is distributed among the transistors, allowing the entire stack structure to withstand a higher voltage.

[0016] The common-gate (CG) is a basic transistor circuit configuration. The gate of the common-gate transistor serves as the common terminal for input and output, grounded or connected to a fixed DC voltage; the source serves as the input terminal, and the drain serves as the output terminal. The gate is usually grounded or connected to a fixed potential through a DC bias voltage. The common-gate transistor features a low input impedance, a high output impedance, and a high voltage gain.

[0017] The common-source (CS) is a basic transistor circuit configuration. The source of the common-source transistor serves as the common terminal for input and output signals, grounded or connected to a fixed DC voltage; the gate serves as the input terminal, and the drain serves as the output terminal. The common-source transistor features a high input impedance, a high output impedance, and a high voltage gain.

[0018] For a stacked power amplifier, the first-stage transistor is in a common-source connection structure, and the other transistors are in a common-gate connection structure.

[0019] The output power at 1dB compression point (OP1dB) is a key performance indicator of a power amplifier, which represents the output power when the gain of the amplifier drops by 1dB relative to the small-signal gain. Increasing the OP1dB means that the power amplifier can maintain a linear operating state at a higher output power.

[0020] Linearity is a key performance indicator in wireless communication and RF systems, which is used to describe the ability of a power amplifier to maintain a linear relationship between the input and output signals when outputting signals. Specifically, transmit linearity refers to the degree to which the amplitude and phase relationship between the input and output signals remains linear in a power amplifier or transmitter.

[0021] The saturation output power (Psat) is a key performance indicator of a power amplifier, which represents the output power when the input power of the power amplifier increases to a certain extent and the output power no longer increases significantly or basically remains unchanged with the increase of the input power.

[0022] Figure 1A A schematic diagram of a stacked power amplifier is shown. The stacked power amplifier includes four stages of stacked transistors (M1 - M4), and here the transistors are illustrated by taking NMOS transistors as an example. The source of the first-stage transistor M1 is grounded, and the drain is connected to the source of the second-stage transistor M2; the drain of the second-stage transistor M2 is connected to the source of the third-stage transistor M3; the drain of the third-stage transistor M3 is connected to the source of the fourth-stage transistor M4; the drain of the fourth-stage transistor M4 is connected to the power supply terminal V through an inductor LDD , meanwhile, the drain of the fourth-stage transistor M4 is also connected to the RF output terminal RFout through the output capacitor C0.

[0023] In addition, the control electrode (gate) of the first-stage transistor M1 is connected to the input capacitor C1 and receives the RF input signal RFin passing through Cin. In addition, the control electrode of the first-stage transistor M1 is also connected to the first resistor R1 and receives the first bias voltage Vg1 through the first resistor R1.

[0024] The control electrodes (gates) of the second to fourth transistors M2 - M4 are respectively grounded through the gate grounding capacitors C2, C3, C4, and are respectively connected to the second resistor R2 to the fourth resistor R4, and receive the second bias voltage Vg2 to the fourth bias voltage Vg4.

[0025] Through appropriate bias and load design, combined with the V DD voltage, and by selecting an appropriate number of transistors, a uniform voltage distribution can be obtained on the transistors of different layers. In principle, the maximum voltage swing that the PA as a whole can withstand is close to the drain-source breakdown voltage of a single device multiplied by the number of stacked transistor layers.

[0026] V DD The voltage can be some fixed values, such as 1.8V, 3.3V, 5V, etc. Exemplarily, if the V DD voltage of a PA is 3.3V, for a full swing application scenario, the maximum voltage swing is about 2V DD , 6.6V. If 3 layers of transistors are stacked, the maximum voltage swing of each layer of transistors reaches 2.2V. For transistors with a threshold voltage of 1.2V, a maximum voltage exceeding 2V may significantly affect the service life. Therefore, 4 layers of transistors need to be stacked. At this time, the maximum voltage of each layer of transistors is 1.65V, which is less than the limit of 2V, so the maximum swing performance of the transistors is not fully utilized.

[0027] By adjusting the V DD voltage of the PA, the key performance of the PA can be improved. For a linear working scenario, such as a communication system, raising the V DD voltage of the PA can increase the OP1dB of the transmission and improve the transmission linearity. For a saturated working scenario, such as radar applications, raising the V DD voltage of the PA can increase the P sat (saturated output power). It should be noted that raising the V DD here means selecting a power supply voltage higher than any conventional V DD voltage (such as 1.8V, 3.3V, 5V).

[0028] When the circuit is working, the maximum voltage between the drain and source of the transistor may not reach the drain-source breakdown voltage of the transistor, and there is still room for improvement. Therefore, there will be some cases where the V of the PA is individually pulled high DD to meet the requirement of performance improvement. However, directly pulling high the V DD voltage without adjusting the bias voltage of the PA will result in uneven voltage distribution among transistors in different layers. On the one hand, if the voltage swing of a certain layer of transistors is too large, there will be a reliability risk of transistor breakdown in that layer. On the other hand, if the voltage distribution of the transistors is uneven, the maximum output power and amplifier efficiency will be relatively low, affecting the performance.

[0029] Based on the above Figure 1A It can be understood that among the four-stage stacked transistors, transistors M2 - M4 are connected in a common-gate manner, and transistor M1 is connected in a common-source manner. If the four-stage transistors are evenly divided in voltage, the drain voltages Vd1 to Vd4 of transistors M1 - M4 increase proportionally, which are 1 / 4V DD 、1 / 2V DD 、3 / 4V DD 、and V DD .

[0030] If the V DD voltage is pulled high, the drain voltage of the last-stage transistor M4 connected to the power supply terminal directly increases, but its source voltage changes little, resulting in uneven voltage division among the transistors at all levels. The inventor of this solution found that by adjusting the bias voltage of the gates of the transistors at all levels, the drain voltages at all levels can be restored to increase in proportion by 1 / 4V DD in sequence, thereby further making the voltage division of the transistors equal.

[0031] In addition, the gate of the first-stage transistor M1 receives the RF input signal RFin, and the source is grounded to GND. The drain of the fourth-stage transistor M4 serves as the output terminal to output the RF amplified signal RFout. The function of the gate capacitor C1 of the first-stage transistor M1 and the capacitor C0 at the output terminal is to block DC, and the function of the resistor R1 is to provide bias and isolate the RF signal. The functions of the gate resistors R2 - R4 of the second-stage to fourth-stage transistors M2 - M4 are to provide bias and isolate the RF signal, and the gate capacitors C2 - C4 are used to reduce the gate-drain voltage Vgd and source-drain voltage Vds of the transistors.

[0032] It should be noted that there is a parasitic Cgs capacitor between the gate and source of the transistor, as Figure 1B shown, Figure 1BTaking the second-stage transistor M2 as an example, the voltage division relationship between the parasitic capacitance Cgs2 and the gate-ground capacitance C2 is shown. The gate-ground capacitance C2 can form a voltage divider with Cgs2, thereby dividing the source voltage Vs2. Since the gate-source voltage Vgs and the gate-drain voltage Vgd also have limitations on the voltage swing, there is also a certain signal swing on the gate, and the gate voltage fluctuates together with the source and drain. Therefore, compared with the method of directly grounding the gate, this voltage division method can reduce the gate-source voltage Vgs and the gate-drain voltage Vgd of the transistor, so that the drain-source voltage Vds (such as Figure 1B the difference between Vd2 and Vs2 shown in

[0033] ) can have a larger swing range. Figure 2A Based on the above analysis, the embodiment of the present disclosure provides a voltage division adjustment circuit for a stacked power amplifier. As shown in FIG. The stacked power amplifier includes a plurality of stacked transistors Mi (i is a positive integer, and in the figure, i is taken as an example from 1 to 4). The output end of the previous transistor Mi-1 is connected to the input end of the next transistor Mi; the gate of each transistor Mi receives its respective bias voltage Vg1-Vg4, and there are ground capacitances C2-C4 between the gates of the transistors except the first stage and the ground. Among them, the plurality of stacked transistors may include two or more. In the embodiment of the present disclosure, 4 are taken as an example for illustration. The voltage division adjustment circuit includes: A voltage swing detection module 110 for detecting the voltage swing between the input end and the output end of the transistor. The voltage swing detection module 110 includes a voltage detection unit 111 and a difference unit 112. Among them, the voltage detection unit 111 is connected to the output end of each transistor, and based on the signal power or amplitude of the output end of the transistor, detects the voltage magnitude of the output end of the transistor to obtain corresponding multiple output voltages; the difference unit 112 is connected to the output end of the voltage detection unit 111, and takes the difference between adjacent output voltages to obtain the voltage swing between the input end and the output end of the transistor; A swing comparison module 120, connected to the output end of the voltage swing detection module, compares the magnitudes of the voltage swings of two transistors and outputs an operation result; the swing comparison module 120 is connected to a control module 130, and the control module 130 outputs a control signal based on the operation result;

[0034] Since the voltage swing detection module 110 can detect the voltage swings of transistors M1 - M4 in the stacked power amplifier in real time and automatically, the swing comparison module 120 can compare the magnitudes of the voltage swings of two transistors in real time to detect whether the voltage swings between different transistors Mi are equal. Once the voltage swings of the transistor Mi are not equal, it indicates that the voltage division among transistors M1 - M4 is uneven. At this time, the bias voltage of the transistor and / or the capacitance value of the ground capacitance can be adjusted accordingly to regulate the voltage division of the transistor, automatically realizing the voltage division regulation of the stacked power amplifier, reducing or even eliminating the difference in the voltage swings of the transistors, thereby achieving uniform voltage division, reducing the risk of transistor breakdown caused by uneven voltage distribution, and improving the amplifier efficiency and linearity at the same time.

[0035] Among them, adjusting the bias voltage of the transistor can change the DC bias of the transistor, thereby changing the DC reference voltage value in the output signal of the transistor to change the voltage division of the transistor and achieve uniform voltage division.

[0036] For the transistors of the common - gate of the stacked power amplifier, there are ground capacitances C2 - C4 from the gate to the ground. This capacitance and the parasitic capacitance between the gate and the source of the transistor itself form a voltage - division circuit, and the magnitude of the AC voltage on the gate depends on the capacitance values of these two capacitances. Therefore, adjusting the capacitance value of the ground capacitance of the transistor gate can change the amplitude of the AC voltage in the overall voltage of the transistor gate, thereby changing the voltage division of the transistor and achieving uniform voltage division.

[0037] Here, the voltage swing refers to the change amplitude of the voltage difference between the input and output ends of the transistor Mi. The voltage swing detection module 110 is used to detect the voltage swing of each transistor and output this voltage swing as an output signal. Therefore, the voltage swing detection module 110 has multiple output terminals, respectively outputting the voltage swing signals of each transistor Mi.

[0038] The swing comparison module 120 can be connected to a control module 130. It can be understood that the control module 130 can receive the operation result output by the swing comparison module 120 and output a corresponding control signal after processing. This control signal can be used to control the voltage value of the control terminal of the transistor, including at least one of the bias voltage of the control terminal of the transistor and the capacitance value of the ground capacitance of the control terminal of the transistor. In some embodiments, the control module 130 can be on the same chip as the stacked power amplifier; in other embodiments, the control module 130 can be on a different chip from the stacked power amplifier.

[0039] In addition, the voltage division adjustment circuit provided by the embodiments of the present disclosure may further include an adjustment module 140. The adjustment module 140 is connected to the control terminals of the respective transistors Mi and can receive a control signal. The adjustment module 140 can output a bias voltage to the control terminals of one or more transistors Mi according to the control signal, or adjust the capacitance value of the grounding capacitor.

[0040] Exemplarily, the adjustment module 140 can be used to output the gate bias voltage of each common-gate transistor M2-M4, and when receiving a control signal, it can change the current bias voltage according to the control signal. For example, increase or decrease the bias voltage corresponding to the control signal on the original bias voltage. Similarly, the adjustment module 140 can be used to control the capacitance value of the grounding capacitor at the control terminal of each common-gate transistor M2-M4, so as to achieve the adjustment of the transistor voltage division.

[0041] The specific structure of the voltage division adjustment circuit of a stacked power amplifier provided by the embodiments of the present disclosure is as Figure 2B shown. The amplifier main circuit in the dotted box serves as a stacked power amplifier, and the output terminals of the transistors Mi at all levels are connected to the voltage swing detection module 110. In this embodiment, the adjustment module 140 controls both the bias voltage of the control terminal of the transistor Mi and the capacitance value of the grounding capacitor at the control terminal of the transistor Mi. Specifically, the swing comparison module 120 outputs a first comparison result and a second comparison result, where the comparison accuracy of the first comparison result is lower than that of the second comparison result. The first comparison result is used to achieve the rough adjustment of the equal division of the voltage swings of the respective transistors, and the second comparison result is used to achieve the fine adjustment of the equal division of the voltage swings of the respective transistors.

[0042] The control module 130 includes a first counter 131 and a second counter 133, which are respectively used to count the first comparison result and the second comparison result; the adjustment module 140 includes a bias voltage calibration unit 141 and a capacitance calibration unit 142. The first comparison result is provided to the bias voltage calibration unit 141 after being processed by the first counter 131 in the control module 130 to adjust the gate bias voltage of any stage of the transistor Mi (i>1), and can also be decoded by the decoder provided in the bias voltage calibration unit 141, and then the adjusted bias voltage is provided to the control terminals of the respective transistors, so as to achieve the rough adjustment of the equal division of the voltage swings of the respective transistors. In addition, the first comparison result is provided to the capacitance calibration unit 142 after being processed by the second counter 133 in the control module 130, and can also be decoded by the decoder and then output a control signal to adjust the capacitance value of the gate grounding capacitor array of the transistors Mi (i>1) at all levels, so as to achieve the fine adjustment of the equal division of the voltage swings of the respective transistors.

[0043] In some embodiments, as Figure 3 shown, the voltage detection unit 111 includes: a plurality of detectors (such as Figure 3The shown detectors 01 to 04, the number of detectors can be equal to the number of transistors), are connected to the output terminals of the corresponding transistors Mi (the drains M1d - M4d of M1 - M4), and are used to detect the voltage magnitude at the output terminals of the transistors Mi and obtain the corresponding output voltages Vdi (Vd1 - Vd4).

[0044] The transistors can be Junction Field - Effect Transistors (JFETs) or Metal - Oxide - Semiconductor Field - Effect Transistors (MOSFETs). Due to the voltage division effect of the transistors, the drain voltage at the output terminal of each stage of the transistor increases proportionally, thereby achieving the amplification of the radio frequency signal, as Figure 3 shown in the waveform change. The voltage swing detection module 110 can compare or take the difference of the output voltages Vdi of two adjacent transistors to obtain the voltage swing of each transistor.

[0045] A detector is generally an electronic device or circuit used to extract the original signal from a modulated signal, which can separate the low - frequency modulated signal from the high - frequency carrier signal, or convert the amplitude or power of the high - frequency radio frequency signal into a DC voltage signal for output. In the embodiments of the present disclosure, an RMS (Root Mean Square) detector can be used. By performing square, average, and square - root operations on multiple sampled values of the input signal, a DC voltage value reflecting the signal power is finally output. Since the signal power is related to the amplitude of the signal, the DC voltage value output by the RMS detector can reflect the voltage value of the output signal of the transistor and can be used to judge the voltage division of the transistor.

[0046] The difference - making unit 112 includes: a plurality of first subtractors (such as Figure 3 the first subtractor 01 - the first subtractor 04 shown), which are used to make a difference based on the detected output voltage and output a plurality of voltage swings; the first input terminal of the first first subtractor is grounded, and the second input terminal is connected to the output terminal of the first detector; the first input terminals and the second input terminals of the remaining first subtractors are respectively connected to the output terminals of adjacent detectors.

[0047] In this way, by performing subtraction operations on the adjacent output voltages Vd1~Vd4 respectively through a plurality of first subtractors to determine the difference between the two, the voltage swings Vds1~Vds4 can be obtained. Among them, the first output voltage Vd1 is subtracted from 0V to obtain the voltage swing Vds1, or the first output voltage Vd1 can directly be used as the voltage swing Vds1.

[0048] In some embodiments, such as Figure 4As shown, the swing comparison module 120 includes a second subtractor 121 for calculating the difference ΔVds2 between the first-stage voltage swing Vds1 and the second-stage voltage swing Vds2. The two input terminals of the second subtractor 121 are respectively connected to the output terminals of the first-stage and second-stage first subtractors. Exemplarily, here the second subtractor 121 can perform a subtraction operation on the first-stage voltage swing Vds1 and the second-stage voltage swing Vds2 to obtain the difference ΔVds2. When the difference is not 0, it indicates that there is a voltage swing difference between different transistors, that is, there is a situation of uneven voltage division between different transistors. In other embodiments, the second subtractor 121 can also be used to calculate the difference between the voltage swings of any other two stages in the multi-stage transistor. For example, the second subtractor 121 can perform a subtraction operation on two adjacent stages, such as the second-stage voltage swing Vds2 and the third-stage voltage swing Vds3, or perform a subtraction operation on the third-stage voltage swing Vds3 and the fourth-stage voltage swing Vds4, to obtain the corresponding difference. It can also perform a subtraction operation on two non-adjacent stages. For example, perform a subtraction operation on the fourth-stage voltage swing Vds4 and the first-stage voltage swing Vds1 to obtain a difference. If the difference is not 0, it also indicates that there is a voltage swing difference between different transistors. Since the control terminal voltage of the first-stage transistor is the input voltage and is not the object of regulation, therefore Figure 4 In the example of Figure 4 , the difference ΔVds2 between the first-stage voltage swing Vds1 and the second-stage voltage swing Vds2 is used as the criterion for determining whether voltage equalization is achieved.

[0049] The swing difference refers to the difference signal of the voltage swings of adjacent transistors Mi. The larger the swing difference, the more uneven the voltage division between the transistors. The smaller the swing difference, the more uniform the voltage division between adjacent transistors.

[0050] It should be noted that the swing difference here can be the voltage swing difference between any two transistors. For example, the voltage swing difference between the first-stage transistor M1 and the second-stage transistor M2, or the voltage swing difference between the second-stage transistor M2 and the third-stage transistor M3, etc.

[0051] The swing comparison module 120 further includes a first comparator 122. The first input terminal of the first comparator 122 is connected to a set voltage signal terminal (this set voltage signal terminal is used to input a set voltage Vo1 to the first input terminal), and the second input terminal is connected to the output terminal of the second subtractor 121, for comparing the difference ΔVds2 with the set voltage Vo1 and outputting a first comparison result. Here, the first comparison result is a logic signal, which can be a high level or a low level, and outputs different levels based on the magnitude relationship between the difference ΔVds2 and the set voltage Vo1. For example, if the difference ΔVds2 is greater than the set voltage Vo1, a high level is output. If the difference ΔVds2 is less than the set voltage Vo1, a low level is output.

[0052] It can be understood that the set voltage Vo1 can be used as a reference for determining whether the voltage swings of different levels are equal. For example, when the first comparator 122 compares the difference △Vds2 with the set voltage Vo1, if the difference △Vds2 is greater than the set voltage Vo1, it is considered that the voltage swing Vds1 of the first stage is not equal to the voltage swing Vds2 of the second stage; if the difference △Vds2 is less than or equal to the set voltage Vo1, the voltage swing Vds1 of the first stage and the voltage swing Vds2 of the second stage are considered equal). The value of the set voltage Vo1 depends on the comparison accuracy. The smaller the distinguishable difference △Vds2, the higher the accuracy. Exemplarily, the value of the set voltage Vo1 can be the minimum adjustment range of the transistor gate bias voltage, that is, the minimum value of each adjustment. If the difference △Vds2 is less than or equal to Vo1, even if the difference △Vds2 is not 0, it is difficult to adjust by the gate bias voltage. Therefore, in this case, the output of the first comparison result is a low level, indicating that there is no need to adjust the bias voltage of the transistor at this time. Correspondingly, if the difference △Vds2 is greater than Vo1, after adjustment, the difference can be reduced, so that the transistors at each level are roughly in an equal voltage sharing situation.

[0053] Specifically, the swing comparison module 120 may further include a plurality of second comparators 123, as Figure 4 shown, for respectively comparing the voltage swings Vds2~Vds4 of the transistors Mi (i>1) at each level with the voltage swing Vds1 of the first-stage transistor M1. The input end of the second comparator 123 is connected to the first subtractor of the first-stage transistor M1 and the output end of the first subtractor of any other transistor Mi. The output end of the second comparator 123 outputs the second comparison result. Since the second comparison result is based on directly comparing the voltage swings of adjacent transistors, the comparison accuracy of the second comparison result is greater than that of the first comparison result. The second comparison result includes: the comparison result of Vds2 and Vds1, the comparison result of Vds3 and Vds1, and / or the comparison result of Vds4 and Vds1. The second comparison result is a logic signal, which can be a high level or a low level, and outputs different levels based on the magnitude relationship between two voltage swings (such as Vds2 and Vds1). Among them, the operation result may further include the second comparison result, and the second comparison result is used to adjust the capacitance value of the grounding capacitor. The second comparison result can illustrate whether there is a voltage swing difference between the transistors after the second stage and the first-stage transistor. Therefore, the second comparison result can indicate whether there is an uneven voltage division between different transistors. Exemplarily, any stage of transistor can be used as a reference, and the voltage swings of other stages of transistors are compared with that of the reference transistor to determine their magnitude relationship, and then adjustments are made. Since the control end of the first-stage transistor M1 is used to receive the input radio frequency signal RFin and is not an adjustment object, for the convenience of adjustment and detection, the reference transistor is set as the first-stage transistor M1 here.

[0054] Based on the second comparison result, by adjusting the grounding capacitance of the gate, the voltage division of the gate parasitic capacitance can be adjusted, and then the voltage division of the transistor can be adjusted, so that the voltage division of each stage of the transistor is basically the same as that of the reference transistor, thereby achieving equal division.

[0055] In some embodiments, as Figure 5 shown, through the closed-loop feedback of the counter and decoder, the control module accumulates the count value according to the first comparison result and the second comparison result to dynamically adjust the transistor bias voltage and / or capacitance value until the first comparison result and the second comparison result meet the requirements, realizing the automatic adjustment of the bias voltage and capacitance value.

[0056] The control signal includes a first sub-control signal and a second sub-control signal. The first comparison result is used for the control module to output the first sub-control signal, and the first sub-control signal is used to adjust the bias voltage; the second comparison result is used for the control module to output the second sub-control signal, and the second sub-control signal is used to adjust the capacitance value.

[0057] As Figure 5 shown, the control module 130 includes: a first counter 131 and a first decoder 132; The first counter 131 can be connected to the first comparator 122 to count the situation where the signal (such as high level or low level) indicating that the difference △Vds2 output by the first comparator 122 is greater than the set voltage Vo1. The first decoder 132 is used to decode according to the first count value of the first counter 131 to obtain the first sub-control signal for controlling the bias voltage of the transistor.

[0058] The first count value is used to control the bias voltage. For example, each first count value corresponds to a bias voltage. Therefore, the first decoder 132 can decode the first count value according to the preset decoding rule to obtain the required first sub-control signal and adjust the bias voltage accordingly. It should be noted that the first count value here can be one or multiple. For example, multiple first count values corresponding to different stages of transistors are used to adjust the bias voltages of different transistors.

[0059] In one embodiment, if △Vds2 is greater than the set voltage Vo1, the first comparator 122 outputs a high level, the first count value of the first counter 131 is incremented by 1, and the first decoder 132 outputs a corresponding decoding result based on the current first count value. This decoding result serves as the first sub-control signal for adjusting the bias voltage at the control terminal of the transistor M1. The adjustment module 140 applies this bias voltage to the corresponding transistor control terminal. Subsequently, the first comparator 122 continues to be used for comparison. If the output remains high, the first count value of the first counter 131 is incremented by 1 again, and the first decoder 132 outputs the corresponding first sub-control signal based on the current first count value to continue adjusting the bias voltage at the control terminal of the transistor M1. It can be understood that the bias voltage at this time is different from the previous bias voltage. This continues until the output of the first comparator 122 is low, the first count value of the first counter 131 no longer increases, and the bias voltage remains unchanged. At this point, it can be considered that the bias voltage adjustment is complete. After adjustment, the first count value can also be cleared.

[0060] In some embodiments, as Figure 5 shown, the control module 130 further includes: a second counter 133 and a second decoder 134; The second counter 133 is used for counting when the second comparison result indicates that the voltage swings of the transistors are not equal; The second decoder 134 is used for decoding according to the second count value of the second counter 133 to obtain a second sub-control signal for controlling the capacitance value of the grounding capacitor.

[0061] In some other embodiments, the first decoder and the second decoder may also be located in the adjustment module. Specifically, the first decoder may be disposed in the bias voltage calibration unit of the adjustment module, and the second decoder may be disposed in the capacitance calibration unit of the adjustment module.

[0062] The second comparison result is the comparison result of the voltage swing Vdsi of any transistor Mi and the voltage swing Vds1 of a reference transistor (such as the first-stage transistor M1). Multiple comparisons can be performed, and the second comparison result is output each time. For example, when Vdsi > Vds1, a high level (or low level) is output, and the second counter then performs a count. Next, the second decoder 134 decodes the current second count value to determine a second sub-control signal for adjusting the capacitance size and makes an adjustment. Next, continue the comparison. If still Vdsi > Vds1, continue to output a high level (or low level), the second counter 133 continues to count, and the second decoder 134 continues to decode the current second count value to obtain an updated second sub-control signal and adjust the capacitance again. Repeat the comparison until Vdsi ≤ Vds1, and output a low level (or high level, that is, different from the output level before the change), the second counter 133 stops counting, the second decoder 134 stops updating the decoding, and controls the adjustment of the capacitance value with the current second sub-control signal. On the contrary, if the first comparison result obtained at the beginning of the comparison is Vdsi < Vds1, a high level (or low level) can also be output, the second counter 133 counts, and the second decoder 134 decodes to update the capacitance value. Repeat the comparison until the second comparison result changes to Vdsi ≥ Vds1 and switches to output a low level (or high level, that is, different from the output level before the change), the second counter 133 stops counting, the second decoder 134 stops updating the decoding, and controls the adjustment of the capacitance value with the current second sub-control signal.

[0063] That is to say, regardless of whether the second comparison result obtained from the first comparison is greater or smaller, counting and decoding are required to adjust the capacitance value until the second comparison result changes. At this time, it means that the adjustment limit has been reached, so there is no need to continue the adjustment.

[0064] It should be noted that if the second comparison result obtained from the first comparison is Vdsi = Vds1, there is no need to make an adjustment. Therefore, at this time, the second counter 133 does not need to count.

[0065] In some embodiments, the swing comparison module includes multiple second comparators, and the control module 130 includes multiple second counters 133 and multiple second decoders 134. Each second comparator corresponds to a second counter 133 and a second decoder 134 for counting the second comparison result of the corresponding comparator. For example, Figure 4 it includes three second comparators 134, each second comparator corresponds to a second counter 133 and a second decoder 134, and each second decoder 134 is used to adjust the capacitance value of the grounding capacitance of a transistor M2.

[0066] It should be noted that the equality in this solution refers to approximate equality, allowing for a certain error.

[0067] It should be noted that the first counter 131 and the second counter 133 in the control module 130 can be counters of the same specification or the same counter. Also, the first decoder 132 and the second decoder 134 can be decoders of the same specification or the same decoder. If only one counter and one decoder are set, then when adjusting the bias voltage of the transistor control terminal, this counter serves as the first counter 131 to implement the function of the first counter 131, and this decoder serves as the first decoder 132 to implement the function of the first decoder 132. When adjusting the capacitance value of the grounding capacitance of the transistor control terminal, this counter serves as the second counter 133 to implement the function of the second counter 133, and this decoder serves as the second decoder 134 to implement the function of the second decoder 134.

[0068] In some embodiments, such as Figure 6 shown, the adjustment module 140 includes: A bias voltage calibration unit 141, connected to the control terminal of the transistor Mi (i > 1) after the second stage and also connected to the control module 130. The bias voltage calibration unit 141 adjusts the bias voltage provided to the transistor Mi (i > 1) after the second stage and subsequent stages based on the first sub-control signal.

[0069] The gate bias voltage of the first-stage transistor M1 determines the source-drain voltage of each stage of transistors, that is, as part of the input signal, it is a separate control item and not an adjustment item for equal division of the voltage swing. Therefore, the first-stage transistor M1 can be used as a reference transistor, and there is no need to adjust the voltage of its control terminal to adjust the voltage division of this transistor. To achieve equal division of the voltage of each stage of transistors, the bias voltage of the control terminals of other transistors Mi (i > 1) other than this reference transistor can be adjusted. Therefore, the bias voltage calibration unit 141 can be connected only to the control terminals of the transistors after the second stage and does not need to be connected to the control terminal of the first-stage transistor M1.

[0070] In some embodiments, each time of calibration, the bias voltage calibration unit adjusts the bias voltage of the transistors after the second stage according to a preset boosting gradient. Here, the preset boosting gradient is the adjustment ratio of the bias voltage of each stage of transistors. In the order of increasing the number of transistor stages, the adjustment ratio of the bias voltage increases step by step, so it increases according to a gradient.

[0071] Refer to Figure 1A for the description that when the voltage division of the multi-stage transistors is uniform, the output terminals Vg of each stage of transistors need to increase by 1 / nV in sequence DDThe size (n>1, where n is the number of transistor stages). Correspondingly, the source-gate voltages Vgs of each stage of transistors need to be consistent. Therefore, the gate voltage Vgi of the control terminal also needs to change proportionally. Therefore, during calibration, the bias voltages of the transistors after the second stage need to be adjusted proportionally according to a preset boosting gradient.

[0072] The ideal bias voltages of each stage of transistors can refer to the following formula (1): , i = 2, 3,..., n (1) Where i is the current stage number of the transistor, n is the total number of stages, V DD is the power supply voltage, and V gsi-sat is the source-gate voltage Vgs that makes the transistor in the saturation state. When V DD is pulled high, in order to make the bias voltage of the transistor still satisfy the conditions of formula (1) and ensure voltage equalization, the gate bias voltages of the transistors after the second stage need to be increased synchronously and proportionally.

[0073] The number of bias voltage calibration units 141 can match the appropriate amount of bias voltage to be adjusted. In the Figure 6 illustrated embodiment, the adjustment module 140 adjusts the bias voltages of transistors M2-4. Therefore, the adjustment module 140 includes three bias voltage calibration units 141. The three voltage calibration units 141 can respectively receive the first sub-control signals from the three first decoders 132 to respectively adjust the bias voltages of transistors M2-4. Specifically, the three first decoders 132 respectively perform counting based on the comparison of the difference △Vds2 (the difference between the first-stage voltage swing Vds1 and the second-stage voltage swing Vds2), the difference △Vds3 (the difference between the second-stage voltage swing Vds2 and the third-stage voltage swing Vds3), and the difference △Vds4 (the difference between the third-stage voltage swing Vds3 and the fourth-stage voltage swing Vds4) and the set voltage.

[0074] In some embodiments, the bias voltage calibration unit 141 can be a bias circuit for outputting a corresponding bias voltage to the control terminal of the transistor Mi according to the first sub-control signal. Specifically, as Figure 7A shown, the bias voltage calibration unit 141 includes; A plurality of resistive elements r connected in series, with the first end of the first switch k1 connected between adjacent resistive elements r; the second end of the first switch k1 is connected to the control terminal of the transistor Mi; The control end of the first switch k1 is connected to the control module 130, and the first switch k1 switches the switch state based on the first sub-control signal.

[0075] The bias voltage calibration unit 141 can output the node voltage between adjacent resistor elements r as the bias voltage value to the control terminal of the transistor through a plurality of series-connected resistor elements. Each node is connected to the control terminal of the transistor through a first switch k1. The first sub-control signal of the control module 130 can be used to control the on / off of these first switches k1. Based on different first sub-control signals, different first switches k1 are selected to conduct, so as to switch different output voltages Vx as the bias voltage Vbias.

[0076] In this embodiment, as Figure 6 shown, the adjustment module 140 includes: A capacitance calibration unit 142, which is connected to a grounded capacitance and is also connected to the control module. The capacitance calibration unit 142 changes the capacitance value of the grounded capacitance at the control terminal of the transistor based on the second sub-control signal. It should be noted that, Figure 6 the capacitances C2 - C4 shown in

[0077] are only used to illustrate the capacitance values of the grounded capacitances of each stage of transistors, and do not mean that capacitance elements need to be connected at the corresponding positions. In an actual circuit, the capacitance elements can be included in the capacitance calibration unit 142 or located outside the capacitance calibration unit 142, and the capacitance calibration unit 142 controls the magnitude of their capacitance values.

[0078] In some embodiments, each time of calibration, the capacitance calibration unit changes the capacitance value of the grounded capacitance at the control terminal of one transistor. In addition, each time of calibration, the capacitance calibration unit can change the capacitance value of the grounded capacitance at the control terminal of one transistor according to a preset capacitance change amount, that is, change the capacitance value by the minimum change amount each time. Figure 7B

[0079] shown, the grounded capacitance includes a plurality of parallel-connected capacitance elements c, and the capacitance elements c are connected between the control terminal of the transistor Mi and the ground; the capacitance calibration unit 142 includes a plurality of second switches k2, the second switches are connected in series with the corresponding capacitance elements c, the control terminals of the second switches k2 are connected to the control module to receive the second sub-control signal, and the second switches k2 switch the switch states based on the second sub-control signal to control the number of capacitance elements c connected to the control terminal of the transistor Mi, so as to adjust the resistance value of the grounded capacitance. Among them, when the second switch k2 is conducting, the capacitance element c connected in series with it is connected to the circuit, and when the second switch is off, the capacitance element connected in series with it is not connected to the circuit.It should be noted that the capacitance values of the capacitive elements in each capacitive switch group can be the same or different. For example, in the case of the same capacitance value, by changing the number of the second switches k2 that are turned on through the second sub-control signal, the capacitance value connected can be adjusted; in the case of different capacitance values, the capacitive elements c connected to the circuit can be directly selected by selecting the second switches k2, and different capacitance values of the grounded capacitances can be selected by selecting different capacitive elements c.

[0080] The adjustment method of the voltage division adjustment circuit is as Figure 8A and Figure 8B shown. The following will be described in conjunction with Figure 2A and Figure 2B for illustration. Figure 8A The cases of adjusting the bias voltage are provided, including the following steps: Step S101: The voltage swing detection module 110 determines the voltage swings Vds1 and Vds2 of the first-stage and second-stage transistors; Step S102: The swing comparison module 120 calculates the difference between Vds2 and Vds1 to obtain ΔVds2; Step S103: The swing comparison module 120 determines whether ΔVds2 is less than the preset voltage Vo1. If so, the coarse adjustment is completed. If not, go to step S105; Step S105: The count value of the first counter 131 is incremented by one: the count value p = p + 1; according to the count value of the first counter 131, the bias voltage calibration unit 141 is controlled. The bias voltage calibration unit 141 increases the bias voltage of the transistor M1, and the bias voltage of the transistor M1 can be adjusted up one gear (the minimum adjustment range), and the bias voltages of each stage of transistors Mi (i>1) are synchronously and proportionally increased until ΔVds2 is less than the preset voltage Vo1, so that the voltage division of the transistors M1-M4 is basically the same.

[0081] Figure 8B The cases of capacitance adjustment are provided, including the following steps: Step S201: The voltage swing detection module 110 determines the voltage swings Vds1 to Vds4 of each stage of transistors Mi (i≥1); Step S202: The swing comparison module 120 compares whether Vds2 is equal to Vds1. If so, go to step S203. If not, go to step S205; Step S204: The swing comparison module 120 compares whether Vds3 is equal to Vds1. If so, go to step S205. If not, go to step S205; Step S204: The swing comparison module 120 compares whether Vds4 is equal to Vds1. If so, the fine adjustment is completed. If not, go to step S205; Step S205: Increment the count value corresponding to the second counter by one: the count value q = q + 1; for example, if Vds2 is not equal to Vds1, increment the count value of the second counter corresponding to transistor M2; if Vds3 is not equal to Vds1, increment the count value of the second counter corresponding to transistor M3; if Vds4 is not equal to Vds1, increment the count value of the second counter corresponding to transistor M4; control the capacitance calibration module 142 according to the count value of the second counter 133, and adjust the grounding capacitance of the corresponding transistor until △Vds2 is less than the preset voltage Vo1, so that the voltage division of transistors M1 - M4 is the same.

[0082] It can be understood that since the adjustment of the bias voltage directly changes the gate voltage of the transistor and adjusts the turn-on degree of the transistor, the bias voltage has a greater impact on the voltage swing of the transistor. Therefore, the coarse adjustment of the voltage swing can be quickly achieved through the adjustment of the bias voltage. Relatively, the adjustment of the grounding capacitance of the transistor gate has a smaller impact on the voltage swing of the transistor, so it can be used to achieve fine adjustment. Therefore, in the above embodiment, the bias voltage of each stage of the transistor can be adjusted first through the first comparison result output by the first comparator to achieve coarse adjustment; then the grounding capacitance of the gate of each stage of the transistor can be adjusted through the second comparison result output by the second comparator to achieve fine adjustment.

[0083] Specifically, the control module 130 may further include a regulation unit for controlling the execution order of the coarse adjustment and the fine adjustment. For example, the regulation unit may be connected to the first comparator 122 and the second comparator 123 to control whether the first comparator 122 or the second comparator 123 starts counting. In the above process, the regulation unit may first enable the first comparator 122, and the first comparator 122 counts the comparison result of the difference △Vds2 and the preset voltage Vo1, so as to adjust the bias voltage (coarse adjustment). Since the gate voltages of the transistors above the second stage are pulled up proportionally, if Vds2 is close to being equal to Vds1, then the voltage swings of the other transistors will also be close to Vds1. Therefore, only Vds1 and Vds2 can be compared to simplify the judgment process. Of course, this is just an example. In fact, the voltage swings Vdsi and Vdsj of any two other transistors can also be compared. By judging whether the comparison result is greater than the set voltage Vo1, it is determined whether to make an adjustment. Because as long as the voltage swings of any two transistors are significantly different, it means that the voltage swings of the other transistors are not equal, and an adjustment is required. In the embodiment of the present disclosure, Vds2 and Vds1 are selected for comparison because the source voltage of the first-stage transistor M1 is fixedly grounded, while the source and drain of the other transistors will change with the power supply voltage. Therefore, using Vds1 as the comparison object is convenient for calculation.

[0084] During coarse adjustment, the adjustment module (such as the bias voltage calibration unit) can be connected only to the control terminal of the second-stage transistor M2, and only the bias voltage of the second-stage transistor M2 can be adjusted (pulled up). Since the bias voltages of the subsequent-stage transistors M3 and M4 are based on the bias voltage of the second-stage transistor M2, the bias voltages of the subsequent-stage transistors M3, M4 and other transistors will also change proportionally (be pulled up). Of course, in other embodiments, it is also possible to choose to adjust the gate bias voltage of other transistors Mi (i>2). However, since the second-stage transistor M2 is the lowest-stage transistor whose bias voltage can be adjusted, the adjustment range is small and it is convenient to control.

[0085] After the adjustment of the bias voltage is completed, the control unit can then enable the second comparator 123. The second comparator 123 counts based on the comparison result, so as to adjust the grounding capacitance of each transistor gate (fine adjustment). It can be understood that since the grounding capacitance only affects the voltage division of the parasitic capacitance of the transistor to which it is connected and does not affect other transistors. Therefore, it is necessary to use multiple second comparators 123 to separately judge whether each transistor Mi (i>1) needs to be adjusted and separately adjust the grounding capacitance accordingly.

[0086] Figure 9A and Figure 9B Fig. shows a schematic diagram of the swing comparison module and the control module in another embodiment. In another embodiment, the operation result output by the swing comparison module 120 includes the first comparison result and does not include the second comparison result. The first comparison result is used to adjust the bias voltage of the transistor or the capacitance value of the grounding capacitance. Specifically, as Figure 9A shown, the swing comparison module 120 includes: A second subtractor 121 for calculating the difference between adjacent voltage swings. The input terminal of the second subtractor 121 is connected to the output terminal of the adjacent first subtractor; A first comparator 122. The first input terminal of the first comparator 122 is connected to the set voltage signal terminal for receiving the set voltage Vo1. The second input terminal is connected to the output terminal of the second subtractor 121 for comparing the difference with the set voltage Vo1 and outputting the first comparison result; Among them, the operation result includes the first comparison result, and the first comparison result is used to adjust the bias voltage or the capacitance value.

[0087] As Figure 9B shown, in another embodiment, the control module 130 includes a first counter 131 and a first decoder 132. Among them, the first counter 131 is connected to the first comparator 122 to receive the first comparison result. The first counter 131 and the first decoder 132 are used to generate a control signal for adjusting the bias voltage or the grounding capacitance.

[0088] If the first counter 131 and the first decoder 132 are used to generate a control signal for adjusting the bias voltage, the swing comparison module 120 may include a plurality of second subtractors 121 and a plurality of first comparators 122, and the control module 130 may include a plurality of first counters 131 and a plurality of first decoders 132. Each transistor Mi has a corresponding set of second subtractors 121, first comparators 122, first counters 131, and first decoders 132, which are respectively used to control the gate bias voltage of the plurality of transistors Mi.

[0089] If the first counter 131 and the first decoder 132 are used to generate a control signal for adjusting the ground capacitance, the swing comparison module 120 may include a plurality of second subtractors 121 and a plurality of first comparators 122, and the control module 130 may include a plurality of first counters 131 and a plurality of first decoders 132. Each transistor Mi has a corresponding set of second subtractors 121, first comparators 122, first counters 131, and first decoders 132, which are respectively used to control the ground capacitance of the plurality of transistors Mi.

[0090] Another implementation is provided here, that is, the second subtractor 121 is used to compare with the first comparator 122. Compared with the Figure 4 way provided above, the second subtractor 121 here can determine the difference △Vds of the voltage swings of any two adjacent stages of transistors, that is, the two input terminals of the second subtractor 121 can be respectively connected to the outputs of any two adjacent first subtractors. Then, the first comparator 122 compares according to any difference △Vds with the set voltage Vo1 to determine whether there is uneven voltage division, and then outputs a first comparison result for adjusting the bias voltage and / or the capacitance value. This way compared with Figure 4 the combination of coarse adjustment and fine adjustment in [reference], the circuit is simple and the adjustment speed is relatively fast, and it can be applied to scenarios with relatively low adjustment accuracy requirements.

[0091] Figure 10A and Figure 10B FIGs. [reference figures] and [reference figures] show schematic diagrams of the swing comparison module and the control module in yet another embodiment. In yet another embodiment, the operation result output by the swing comparison module 120 includes a second comparison result but does not include a first comparison result, and the second comparison result is used to adjust the bias voltage of the transistor or the capacitance value of the ground capacitance. Specifically, as Figure 10A shown, the swing comparison module 120 includes: a plurality of second comparators 123, configured to compare the voltage swings of each stage of transistors Mi (i>1) with the voltage swing of the first-stage transistor M1. The input terminals of the second comparators 123 are connected to the outputs of the first subtractor of the first-stage transistor M1 and the first subtractor of any other transistor Mi, and the output terminals of the second comparators 123 output a first comparison result; Among them, the comparison signal includes a first comparison result, and the first comparison result is used to adjust the bias voltage or capacitance value.

[0092] Here, another implementation is provided, that is, instead of comparing the comparison signal value with the set voltage Vo1, the voltage swings of the reference transistor (for example, the first-stage transistor M1) and other stage transistors Mi are directly compared. In this way, it can be determined whether there is a difference between the voltage swings of each stage transistor and the reference transistor. If there is a difference, for example, the first comparison result is Vdsi > Vds1 or Vdsi < Vds1, it means that the voltage division is uneven. The voltage division can be adjusted by adjusting the bias voltage of the transistor Mi and / or the grounding capacitance, so as to achieve voltage equalization.

[0093] As Figure 10B shown, in another embodiment, the control module 130 includes a second counter 133 and a second decoder 134. Among them, the second counter 133 is connected to the second comparator 123 to receive the second comparison result. The second counter 133 and the second decoder 134 are used to generate control signals for adjusting the bias voltage or grounding capacitance.

[0094] If the second counter 133 and the second decoder 134 are used to generate control signals for adjusting the bias voltage, the swing comparison module 120 may include a plurality of second comparators 123, and the control module 130 may include a plurality of second counters 133 and a plurality of second decoders 134. Each transistor Mi has a corresponding set of second comparators 123, second counters 133, and a plurality of second decoders 134, which are respectively used to control the gate bias voltages of the plurality of transistors Mi.

[0095] If the second counter 133 and the second decoder 134 are used to generate control signals for adjusting the grounding capacitance, the swing comparison module 120 may include a plurality of second comparators 123, and the control module 130 may include a plurality of second counters 133 and a plurality of second decoders 134. Each transistor Mi has a corresponding set of second comparators 123, second counters 133, and a plurality of second decoders 134, which are respectively used to control the grounding capacitances of the plurality of transistors Mi.

[0096] This method Figure 4 compared with the combination method of coarse adjustment and fine adjustment in

[0097] has a simple circuit and is applicable to scenarios with a small adjustment range that only require fine adjustment, such as the case where the pull-up amplitude of the power supply voltage is small. In the above embodiments, the voltage swing detection module 110 and the swing comparison module 120 are provided for the detection and processing of analog signals. In another embodiment, the digital signal of the voltage swing can also be extracted by the voltage swing detection module 110 and the digital signal can be processed by the swing comparison module 120. Specifically: In some embodiments, the voltage detection unit includes: a plurality of analog-to-digital converters, connected to the output ends of corresponding transistors, for sampling the voltage values at the output ends of the transistors and converting them into digital signals.

[0098] Here, the output signals of the transistors are sampled by the analog-to-digital converters, and after conversion, digital signals are obtained for calculating the voltage swing of the transistors.

[0099] In some embodiments, the difference unit includes: one or more first calculation units, connected to the output ends of the analog-to-digital converters, for extracting the peak-to-peak value according to the digital signals and obtaining the digital voltage swing.

[0100] Based on the digital signals of the output signals Vd of the transistors, the peak-to-peak value is taken, the maximum value and the minimum value are determined, and thus the voltage swing can be determined.

[0101] In some embodiments, the swing comparison module 120 includes a second calculation unit for comparing the magnitudes of the voltage swings and outputting the operation result.

[0102] Exemplarily, the first calculation unit and the second calculation unit can be processors, and the processors store software programs for taking differences to calculate the voltage swing and the operation result.

[0103] Whether it is an analog signal or a digital signal, the same control module 130 and adjustment module 140 can be used for coarse adjustment or fine adjustment processing.

[0104] The embodiments of the present disclosure also provide an amplifier circuit, as Figure 11 shown, the amplifier circuit 300 includes: A stacked power amplifier 100, including a plurality of stacked transistors, where the output end of the previous transistor is connected to the input end of the next transistor; Any one of the voltage division adjustment circuits 200 as described above, connected to the stacked power amplifier 100.

[0105] It should be understood that the "some embodiments", "one embodiment" or "an embodiment" mentioned throughout the specification mean that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, the "in one embodiment" or "in an embodiment" that appears throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present disclosure, the magnitudes of the serial numbers of the various processes do not mean the order of execution, and the execution order of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are only for description and do not represent the advantages or disadvantages of the embodiments.

[0106] It should be noted that in this document, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising one..." does not exclude the presence of additional identical elements in the process, method, article or device comprising such element.

[0107] The above are only the implementation manners of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present disclosure can easily conceive of changes or substitutions, which should all be covered within the protection scope of the present disclosure.

Claims

1. A voltage division regulation circuit for a stacked power amplifier, characterized in that The stacked power amplifier includes a plurality of stacked transistors, and the output end of the previous transistor is connected to the input end of the next transistor; the voltage division and regulation circuit includes: A voltage swing detection module for detecting the voltage swing between the input end and the output end of the transistor; the voltage swing detection module includes a voltage detection unit and a difference unit. Among them, the voltage detection unit is connected to the output end of the transistor, and based on the power or amplitude of the signal at the output end of the transistor, it detects the voltage magnitudes of the output ends of a plurality of the transistors to obtain corresponding multiple output voltages; the difference unit calculates the difference based on adjacent output voltages to obtain the voltage swing between the input end and the output end of the transistor. A swing comparison module connected to the output end of the voltage swing detection module, which compares the magnitudes of the voltage swings of two transistors and outputs an operation result; the swing comparison module is connected to a control module, and the control module outputs a control signal based on the operation result. An adjustment module connected to the control end of the transistor, for controlling the bias voltage of the control end of the transistor and / or the capacitance value of the grounding capacitor at the control end of the transistor according to the control signal.

2. The voltage division adjustment circuit according to claim 1, wherein The voltage detection unit includes: a plurality of detectors, each connected to the output end of each transistor, for detecting the voltage magnitude of the output end of the transistor.

3. The voltage dividing and regulating circuit according to claim 2, characterized in that, The difference unit includes: a plurality of first subtractors for outputting a plurality of the voltage swings; the first input end of the first first subtractor is grounded, and the second input end is connected to the output end of the first detector; the first input ends and the second input ends of the remaining first subtractors are respectively connected to the output ends of adjacent detectors.

4. The voltage dividing and regulating circuit according to claim 3, wherein The swing comparison module includes: A second subtractor for calculating the difference between the voltage swings of any two levels, and the input ends of the second subtractor are respectively connected to the output ends of the corresponding first subtractors. A first comparator, the first input end of the first comparator is connected to a set voltage, and the second input end is connected to the output end of the second subtractor, for comparing the difference with the set voltage and outputting a first comparison result. A plurality of second comparators for comparing the voltage swings of each stage of the transistor with that of any stage of the transistor, the input ends of the second comparators are connected to the output ends of the first subtractors of the first stage of the transistor and the first subtractors of any other transistor, and the output ends of the second comparators output second comparison results. Among them, the operation result includes the first comparison result and the second comparison result, and the control signal includes a first sub-control signal and a second sub-control signal; the first comparison result is used for the control module to output the first sub-control signal, and the first sub-control signal is used to adjust the bias voltage; the second comparison result is used for the control module to output the second sub-control signal, and the second sub-control signal is used to adjust the capacitance value.

5. The voltage dividing and regulating circuit according to claim 3, characterized in that The swing comparison module includes: A second subtractor for calculating the difference between the voltage swings of any two levels, and the input ends of the second subtractor are connected to the output ends of the corresponding first subtractors. A first comparator, wherein a first input terminal of the first comparator is connected to a set voltage, and a second input terminal is connected to an output terminal of the second subtractor, for comparing the difference with the set voltage and outputting a first comparison result; Wherein, the operation result includes the first comparison result, and the control signal includes a first sub-control signal; the first comparison result is used for the control module to output the first sub-control signal, and the first sub-control signal is used for adjusting the bias voltage or the capacitance value.

6. The voltage dividing and regulating circuit according to claim 3, wherein The swing comparison module includes: A plurality of second comparators, for comparing the voltage swings of each stage of transistors with those of any one stage of transistors, wherein input terminals of the second comparators are connected to output terminals of the first subtractors of the first-stage transistors and the first subtractors of any other transistors, and output terminals of the second comparators output second comparison results; Wherein, the operation result includes the second comparison result, and the control signal includes a second sub-control signal; the second comparison result is used for the control module to output the second sub-control signal, and the second sub-control signal is used for adjusting the bias voltage or the capacitance value.

7. The voltage division adjustment circuit according to claim 4 or 5, characterized in that, The second subtractor is used for calculating a difference between adjacent voltage swings.

8. The voltage division regulation circuit according to claim 4 or 6, characterized in that The second comparator is used for comparing the voltage swings of each stage of transistors with those of the first-stage transistors.

9. The voltage dividing and regulating circuit according to claim 4 or 5, characterized in that It further includes: A first counter and a first decoder; The first counter is used for counting when the first comparison result indicates that the difference is greater than the set voltage; The first decoder is used for decoding according to a first count value of the first counter to obtain the first sub-control signal.

10. The voltage dividing and regulating circuit according to claim 9, wherein, Both the first counter and the first decoder are located in the control module; alternatively, the first counter is located in the control module and the first decoder is located in the adjustment module.

11. The voltage dividing and regulating circuit according to claim 4 or 6, characterized in that, The control module includes: a second counter and a second decoder; The second counter is used for counting when the second comparison result indicates that the voltage swings of the transistors are not equal; The second decoder is used for decoding according to a second count value of the second counter to obtain the second sub-control signal.

12. The voltage division regulation circuit according to claim 11, characterized in that, Both the second counter and the second decoder are located in the control module; alternatively, the second counter is located in the control module and the second decoder is located in the adjustment module.

13. The voltage division adjustment circuit according to claim 1, wherein The voltage detection unit includes: a plurality of analog-to-digital converters, connected to output terminals of corresponding transistors, for sampling voltage values at the output terminals of the transistors and converting them into digital signals.

14. The voltage division regulation circuit according to claim 13, wherein The difference-making unit includes: a first calculation unit, connected to an output terminal of the analog-to-digital converter, for extracting a peak-to-peak value according to the digital signal to obtain the voltage swing.

15. The voltage division regulation circuit according to claim 14, characterized in that, The swing comparison module includes a second calculation unit, for comparing magnitudes of the transistor voltage swings and outputting the operation result.

16. The voltage dividing and regulating circuit according to claim 1, wherein The adjustment module includes: A bias voltage calibration unit is connected to the control terminal of the transistor after the second stage and is also connected to the control module. The bias voltage calibration unit adjusts the bias voltage provided to the transistor after the second stage based on the control signal.

17. The voltage division regulation circuit according to claim 16, wherein The bias voltage calibration unit includes: A plurality of resistive elements connected in series, with the first terminal of a first switch connected between adjacent resistive elements; the second terminal of the first switch is connected to the control terminal of the transistor; The control terminal of the first switch is connected to the control module, and the first switch switches its switch state based on the control signal.

18. The voltage dividing and regulating circuit according to claim 1, wherein The adjustment module includes: A capacitance calibration unit is connected to the ground capacitance and is also connected to the control module. The capacitance calibration unit changes the capacitance value of the ground capacitance based on the control signal.

19. The voltage division regulation circuit according to claim 18, wherein The ground capacitance includes a plurality of capacitive elements connected in parallel, and the capacitive elements are connected between the control terminal of the transistor and ground; The capacitance calibration unit includes a plurality of second switches, the second switches are connected in series with the capacitive elements, the control terminals of the second switches are connected to the control module, and the second switches switch their switch states based on the control signal to control the number of capacitive elements connected to the control terminal of the transistor.

20. An amplifier circuit, characterized in that, It includes: A stacked power amplifier, which includes a plurality of stacked transistors, and the output terminal of the previous transistor is connected to the input terminal of the next transistor; A voltage division adjustment circuit according to any one of claims 1 to 19 is connected to the stacked power amplifier.

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