Low power consumption waveform controller for superconducting and spin qubits

Abstract

According to one embodiment, a quantum computing apparatus includes a plurality of qubits and a waveform generator. Each waveform generator is connected to a respective one of the qubits. Each waveform generator further comprises a current pulse generator, an adjustable negative resistor, an adjustable capacitor and a transformer. Further, each waveform generator is configured to program a respective qubit connected thereto using a power of less than a few milliwatts. Other embodiments of systems, methods, and computer program products are also disclosed.

Description

Cross - Reference to Related Applications

[0001] This application claims the priority and benefit of U.S. Provisional Patent Application Serial No. 63 / 478,101, filed on December 30, 2022, the entire content of which is hereby incorporated by reference herein. Technical Field

[0002] The present invention generally relates to superconducting and spin qubit (qubit) controllers. More specifically, aspects of the present disclosure relate to shaped radio frequency (RF) waveform generators for amplitude and / or phase control of superconducting and spin qubits. Background Art

[0003] Quantum computing involves using qubits to represent information, where the state of each qubit can be described as a linear superposition of its two basis states, e.g., α|0⟩ + β|1⟩. Multiple qubits can be further entangled, thus generating a quantum state in the tensor product space generated by the single - qubit space. For example, the state of two qubits can be represented as α|00⟩ + β|01⟩ + γ|10⟩ + δ|11⟩. It can be seen therefrom that the state of N qubits is actually a superposition of all 2^N eigenstates. Compared with classical parallel computing, where the number of values that can be manipulated at one time only grows linearly with the number of registers in a computer, the power of quantum computing lies in its ability to manipulate all these 2^N coefficients at once. This aspect of quantum computing makes it much more powerful for some types of problems than classical computing.

[0004] Although quantum computing is considered to have great promise, its implementation has been limited to some extent. For example, currently the most advanced superconducting quantum computers can only implement up to 127 qubits. The main factor leading to this processing limitation is the limited cooling power available in superconducting quantum computers. Superconducting properties are promoted at lower temperatures, so some superconducting quantum computers are kept in cryogenic environments with an internal temperature of a few Kelvin. These extremely low temperatures limit the amount of power that can be used without affecting the cryogenic environment.

[0005] Currently, even the most advanced quantum computers with approximately 127 qubits can operate under this power limitation, but the achievable size of quantum computers (or the number of qubits they contain) is changing rapidly. For example, it is believed that running practical quantum algorithms requires approximately one million physical qubits. At this scale, the controller electronics for each qubit cannot consume more than a few milliwatts without affecting the operating efficiency and / or functionality. However, this few - milliwatt limit is less than one - tenth of the power consumption of the most advanced superconducting controllers developed today. Therefore, the progress of quantum computers has been severely limited. Summary of the Invention

[0006] The terms “embodiment” and like terms, such as “implementation,” “configuration,” “aspect,” “example,” and “option,” are intended to broadly refer to all subject matter of the present disclosure and the following claims. Statements containing these terms should not be construed as limiting the subject matter described herein or the meaning or scope of the following claims. The embodiments of the present disclosure covered herein are defined by the following claims, not this summary. This summary is a high-level overview of various aspects of the present disclosure and introduces some concepts that are further described in the detailed description section below. This summary is not intended to identify key or essential features of the claimed subject matter. Nor is this summary intended to be used alone to determine the scope of the claimed subject matter. The subject matter should be understood by reference to the entire specification of the present disclosure, any or all of the drawings, and the appropriate portions of the respective claims.

[0007] In one example, a quantum computing device includes a plurality of qubits and waveform generators. Each waveform generator is connected to more than one qubit. Each waveform generator also includes: a current pulse generator, a tunable negative resistor, a tunable capacitor, and a transformer. In addition, each waveform generator is configured to program each qubit connected thereto using about 2 milliwatts of power.

[0008] In another example, a method of operating a quantum computer includes: (a) initiating a quantum operation, (b) forming more than one waveform via a waveform generator, (c) applying the more than one waveform to a plurality of qubits, (d) receiving the state of the quantum operation performed using the plurality of qubits, and (e) performing further processing based on the received state of the quantum operation.

[0009] The foregoing summary is not intended to represent each embodiment or every aspect of the present disclosure. Rather, the foregoing summary merely provides examples of some novel aspects and features described herein. When considered in conjunction with the drawings and the appended claims, the above and other features and advantages of the present disclosure will become apparent from the following detailed description of representative embodiments and modes for carrying out the invention. Given the detailed description of the various embodiments with reference to the drawings, other aspects of the present disclosure will be apparent to those of ordinary skill in the art. A brief description of the drawings is provided below. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The present disclosure and its advantages and the drawings will be better understood from the following description of representative embodiments with reference to the drawings. These drawings only illustrate representative embodiments and should not be considered as limiting the scope of the various embodiments or the claims.

[0011] Figure 1 is a simplified block diagram of a superconducting quantum computer in accordance with some aspects of the present disclosure.

[0012] Figure 2A Schematic diagram of a control module according to some aspects of the present disclosure.

[0013] Figure 2B Schematic diagram of other control modules according to some aspects of the present disclosure.

[0014] Figure 3 Simplified circuit diagram of an RF waveform generator for amplitude and phase control of qubits according to some aspects of the present disclosure.

[0015] Figure 4A Schematic diagram of a negative resistance component according to some aspects of the present disclosure.

[0016] Figure 4B Another schematic diagram of a negative resistance component according to some aspects of the present disclosure.

[0017] Figure 5 Flowchart of a method according to some aspects of the present disclosure. Detailed Description

[0018] According to one implementation, a quantum computing device includes a plurality of qubits and waveform generators. Each waveform generator is connected to more than one qubit. Each waveform generator further includes: a current pulse generator, an adjustable negative resistor, an adjustable capacitor, and a transformer. In addition, each waveform generator is configured to program each qubit connected thereto using power less than a few milliwatts.

[0019] Various embodiments are described with reference to the accompanying drawings, in which like or equivalent elements are denoted by the same reference numerals throughout the drawings. The drawings are not necessarily drawn to scale and are provided only to illustrate aspects and features of the present disclosure. Numerous specific details, relationships, and methods are set forth to provide a full understanding of some aspects and features of the present disclosure, although those of ordinary skill in the relevant art will recognize that these aspects and features may be practiced without more than one specific detail, with other relationships, or with other methods. In some instances, well-known structures or operations are not shown in detail for purposes of illustration. The various embodiments disclosed herein are not necessarily limited to the order of actions or events shown, as some actions may occur in a different order and / or concurrently with other actions or events. Moreover, not all actions or events shown are necessary to implement some aspects and features of the present disclosure.

[0020] For the purposes of this detailed description, unless specifically disclaimed, the singular includes the plural and vice versa, where appropriate. The term "comprising" means "including but not limited to". In addition, approximate terms such as "about", "almost", "substantially", "approximately", etc. may be used herein to mean "within", "near", "close to", "within 3-5% of", "within acceptable manufacturing tolerances", or any logical combination thereof. Similarly, the terms "vertical", "horizontal", "parallel", and "perpendicular" are respectively intended to additionally include "within 3-5%" of the vertical, horizontal, parallel, or perpendicular directions. In addition, directional terms such as "top", "bottom", "left", "right", "above", and "below" are intended to relate to the equivalent directions shown in the reference diagrams; as understood in the context of the referenced object or element (such as according to the common position of the object or element, etc.); or as described herein.

[0021] As described above, quantum computing involves using qubits to represent information, where the state of each qubit can be described as a linear superposition of its two basis states, e.g., α|0〉 + β|1〉. Multiple qubits can be further entangled, thereby giving rise to a quantum state in the tensor product space generated by the single qubit spaces. Thus, the state of N qubits is actually a superposition of all 2^N eigenstates. Compared with traditional computing, the advantage of quantum computing lies in the ability to manipulate all 2^N of these coefficients at once, while the number of values that traditional computing can manipulate at once grows linearly with the number of registers.

[0022] To maintain control over the physical structures that implement these superposition states, quantum systems are kept at low temperatures to prevent thermal noise from disturbing the system. Unlike bits in classical computers, qubits are subject to temporal degradation and inaccuracies, ultimately leading to information loss and an increased error rate. For example, thermal noise, radio frequency noise, and other types of noise generated by the control electronics used to interact with the qubits can endanger the entire quantum computer.

[0023] Therefore, although quantum computing is considered to have great promise, its computing power has been limited to a certain extent. As described above, the most advanced superconducting quantum computers currently can implement at most about 127 qubits. As described above, a major factor contributing to this processing limitation is that, to avoid negatively affecting the system by adding noise, the power available in superconducting quantum computers is limited. Superconducting properties are promoted at lower temperatures, so some superconducting quantum computers are kept in cryogenic environments with an internal temperature of a few Kelvin. These extremely low temperatures limit the amount of power that can be used without affecting the cryogenic environment.

[0024] Currently, even the most advanced quantum computers with approximately 127 qubits can operate within this power limit, but the achievable size of a quantum computer (or the number of qubits it contains) is increasing rapidly. For example, it is thought that running practical quantum algorithms would require approximately one million physical qubits. At this scale, the control electronics for each qubit cannot consume more than a few milliwatts without compromising operational efficiency and / or functionality. However, this limit of a few milliwatts is less than one-tenth of the power consumption of the most advanced superconducting controllers developed today. As a result, the computational power of quantum computers is severely limited.

[0025] In stark contrast to these conventional drawbacks, the various embodiments included herein can significantly reduce the amount of power used to control qubit states. For example, the waveform generator described herein can program (e.g., set or at least affect the state of) a qubit using less than a few milliwatts of power (e.g., less than approximately 2 milliwatts). In some embodiments, the power used to program a qubit can be even lower (e.g., a power of approximately 1 milliwatt, a power less than 1 milliwatt, etc.). These embodiments ideally can minimize operational errors while also maintaining a low enough power consumption to operate at cryogenic temperatures without generating an undesirably large amount of noise. The improvement in power consumption efficiency achieved through the embodiments herein allows for scaling the number of qubits in a quantum computing system to achieve complex functions and provide significant value, e.g., as will be described in further detail below.

[0026] Referring to Figure 1 , a simplified block diagram of a superconducting quantum computer 100 according to one embodiment is shown. As an option, this quantum computer 100 can be combined with features from any other embodiment included herein (e.g., those described with reference to other figures). However, this quantum computer 100 and the other features presented herein can be used in a variety of applications and / or transformations, which may or may not be specifically described in the exemplary embodiments included herein. Additionally, the quantum computer 100 presented herein can be used in any desired environment. Thus, Figure 1 (and other figures) can be considered to include any possible transformations.

[0027] As shown in the figure, the superconducting quantum computer 100 includes a digital processor 102, which is electrically connected to a control module 104 (i.e., control electronics) and a readout module 106 (i.e., readout electronics). The control module 104 is configured to affect (e.g., program) qubits (e.g., superconducting qubits) included in the quantum computing module 108. Thus, the control module 104 preferably includes physical electronic components capable of controlling the quantum computing module 108. In other words, if the quantum computer module 108 includes superconducting qubits, the control module 104 can be a superconducting qubit controller.

[0028] The process of controlling qubits in the quantum computing module 108 can vary according to specific methods. For example, in some methods, the qubits in the quantum computing module 108 are superconducting qubits. Thus, in such a method, the control module 104 can control the superconducting qubits by applying one or more waveforms to one or more qubits. In an example that is in no way intended to limit the description, the control module 104 can use selective shaped radio frequency (RF) waveforms to control the superconducting qubits (e.g., referring respectively to waveform generators 202, 252 below Figures 2A-2B ).

[0029] Still referring to Figure 1 , the readout module 106 includes physical electronic components capable of inferring a computational answer by evaluating the properties of qubits in the quantum computing module 108. The process of determining qubit characteristics can vary according to specific methods. For example, in some methods, the qubits in the quantum computing module 108 are superconducting qubits. Thus, in such a method, the readout module 106 can receive information from the quantum computing module 108 by detecting the quantum states of one or more qubits. In an example that is in no way intended to limit the description, the readout module 106 can detect the quantum states of qubits and / or combinations of qubits. For example, the quantum gates of superconducting qubits can be organized and applied to specific qubits in a specific order as outlined, for example, in a quantum circuit model or any other model. Quantum gates act on one or more qubits and evolve the quantum states of the qubits according to specific gate functions. Quantum gates can be single-qubit gates or multi-qubit gates.

[0030] The superconducting quantum computer 100 uses electronics to control superconducting qubits in the quantum computing module 108 and to read out the states of the qubits. The digital processor 102 can be used to interact with the control module 104 and the readout module 106 to achieve this function. Thus, according to a specific method, the digital processor 102 can be configured to send one or more instructions, requests, information units (e.g., data packets), etc. to the control module 104. The digital processor 102 can also be configured to receive one or more types of information (e.g., probability distributions, determined answers, etc.) from the readout module 106.

[0031] The digital processor 102 is also shown as being connected to the network 110. The type of the network 110 connected to the digital processor 102 may vary according to the implementation. For example, in some methods, the digital processor 102 is connected to a local area network (LAN), and the LAN provides access to the improved computing power of the quantum computing module 108 to other devices also connected to the LAN. In other methods, for example, the network 110 may be a wide area network (WAN) such as the Internet. However, an exemplary list of other network types that the network 110 may implement includes, but is not limited to, a public switched telephone network (PSTN), a storage area network (SAN), an internal telephone network, etc. As described above, this extends the significant computing improvements achieved by the various implementations of the quantum computer herein to any location (e.g., device) also connected to the network 110.

[0032] Thus, in some embodiments, the digital processor 102 acts as an intermediate layer between the quantum characteristics of the computing module 108 and the rest of the overall system. In other words, the digital processor 102 can be used as a digital interface between the quantum processor and the network 110. Therefore, the control module 104 and the readout module 106 can act as quantum analog-to-digital converters. Thus, information in analog form (e.g., data, commands, metadata, etc.) can be sent between the quantum computing module 108 and the modules 104, 106, while digital information is sent between the digital processor 102 and the modules 104 and 106. Therefore, some components in the superconducting quantum computer 100 are capable of converting information between different forms, performing various operations on different forms of information, sending and / or storing information at different locations, etc. For example, in some methods, the control module 104 and / or the readout module 106 can operate together with the digital processor 102 to implement, for example, a system capable of processing quantum as well as digital and / or analog information, as will be understood by those skilled in the art after reading this specification. The processor 102 can be used as a backend digital processor that executes quantum algorithms for a wide range of applications (e.g., drug development, scientific discovery, etc.).

[0033] The specific configuration of the control module 104 may vary according to the implementation. For example, the type of qubits used in the quantum computing module 108 affects the physical components and / or processes implemented therein. The types of qubits include superconducting qubits, spin qubits, etc. Now referring to Figure 2A , a schematic diagram of a control module 200 for superconducting qubits according to one embodiment is shown. As an option, this control module 200 can be combined with features from any other embodiment included herein (e.g., referring to other figures (e.g., Figure 1in combination with those features described). However, the control module 200 and other modules described herein can be used in a variety of applications and / or transformations, which may or may not be specifically described in the exemplary embodiments included herein. Additionally, the control module 200 proposed herein can be used in any desired environment. Thus, Figure 2A (and other figures) can be considered to include any possible transformations.

[0034] As shown, the control module 200 includes a waveform generator 202 that is capable of selectively creating (or "controlling") waveforms of a desired type. The waveform generator 202 can be implemented using microelectronic technology to provide a voltage with a specific waveform (e.g., see Figure 2B 256 in) to drive a quantum gate (e.g., Figure 2B 254 in). Thus, the waveform generator 202 preferably can generate waveforms having any desired complexity (number of waveform components), shape, frequency, etc. In some methods, the waveform generator 202 can simply generate waveforms based on information (e.g., commands, signals, data, instructions, etc.) received directly from a digital processor (e.g., the digital processor module 102 with reference to Figure 1 ). In other methods, the waveform generator 202 can generate waveforms based on information received from a computing module (e.g., see Figure 1 the quantum computing module 108). In other methods, the waveform generator 202 can generate waveforms based on real-time feedback, the type of qubit being programmed, user input, the application being run, etc. In some embodiments, real-time feedback can be received from a computing module (e.g., see Figure 1 the quantum computing module 108).

[0035] As shown, the waveform generator 202 is connected to a superconducting qubit 204. According to this embodiment, the qubit 204 includes a Josephson junction loop 206 and a capacitor 208 representing the intrinsic capacitance. In combination, for example, those skilled in the art will understand after reading this specification that the Josephson junction loop 206 and the capacitor 208 can be used as equivalent to a frequency-tunable nonlinear inductor-capacitor resonator. As previously mentioned, the state of a qubit (e.g., the superconducting qubit 204) can be controlled by applying a shaped RF waveform at the resonant frequency of the qubit 204. Thus, the adjustable amplitude and phase of the RF waveform (e.g., see 201) are used to control (e.g., program) the instantaneous state of the qubit 204. The shape of the RF waveform can vary according to the implementation and can include Gaussian, cosine, rectangular, triangular, etc. However, in some embodiments, it is preferred to use a Gaussian-shaped RF waveform to program qubits in a quantum computer because a Gaussian-shaped radio frequency waveform produces relatively low noise and crosstalk.

[0036] For qubit 204, the physical components used to form the structure can vary according to the implementation. For example, it may be desirable for the components in qubit 204 to be more sensitive than the components in the rest of the system. This can help improve the stability of the final qubit. The types of components used to form the qubit can also be different.

[0037] For example, Figure 2B A schematic diagram of a control module 250 for a qubit according to one implementation is shown. As an option, this control module 250 can be combined with features from any other implementation included herein (e.g., those described with reference to other figures (e.g., Figure 1 ). However, such a control module 250 and other modules described herein can be used for various applications and / or transformations, which may or may not be specifically described in the exemplary implementations included herein. Additionally, the control module 250 proposed herein can be used in any desired environment. Thus, Figure 2B (and other figures) can be considered to include any possible transformations.

[0038] As shown, the control module 250 includes a waveform generator 252, which is capable of selectively creating (or "controlling") waveforms of the desired type. Thus, the waveform generator 252 preferably can generate waveforms having any desired complexity (number of waveform components, amplitude of each waveform component, phase of each waveform component), shape, frequency, etc. In some methods, the waveform generator 252 can simply generate waveforms based on information (e.g., commands, signals, data, instructions, etc.) received directly from a digital processor (e.g., see Figure 1 's digital processor module 102). In an example, an instruction is a single specified action that is part of the instruction set architecture of a digital processor; a command is a complex instruction, e.g., a computer program or computer function that includes multiple instructions to be executed in a specific order; data can include parameters used in instructions and / or commands, or can include qubit data processed by the digital processor; and a signal can include a command for generating a specific analog waveform.

[0039] In other methods, the waveform generator 252 can generate waveforms based on information received from a computing module (e.g., see Figure 1 's quantum computing module 108). For example, data read from superconducting qubits in the quantum computing module 108 can be used to generate waveforms for the next quantum operation to be performed by the quantum computer 100. In other methods, the waveform generator 252 can generate waveforms based on real-time feedback, the type of qubit being programmed, user input, the application being run, etc. In some implementations, it can be from a computing module (e.g., seeFigure 1 The quantum computing module 108) receives real-time feedback. The real-time feedback can be the quantum state of qubits. In some embodiments, the types of qubits being programmed include gate-based superconducting qubits or spin qubits. In some embodiments, the user input can include selecting a specific application to run, selecting specific parameters for the application, etc.

[0040] As shown, the waveform generator 252 is connected to the gates of more than one spin qubit 254. In some embodiments, each spin qubit 254 has a single electron spin under the gate of a corresponding silicon transistor-like device. The gates of each spin qubit are controlled by corresponding shaped RF waveforms 256 having an adjustable amplitude and phase at the resonant frequency of the corresponding qubit. The RF waveform 256 can be formed by the waveform generator 252 and is transmitted to each of the respective spin qubits 254. However, it should be noted that two gates correspond to two different RF waveforms at two slightly different resonant frequencies of two spin qubits 254. The amplitudes and phases of the RF waveforms can also be slightly different. For example, as will be understood by those skilled in the art after reading this specification, these two RF waveforms are generated at different times to form a final time-multiplexed waveform.

[0041] The exemplary waveform 201 is also shown as being sent from the waveform generator 202 to the qubit 204. Similarly, the waveform 256 is shown as being sent from the waveform generator 252 to the qubit 254. These exemplary waveforms 201 and / or 256 can include complex waveforms that can be used to affect the state (e.g., programming) of the respective qubits 204 and 254. As previously mentioned, in a given quantum computing environment, different waveform generators (e.g., Figure 2A 202 and / or Figure 2B 252) can be connected to the respective qubits. Thus, for example, as will be understood by those skilled in the art after reading this specification, Figures 2A-2B the configurations shown can each correspond to a single qubit in a given quantum computer. By reducing the amount of power consumption associated with affecting qubits, for example, as Figures 2A-2B shown in the power of the waveform generators 202, 252, the embodiments included herein are capable of reducing the overall power consumption by at least a factor of 10 compared to conventional products.

[0042] These improvements in operational efficiency are achieved at least in part due to the combination and arrangement of the components included in the methods herein. For example, referring to Figure 3, According to one embodiment, a waveform generator 300 is shown that is capable of controlling the state of qubits using much lower power (e.g., about 10 times lower) than conventionally achievable. As an option, this waveform generator 300 can be combined with features from any other embodiment included herein (e.g., those described with reference to other figures (e.g., Figure 1 -2)). For example, any of the embodiments described above with respect to Figures 2A-2B the waveform generators 202, 252 can be incorporated into the waveform generator 300.

[0043] However, such waveform generators 300 and other waveform generators proposed herein can be used in various applications and / or transformations, which may or may not be specifically described in the exemplary embodiments included herein. Additionally, the waveform generator 300 proposed herein can be used in any desired environment. Thus, Figure 3 (and other figures) can be considered to include any possible transformations.

[0044] As shown, the waveform generator 300 includes a time - adjustable current pulse generator 302. The current pulse generator 302 can be used to generate current pulses 310 to control the phase and / or other details of the shaped RF waveform ultimately generated by the waveform generator 300.

[0045] Furthermore, the waveform generator 300 includes an adjustable negative resistor 304. This adjustable negative resistor 304 can be used to control the amplitude and envelope shape of the shaped RF waveform ultimately generated by the waveform generator 300. In some methods, the characteristics of the negative resistor are programmed sequentially based on the expected amplitude and envelope shape of the RF waveform. Thus, the specific characteristics of the negative resistor 304 can vary according to the specific embodiment.

[0046] An adjustable capacitor 306 is included in the waveform generator 300. In some methods, the primary inductor of the transformer 308 and the capacitor 306 form a resonator. Thus, the adjustable capacitor 306 is preferably configured to tune the resonant frequency of the resonator. In some methods, the resonant frequency of the shaped RF waveform ultimately generated by the waveform generator 300 is connected to the secondary inductor of the transformer 308. In some embodiments, the adjustable capacitor 306 includes a capacitor array. Additionally, the array can include more than one adjustable capacitor and / or dithering of the capacitor.

[0047] Furthermore, the transformer 308 is used to transfer the shaped RF waveform to a superconducting or spin qubit connected to the waveform generator 300. As described above, each qubit can be connected to a different waveform generator. Thus, Figure 3 the transformer 308 in

[0048] Accordingly, the various components included in the waveform generator 300 operate together to generate selectable tuning waveforms that can be used to affect the state of at least one qubit. Additionally, this is achieved while consuming only a fraction of the power used by conventional products. For example, some embodiments included herein are capable of reducing the power consumption for programming each qubit by a factor of 10. Thus, the efficiency of the quantum components used in quantum computing is significantly improved. The energy savings of the waveform generator 300 result from using passive devices (e.g., the tunable capacitor 306 and the transformer 308) that do not consume power to construct the waveform generator 300. Additionally, the waveform generator 300 is a simple and unique circuit block that combines RF waveform generation and modulation functions while reducing the total number of active elements that consume power.

[0049] Figure 4A A negative resistance component 400 according to one embodiment is shown. As an option, this negative resistor 400 can be combined with features from any other embodiment included herein (e.g., those described with reference to other figures (e.g., Figures 1-3 ). For example, this negative resistor 400 can be implemented as Figure 3 the tunable negative resistor 304.

[0050] However, such negative resistors 400 and other resistors presented herein can be used in a variety of applications and / or transformations, which may or may not be specifically described in the exemplary embodiments included herein. Additionally, the negative resistor 400 presented herein can be used in any desired environment. Thus, Figure 4A (and other figures) can be considered to include any possible transformations.

[0051] As shown in the figure, the negative resistor 400 includes a pair of cross-connected transistors 402, 404. This pair of cross-connected transistors 402, 404 can generate a negative resistance between two open nodes "N1" and "N2". In other words, the construction of the negative resistor 400 causes it to experience a resistive phenomenon where the voltage drop across the open nodes "N1" and "N2" decreases as the supply current increases. In some embodiments, the transistors 402, 404 can be n-type transistors, while in other embodiments the transistors 402, 404 can be p-type transistors. In other embodiments, the transistors used in a quantum computer can be different in other respects. The size of the transistors 402, 404 affects the negative resistance achieved, so design factors need to be considered to adjust the negative resistance according to the waveform to be generated. The negative resistance achieved can be a function of the transconductance of the transistors 402, 404, which is a function of the transistor size. The biasing of the transistors 402, 404 can also affect the negative resistance achieved by affecting the transconductance of the transistors 402, 404. Therefore, a current can be applied to the source terminals of the cross-connected pair to adjust the negative resistance seen at the drain terminals (i.e., the open nodes "N1" and "N2"). In Figure 4A it, a tail current source can be inserted between the ground terminal and the source terminal of the n-type transistor, and adjusting the current of the current source can adjust the negative resistance seen at the drain terminal.

[0052] Now referring to Figure 4B , a negative resistance component 450 according to another embodiment is shown. As an option, this negative resistor 450 can be combined with features from any other embodiment included herein (e.g., those described with reference to other figures (e.g., Figures 1-3 ). For example, this negative resistor 450 can be implemented as Figure 3 the adjustable negative resistor 304.

[0053] However, this negative resistor 450 and other resistors proposed herein can be used in various applications and / or transformations, which may or may not be specifically described in the exemplary embodiments included herein. In addition, the negative resistor 450 proposed herein can be used in any desired environment. Therefore, Figure 4B (and other figures) can be considered to include any possible transformations.

[0054] As shown in the figure, the negative resistor 450 includes more than one pair of cross-connected transistors. Specifically, this embodiment includes a first pair 451 of cross-connected transistors 452, 454 and a second pair 453 of cross-connected transistors 456, 458. Although the first pair 451 and the second pair 453 appear to be complementary mirror images of each other, different transistor pairs can be arranged the same or differently relative to each other as needed to achieve a negative resistance between the open-circuit nodes "N1" and "N2". In other words, the first pair 451 and the second pair 453 can be implemented to achieve the same, different, or similar negative resistance values, etc.

[0055] The first pair 451 of cross-connected transistors 452, 454 is configured to operate in conjunction with the second pair 453 of cross-connected transistors 456, 458. For example, the first pair 451 and the second pair 453 can cooperate to generate a negative resistance between the two open-circuit nodes "N1" and "N2". In other words, the construction of the negative resistors 451, 453 is such that the resulting construction experiences a resistance phenomenon where the voltage drop across the open-circuit nodes "N1" and "N2" decreases as the supply current increases. In some embodiments, the transistors in each pair 451, 453 can be of the same type, while in other embodiments the transistors in each pair are similar or different types of transistors. The transistors can be similarly the same, similar, or different across different pairs 451, 453. Similar to Figure 4A this, the size and biasing of the transistors in each pair 451, 453 can affect the negative resistance observed at the drain terminals (i.e., the open-circuit nodes "N1" and "N2"). A top tail current can be placed between the p-type transistors 452, 454 and the positive reference to bias the sources of these transistors, thereby adjusting the negative resistance seen at the drain terminals. Similar to Figure 4A this, a bottom tail current can be inserted between the n-type transistors 456, 458 and the ground terminal to bias the sources of these transistors, thereby adjusting the negative resistance seen at the drain terminals.

[0056] Now looking at Figure 5 , a method 500 for operating a quantum computer is proposed according to one method, which is in no way intended to be limiting. A flowchart of the computer-implemented method 500 is shown according to one embodiment. According to the present invention, the method 500 can be executed in Figures 1-4B any environment shown and in various embodiments. Of course, as those skilled in the art will understand after reading this specification, the method 500 can include more or fewer operations than those Figure 5 specifically described in

[0057] Each step of method 500 can be performed by any suitable component of the operating environment using known techniques and / or techniques that would be apparent to those skilled in the art after reading this disclosure. For example, more than one step in method 500 can be performed by a digital processor (e.g., see Figure 1 digital processor 102 electrically connected to control module 104 and readout module 106). In various other embodiments, method 500 can be performed in part or in whole by a controller, a processor, etc., or some other device having more than one processor therein. A processor, e.g., a processing circuit, chip, and / or module implemented in hardware and / or software, and preferably having at least one hardware component, can be used in any device to perform more than one step of method 500. Exemplary processors include, but are not limited to, a central processing unit (CPU), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), etc., combinations thereof, or any other suitable computing device known in the art.

[0058] As Figure 5 shown, operation 502 of method 500 includes initiating a quantum operation to be performed. As a result of a machine learning model trained using more than one set of training data, etc., the quantum operation can be received from a user, a running application, another quantum computer, etc. Additionally, the quantum operation may involve using qubits as described herein. Thus, in some embodiments, the quantum operation involves using superconducting or spin qubits. Examples of quantum operations include bit flips, phase flips, bit-phase flips, state depolarization, amplitude damping, and phase damping.

[0059] Furthermore, operation 504 includes generating a waveform to be applied to the qubits. In other words, operation 504 includes developing more than one waveform to be applied to more than one qubit to preferably implement at least a portion of the received quantum operation. In some cases, operation 504 can include only sending more than one instruction to initiate the generation of the waveform. In other words, operation 504 can actually be performed by a central controller sending more than one instruction to a control module (e.g., referring to Figure 1 104) that includes a waveform generator that actually generates the waveform.

[0060] Moving on to operation 506, the quantum state of the quantum operation performed using the qubits is detected. In other words, operation 506 involves determining the result of applying the RF waveform to the qubits. In some embodiments, using physical readout electronics in the system (e.g., Figure 1The readout electronics in the readout module 106) to determine the quantum state. The readout electronics can determine the quantum state by detecting changes in the amplitude or phase of the quantum resonator. The detected quantum state is provided to a backend digital processor to provide the result of the performed quantum computation. Thus, operation 508 also includes performing further processing using the detected quantum state. For example, the result of the quantum state can be converted to digital and / or analog form and used for further digital and / or analog processing. Such additional processing may involve using more than one machine learning model, forming (e.g., training) more than one machine learning model, implementing a neural network, statistical recognition, etc. For example, a quantum algorithm can run on the quantum computer 100 by controlling and detecting the quantum state of qubits based on quantum Fourier transform, amplitude amplification, or superposition. In addition, the detected quantum state and / or the result of the additional processing can also be sent to more than one location. In some cases, these more than one locations are remote with respect to the quantum computing environment used.

[0061] Similarly, the various embodiments included herein can significantly reduce the amount of power used to control the state of qubits. These embodiments ideally can minimize operational errors while also maintaining a low enough power consumption to operate at cryogenic temperatures without generating an undesired large amount of noise. Due to the implementation of the various methods herein, the readout complexity, physical footprint, errors, and price of the final product are also greatly reduced.

[0062] The improvement in power consumption efficiency achieved by the embodiments herein allows scaling the number of qubits in a quantum computing system to achieve complex functions and provide significant value. Some embodiments achieve this by generating RF waveforms with controlled amplitude and / or phase shapes to control superconducting qubits at a power below a few milliwatts per qubit. For example, the waveform generator described herein can be capable of programming (e.g., setting or at least affecting its state) a qubit using about 2 milliwatts of power, but can be lower in some embodiments (e.g., about 1 milliwatt of power). Thus, the embodiments herein can operate more efficiently than what is conventionally achievable.

[0063] As previously mentioned, a portion of a superconducting quantum computer is maintained at an extremely low temperature (i.e., cryogenic temperature) to reduce thermal noise that can cause information loss. Therefore, the amount of power that may be used in these environments should not significantly increase the temperature. Circuits and methods that can minimize the amount of power used to program qubits can greatly improve the energy requirements of a superconducting quantum computer (i.e., the energy required to maintain the cryogenic environment and the energy required to program and read qubits). By improving the energy requirements, for the same energy budget, a larger number of qubits can be provided in a quantum computer.

[0064] Conventional waveform generators include a single-frequency RF signal generator with a fixed amplitude and a waveform modulator that mixes the RF signal with a low-frequency amplitude shaping signal. At least three circuit blocks are required to implement a conventional waveform generator - a radio frequency signal generator, a low-frequency amplitude shaping generator, and a mixer. In contrast, some embodiments of the present disclosure combine the functions of the three circuit blocks in a conventional waveform generator into a single simple circuit block, thereby reducing circuit complexity, power consumption, noise, footprint, and thus reducing the manufacturing cost of the waveform generator (e.g., waveform generator 300) used in a quantum computer (e.g., quantum computer 100).

[0065] It should also be noted that the various embodiments herein can be systems, methods, and / or computer program products at any possible level of integration of technical details. The computer program product can include a computer-readable storage medium (or media) having computer-readable program instructions thereon for causing a processor to execute aspects of the present invention.

[0066] The computer-readable storage medium can be a tangible device capable of retaining and storing instructions for use by an instruction execution device. The computer-readable storage medium can be, by way of example and not limitation, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer-readable storage medium includes the following: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disc (DVD), a memory stick, a floppy disk, a mechanical encoding device such as a punched card or raised structures in a groove record ing instructions, and any suitable combination of the foregoing. The computer-readable storage medium as used herein should not be construed as a transient signal such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., optical pulses through an optical fiber cable), or electrical signals transmitted through wires.

[0067] The computer-readable program instructions described herein can be downloaded from the computer-readable storage medium to various computing / processing devices, or downloaded to an external computer or external storage device via a network such as, for example, the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fibers, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium within the respective computing / processing device.

[0068] The computer-readable program instructions for carrying out operations of the present invention may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state-setting data, configuration data for integrated circuits, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk, C++, and procedural programming languages such as the "C" programming language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partly on the user's computer, as a stand-alone software package partly on the user's computer and partly on a remote computer, or entirely on the remote computer or server. In the latter case, the remote computer may be connected to the user's computer through any type of network, including a local area network or a wide area network, or may be connected to an external computer (e.g., through the Internet using an Internet service provider). In some embodiments, an electronic circuit, including, for example, a programmable logic circuit, a field-programmable gate array (FPGA), or a programmable logic array (PLA), may execute the computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuit so as to perform aspects of the present invention.

[0069] Aspects of the present invention are illustrated herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0070] These computer-readable program instructions may be provided to a processor of a computer or to other programmable data processing apparatus to produce a machine, such that the instructions executed via the processor of the computer or other programmable data processing apparatus create means for implementing the functions / acts specified in the flowchart and / or block diagram block. These computer-readable program instructions may also be stored in a computer-readable storage medium that can direct a computer, a programmable data processing apparatus, and / or other devices to function in a particular manner, such that the computer-readable storage medium in which the instructions are stored comprises an article of manufacture including instructions which implement aspects of the functions / acts specified in the flowchart and / or block diagram block.

[0071] The computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other devices to produce a computer-implemented process, such that the instructions executed on the computer, other programmable apparatus, or other devices implement the functions / acts specified in the flowchart and / or block diagram block.

[0072] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of the possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of instructions, which includes one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions shown in the blocks may not occur in the order shown in the figures. For example, two consecutive blocks shown may actually be implemented as one step, executed simultaneously, substantially simultaneously, or with partial or total time overlap, or depending on the functions involved, these blocks may sometimes be executed in the reverse order. It will also be noted that each block of the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented by a system based on dedicated hardware that performs the specified functions or actions or a combination of dedicated hardware and computer instructions.

[0073] Accordingly, although aspects of the embodiments herein are shown as including specific designs, orientations, numbers of components, etc., this is in no way intended to limit the present invention. On the contrary, the embodiments herein are for illustrative purposes only and may vary in terms of design, orientation, number of components, etc. according to the desired method. It should also be noted that the use of terms such as "bottom", "lower", "top", "upper", etc. is in no way limiting. Any reference frame used to illustrate the various embodiments herein is chosen for illustrative purposes only and can be adjusted as needed. [[ID=?]]

[0074] It should also be noted that although the disclosed embodiments have been illustrated and described for more than one method, equivalent changes and modifications or knowledge of equivalent changes and modifications will occur to other technical personnel in the art after reading and understanding this specification and the drawings. Additionally, although a particular feature of the present invention may be disclosed only for one of several embodiments, such a feature may be combined with one or more other features of other embodiments, which may be desirable and advantageous for any given or specific application.

[0075] It should also be understood that the various embodiments of the present disclosure are shown by way of example and not limitation. Many changes may be made to the disclosed embodiments in light of the present disclosure without departing from the spirit or scope thereof. Accordingly, the breadth and scope of the present disclosure should not be limited by any of the above-described embodiments. Instead, the scope of the present disclosure should be defined in accordance with the claims and their equivalents. It should be noted that there seems to be a missing ID number in the translation of the content corresponding to "[[ID=?]] " in the original text you provided. I have translated it as best as possible based on the overall context. If you have any further questions or need corrections, please feel free to let me know.

Claims

1. A quantum computing device, comprising: A plurality of qubits; And A waveform generator, each waveform generator being connected to more than one of the qubits, each waveform generator having: A current pulse generator; An adjustable negative resistor; An adjustable capacitor; And A transformer, Wherein each waveform generator is configured to program the connected qubits using less than a few milliwatts of power.

2. The quantum computing device according to claim 1, wherein At least one of the waveform generators generates a shaped radio frequency (RF) waveform.

3. The quantum computing device according to claim 2, wherein, The shaped RF waveform includes a Gaussian waveform, a cosine waveform, a rectangular waveform, or a triangular waveform.

4. The quantum computing device according to any one of claims 1 to 3, further comprising: A digital processor configured to provide first information to the waveform generator to adjust the waveform complexity including amplitude and phase.

5. The quantum computing device according to claim 4, wherein, The first information includes commands, signals, data, or instructions.

6. The quantum computing device according to any one of claims 1 to 5, further comprising: A computing module configured to provide second information to the waveform generator to adjust the waveform complexity including amplitude and phase.

7. The quantum computing device according to claim 6, wherein, The second information includes the quantum states of the connected qubits.

8. The quantum computing device according to any one of claims 1 to 7, wherein, The waveform generator adjusts the waveform complexity at least partially based on real-time feedback, the type of qubit being programmed, user input, the application program being run, or any combination thereof.

9. The quantum computing device according to any one of claims 1 to 8, wherein, The adjustable negative resistor includes a first pair of cross-connected transistors, wherein the drain terminals of the first pair of cross-connected transistors are the terminals of the adjustable negative resistor.

10. The quantum computing device according to claim 9, wherein, The first pair of cross-connected transistors are p-type transistors.

11. The quantum computing device according to claim 9, wherein, The first pair of cross-connected transistors are n-type transistors.

12. The quantum computing device according to any one of claims 9 to 11, wherein The adjustable negative resistor further includes a second pair of cross-connected transistors, the second pair of cross-connected transistors being connected to the first pair of cross-connected transistors such that the drain terminals of the first pair of cross-connected transistors are connected to the drain terminals of the second pair of cross-connected transistors.

13. The quantum computing device according to claim 12, wherein, The second pair of cross-connected transistors are p-type transistors or n-type transistors.

14. The quantum computing device according to any one of claims 1 to 13, wherein, The current pulse generator, the adjustable negative resistor, and the adjustable capacitor are arranged in a parallel circuit structure.

15. The quantum computing device according to any one of claims 1 to 14, wherein, The primary inductor of the transformer and the adjustable capacitor form a resonator.

16. The quantum computing device according to claim 15, wherein, The resonant frequency of the resonator is tuned via the adjustable capacitor.

17. A method for operating a quantum computer, comprising: Starting a quantum operation; Forming more than one waveform via a waveform generator; Applying the more than one waveform to a plurality of qubits; Receiving the state of the quantum operation performed using the plurality of qubits; And Performing further processing based on the received state of the quantum operation.

18. The method according to claim 17, wherein, Forming the more than one waveform includes: Tuning the resonant frequency of a resonator included in the waveform generator.

19. The method according to claim 18, wherein, Tuning the resonant frequency includes: Tuning the adjustable capacitor of the waveform generator, wherein the resonator includes the adjustable capacitor of the waveform generator and the primary winding of the transformer.

20. The method according to any one of claims 17 to 19, wherein Forming the more than one waveform includes applying a current to an adjustable negative resistor included in the waveform generator.

21. The method according to claim 20, wherein, The adjustable negative resistor includes a first pair of cross-connected transistors, and wherein applying the current to the adjustable negative resistor includes: Applying a current to the source terminals of the first pair of cross-connected transistors, the drain terminals of the first pair of cross-connected transistors being the terminals of the adjustable negative resistor.

22. The quantum computing device according to claim 21, wherein, The first pair of cross-connected transistors are p-type transistors.

23. The quantum computing device according to claim 21, wherein, The first pair of cross-connected transistors are n-type transistors.

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