Chip testing equipment and control method thereof

Abstract

The present disclosure relates to the field of semiconductor technology and provides a chip testing device and a control method thereof, which are used to solve the technical problems of low cleaning efficiency of test sockets and long waiting time of machines. The chip testing device includes: a sorting device, including a first chamber for accommodating a first carrier, the first carrier being provided with cleaning particles; a testing device, including a second chamber and a test socket, the second chamber being used to accommodate a second carrier, the testing device being used to electrically connect to a chip to be tested on the second carrier through the test socket and perform a test operation on the chip to be tested; a transmission component for transmitting the first carrier; a control unit for controlling the transmission component to move the first carrier from the first chamber to the second chamber where the test socket is located and to control the first carrier to perform a cleaning operation on the test socket when the test socket reaches a preset cleaning condition. In this way, the cleaning efficiency of the test socket can be effectively improved, while shortening the waiting time of the machine and improving the machine production capacity.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a chip testing device and a control method thereof. Background Art

[0002] Before chips are shipped from the factory, they undergo various tests to ensure their quality and reliability. In the semiconductor manufacturing process, test sockets serve as the key interface between the test equipment and the chip under test, ensuring the accuracy and efficiency of testing operations. However, after a certain number of tests, the test sockets become contaminated with foreign matter. These foreign matter primarily consists of tin slag and adhesive from the bumps or solder balls of integrated circuits, as well as airborne dust and fibers. If not promptly cleaned, these foreign matter can affect chip testing operations and, in turn, the accuracy of test parameters.

[0003] Currently, test socket cleaning is mostly done manually. This method is labor-intensive and time-consuming, resulting in low cleaning efficiency. It also increases machine waiting times, significantly impacting overall machine productivity. Therefore, improving test socket cleaning efficiency while simultaneously shortening machine waiting times and increasing machine productivity has become a pressing technical challenge. Summary of the Invention

[0004] In view of this, an embodiment of the present disclosure provides a chip testing device and a control method thereof.

[0005] To achieve the above objectives, the technical solution of the present disclosure is implemented as follows:

[0006] On the one hand, an embodiment of the present disclosure provides a chip testing device, comprising: a sorting device, comprising a first chamber, the first chamber being used to accommodate a first carrier, and the first carrier is provided with cleaning particles; a testing device, comprising a second chamber and a test socket, the test socket being located in the second chamber, and the second chamber being used to accommodate a second carrier, the testing device being used to electrically connect to a chip to be tested located on the second carrier through the test socket and perform a test operation on the chip to be tested; a transmission component being used to transmit the first carrier between the first chamber and the second chamber; and a control unit being used to control the transmission component to move the first carrier from the first chamber to the second chamber and control the first carrier to perform a cleaning operation on the test socket when the test socket reaches a preset cleaning condition.

[0007] In some embodiments, the sorting device also includes a third chamber, and the third chamber and the first chamber are arranged in sequence along the vertical direction and an isolation door is provided between the third chamber and the first chamber; the control unit is specifically used to control the isolation door to open and control the transmission component to transfer the first carrier from the first chamber via the isolation door and the third chamber to the second chamber when the test socket reaches the preset cleaning condition, and control the cleaning particles on the first carrier to perform the cleaning operation on the test socket.

[0008] In some embodiments, the third chamber is used to perform a first heating operation on the second carrier where the chip that completed the test operation at the first preset temperature is located when the isolation door is closed, so that the temperature of the second carrier and the chip is raised to a second preset temperature; the first preset temperature is lower than -20°C, and the second preset temperature is higher than 0°C.

[0009] In some embodiments, the control unit is also used to control the transmission component to transfer the first carrier from the second chamber via the third chamber and the isolation door to the first chamber and control the isolation door to close after the cleaning operation; a heating component is provided in the first chamber, which is used to perform a second heating operation on the first carrier that completes the cleaning operation at a third preset temperature, so that the temperature of the first carrier is raised to a fourth preset temperature, wherein the third preset temperature is lower than -20°C and the fourth preset temperature is higher than 0°C.

[0010] In some embodiments, the size of the cleaning particles matches the size of the chip to be tested; and the arrangement of the cleaning particles on the first carrier is the same as the arrangement of the chip to be tested on the second carrier.

[0011] In some embodiments, the chip testing device further includes a pressing head; the control unit is specifically configured to control the pressing head to descend so as to press the cleaning particles disposed on the first carrier onto the test socket, so as to perform the cleaning operation on the test socket.

[0012] In some embodiments, the control unit is specifically configured to control the pressure head to rise after the cleaning operation to separate the cleaning particles disposed on the first carrier from the test socket.

[0013] In some embodiments, the transmission component includes a fixed plate, a lifting cylinder and a clamping component located below the fixed plate along the vertical direction and connected to the fixed plate; the lifting cylinder is connected to the clamping component, and the lifting cylinder is used to drive the opening and closing of the clamping component to grab or release the first carrier and lift it along the vertical direction.

[0014] In some embodiments, the transmission component also includes: a cam mechanism; a slider located on opposite sides of the cam mechanism in the horizontal direction; a spring located between the slider and the cam mechanism; the clamping jaw component is connected to the fixed plate through the spring, the slider and the cam mechanism; the cam mechanism is used to control the extension and retraction of the clamping jaw component relative to the fixed plate under the action of the spring and the slider.

[0015] In some embodiments, the volume of the first chamber is smaller than the volume of the third chamber, and the sum of the volumes of the first chamber and the third chamber is equal to or substantially equal to the volume of the second chamber.

[0016] In some embodiments, the sorting device further includes a robot arm, which is used to sort the chips that pass the test and the chips that fail the test.

[0017] On the other hand, an embodiment of the present disclosure also provides a control method for a chip testing device, the control method comprising: providing a sorting device, a testing device and a transmission component; wherein the sorting device comprises a first chamber, the first chamber being used to accommodate a first carrier, and the first carrier is provided with cleaning particles; the testing device comprises a second chamber and a test socket, the test socket is located in the second chamber, and the second chamber is used to accommodate a second carrier, the testing device is used to electrically connect to the chip to be tested located on the second carrier through the test socket and perform a test operation on the chip to be tested; the transmission component is used to transfer the first carrier between the first chamber and the second chamber; control the test socket in the testing device to perform a test operation on the chip to be tested; when the test socket reaches a preset cleaning condition, control the transmission component to move the first carrier from the first chamber to the second chamber and control the first carrier to perform a cleaning operation on the test socket.

[0018] In some embodiments, the sorting device also includes a third chamber, and the third chamber and the first chamber are arranged in sequence in a vertical direction and an isolation door is provided between the third chamber and the first chamber; the control method also includes: when the test socket reaches the preset cleaning condition, controlling the isolation door to open and controlling the transmission component to move the first carrier from the first chamber through the isolation door and the third chamber to the second chamber, and controlling the cleaning particles on the first carrier to perform the cleaning operation on the test socket.

[0019] In some embodiments, the control method further includes: when the isolation door is closed, performing a first heating operation on the second carrier where the chip that completes the test operation at the first preset temperature is located, so that the temperature of the second carrier and the chip is raised to a second preset temperature; wherein the first preset temperature is lower than -20°C and the second preset temperature is higher than 0°C.

[0020] In some embodiments, the control method further includes: after the cleaning operation, controlling the transport component to transfer the first carrier from the second chamber via the third chamber and the isolation door to the first chamber and controlling the isolation door to close; performing a second heating operation on the first carrier that completes the cleaning operation at a third preset temperature to raise the temperature of the first carrier to a fourth preset temperature, wherein the third preset temperature is lower than -20°C and the fourth preset temperature is higher than 0°C.

[0021] The embodiment of the present disclosure provides a chip testing device and a control method thereof. In the embodiment of the present disclosure, a first chamber is provided in a sorting device, and the first chamber is used to accommodate a first carrier, and cleaning particles are provided on the first carrier. When the test socket reaches the preset cleaning condition, the control unit of the chip testing device can automatically control the transmission component to move the first carrier from the first chamber to the second chamber, and control the first carrier to perform a cleaning operation on the test socket. On the one hand, the online automatic cleaning of the test socket is realized, which not only significantly saves manpower and time, but also effectively shortens the waiting time of the machine, thereby greatly improving the production capacity of the machine. On the other hand, it effectively avoids the adverse effects of foreign matter on the test operation of the chip caused by the contamination of the test socket, and further improves the accuracy and efficiency of the test operation. On the third hand, it ensures that the conditions of each cleaning operation are consistent, thereby avoiding the problem of unstable cleaning effect caused by differences in techniques during manual cleaning operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar components or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments according to the present disclosure and should not be regarded as limiting the scope of the present disclosure.

[0023] Figure 1A One of the schematic diagrams of a manual cleaning operation process of a test socket provided by an exemplary embodiment;

[0024] Figure 1B A second schematic diagram of a manual cleaning operation process of a test socket provided by an exemplary embodiment;

[0025] Figure 1CA third schematic diagram of a manual cleaning operation process of a test socket provided by an exemplary embodiment;

[0026] Figure 2 A schematic structural diagram of a chip testing device provided in an embodiment of the present disclosure;

[0027] Figure 3 This is a process diagram of a control method for a chip testing device provided by an embodiment of the present disclosure;

[0028] Figure 4 A second process diagram of a control method for a chip testing device provided by an embodiment of the present disclosure;

[0029] Figure 5 This is a third process diagram of a control method for a chip testing device provided by an embodiment of the present disclosure;

[0030] Figure 6 A fourth process diagram of a method for controlling a chip testing device provided by an embodiment of the present disclosure;

[0031] Figure 7 This is a process diagram of a control method for a chip testing device provided by another embodiment of the present disclosure;

[0032] Figure 8 A second process diagram of a method for controlling a chip testing device according to another embodiment of the present disclosure;

[0033] Figure 9 A schematic diagram of a process of a control method for chip testing equipment provided by another embodiment of the present disclosure;

[0034] Figure 10 A schematic diagram of a cleaning process according to an embodiment of the present disclosure;

[0035] Figure 11 for Figure 10 An enlarged schematic diagram of the structure within the middle dotted circle;

[0036] Figure 12 A flowchart of a control method for chip testing equipment provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0037] The following will clearly and completely describe the technical solutions in the embodiments of the present disclosure in conjunction with the embodiments of the present disclosure and the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present disclosure.

[0038] In the following description, numerous specific details are provided to provide a more thorough understanding of the present disclosure. However, it will be apparent to those skilled in the art that the present disclosure can be practiced without one or more of these details. In other instances, certain technical features known in the art are not described to avoid confusion with the present disclosure; that is, all features of actual embodiments are not described herein, nor are well-known functions and structures described in detail.

[0039] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0040] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to, or coupled to" another element or layer, it may be directly on, adjacent to, connected to, or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to, or directly coupled to" another element or layer, there may be no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part. However, when the second element, component, region, layer, or part is discussed, it does not necessarily mean that the first element, component, region, layer, or part exists in the present disclosure.

[0041] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," etc., may be used herein for convenience of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the drawings is turned over, then the elements or features described as "under" or "beneath" or "beneath" the other elements will be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" can include both the above and below orientations. The device can be oriented otherwise (rotated 90 degrees or in other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0042] The purpose of the terms used herein is only to describe specific embodiments and is not intended to limit the present disclosure. When used herein, the singular forms "a", "an", and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0043] In order to fully understand the present disclosure, detailed steps and detailed structures will be presented in the following description to illustrate the technical solution of the present disclosure. The preferred embodiments of the present disclosure are described in detail below. However, in addition to these detailed descriptions, the present disclosure may also have other implementation methods.

[0044] During manual cleaning of the test socket, workers typically use tape to remove foreign matter by applying it to the surface of the test socket using thumb pressure or with the aid of hand tools. Figures 1A to 1C A schematic diagram of a manual cleaning operation process of a test socket provided by an exemplary embodiment is shown below. Figures 1A to 1C An exemplary description is given.

[0045] like Figure 1A As shown, test socket 102 includes a first insulating layer 104 and a plurality of conductive particles 106. For example, the material of first insulating layer 104 includes, but is not limited to, silicone resin, and conductive particles 106 can be made of a single conductive metal material, such as iron, copper, zinc, chromium, nickel, silver, cobalt, or aluminum, or an alloy of two or more of these metal materials. During chip testing, test socket 102 contacts a printed circuit board (PCB) 100 of a test device and a chip under test (not shown) via conductive particles 106.

[0046] like Figure 1A and Figure 1B As shown, when performing manual cleaning operations on the test operation, the staff usually uses the tape 110 to stick the tape 110 to the surface of the test socket 102 by pressing with the thumb or with the help of a manual tool, so that the tape 110 adheres to the foreign matter 108 on the surface of the test socket 102 .

[0047] like Figure 1C As shown, the tape 110 is separated from the test socket 102 so that the foreign matter 108 on the surface of the test socket 102 can be removed by the tape 110 .

[0048] The aforementioned manual cleaning process presents numerous issues. First, manual cleaning results in excessive test equipment downtime, with downtime of up to four to five hours per test socket cleaning operation. This significantly reduces the overall equipment effectiveness (OEE) of a single unit, severely impacting its production capacity and efficiency. Second, the instability of manual cleaning negatively impacts test socket performance and test accuracy. During the cleaning process, the manual application and removal of tape is difficult to quantify, making it prone to discrepancies. This inconsistency results in suboptimal cleaning results, which in turn impacts test socket performance and test accuracy, increasing the uncertainty of test results. Finally, to prevent rapid degradation of test socket performance caused by rapid temperature changes, complex temperature control is required. For example, when switching from testing to cleaning, to prevent rapid degradation of test socket performance due to temperature fluctuations exceeding 150°C and a rate of change exceeding 1°C / min, the temperature control system of the sorting device must be forcibly shut down, allowing the temperature in the test socket area to drop from operating temperature to room temperature. Furthermore, when the temperature in the test socket area is low (e.g., -30°C), it must first be heated to a preset temperature (e.g., 105°C) and maintained for a certain period (e.g., 40-60 minutes) to eliminate moisture before being cooled back to room temperature. These temperature control operations are not only time-consuming but also increase equipment maintenance costs and operational complexity, further reducing production efficiency.

[0049] Based on one or more of the above technical problems, the embodiments of the present disclosure provide a chip testing device and a control method thereof.

[0050] It should be noted that for ease of description, various directions that may be used in the following description are first defined. A vertical direction (Z direction) is defined in a plane perpendicular to the carrier (the first carrier or the second carrier), and a horizontal direction (for example, the intersecting X and Y directions) is defined in a plane parallel to the tray. The X, Y, and Z directions can be perpendicular to each other.

[0051] Figure 2 A schematic diagram of the structure of a chip testing device provided in an embodiment of the present disclosure is shown in FIG. Figure 2As shown, the chip testing equipment includes: a sorting device 208, including a first chamber 210, the first chamber 210 is used to accommodate a first carrier, and the first carrier is provided with cleaning particles; a testing device 202, including a second chamber 204 and a test socket 206, the test socket 206 is located in the second chamber 204, and the second chamber 204 is used to accommodate a second carrier, the testing device 202 is used to electrically connect to the chip to be tested on the second carrier through the test socket 206 and perform a test operation on the chip to be tested; a transmission component 214, used to transmit the first carrier between the first chamber 210 and the second chamber 204; a control unit 216, used to control the transmission component 214 to move the first carrier from the first chamber 210 to the second chamber 204 and control the first carrier to perform a cleaning operation on the test socket 206 when the test socket 206 reaches a preset cleaning condition.

[0052] In some embodiments, the preset cleaning condition can be when a preset time interval (e.g., two weeks) has elapsed, or when the test result of the test apparatus 202 on the chip under test is lower than a preset test yield. The preset cleaning condition can be selected based on actual needs and is not specifically limited in the present embodiment.

[0053] It should be noted that, in this embodiment, the control unit may include but is not limited to a programmable logic controller (PLC), a microcontroller unit (MCU) or a central processing unit (CPU), and can be selected according to actual needs.

[0054] In an embodiment of the present disclosure, a first chamber is provided in a sorting device, and the first chamber is used to accommodate a first carrier, on which cleaning particles are provided. When the test socket reaches the preset cleaning conditions, the control unit of the chip testing equipment can automatically control the transmission component to move the first carrier from the first chamber to the second chamber, and control the first carrier to perform a cleaning operation on the test socket. On the one hand, online automatic cleaning of the test socket is realized, which not only significantly saves manpower and time, but also effectively shortens the waiting time of the machine, thereby greatly improving the production capacity of the machine. On the other hand, the adverse effects of foreign matter on the test socket on the chip test operation are effectively avoided, further improving the accuracy and efficiency of the test operation. On the other hand, the conditions for each cleaning operation are ensured to be consistent, thereby avoiding the problem of unstable cleaning effect caused by differences in techniques during manual cleaning operations.

[0055] In some embodiments, as Figure 2As shown, the sorting device 208 also includes a third chamber 212, and the third chamber 212 and the first chamber 210 are arranged in sequence along the vertical direction, and an isolation door 218 is provided between the third chamber 212 and the first chamber 210; the control unit 216 is specifically used to control the isolation door 218 to open and control the transmission component 214 to transfer the first carrier from the first chamber 210 to the second chamber 204 via the isolation door 218 and the third chamber 212 when the test socket 206 reaches the preset cleaning condition, and control the cleaning particles on the first carrier to perform a cleaning operation on the test socket 206.

[0056] In some embodiments, the control unit 216 is coupled to the isolation door 218. For example, the control unit 216 controls a valve on the isolation door 218 to open and close the isolation door 218.

[0057] In some embodiments, the duration of the cleaning operation is 5 min-10 min. More specifically, the duration of each cleaning operation can be 5 min, 6 min, 7 min, 8 min, 9 min or 10 min.

[0058] In some embodiments, as Figure 2 As shown, the chip testing equipment further includes a fourth chamber 220. Exemplarily, the fourth chamber 220 serves as a pre-heating chamber, which can preheat the chip to be tested to a temperature close to the test temperature, reduce temperature fluctuations in the second chamber, shorten test preparation time, and improve test efficiency and accuracy.

[0059] In some embodiments, the first and second carriers are compatible. In other words, they can share the same equipment interfaces, transmission systems, and operational procedures. Specifically, the first and second carriers can be used in different chambers of chip testing equipment without requiring significant equipment modifications or adjustments. This ensures seamless switching between different operational phases (such as cleaning and testing), effectively improving equipment utilization, streamlining operational procedures, reducing equipment costs, and increasing production efficiency and flexibility.

[0060] In some embodiments, the sorting device further includes a robot arm, which is used to sort the chips that pass the test and the chips that fail the test.

[0061] In some embodiments, during the testing operation, the path of the second carrier is the dotted path (a) and the dotted path (b), and during the cleaning operation, the path of the first carrier is also the dotted path (a) and the dotted path (b).

[0062] In some embodiments, as Figure 2 and Figure 9As shown, during the execution of the test operation, the control unit 216 controls the transmission component 214 to move the idle second carrier from the third chamber 212 to the loading / unloading area 213, the control unit 216 controls the robot to load the chip to be tested onto the second carrier and controls the transmission component 214 to move the second carrier loaded with the chip to be tested into the second chamber 204 via the fourth chamber 220. After the test operation, the control unit 216 controls the transmission component 214 to transfer the second carrier loaded with the chip to be tested to the third chamber 212, and controls the robot to sort the chips that pass the test and the chips that fail the test in the loading / unloading area 213.

[0063] In some embodiments, during periods other than cleaning operations, a first carrier with cleaning particles is placed in the first chamber. When the test socket reaches a predetermined cleaning condition, the control unit 216 controls the isolation door 218 to open and the transport component 214 to transfer the first carrier from the first chamber 210 to the second chamber 204 via the isolation door 218, the third chamber 212, and the fourth chamber 220. The cleaning particles on the first carrier are then used to clean the test socket 206. After the cleaning operation, the control unit 216 controls the transport component 214 to return the first carrier to the first chamber 210 via the third chamber 212 and the isolation door 218.

[0064] It should be noted that during the cleaning operation, the first carrier passes through the loading / unloading area 213, but no loading or unloading operations are performed on the first carrier. In some embodiments, a weight sensor can be provided in the loading / unloading area 213 to detect whether the carrier type is the first carrier with cleaning particles or the second carrier, so as to quickly identify and classify different types of carriers, avoid unnecessary loading or unloading operations on the first carrier and contamination of the chips to be tested, and improve the operating efficiency and reliability of the equipment.

[0065] In some embodiments, the third chamber 212 is used to perform a first heating operation on the second carrier where the chip that has completed the test operation at the first preset temperature is located when the isolation door 218 is closed, so as to increase the temperature of the second carrier and the chip to a second preset temperature; the first preset temperature is lower than -20°C, and the second preset temperature is higher than 0°C.

[0066] In some embodiments, when the test operation is performed at a low temperature of a first preset temperature, a first heating operation is performed on the second carrier and the chip in the third chamber after the test operation to protect the second carrier and the chip from thermal stress, thereby preventing damage to the chip and extending the service life of the second carrier. For example, the first preset temperature may be -25°C, -30°C, -35°C, or -40°C, and the second preset temperature may be 10°C, 15°C, 20°C, or 25°C.

[0067] For example, the test operation may be a low temperature operating life (LTOL) test, which is used to verify the performance of the chip at extremely low temperatures (e.g., -40°C) to ensure its stability and reliability under extreme low temperature conditions. The first preset temperature is -40°C.

[0068] It should be noted that the selection of the second preset temperature needs to comprehensively consider the material properties of the chip, test requirements, and device compatibility. The specific second preset temperature needs to be adjusted according to actual application.

[0069] In some embodiments, the control unit 216 is also used to control the transmission component 214 to transfer the first carrier from the second chamber 204 via the third chamber 212 and the isolation door 218 to the first chamber 210 and control the isolation door 218 to close after the cleaning operation; a heating component is provided in the first chamber 210, which is used to perform a second heating operation on the first carrier that completes the cleaning operation at the third preset temperature, so that the temperature of the first carrier is increased to a fourth preset temperature, wherein the third preset temperature is lower than -20°C and the fourth preset temperature is higher than 0°C.

[0070] In some embodiments, when the cleaning operation is performed at a low temperature test using a third preset temperature, a second heating operation is performed on the first carrier in the first chamber after the cleaning operation to protect the first carrier from thermal stress and extend the service life of the first carrier. For example, the third preset temperature may be -25°C, -30°C, -35°C, or -40°C, and the fourth preset temperature may be 10°C, 15°C, 20°C, or 25°C.

[0071] In some embodiments, to reduce thermal stress and energy consumption of the device, the ambient temperatures of the testing operation and the cleaning operation are close to or equal to avoid a large temperature difference between the cleaning operation and the testing operation, which requires frequent temperature adjustments when the device is switched.

[0072] Exemplarily, the first preset temperature is equal to the third preset temperature, and the second preset temperature is equal to the fourth preset temperature.

[0073] In some embodiments, the size of the cleaning particles matches the size of the chip to be tested, and the arrangement of the cleaning particles on the first carrier is the same as the arrangement of the chip to be tested on the second carrier. This allows for precise positioning of the test sockets and the chip to be tested during testing, thereby improving cleaning efficiency, effectively enhancing the effectiveness of cleaning the test sockets, and ensuring the accuracy and reliability of subsequent testing operations.

[0074] In some embodiments, as Figure 3 、 Figure 4 、 Figure 5 and Figure 6 As shown, the volume of the first chamber 210 is smaller than the volume of the third chamber 212. For example, the first chamber 210 is used to accommodate a first carrier tray 228, and the third chamber is used to accommodate the first carrier tray 228 and / or the second carrier tray 230. The first chamber 210 is provided with two groups of four carrier tracks 232 for carrying the first carrier tray 228. The third chamber 212 is provided with four groups of eight carrier tracks 234 for carrying the first carrier tray 228 and / or the second carrier tray 230.

[0075] The first chamber 210 is designed to be relatively small, specifically for accommodating the first carrier tray 228, thereby saving space and improving the overall compactness of the device. The third chamber 212 is designed to be relatively large, accommodating both the first carrier tray 228 and the second carrier tray 230, thereby increasing the flexibility of the device and allowing the use of carrier trays to be adjusted as needed, thereby improving the flexibility and efficiency of the device.

[0076] In some embodiments, as Figure 2 As shown, the sum of the volumes of the first chamber 210 and the third chamber 212 is equal to or substantially equal to the volume of the second chamber 204. This avoids increasing the overall size of the chip testing equipment and ensures compactness and space utilization of the chip testing equipment.

[0077] It should be noted that the term "equal" or "substantially equal" in this article should be understood as equal within the allowable range of process error. For example, the sum of the volumes of the first chamber 210 and the third chamber 212 is "equal" or "substantially equal" to the volume of the second chamber 204 should be understood as the sum of the volumes of the first chamber 210 and the third chamber 212 is equal to the volume of the second chamber 204. Alternatively, when there is a deviation between the sum of the volumes of the first chamber 210 and the third chamber 212 and the volume of the second chamber 204 within the allowable range of process error, the sum of the volumes of the first chamber 210 and the third chamber 212 is also considered to be equal to the volume of the second chamber 204.

[0078] In some embodiments, as Figure 10 and Figure 11 As shown, the chip testing equipment further includes a pressing head 236 ; the control unit 216 is specifically used to control the pressing head 236 to descend so as to press the cleaning particles 240 provided on the first carrier (not shown) onto the test socket 206 , so that the cleaning particles 240 adhere to the foreign matter 242 on the surface of the test socket 206 to perform a cleaning operation on the test socket 206 .

[0079] In some embodiments, as Figure 10 and Figure 11 As shown, the test socket 206 includes a second insulating layer 2061 and a plurality of probes 2062 .

[0080] In some embodiments, the control unit 216 is specifically configured to control the pressure head 236 to rise after the cleaning operation to separate the cleaning particles 240 disposed on the first carrier (not shown) from the test socket 206 , so that the cleaning particles 240 carry away foreign matter 242 on the surface of the test socket 206 .

[0081] Here, the foreign matter 242 mainly includes tin slag and adhesive on the bumps or solder balls of integrated circuit products, as well as dust and fibers in the air.

[0082] In some embodiments, the cleaning particles 240 are attached to a first surface of the adhesion layer 239 along a vertical direction, and a second surface of the adhesion layer 239 opposite to the first surface along a vertical direction is adhered to the first carrier.

[0083] In some embodiments, as Figure 3 、 Figure 4 、 Figure 5 and Figure 6 As shown, the transmission component 214 includes a fixed plate 222, a lifting cylinder 224 and a clamping component 226 located below the fixed plate 222 in the vertical direction and connected to the fixed plate 222; the lifting cylinder 224 and the clamping component 226 are connected, and the lifting cylinder 224 is used to drive the opening and closing of the clamping component 226 to grab or release the first carrier and lift it in the vertical direction.

[0084] In some embodiments, the lifting cylinder 224 is a double-stroke cylinder.

[0085] like Figure 3 and Figure 4 As shown, the first stroke of the lifting cylinder 224 is to descend vertically to the height of the first carrier 228 in the first chamber 210 , the clamping member 226 closes to grab the first carrier 228 , and the control unit controls the isolation door 218 to open.

[0086] In some embodiments, the tray rail 232 in the first chamber 210 moves in a horizontal direction to disengage the first tray 228 .

[0087] like Figure 4 and Figure 5 As shown, the second stroke of the lifting cylinder 224 is to descend vertically to the top level of the third chamber 212 , and the clamping member 226 opens to release the first carrier 228 onto the carrier rail 234 .

[0088] like Figure 5 and Figure 6 As shown, the clamping claw member 226 returns to the top level in the first chamber 210 along the vertical direction along with the lifting cylinder 224, and the control unit controls the isolation door 218 to close.

[0089] In some embodiments, as Figure 7 and Figure 8 As shown, the transmission component 214 also includes: a cam mechanism 238; a slider 235, located on two opposite sides of the cam mechanism 238 in the horizontal direction; a spring 237, located between the slider 235 and the cam mechanism 238; the clamping jaw component 226 is connected to the fixed plate 222 through the spring 237, the slider 235 and the cam mechanism 238; the cam mechanism 238 is used to control the extension and contraction of the clamping jaw component 226 relative to the fixed plate 222 under the action of the spring 237 and the slider 235.

[0090] For example, Figure 8 As shown, when the clamping jaw part 226 needs to be closed, the cam mechanism 238 rotates to push the clamping jaw part 226 to extend in the vertical direction relative to the fixing plate 222, and at the same time, the elastic force of the stretched spring 237 fixes the clamping jaw part 226 and the cam mechanism 238.

[0091] For example, Figure 7 As shown, when the clamping jaw member 226 needs to be opened to release the gripped carrier (eg, the first carrier 228 ), the cam mechanism 238 rotates to its original position, and the elastic force of the spring 237 pulls the clamping jaw member 226 back to its original position.

[0092] It should be noted that the connection method between the lifting cylinder and the fixed plate in the embodiment of the present disclosure is not limited to Figure 7 and Figure 8 The connection method between the lifting cylinder 224 and the fixing plate 222 is also not limited to Figures 3 to 6 In fact, other connection methods that are not shown in the figure can also be used to realize the functions of the transmission component, so as to ensure that the most appropriate connection method can be selected according to specific needs in different application scenarios, thereby improving the applicability and reliability of the device.

[0093] Figure 12 A flow chart of a control method for a chip testing device provided in an embodiment of the present disclosure, referring to Figure 12 , the control method comprises the following steps:

[0094] Step S121: providing a sorting device, a testing device, and a transmission component;

[0095] Among them, the sorting device includes a first chamber, the first chamber is used to accommodate a first carrier, and the first carrier is provided with cleaning particles; the testing device includes a second chamber and a test socket, the test socket is located in the second chamber, and the second chamber is used to accommodate a second carrier, the testing device is used to electrically connect to the chip to be tested on the second carrier through the test socket and perform test operations on the chip to be tested; the transmission component is used to transfer the first carrier between the first chamber and the second chamber.

[0096] Step S122: controlling the test socket in the test device to perform a test operation on the chip to be tested;

[0097] Step S123: When the test socket reaches a preset cleaning condition, the transmission component is controlled to move the first carrier from the first chamber to the second chamber and the first carrier is controlled to perform a cleaning operation on the test socket.

[0098] The structures and compositions of the sorting device, the testing device and the transmission component of the chip testing equipment can be referred to in the aforementioned embodiments. Figures 2 to 11 For the sake of brevity, I will not go into details.

[0099] In some embodiments, as Figure 2 As shown, the sorting device 208 also includes a third chamber 212, and the third chamber 212 and the first chamber 210 are arranged in sequence along the vertical direction and an isolation door 218 is provided between the third chamber 212 and the first chamber 210; the control method of the chip testing equipment also includes: when the test socket 206 reaches the preset cleaning condition, controlling the isolation door 218 to open and controlling the transmission component 214 to move the first carrier from the first chamber 210 through the isolation door 218 and the third chamber 212 to the second chamber 204, and controlling the cleaning particles on the first carrier to perform a cleaning operation on the test socket 206.

[0100] In some embodiments, during the testing operation, the path of the second carrier is the dotted path (a) and the dotted path (b), and during the cleaning operation, the path of the first carrier is also the dotted path (a) and the dotted path (b).

[0101] In some embodiments, as Figure 2 and Figure 9 As shown, during the execution of the test operation, the control transmission component moves the idle second carrier from the third chamber 212 to the loading / unloading area 213, controls the robot to load the chip to be tested onto the second carrier and controls the transmission component to move the second carrier loaded with the chip to be tested into the second chamber 204 via the fourth chamber 220; controls the test socket in the test device to perform the test operation on the chip to be tested; after the test operation, controls the transmission component to transfer the second carrier loaded with the chip to be tested to the third chamber 212, and controls the robot to sort the chips that pass the test and the chips that fail the test in the loading / unloading area 213.

[0102] In some embodiments, during periods other than cleaning operations, a first carrier containing cleaning particles is placed in the first chamber. When the test socket reaches a predetermined cleaning condition, the isolation door 218 is controlled to open and the transport component 214 is controlled to transfer the first carrier from the first chamber 210 through the isolation door 218, the third chamber 212, and the fourth chamber 220 to the second chamber 204. The cleaning particles on the first carrier are controlled to perform a cleaning operation on the test socket 206. After the cleaning operation, the transport component 214 is controlled to return the first carrier to the first chamber 210 via the third chamber 212 and the isolation door 218.

[0103] In some embodiments, the control method of the chip testing equipment also includes: when the isolation door 218 is closed, performing a first heating operation on the second carrier where the chip that has completed the test operation at the first preset temperature is located, so that the temperature of the second carrier and the chip is raised to a second preset temperature; wherein the first preset temperature is lower than -20°C and the second preset temperature is higher than 0°C.

[0104] In some embodiments, when the test operation is performed at a low temperature of a first preset temperature, a first heating operation is performed on the second carrier and the chip in the third chamber after the test operation to protect the second carrier and the chip from thermal stress, thereby preventing damage to the chip and extending the service life of the second carrier. For example, the first preset temperature may be -25°C, -30°C, -35°C, or -40°C, and the second preset temperature may be 10°C, 15°C, 20°C, or 25°C.

[0105] For example, the test operation may be a low temperature burn-in test (LTOL), which is used to verify the performance of the chip at extremely low temperatures (e.g., -40°C) to ensure its stability and reliability under extreme low temperature conditions. The first preset temperature is -40°C.

[0106] In some embodiments, the control method of the chip testing equipment also includes: after the cleaning operation, controlling the transmission component to transfer the first carrier from the second chamber via the third chamber and the isolation door to the first chamber and controlling the isolation door to close; performing a second heating operation on the first carrier that completes the cleaning operation at the third preset temperature to increase the temperature of the first carrier to a fourth preset temperature, wherein the third preset temperature is lower than -20°C and the fourth preset temperature is higher than 0°C.

[0107] In some embodiments, when the cleaning operation is performed at a low temperature test using a third preset temperature, a second heating operation is performed on the first carrier in the first chamber after the cleaning operation to protect the first carrier from thermal stress and extend the service life of the first carrier. For example, the third preset temperature may be -25°C, -30°C, -35°C, or -40°C, and the fourth preset temperature may be 10°C, 15°C, 20°C, or 25°C.

[0108] In some embodiments, to reduce thermal stress and energy consumption of the device, the ambient temperatures of the testing operation and the cleaning operation are close to or equal to avoid a large temperature difference between the cleaning operation and the testing operation, which requires frequent temperature adjustments when the device is switched.

[0109] Exemplarily, the first preset temperature is equal to the third preset temperature, and the second preset temperature is equal to the fourth preset temperature.

[0110] In some embodiments, the duration of the cleaning operation is 5 min-10 min. More specifically, the duration of each cleaning operation can be 5 min, 6 min, 7 min, 8 min, 9 min or 10 min.

[0111] The chip testing equipment used in the control method of the chip testing equipment provided in the embodiment of the present disclosure is the same as or similar to the chip testing equipment in the aforementioned embodiments. For the technical features not fully disclosed in the embodiment of the present disclosure, please refer to the chip testing equipment in the aforementioned embodiments for understanding, and no further details will be given here.

[0112] The control method for chip testing equipment provided in the disclosed embodiments firstly enables online automatic cleaning of test sockets, significantly saving manpower and time while also effectively shortening machine waiting times, thereby significantly increasing machine production capacity. Secondly, it effectively prevents the adverse effects of foreign matter contaminating the test sockets on chip testing operations, further improving the accuracy and efficiency of testing operations. Thirdly, it ensures consistent cleaning conditions for each cleaning operation, thereby avoiding the problem of unstable cleaning results caused by differences in cleaning techniques during manual cleaning operations.

[0113] It should be understood that “one embodiment” or “an embodiment” mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, “in one embodiment” or “in an embodiment” appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present disclosure, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are for description only and do not represent the advantages and disadvantages of the embodiments.

[0114] The above description is only a preferred embodiment of the present disclosure and does not limit the patent scope of the present disclosure. All equivalent structural transformations made by using the contents of the present disclosure and the drawings under the inventive concept of the present disclosure, or direct / indirect application in other related technical fields are included in the patent protection scope of the present disclosure.

Claims

1. A chip testing device, characterized in that: include: The sorting device includes a first chamber and a third chamber, wherein the third chamber and the first chamber are arranged in sequence in a vertical direction and an isolation door is provided between the third chamber and the first chamber; the first chamber is used to accommodate a first carrier plate, and the first carrier plate is provided with cleaning particles; The test device includes a second chamber and a test socket, wherein the test socket is located in the second chamber and the second chamber is used to accommodate a second carrier. The test device is used to electrically connect to a chip to be tested on the second carrier through the test socket and perform a test operation on the chip to be tested. The third chamber is used to perform a first heating operation on the second carrier on which the chip to be tested has completed the test operation at a first preset temperature when the isolation door is closed, so as to raise the temperature of the second carrier and the chip to a second preset temperature. a transport component, configured to transport the first carrier between the first chamber and the second chamber; The control unit is used to control the isolation door to open and the transmission component to transfer the first carrier from the first chamber to the second chamber via the isolation door and the third chamber when the test socket reaches a preset cleaning condition, and to control the cleaning particles on the first carrier to perform a cleaning operation on the test socket.

2. The chip testing device according to claim 1, characterized in that: The first preset temperature is lower than -20°C, and the second preset temperature is higher than 0°C.

3. The chip testing device according to claim 1 or 2, characterized in that: The control unit is further configured to control the transport component to transfer the first carrier from the second chamber to the first chamber via the third chamber and the isolation door after the cleaning operation, and to control the isolation door to close; A heating component is provided in the first chamber for performing a second heating operation on the first carrier that completes the cleaning operation at a third preset temperature, so as to raise the temperature of the first carrier to a fourth preset temperature, wherein the third preset temperature is lower than -20°C and the fourth preset temperature is higher than 0°C.

4. The chip testing device according to claim 1 or 2, characterized in that: The size of the cleaning particles matches the size of the chip to be tested; the arrangement of the cleaning particles on the first carrier is the same as the arrangement of the chip to be tested on the second carrier.

5. The chip testing device according to claim 1 or 2, characterized in that: The chip testing equipment further includes an indenter; The control unit is specifically configured to control the pressure head to descend so as to press the cleaning particles disposed on the first carrier onto the test socket, so as to perform the cleaning operation on the test socket.

6. The chip testing device according to claim 5, characterized in that: The control unit is specifically configured to control the pressure head to rise after the cleaning operation to separate the cleaning particles disposed on the first carrier from the test socket.

7. The chip testing device according to claim 1 or 2, characterized in that: The transmission component includes a fixed plate, a lifting cylinder and a clamping claw component located below the fixed plate in a vertical direction and connected to the fixed plate; The lifting cylinder is connected to the clamping claw component, and the lifting cylinder is used to drive the clamping claw component to open and close to grab or release the first carrier plate and lift it up and down along the vertical direction.

8. The chip testing device according to claim 7, characterized in that: The transmission component also includes: Cam mechanism; Slide blocks are located on opposite sides of the cam mechanism in the horizontal direction; a spring located between the slider and the cam mechanism; the clamping jaw component is connected to the fixed plate via the spring, the slider and the cam mechanism; The cam mechanism is used to control the clamping jaw component to expand and contract relative to the fixing plate under the action of the spring and the slider.

9. The chip testing device according to claim 1 or 2, characterized in that: The volume of the first chamber is smaller than the volume of the third chamber, and the sum of the volumes of the first chamber and the third chamber is equal to or substantially equal to the volume of the second chamber.

10. The chip testing device according to claim 1 or 2, characterized in that: The sorting device further includes a robot arm, which is used to sort the chips that pass the test and the chips that fail the test.

11. A control method for a chip testing device, characterized in that: The control method includes: A sorting device, a testing device, and a transport component are provided; wherein the sorting device includes a first chamber and a third chamber, the third chamber and the first chamber being arranged in sequence in a vertical direction, and an isolation door being provided between the third chamber and the first chamber; the first chamber is used to accommodate a first carrier, and the first carrier is provided with cleaning particles; the testing device includes a second chamber and a test socket, the test socket being located in the second chamber, and the second chamber being used to accommodate a second carrier, the testing device being used to electrically connect to a chip to be tested on the second carrier through the test socket and perform a test operation on the chip to be tested; the transport component is used to transport the first carrier between the first chamber and the second chamber; Controlling the test socket in the test device to perform a test operation on the chip to be tested; When the test socket reaches a preset cleaning condition, controlling the isolation door to open and controlling the transport component to transfer the first carrier from the first chamber to the second chamber via the isolation door and the third chamber, and controlling the cleaning particles on the first carrier to perform a cleaning operation on the test socket; After the test operation, the isolation door is controlled to be closed, and a first heating operation is performed on the second carrier where the chip that completed the test operation at the first preset temperature is located through the third chamber, so that the temperature of the second carrier and the chip is increased to a second preset temperature.

12. The control method of chip testing equipment according to claim 11, characterized in that: The first preset temperature is lower than -20°C, and the second preset temperature is higher than 0°C.

13. The control method of chip testing equipment according to claim 11, characterized in that: The control method further includes: After the cleaning operation, controlling the transport component to transfer the first carrier from the second chamber to the first chamber via the third chamber and the isolation door, and controlling the isolation door to close; A second heating operation is performed on the first carrier that completes the cleaning operation at the third preset temperature to increase the temperature of the first carrier to a fourth preset temperature, wherein the third preset temperature is lower than -20°C and the fourth preset temperature is higher than 0°C.

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