Pressure applying jig of chip and pressure applying reflow soldering method thereof

By applying pressure to the chip packaging structure through the pressure gutter, the problem of low coverage of soldering thermal interface materials during reflow soldering is solved, and higher coverage and reliability are achieved.

CN120395030APending Publication Date: 2025-08-01HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202410158225.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-02-01
Publication Date
2025-08-01

AI Technical Summary

Technical Problem

During the reflow soldering of soldering thermal interface materials, thermal deformation of the chip results in a low coverage of the thermal interface materials on the chip surface, affecting the heat dissipation efficiency and reliability.

Method used

The pressure gutter is used to apply pressure to the chip packaging structure through the vehicle and cover plate to suppress thermal deformation of the chip, ensure uniform overflow of the thermal interface material and cover the chip surface, improving coverage and reliability.

Benefits of technology

It effectively suppresses thermal deformation of the chip, improves the consistency of coverage and coverage of thermal interface materials on the chip surface, and improves the reliability of reflow soldering.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a pressure applying jig of a chip and a pressure applying reflow soldering method of the pressure applying jig, relates to the technical field of chips, and aims to improve the coverage rate of a thermal interface material layer on the surface of the chip and improve the reliability of reflow soldering. The pressure applying jig comprises a carrier and a cover plate, and the cover plate is arranged above the carrier. The carrier is used for bearing the chip packaging structure, the chip packaging structure comprises a substrate, a chip, a thermal interface material layer and a heat dissipation cover which are arranged in a stacked mode in the first direction, the chip packaging structure further comprises a first surface and a second surface which are opposite in the first direction, the carrier abuts against the first surface, and the cover plate abuts against the second surface. And applying pressure to the chip packaging structure through the carrier and the cover plate. The pressure applying jig can be used for reflow soldering of a chip packaging structure so as to realize soldering of a chip and a heat dissipation cover by a thermal interface material layer.
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Description

Technical Field

[0001] This application relates to the field of chip technology, and in particular, to a pressing fixture for a chip and a pressing reflow soldering method therefor. Background Art

[0002] With the continuous increase in chip power consumption and the continuous increase in heat dissipation risk, the industry's demand for applying high-thermal-conductivity and high-reliability heat dissipation materials in chip packaging structures is becoming more and more urgent.

[0003] Inside the chip packaging structure, the thermal interface material (TIM) located between the chip die back and the heat sink cover is often the key to chip heat dissipation. Compared with traditional silicon-based thermal interface materials, the soldering-type thermal interface material has lower thermal resistance and higher contact reliability. The key to giving full play to the advantages of the soldering-type thermal interface material is to ensure a high coverage rate of the thermal interface material between the chip and the heat sink cover.

[0004] However, during the reflow soldering process of the soldering-type thermal interface material, the chip will deform when heated, and the soldering difficulty increases with the increase of factors such as the coefficient of thermal expansion (CTE) of the packaging substrate, the size of the chip packaging structure, and the reflow temperature, resulting in a low coverage rate of the thermal interface material on the chip surface. Based on this, how to improve the coverage rate of the thermal interface material on the chip surface and the reliability of reflow soldering has become an urgent problem in the field. Summary of the Invention

[0005] Embodiments of this application provide a pressing fixture for a chip and a pressing reflow soldering method therefor, aiming to improve the coverage rate of the thermal interface material layer on the surface of the chip and the reliability of reflow soldering.

[0006] To achieve the above object, the embodiments of this application adopt the following technical solutions:

[0007] In a first aspect, a pressing fixture for a chip is provided. The pressing fixture includes a carrier and a cover plate, and the cover plate is disposed above the carrier. The carrier is used to carry a chip packaging structure. Along a first direction, the chip packaging structure includes a substrate, a chip, a thermal interface material layer, and a heat sink cover stacked in sequence, and along the first direction, the chip packaging structure further includes opposite first and second surfaces. The carrier abuts against the first surface, and the cover plate abuts against the second surface, and pressure is applied to the chip packaging structure through the carrier and the cover plate.

[0008] In the above embodiments of the present application, during the reflow soldering process, the pressing fixture together with the chip packaging structure is placed in a high-temperature mechanism, and the preform for forming the thermal interface material layer melts into a liquid thermal interface material. Pressure is applied to the chip packaging structure through the carrier and the cover plate. By utilizing the transmission effect of the pressure, the pressure acts on the surface of the chip, which can inhibit the thermal deformation of the chip, reduce the warping phenomenon in the corner area of the chip, and the liquid thermal interface material is not likely to flow out from the corner area of the chip, which is beneficial to the uniform overflow of the thermal interface material. After the thermal interface material solidifies, a thermal interface material layer is formed. The thermal interface material layer can cover the corner area of the chip, which can improve the coverage rate of the thermal interface material layer on the surface of the chip and enhance the reliability of the reflow soldering.

[0009] Moreover, when the above pressing fixture is used for reflow soldering of multiple chips, the deformation amounts generated by the multiple chips during the reflow soldering process are relatively small, and the deformation amounts of different chips are close to each other. As a result, the coverage rates of the thermal interface material layers on the surfaces of different chips are similar, improving the consistency of the coverage rate.

[0010] In some embodiments, the carrier includes a first magnet, and the cover plate includes a second magnet. The first magnet and the second magnet attract each other to generate a magnetic force, and this magnetic force is transmitted to the chip packaging structure through the carrier and the cover plate, enabling the pressure to act on the surface of the chip, thereby suppressing the thermal deformation of the chip.

[0011] In some embodiments, the cover plate includes a seat body, a spring, and a pressing block. A receiving groove is provided on the surface of the seat body close to the carrier. The spring and the pressing block are arranged in the receiving groove, and the spring is located between the seat body and the pressing block. The pressing block abuts against the second surface of the chip packaging structure. Under the action of the spring force of the spring, the pressing block presses the surface of the chip packaging structure, enabling the pressure to act on the surface of the chip, thereby suppressing the thermal deformation of the chip.

[0012] In some embodiments, the pressing fixture further includes a buckle having a clamping groove. The carrier includes a third surface on the side away from the cover plate, and the cover plate includes a fourth surface on the side away from the carrier. The third surface and the fourth surface respectively abut against the inner wall of the clamping groove. By applying a mechanical force to the third surface of the carrier and the fourth surface of the cover plate using the buckle, equivalently, by "squeezing" the carrier and the cover plate through the buckle, the carrier and the cover plate "squeeze" the chip packaging structure, and the pressure acts on the surface of the chip, thereby suppressing the thermal deformation of the chip.

[0013] In some embodiments, the pressing fixture further includes a pressing member arranged on the side of the cover plate away from the carrier. By applying pressure to the cover plate using the pressing member, this pressure is transmitted to the chip packaging structure through the cover plate, enabling the pressure to act on the surface of the chip, thereby suppressing the thermal deformation of the chip.

[0014] In some embodiments, the carrier includes a bottom plate that abuts against the first surface of the chip package structure. The bottom plate has a solid structure, ensuring that the bottom plate has sufficient structural strength to rigidly support and exert pressure on the chip package structure.

[0015] In some embodiments, the bottom plate has a hollowed-out structure, and the interior of the carrier can communicate with the external environment through the hollowed-out part, so that the air pressure inside the carrier remains close to or reaches the external atmospheric pressure, avoiding damage to the chip package structure caused by the increase in air pressure inside the carrier at high temperatures. Moreover, by setting the bottom plate to have a hollowed-out structure, the materials required for preparing the carrier can be saved, and the mass of the carrier can be reduced.

[0016] In some embodiments, the bottom plate is provided with a plurality of through holes. Along the first direction, each through hole penetrates the bottom plate, and the plurality of through holes are arranged in an array.

[0017] In some embodiments, the bottom plate includes a plurality of connected ribs, and there are hollows between the plurality of ribs.

[0018] In some embodiments, the surface of the bottom plate that abuts against the chip package structure is a plane, and the bottom plate can be in contact with the entire surface of the chip package structure, which is beneficial to improving the uniform stress distribution on each area of the surface of the chip package structure and better suppressing the thermal deformation of each area of the chip.

[0019] In some embodiments, the bottom plate includes a first protruding portion, and the first protruding portion is disposed on the surface of the bottom plate close to the cover plate, and the first protruding portion abuts against the first surface of the chip package structure.

[0020] The first protruding portion of the bottom plate can support and exert pressure on the chip package structure to suppress the thermal deformation of the chip package structure. Moreover, since the first protruding portion is in local contact with the chip package structure, a certain deformation space can be provided for the chip package structure. When the amount of deformation is allowed, it is beneficial to release the internal stress of the chip package structure and avoid damage to the internal structure of the chip package structure caused by stress concentration.

[0021] In some embodiments, the first protruding portion is a boss, a convex ring, a convex rib, a stepped structure or a curved surface protrusion.

[0022] In some embodiments, the carrier further includes a side wall that surrounds the bottom plate. Along the perimeter of the bottom plate, the side wall has a continuous structure, or the side wall includes a plurality of disconnected sub-side walls. The side wall plays a role in limiting the displacement, which can limit the displacement of the chip package structure and ensure that the chip package structure is located inside the carrier.

[0023] In some embodiments, the surface of the cover plate that abuts against the chip packaging structure is a flat surface, and the cover plate can be in contact with the entire surface of the chip packaging structure, which is beneficial to improving the uniformity of the force on each region of the surface of the chip packaging structure and better suppressing the thermal deformation of each region of the chip.

[0024] In some embodiments, the cover plate includes a second protrusion, and the second protrusion is disposed on the surface of the cover plate close to the carrier, and the second protrusion abuts against the second surface of the chip packaging structure.

[0025] The second protrusion of the cover plate can exert pressure on the chip packaging structure to suppress the thermal deformation of the chip packaging structure. Moreover, since the second protrusion is in local contact with the chip packaging structure, it can provide a certain deformation space for the chip packaging structure. When the amount of deformation is allowed, it is beneficial to release the internal stress of the chip packaging structure and avoid damage to the internal structure of the chip packaging structure caused by stress concentration.

[0026] In some embodiments, in the first direction, the second protrusion overlaps with the chip in the chip packaging structure, and the area where the chip is located in the chip packaging structure is pressed by the second protrusion to press the chip to suppress the thermal deformation of the chip.

[0027] In some embodiments, the orthographic projection of the second protrusion on the second surface surrounds the orthographic projection of the chip on the second surface, and the four sides of the chip are pressed by the second protrusion to press the chip to suppress the thermal deformation of the chip.

[0028] In some embodiments, the cover plate includes a plurality of second protrusions, and the plurality of second protrusions are arranged in an array, and the chip packaging structure is pressed by the plurality of second protrusions arranged in an array to press the chip to suppress the thermal deformation of the chip.

[0029] In some embodiments, in the chip packaging structure, the heat dissipation cover is connected to the packaging substrate through an adhesive layer. The cover plate has a hollow structure. In the first direction, the cover plate overlaps with the adhesive area of the heat dissipation cover, and the adhesive area of the heat dissipation cover is pressed by the cover plate to press the chip to suppress the thermal deformation of the chip.

[0030] In some embodiments, the chip packaging structure includes a plurality of chips, and the plurality of chips at least include a first chip and a second chip. Along the direction parallel to the first surface, the first chip and the second chip are arranged flat. The cover plate includes a first hollow portion and a second hollow portion. In the first direction, the first hollow portion overlaps with the first chip, and the second hollow portion overlaps with the second chip. Alternatively, the cover plate includes a plurality of second protrusions, and in the first direction, one of the plurality of second protrusions overlaps with the first chip, and another of the plurality of second protrusions overlaps with the second chip.

[0031] In some embodiments, along the first direction, the thickness of the first chip is greater than that of the second chip. Compared with the first surface, the area of the second surface corresponding to the first chip is higher than the area of the second surface corresponding to the second chip. The cover plate includes a third hollow portion, and in the first direction, the third hollow portion overlaps with the first chip. Moreover, the cover plate further includes a second protrusion portion, and in the first direction, the second protrusion portion overlaps with the second chip.

[0032] The embodiments of the present application provide various pressure application structure designs of the pressure application fixture, various structure designs of the carrier of the pressure application fixture, and various structure designs of the cover plate of the pressure application fixture. According to the structural characteristics of the chips in the chip packaging structure, the pressure application structure, the structure of the carrier, and the structure of the cover plate can be arbitrarily combined and designed, and the present application does not limit this.

[0033] In a second aspect, a pressure application reflow soldering method for chips is provided. The pressure application reflow soldering method includes: placing a chip packaging structure in a pressure application fixture. Along the first direction, the chip packaging structure includes a substrate, chips, a prefabricated thermal interface material sheet, and a heat dissipation cover stacked. The chip packaging structure further includes opposite first and second surfaces. The pressure application fixture includes a carrier and a cover plate disposed above the carrier. The carrier abuts against the first surface, and the cover plate abuts against the second surface. Placing the chip packaging structure and the pressure application fixture into a high-temperature mechanism for reflow soldering.

[0034] In some embodiments, the chip packaging structure is placed upright in the pressure application fixture, the first surface is the surface of the substrate away from the chips, and the second surface is the surface of the heat dissipation cover away from the chips. Alternatively, the chip packaging structure is placed upside down in the pressure application fixture, the first surface is the surface of the heat dissipation cover away from the chips, and the second surface is the surface of the substrate away from the chips. [[ID=ll]]

[0035] It can be understood that for the pressure application reflow soldering method for chips provided by the above embodiments of the present application, the beneficial effects that can be achieved can refer to the beneficial effects of the pressure application fixture in the foregoing text, and will not be elaborated here. Description of the Drawings

[0036] To more clearly illustrate the technical solutions in the present application, the drawings required for some embodiments of the present application will be briefly introduced below. Obviously, the drawings in the following description are only the drawings of some embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings. In addition, the drawings in the following description can be regarded as schematic diagrams and are not limitations on the actual sizes of the products related to the embodiments of the present application.

[0037] Figure 1 Structural diagram of the server provided by the embodiments of the present application;

[0038] Figure 2Structural diagram of the chip heat dissipation system provided by the embodiment of the present application;

[0039] Figure 3 Structural diagram of a pressing fixture provided by the embodiment of the present application;

[0040] Figures 4 to 8 Diagrams of the steps of the pressing reflow soldering method provided by the embodiment of the present application;

[0041] Figures 9 to 14 Schematic diagrams of various pressing structures of the pressing fixture provided by the embodiment of the present application;

[0042] Figures 15 to 23 Schematic diagrams of various structures of the carrier of the pressing fixture provided by the embodiment of the present application;

[0043] Figures 24 to 31 Schematic diagrams of various structures of the cover plate of the pressing fixture provided by the embodiment of the present application. Detailed implementation manners

[0044] Next, in combination with the drawings, the technical solutions in some embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present application.

[0045] Some embodiments of the present application provide an electronic device, which can be a supercomputer, a vehicle-mounted device, a smart home device and / or a smart city device, a server, a workstation, a data center, etc. The specific type of the electronic device is not particularly limited in the embodiments of the present application.

[0046] For the convenience of description below, the electronic device is taken as an example of a server for illustration.

[0047] Figure 1 Structural diagram of the server provided by the embodiment of the present application.

[0048] See Figure 1 , the server 1 includes a cabinet 2, a circuit board 3 and a chip package structure 4 arranged in the cabinet 2. The chip package structure 4 is arranged on the circuit board 3 and is electrically connected to the circuit board 3. Among them, the circuit board 3 includes, but is not limited to, a printed circuit board (PCB).

[0049] With the development of chip technology, the power and density of chips are constantly increasing. During the operation of chips, more heat will be generated, which will affect the performance and lifespan of the chips. To achieve heat dissipation of the chips, generally, a chip heat dissipation system is provided in the server 1, Figure 2The structural diagram of the chip heat dissipation system provided by the embodiments of the present application.

[0050] Referring to Figure 2 , the chip heat dissipation system 10 includes a chip package structure 4, and the chip package structure 4 can be connected to the circuit board 3 through a plurality of first bonding structures 40.

[0051] Exemplarily, the first bonding structure 40 may include a solder bump, a solder ball or a Cu pillar.

[0052] For example, Figure 2 the first bonding structure 40 in

[0053] Continuing to refer to Figure 2 , along the direction Z, the chip package structure 4 includes a stacked package substrate 41, a chip 42, a first thermal interface material layer 43 and a heat dissipating lid (HDL) 44.

[0054] Among them, the chip 42 is disposed on the package substrate 41, and the chip 42 is connected to the package substrate 41 through a plurality of second bonding structures 45. The second bonding structure 45 may be, for example, a solder bump. A filling layer 46 is further disposed at the bottom of the chip 42. The filling layer 46 is located between the chip 42 and the package substrate 41, and the filling layer 46 wraps the solder bump to improve the connection strength between the chip 42 and the package substrate 41.

[0055] Continuing to refer to Figure 2 , the first thermal interface material layer 43 is disposed on the chip 42, and the heat dissipating lid 44 is disposed on the side of the first thermal interface material layer 43 away from the chip 42. During the operation of the chip 42, a large amount of heat is generated, and the heat can be conducted out through the first thermal interface material layer 43 and the heat dissipating lid 44 to achieve heat dissipation of the chip 42.

[0056] Exemplarily, the heat dissipating lid 44 may be a copper lid, a micro-fluidic channel lid (MCL), a vapor chamber lid (VCL), etc.

[0057] Exemplarily, the heat dissipating lid 44 can be pasted to the package substrate 41 through an adhesive 47, and the pasting area of the heat dissipating lid 44 is also called the "footprint" area E.

[0058] In addition, referring to Figure 2, the chip heat dissipation system 10 further includes a second thermal interface material layer 5 and a heat sink 6. The second thermal interface material layer 5 is disposed on the heat dissipation cover 44, and the heat sink 6 is disposed on a side of the second thermal interface material layer 5 away from the heat dissipation cover 44. The heat on the heat dissipation cover 44 can be conducted out through the second thermal interface material layer 5 and the heat sink 6, further improving the heat dissipation efficiency of the chip 42.

[0059] Both the first thermal interface material layer 43 and the second thermal interface material layer 5 include thermal interface materials (TIM). Compared with carbon-based and silicon-based thermal interface materials, solder thermal interface materials include indium (chemical formula: In), indium silver alloy (chemical formula: InAg), tin silver copper alloy (chemical formula: SnAgCu), or tin bismuth silver alloy (chemical formula: SnBiAg), etc. The solder thermal interface material (S-TIM) has a lower thermal resistance and higher contact reliability, making it have better thermal conductivity and mechanical performance. Both the first thermal interface material layer 43 and the second thermal interface material layer 5 can adopt solder thermal interface materials, which is beneficial to improving the heat dissipation efficiency of the chip 42, and the welding connection method is beneficial to improving the connection strength of the structure.

[0060] However, the key to giving full play to the advantages of the solder thermal interface material lies in that the solder thermal interface material has a high coverage rate on the device surface.

[0061] Generally, in the process of manufacturing the chip packaging structure 4, the chip 42 is first installed on the packaging substrate 41. After placing a preform of the solder thermal interface material on the upper surface of the chip 42, the heat dissipation cover 44 is installed above the preform, and the heat dissipation cover 44 is pasted and fixed on the packaging substrate 41 to form a packaging structure. Finally, the packaging structure is placed in a high-temperature mechanism (for example, a reflow oven). Under the action of high temperature, the preform melts into a liquid solder thermal interface material. After the solder thermal interface material solidifies, the first thermal interface material layer 43 is formed, realizing the reflow soldering of the first thermal interface material layer 43 with the chip 42 and the heat dissipation cover 44.

[0062] However, under the action of high temperature, the chip 42 will freely thermally deform and warp. For example, the corner areas of the chip 42 warp severely, making the surfaces of its corner areas higher. The liquid solder thermal interface material will flow out from the corner areas of the chip 42. After the solder thermal interface material solidifies to form the first thermal interface material layer 43, the first thermal interface material layer 43 cannot completely cover the chip 42, and the coverage rate of the first thermal interface material layer 43 on the surface of the chip 42 is low, which is not conducive to giving full play to the good thermal conductivity and mechanical performance of the solder thermal interface material.

[0063] Moreover, in the subsequent high-temperature process, for example, a first bonding structure 40 (ball planting) is set below the packaging substrate 41, and the chip packaging structure 4 after ball planting is connected to the circuit board 3 (upper board), etc., the first thermal interface material layer 43 will repeatedly undergo a melting-solidification process. When the corner area of the chip 42 is warped, the first thermal interface material layer 43 will also shrink and degenerate, further reducing the coverage of the first thermal interface material layer 43 on the surface of the chip 42. The reliability of reflow soldering is poor, and the deformation amounts of different chips 42 are different, resulting in different coverage rates of the first thermal interface material layer 43 on the surfaces of different chips 42 and poor consistency.

[0064] To solve the above problems, some embodiments of the present application provide a chip pressure fixture. Figure 3 A structural diagram of a pressure jig provided in an embodiment of the present application.

[0065] See also Figure 3 The pressure fixture 7 includes a carrier 71 and a cover plate 72 , and the cover plate 72 is arranged above the carrier 71 .

[0066] The carrier 71 is used to carry the chip packaging structure 4 . Along the direction Z, the chip packaging structure 4 includes a stacked packaging substrate 41 , a chip 42 , a prefabricated sheet 48 containing a solder-type thermal interface material, and a heat dissipation cover 44 .

[0067] In addition, along the direction Z, the chip packaging structure 4 also includes a first surface P1 and a second surface P2 relative to each other. The carrier 71 is against the first surface P1 of the chip packaging structure 4, and the cover plate 72 is against the second surface P2 of the chip packaging structure 4. The carrier 71 provides a supporting force (pressure F) to the chip packaging structure 4. The cover plate 72 is affected by gravity, and the gravity of the cover plate 72 is applied to the chip packaging structure 4 in the form of pressure F, so as to apply pressure F to the chip packaging structure 4 through the carrier 71 and the cover plate 72.

[0068] For example, the entire structure of the carrier 71 can be made of metal. Alternatively, part of the structure of the carrier 71 is made of metal, and the other part (for example, the part where the carrier 71 contacts the chip package structure 4) is made of flexible material (for example, rubber).

[0069] Similarly, the entire structure of the cover plate 72 can be made of metal. Alternatively, part of the cover plate 72 is made of metal, and the other part (for example, the part where the cover plate 72 contacts the chip package structure 4) is made of flexible material (for example, rubber).

[0070] Some embodiments of the present application also provide a pressure reflow soldering method for a chip. Figures 4 to 8 Schematic diagram of the various steps of the pressure reflow soldering method provided in an embodiment of the present application.

[0071] The pressure-applied reflow soldering method comprises the following steps:

[0072] Referring to Figure 4 , the chip 42 is connected to the packaging substrate 41 through a plurality of second bonding structures 45. Then, a filling layer 46 is formed at the bottom of the chip 42, and the filling layer 46 wraps the plurality of second bonding structures 45 to prepare a "bare chip".

[0073] Referring to Figure 5 , a prefabricated sheet 48 and a heat sink cover 44 are placed on the upper surface of the chip 42, and the heat sink cover 44 is bonded to the packaging substrate 41 through an adhesive 47 to fix the heat sink cover 44.

[0074] Referring to Figure 6A and Figure 6B , the chip packaging structure 4 is placed in a pressure-applying jig 7, so that the carrier 71 abuts against the first surface P1 of the chip packaging structure 4, and the cover plate 72 abuts against the second surface P2 of the chip packaging structure 4, and a pressure F is applied to the chip packaging structure 4 through the carrier 71 and the cover plate 72.

[0075] Exemplarily, referring to Figure 6A , the chip packaging structure 4 can be placed upright in the pressure-applying jig 7, that is, the heat sink cover 44 of the chip packaging structure 4 is located above and the packaging substrate 41 is located below. In this case, the first surface P1 of the chip packaging structure 4 is the lower surface of the packaging substrate 41, and the second surface P2 of the chip packaging structure 4 is the upper surface of the heat sink cover 44. The carrier 71 abuts against the lower surface of the packaging substrate 41, and the cover plate 72 abuts against the upper surface of the heat sink cover 44.

[0076] Exemplarily, referring to Figure 6B , the chip packaging structure 4 can be placed upside down in the pressure-applying jig 7, that is, the packaging substrate 41 of the chip packaging structure 4 is located above and the heat sink cover 44 is located below. In this case, the first surface P1 of the chip packaging structure 4 is the lower surface of the heat sink cover 44, and the second surface P2 of the chip packaging structure 4 is the upper surface of the packaging substrate 41. The carrier 71 abuts against the lower surface of the heat sink cover 44, and the cover plate 72 abuts against the upper surface of the packaging substrate 41.

[0077] Referring to Figure 7 , the pressure-applying jig 7 is placed in a high-temperature mechanism 8 for reflow soldering, and the high-temperature mechanism 8 can be, for example, a reflow oven.

[0078] Referring to Figure 8 , after the reflow soldering is completed, the pressure-applying jig 7 is taken out of the high-temperature mechanism 8.

[0079] In the above-mentioned pressure-applied reflow soldering method, the pressure-applying fixture 7 and the chip packaging structure 4 are placed in the high-temperature mechanism 8, and the preform 48 is melted into a liquid soldering-type thermal interface material. Pressure F is applied to the chip packaging structure 4 through the carrier 71 and the cover plate 72. By utilizing the transmission effect of the pressure, the pressure acts on the surface of the chip 42, which can suppress the thermal deformation of the chip 42 and reduce the warping phenomenon in the corner area of the chip 42. The liquid soldering-type thermal interface material is not likely to flow out from the corner area of the chip 42, which is beneficial to the uniform overflow of the soldering-type thermal interface material. After the soldering-type thermal interface material solidifies, a first thermal interface material layer 43 is formed. The first thermal interface material layer 43 can cover the corner area of the chip 42, which can improve the coverage rate of the first thermal interface material layer 43 on the surface of the chip 42 and enhance the reliability of the reflow soldering.

[0080] Moreover, the deformation amount generated by the chip 42 during the reflow soldering process is small, making the deformation amounts of different chips 42 close to each other, reducing the fluctuation between the deformation amounts of different chips 42. As a result, the coverage rates of the first thermal interface material layers 43 on the surfaces of different chips 42 are similar, improving the consistency of the coverage rate.

[0081] In addition, in subsequent high-temperature processes, the first thermal interface material layer 43 will repeatedly undergo the process of melting and solidification. When the warping in the corner area of the chip 42 is improved, the coverage rate of the first thermal interface material layer 43 in the corner area can be enhanced.

[0082] This application provides various pressure-applying structure designs for the pressure-applying fixture. Figures 9 to 14 It is a schematic diagram of various pressure-applying structures of the pressure-applying fixture provided by the embodiments of this application.

[0083] In some embodiments, referring to Figure 9 , the carrier 71 includes a first magnet 73, and the cover plate 72 includes a second magnet 74. The first magnet 73 and the second magnet 74 attract each other to generate a magnetic force. This magnetic force is transmitted to the chip packaging structure 4 through the carrier 71 and the cover plate 72, so that the pressure acts on the surface of the chip 42, thereby suppressing the thermal deformation of the chip 42.

[0084] Exemplarily, the first magnet 73 is embedded in the carrier 71 in the form of a magnetic bead, and the second magnet 74 is embedded in the cover plate 72 in the form of a magnetic bead. The first magnet 73 and the second magnet 74 attract each other, causing the carrier 71 and the cover plate 72 to "squeeze" the chip packaging structure 4 located therebetween.

[0085] It can be understood that in the plane X-Y, the installation positions of the first magnet 73 and the second magnet 74 should avoid the area where the chip packaging structure 4 is located to prevent the magnetic field formed by the first magnet 73 and the second magnet 74 from having an adverse effect on the chip 42.

[0086] In some embodiments, referring to Figure 10, the cover plate 72 includes a base body 75, a spring 76, and a pressing block 77. A receiving groove H is provided on the surface P3 of the base body 75 close to the carrier 71. The spring 76 and the pressing block 77 are arranged in the receiving groove H, and the spring 76 is located between the base body 75 and the pressing block 77.

[0087] Please continue to refer to Figure 10 , place the chip packaging structure 4 in the pressing fixture 7. The pressing block 77 abuts against the chip packaging structure 4. Under the action of the spring force of the spring 76, the pressing block 77 presses the surface of the chip packaging structure 4, so that the pressure acts on the surface of the chip 42, thereby suppressing the thermal deformation of the chip 42.

[0088] Exemplarily, the receiving groove H includes a first sliding groove H1 and a second sliding groove H2 that are communicated with each other, and the second sliding groove H2 is located on the side of the first sliding groove H1 close to the carrier 71. The first sliding groove H1 includes a first opening K1 connected to the second sliding groove H2, and the second sliding groove H2 includes a second opening K2 connected to the first sliding groove H1. The edge of the first opening K1 is located inside the edge of the second opening K2, so that the second opening K2 completely exposes the first opening K1.

[0089] The spring 76 is arranged in the first sliding groove H1, and the pressing block 77 is arranged in the second sliding groove H2. The spring 76 can expand and contract in the first sliding groove H1. Since the second opening K2 completely exposes the first opening K1, the spring 76 can extend from the first opening K1, extend into the second sliding groove H2 through the second opening K2, and contact the pressing block 77 in the second sliding groove H2. The spring 76 acts on the pressing block 77 with the spring force, so that the pressing block 77 presses the chip packaging structure 4.

[0090] In some embodiments, refer to Figure 11 , a plurality of receiving grooves H are provided on the surface P3 of the base body 75 close to the carrier 71. A spring 76 and a pressing block 77 are arranged in each receiving groove H, and the pressing block 77 is located on the side of the spring 76 close to the carrier 71. The plurality of pressing blocks 77 press the surface of the chip packaging structure 4, which can improve the force uniformity of each area on the surface of the chip packaging structure 4, thereby improving the force uniformity of each area on the surface of the chip 42 and better suppressing the thermal deformation of each area of the chip 42.

[0091] In some embodiments, refer to Figure 12 , a receiving groove H is provided on the surface P3 of the base body 75 close to the carrier 71. The spring 76 and the pressing block 77 are arranged in the receiving groove H, and the spring 76 is located between the base body 75 and the pressing block 77.

[0092] The briquette 77 includes a connected slider 771 and a pressing plate 772, and the pressing plate 772 is closer to the surface P3 of the seat body 75 than the slider 771. A groove C is provided on the surface P4 of the slider 771 away from the pressing plate 772, and the spring 76 is arranged in the groove C, and the spring 76 is located between the seat body 75 and the slider 771.

[0093] Please continue to refer to Figure 12 , place the chip packaging structure 4 in the pressing fixture 7. The pressing plate 772 contacts each area of the upper surface of the chip packaging structure 4. Under the action of the spring force of the spring 76, along the direction Z, the slider 771 can slide downward in the receiving groove H to drive the pressing plate 772 to move downward. The pressing plate 772 presses the upper surface of the chip packaging structure 4, and the force on each area of the upper surface of the chip packaging structure 4 is relatively uniform, which is beneficial to improving the force uniformity of each area of the surface of the chip 42 and better suppressing the thermal deformation of each area of the chip 42.

[0094] In some embodiments, refer to Figure 13 , the pressing fixture 7 further includes a buckle 78, and the buckle 78 has a clamping groove 780.

[0095] The carrier 71 includes a surface P5 on the side away from the cover plate 72, and the cover plate 72 includes a surface P6 on the side away from the carrier 71. The carrier 71 and the cover plate 72 are installed in the clamping groove 780 of the buckle 78. The surface P5 of the carrier 71 and the surface P6 of the cover plate 72 are respectively abutted against the inner wall of the clamping groove 780, and the buckle 78 applies mechanical force to the surface P5 of the carrier 71 and the surface P6 of the cover plate 72. Equivalently, the carrier 71 and the cover plate 72 are "squeezed" by the buckle 78 so that the carrier 71 and the cover plate 72 "squeeze" the chip packaging structure 4, and the pressure acts on the surface of the chip 42, thereby suppressing the thermal deformation of the chip 42.

[0096] Exemplarily, the pressing fixture 7 may include a plurality of buckles 78, and the plurality of buckles 78 are installed around the carrier 71 and the cover plate 72. By "squeezing" the periphery of the carrier 71 and the cover plate 72 through the plurality of buckles 78, the force on each area of the chip packaging structure 4 is relatively uniform, which is beneficial to improving the force uniformity of each area of the chip 42 and better suppressing the thermal deformation of each area of the chip 42.

[0097] In some embodiments, refer to Figure 14 , the pressing fixture 7 further includes a pressing member 79, and the pressing member 79 is arranged on the side of the cover plate 72 away from the carrier 71. The gravity of the pressing member 79 is used to apply pressure to the cover plate 72, and this pressure is transmitted to the chip packaging structure 4 through the cover plate 72, so that the pressure acts on the surface of the chip 42, thereby suppressing the thermal deformation of the chip 42.

[0098] Exemplarily, the pressing member 79 can be a weight, and the number of weights can be one or more.

[0099] The above embodiments of the present application provide various pressure application structure designs for the pressure application fixture 7. The pressure application methods include applying pressure using a magnet, applying pressure using a spring, applying pressure using a buckle, and applying pressure using a heavy object. It can be understood that the various pressure application methods can be used in any combination to achieve a better "squeezing" effect on the chip 42 and suppress the thermal deformation of the chip 42.

[0100] The present application also provides various structure designs for the carrier of the pressure application fixture. Figures 15 to 23 FIGS. are various schematic structural diagrams of the carrier of the pressure application fixture provided by the embodiments of the present application. Through the structural design of the carrier, the carrier can be in full-surface contact or partial contact with the chip packaging structure.

[0101] In some embodiments, referring to Figure 15 , the carrier 71 includes a bottom plate 711, and the bottom plate 711 abuts against the first surface P1 of the chip packaging structure 4. The bottom plate 711 can be a solid flat plate to ensure that the bottom plate 711 has sufficient structural strength to rigidly support and apply pressure to the chip packaging structure 4.

[0102] Moreover, the surface P7 of the bottom plate 711 that abuts against the chip packaging structure 4 can be a plane, and the bottom plate 711 is in contact with the entire surface (the first surface P1) of the chip packaging structure 4, which is beneficial to improving the uniform stress of each region on the surface of the chip packaging structure 4 and better suppressing the thermal deformation of each region of the chip 42.

[0103] Exemplarily, referring to Figure 15 , the carrier 71 further includes side walls 712. The side walls 712 are arranged around the bottom plate 711 and can have a continuous structure along the four sides of the bottom plate 711. The side walls 712 play a role in limiting the displacement of the chip packaging structure 4 in the X-Y plane and ensure that the chip packaging structure 4 is located within the carrier 71.

[0104] Or, referring to Figure 16 , along the four sides of the bottom plate 711, the side walls 712 include a plurality of discontinuous sub-side walls 7120, and the plurality of sub-side walls 7120 are arranged around the bottom plate 711. The inside of the carrier 71 can communicate with the external environment through the gaps between the plurality of sub-side walls 7120, so that the air pressure inside the carrier 71 is kept close to or equal to the external atmospheric pressure, avoiding damage to the chip packaging structure 4 caused by the increase in air pressure inside the carrier 71 at high temperatures.

[0105] In some embodiments, referring to Figure 17 and Figure 18, the bottom plate 711 of the vehicle 71 can also have a hollow structure, and the interior of the vehicle 71 can be connected to the external environment through the hollow part, so that the air pressure inside the vehicle 71 is kept close to or reach the external atmospheric pressure, avoiding damage to the chip packaging structure 4 caused by the increase in air pressure inside the vehicle 71 at high temperatures.

[0106] Moreover, by setting the bottom plate 711 to have a hollow structure, the materials required for preparing the vehicle 71 can be saved, and the mass of the vehicle 71 can be reduced.

[0107] Exemplarily, referring to Figure 17 , the bottom plate 711 has a plurality of through holes T, and along the direction Z, the through holes T penetrate through the bottom plate 711. For example, the plurality of through holes T can be arranged in an array.

[0108] Exemplarily, referring to Figure 18 , the bottom plate 711 includes a plurality of ribs 7110. On the plane X-Y, the plurality of ribs 7110 are connected to form any designed pattern, and there are hollows between the plurality of ribs 7110.

[0109] In some embodiments, referring to Figure 19 , the surface P7 of the bottom plate 711 that abuts against the chip packaging structure 4 can also be a convex arc surface, and the first surface P1 of the chip packaging structure 4 is a concave arc surface. The shape of the surface P7 of the bottom plate 711 is adapted to the shape of the first surface P1 of the chip packaging structure 4, which is beneficial to increasing the contact area between the bottom plate 711 and the chip packaging structure 4.

[0110] It can be understood that the first surface P1 of the chip packaging structure 4 can be a plane, an arc surface or other irregular shapes, and the shape of the surface P7 of the bottom plate 711 can be designed to be adapted to the shape of the first surface P1 of the chip packaging structure 4 so that the bottom plate 711 and the chip packaging structure 4 are in full contact.

[0111] In some embodiments, referring to Figures 20 to 23 , the bottom plate 711 can also be in contact with a part of the surface of the chip packaging structure 4. For example, the bottom plate 711 further includes a convex portion 7111, and the convex portion 7111 is provided on the surface P7 of the bottom plate 711, and the convex portion 7111 of the bottom plate 711 abuts against the first surface P1 of the chip packaging structure 4.

[0112] It can be understood that the convex portion 7111 of the bottom plate 711 can play a role in supporting and pressing the chip packaging structure 4 to inhibit the thermal deformation of the chip packaging structure 4. Moreover, since the convex portion 7111 is in local contact with the chip packaging structure 4, a certain deformation space can be provided for the chip packaging structure 4. When the amount of deformation is allowed, it is beneficial to release the internal stress of the chip packaging structure 4 and avoid damage to the internal structure of the chip packaging structure 4 caused by stress concentration.

[0113] Exemplarily, refer to Figure 20 , the protruding portion 7111 of the bottom plate 711 may be a boss, and the shape of the orthographic projection of the protruding portion 7111 on the surface P7 of the bottom plate 711 may be a rectangle. The projection shape of the protruding portion 7111 may also be a circle, a triangle, a pentagon or other polygons, etc., and the number of the protruding portions 7111 may be one or more, which is not limited in this application.

[0114] Exemplarily, refer to Figure 21 , the protruding portion 7111 of the bottom plate 711 may be a convex ring, and the shape of the orthographic projection of the protruding portion 7111 on the surface P7 of the bottom plate 711 may be an annular shape.

[0115] Exemplarily, refer to Figure 22 , the protruding portion 7111 of the bottom plate 711 may be a convex rib, and the shape of the orthographic projection of the protruding portion 7111 on the surface P7 of the bottom plate 711 may be a strip shape.

[0116] Exemplarily, refer to Figure 23 , the protruding portion 7111 of the bottom plate 711 has a stepped structure, and the step surface of the stepped structure farthest from the surface P7 of the bottom plate 711 abuts against the chip packaging structure 4.

[0117] The above embodiments of the present application provide various structural designs of the carrier 71 of the pressing fixture 7, which can be arbitrarily combined according to the structural characteristics of the chip 42 in the chip packaging structure 4 to achieve better support and "squeezing" effects on the chip 42, so as to suppress the thermal deformation of the chip 42.

[0118] The present application also provides various structural designs of the cover plate of the pressing fixture, Figures 24 to 31 which are schematic diagrams of various structures of the cover plate of the pressing fixture provided by the embodiments of the present application. Through the structural design of the cover plate, the whole-surface contact or partial contact between the cover plate and the chip packaging structure can be realized.

[0119] In some embodiments, refer to Figure 24 , the cover plate 72 may be a solid flat plate, ensuring that the cover plate 72 has sufficient structural strength to exert pressure on the chip packaging structure 4. Moreover, the surface P8 of the cover plate 72 abutting against the chip packaging structure 4 may be a plane, and the cover plate 72 is in contact with the whole surface (the second surface P2) of the chip packaging structure 4, which is beneficial to improving the stress uniformity of each area on the surface of the chip packaging structure 4 and better suppressing the thermal deformation of each area of the chip 42.

[0120] In some embodiments, refer to Figure 25 , the cover plate 72 may also have a hollow structure, which can save the materials required for preparing the cover plate 72 and can reduce the mass of the cover plate 72.

[0121] The cover plate 72 can be in partial contact with the surface (the second surface P2) of the chip packaging structure 4. For example, in the Z direction, the cover plate 72 overlaps with the footprint area E of the chip packaging structure 4, and the cover plate 72 presses on the footprint area E of the chip packaging structure 4 to press on the chip 42, so as to suppress the thermal deformation of the chip 42.

[0122] In some embodiments, referring to Figures 26 to 28 , the cover plate 72 further includes a protrusion 720. The protrusion 720 is disposed on the surface P8 of the cover plate 72. The protrusion 720 abuts against the second surface P2 of the chip packaging structure 4, and the protrusion 720 is in partial contact with the surface of the chip packaging structure 4.

[0123] It can be understood that the protrusion 720 of the cover plate 72 can exert a pressing force on the chip packaging structure 4 to suppress the thermal deformation of the chip packaging structure 4. Moreover, since the protrusion 720 is in partial contact with the chip packaging structure 4, a certain deformation space can be provided for the chip packaging structure 4. When the amount of deformation is allowed, it is beneficial to release the internal stress of the chip packaging structure 4 and avoid damage to the internal structure of the chip packaging structure 4 caused by stress concentration.

[0124] Exemplarily, referring to Figure 26 , the protrusion 720 of the cover plate 72 can be a boss. The shape of the orthographic projection of the protrusion 720 on the surface P8 of the cover plate 72 can be a rectangle. The projection shape of the protrusion 720 can also be a circle, a triangle, a pentagon or other polygons, etc., and the number of the protrusions 720 can be one or more. The present application does not limit this.

[0125] For example, referring to Figure 26 , in the Z direction, the protrusion 720 of the cover plate 72 overlaps with the chip 42 in the chip packaging structure 4, and the protrusion 720 presses on the area where the chip 42 is located in the chip packaging structure 4 to press on the chip 42, so as to suppress the thermal deformation of the chip 42.

[0126] Exemplarily, referring to Figure 27 , the protrusion 720 of the cover plate 72 can be a convex ring. The shape of the orthographic projection of the protrusion 720 on the surface P8 of the cover plate 72 can be a ring.

[0127] For example, referring to Figure 27 , in the X-Y plane, the annular protrusion 720 of the cover plate 72 surrounds the chip 42. The protrusion 720 presses on the periphery of the chip 42 to press on the chip 42, so as to suppress the thermal deformation of the chip 42.

[0128] Exemplarily, referring to Figure 28, the cover plate 72 includes a plurality of protrusions 720. In the X-Y plane, the plurality of protrusions 720 can be arranged in an array. By pressing on the chip packaging structure 4 through the plurality of protrusions 720 arranged in an array, the chip 42 is pressed to suppress the thermal deformation of the chip 42.

[0129] See Figure 28 , the protrusion 720 can be a column. For example, the protrusion 720 can be a cylinder, a triangular prism, a quadrangular prism, a pentagonal prism, etc.

[0130] In addition, for the scenario where there are multiple chips 42 (multi-chip co-packaging) in the chip packaging structure 4, the present application also provides various structural designs for the cover plate of the pressing fixture.

[0131] In some embodiments, see Figure 29 , the chip packaging structure 4 includes a first chip 421 and a second chip 422. In the X-Y plane, the first chip 421 and the second chip 422 are arranged flat.

[0132] The cover plate 72 includes a first hollow portion 721 and a second hollow portion 722. In the Z direction, the first hollow portion 721 overlaps with the first chip 421, and the second hollow portion 722 overlaps with the second chip 422, so that in the X-Y plane, the cover plate 72 can surround the first chip 421 on all sides and surround the second chip 422 on all sides. By pressing on the four sides of the first chip 421 and the second chip 422 through the cover plate 72, the first chip 421 and the second chip 422 are pressed to suppress the thermal deformation of the first chip 421 and the second chip 422.

[0133] In some embodiments, see Figure 30 , the protrusions 720 of the cover plate 72 include a first protrusion 7201 and a second protrusion 7202. In the Z direction, the first protrusion 7201 overlaps with the first chip 421, and the second protrusion 7202 overlaps with the second chip 422. By pressing on the area where the first chip 421 is located through the first protrusion 7201 and pressing on the area where the second chip 422 is located through the second protrusion 7202, the first chip 421 and the second chip 422 are pressed to suppress the thermal deformation of the first chip 421 and the second chip 422.

[0134] In some embodiments, see Figure 31 , in the chip packaging structure 4, along the Z direction, the thickness of the first chip 421 is different from the thickness of the second chip 422. For example, the thickness of the first chip 421 is greater than the thickness of the second chip 422, so that in the second surface P2 of the chip packaging structure 4, the area of the second surface P2 corresponding to the first chip 421 is higher than the area of the second surface P2 corresponding to the second chip 422, that is, the second surface P2 is a stepped surface with uneven height.

[0135] Please continue to refer to Figure 31 The cover plate 72 further includes a third hollow portion 723. In the Z direction, the third hollow portion 723 overlaps with the first chip 421, so that in the X-Y plane, the cover plate 72 can surround the first chip 421. By applying pressure to the periphery of the first chip 421 through the cover plate 72, pressure is applied to the first chip 421 to suppress the thermal deformation of the first chip 421.

[0136] The convex portion 720 of the cover plate 72 further includes a third convex 7203. In the Z direction, the third convex 7203 overlaps with the second chip 422. By applying pressure to the area where the second chip 422 is located through the third convex 7203, pressure is applied to the second chip 422 to suppress the thermal deformation of the second chip 422.

[0137] The above embodiments of the present application provide various structural designs of the cover plate 72 of the pressing fixture 7. According to the structural characteristics of the chip 42 in the chip packaging structure 4, various structural designs of the cover plate 72 can be arbitrarily combined and used to achieve a better "squeezing" effect on the chip 42 and suppress the thermal deformation of the chip 42.

[0138] The embodiments of the present application provide various pressing structural designs of the pressing fixture 7, various structural designs of the carrier 71 of the pressing fixture 7, and various structural designs of the cover plate 72 of the pressing fixture 7. According to the structural characteristics of the chip 42 in the chip packaging structure 4, the pressing structure, the structure of the carrier 71, and the structure of the cover plate 72 can be arbitrarily combined and designed, and the present application does not limit this.

[0139] The above are only the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A pressing fixture for a chip, characterized in that, Comprising: A carrier for carrying a chip package structure; A cover plate disposed above the carrier; Wherein, along a first direction, the chip package structure includes a substrate, a chip, a thermal interface material layer, and a heat sink cover stacked; Along the first direction, the chip package structure further includes opposite first and second surfaces, the carrier abuts against the first surface, and the cover plate abuts against the second surface.

2. The pressing fixture according to claim 1, wherein The carrier includes a first magnet, the cover plate includes a second magnet, and the first magnet and the second magnet attract each other.

3. The pressing fixture according to claim 1 or 2, characterized in that The cover plate includes a seat body, a spring, and a pressing block; A receiving groove is provided on a surface of the seat body close to the carrier, the spring and the pressing block are disposed in the receiving groove, and the spring is located between the seat body and the pressing block; The pressing block abuts against the second surface of the chip package structure.

4. The pressure application jig according to any one of claims 1 to 3, characterized in that, The pressing fixture further includes a buckle having a card slot; The carrier includes a third surface on a side away from the cover plate, the cover plate includes a fourth surface on a side away from the carrier, and the third surface and the fourth surface respectively abut against the inner wall of the card slot.

5. The pressing fixture according to any one of claims 1 to 4, characterized in that The pressing fixture further includes a pressing member; The pressing member is disposed on a side of the cover plate away from the carrier, and the pressing member is used to apply pressure to the cover plate.

6. The pressure application fixture according to any one of claims 1 to 5, characterized in that, The carrier includes a bottom plate that abuts against the first surface of the chip package structure; The bottom plate has a solid structure.

7. The pressing fixture according to any one of claims 1 to 5, characterized in that, The carrier includes a bottom plate that abuts against the first surface of the chip package structure; The bottom plate has a hollow structure.

8. The pressing fixture according to claim 7, wherein The bottom plate is provided with a plurality of through holes, and along the first direction, the through holes penetrate through the bottom plate; The plurality of through holes are arranged in an array.

9. The pressing fixture according to claim 7, wherein The bottom plate includes a plurality of connected ribs with hollow spaces between the ribs; 10. The pressing fixture according to any one of claims 1 to 9, characterized in that, The carrier includes a bottom plate that abuts against the first surface of the chip package structure; The surface of the bottom plate that abuts against the chip package structure is a flat surface.

11. The pressing fixture according to any one of claims 1 to 9, characterized in that, The carrier includes a bottom plate, and the bottom plate includes a first protruding portion disposed on a surface of the bottom plate close to the cover plate; The first protruding portion abuts against the first surface of the chip package structure.

12. The pressing fixture according to claim 11, wherein, The first protruding portion is a boss, a convex ring, a convex rib, a stepped structure, or an arc-shaped protrusion.

13. The pressing fixture according to any one of claims 6 to 12, characterized in that, The carrier further includes a side wall surrounding the bottom plate; Along the periphery of the bottom plate, the side wall has a continuous structure, or the side wall includes a plurality of disconnected sub-side walls.

14. The pressure application fixture according to any one of claims 1 to 13, characterized in that The surface of the cover plate that abuts against the chip package structure is a flat surface.

15. The pressure application fixture according to any one of claims 1 to 13, characterized in that, The cover plate includes a second protruding portion disposed on a surface of the cover plate close to the carrier; The second protruding portion abuts against the second surface of the chip package structure.

16. The pressing fixture according to claim 15, wherein In the first direction, the second protruding portion overlaps with the chip in the chip package structure.

17. The pressing fixture according to claim 15, wherein The orthographic projection of the second protruding portion on the second surface surrounds the orthographic projection of the chip on the second surface.

18. The pressure application fixture according to claim 15, wherein The cover plate includes a plurality of the second protruding portions, and the plurality of second protruding portions are arranged in an array.

19. The pressure application jig according to any one of claims 1 to 18, characterized in that, The cover plate has a hollow structure; In the chip packaging structure, the heat dissipation cover is connected to the substrate through an adhesive layer, and in the first direction, the cover plate overlaps with the adhesive layer.

20. The pressure applying fixture according to any one of claims 1 to 19, characterized in that, The chip packaging structure includes a plurality of the chips, and the plurality of chips at least include a first chip and a second chip. Along a direction parallel to the first surface, the first chip and the second chip are arranged flatly. The cover plate includes a first hollow portion and a second hollow portion. In the first direction, the first hollow portion overlaps with the first chip, and the second hollow portion overlaps with the second chip. Or, The cover plate includes a plurality of second protrusions. In the first direction, one of the plurality of second protrusions overlaps with the first chip, and another one of the plurality of second protrusions overlaps with the second chip.

21. The pressure application jig according to any one of claims 1 to 19, characterized in that, The chip packaging structure includes a plurality of the chips, and the plurality of chips at least include a first chip and a second chip. Along a direction parallel to the first surface, the first chip and the second chip are arranged flatly. Along the first direction, the thickness of the first chip is greater than the thickness of the second chip. Compared with the first surface, the area of the second surface corresponding to the first chip is higher than the area of the second surface corresponding to the second chip. The cover plate includes a third hollow portion. In the first direction, the third hollow portion overlaps with the first chip. The cover plate further includes a second protrusion. In the first direction, the second protrusion overlaps with the second chip.

22. A pressure application and reflow soldering method for a chip, characterized in that, Including: Placing the chip packaging structure in a pressing fixture. Along the first direction, the chip packaging structure includes a substrate, a chip, a prefabricated thermal interface material sheet, and a heat dissipation cover that are stacked. The chip packaging structure further includes opposite first and second surfaces. The pressing fixture includes a carrier and a cover plate disposed above the carrier. The carrier abuts against the first surface, and the cover plate abuts against the second surface. Placing the chip packaging structure and the pressing fixture into a high-temperature mechanism for reflow soldering.

23. The pressure application and reflux soldering method according to claim 22, characterized in that, Placing the chip packaging structure upright in the pressing fixture, where the first surface is the surface of the substrate away from the chip, and the second surface is the surface of the heat dissipation cover away from the chip. Or, Placing the chip packaging structure upside down in the pressing fixture, where the first surface is the surface of the heat dissipation cover away from the chip, and the second surface is the surface of the substrate away from the chip.