Aluminum profile appearance quality detection system

Abstract

The invention discloses an aluminum profile appearance quality detection system, belongs to the technical field of aluminum profile detection, and solves the problem that it is difficult to detect substrate defects on the sprayed surface of a machined aluminum profile. Comprising a six-mode sensing array, a heterogeneous signal conditioning chain, a hardware acceleration fusion engine, a dynamic environment compensation network, an industrial interface module and a power supply module, the output end of the six-mode sensing array is electrically coupled with the input end of the heterogeneous signal conditioning chain. When the device works, the six-mode sensing array realizes photoelectric signal conversion and preliminary amplification through cooperation of components; the heterogeneous signal conditioning chain is used for detecting features and processing the features; after each signal is quantized, inputting the quantized signal and capacitance-eddy current characteristics into a hardware acceleration fusion engine; monitoring and correcting the dynamic environment compensation network; and fusing the processed feature judgment type output result to realize aluminum profile defect online detection.

Description

Technical Field

[0001] The present invention relates to the technical field of aluminum profile detection, and in particular to an aluminum profile appearance quality detection system. Background Art

[0002] Aluminum profiles are made primarily from aluminum through a series of processes, including casting, extrusion, and surface treatment. They offer numerous advantages, including light weight, with a density approximately one-third that of steel, making them easy to transport and install. They also possess high strength, capable of meeting the load-bearing requirements of various structural components after alloying and heat treatment. They are also highly corrosion-resistant, forming a dense oxide film in air to protect the substrate from corrosion. They are also easy to process, amenable to cutting, drilling, welding, and other processing methods, and can be easily fabricated into profiles with various complex cross-sections to meet diverse design requirements. Aluminum profiles are widely used in a wide range of fields, including construction, transportation, machinery manufacturing, and electronics. They are used in building doors, windows, and curtain wall frames, as well as in the bodywork of vehicles like automobiles and high-speed trains, and in the frames and casings of various industrial equipment, providing crucial support for the development of modern industry and daily life.

[0003] After spraying, aluminum profiles may experience uneven coating due to substrate defects, such as concave and convex ridges. This problem is difficult to identify and detect after actual processing. The difficulty in detection lies mainly in the need to highly restore the actual spraying process conditions to expose potential defects. This process involves multivariable control and reliance on subjective experience.

[0004] Before spraying, base defects such as concave or convex bones may be difficult to identify with the naked eye due to light reflection or oxide film covering. However, after spraying, the paint flow path will change, and paint accumulation will easily form at the concave bones, while the convex bones will cause the coating to thin or even expose the bottom due to surface tension. The appearance of such defects needs to be reproduced by simulating the actual spraying parameters, but the simulation process needs to accurately match the production line environment and requires multiple spraying-observation cycle verification, which is time-consuming. At the same time, the judgment of uneven coating is highly dependent on the inspector's experience. For example, slight color difference or thickness difference requires illumination from a specific angle of light or touch to perceive subtle bumps and depressions. Such subjective judgments lack quantitative standards, especially in complex curved surfaces or matte coatings, where defects are easily confused with normal textures.

[0005] Therefore, it is difficult to detect substrate defects on the surface of processed aluminum profiles after spraying.

[0006] Therefore, an aluminum profile appearance quality inspection system is proposed to solve or alleviate the above problems. Summary of the Invention

[0007] The purpose of the present invention is to solve the shortcomings of the prior art and to propose an aluminum profile appearance quality detection system.

[0008] To achieve the above object, the present invention adopts the following technical solutions: An aluminum profile appearance quality detection system, comprising a six-modal sensing array, a heterogeneous signal conditioning chain, a hardware acceleration fusion engine, a dynamic environment compensation network, an industrial interface module, and a power supply module; The output end of the six-modal sensing array is electrically coupled to the input end of the heterogeneous signal conditioning chain. The six-modal sensing array synchronously collects optical interference, capacitance, eddy current, ultrasonic, temperature, and strain data and performs spatio-temporal alignment of multi-modal data based on the ultrasonic propagation time. The output end of the heterogeneous signal conditioning chain is communicatively connected to the analog signal input end of the hardware acceleration fusion engine. The heterogeneous signal conditioning chain processes and transmits the multi-modal data from the six-modal sensing array. The output end of the dynamic environment compensation network is connected to the gain control end of the heterogeneous signal conditioning chain; The compensation control end of the hardware acceleration fusion engine is signal-connected to the feedback input end of the dynamic environment compensation network. The hardware acceleration fusion engine extracts the optical phase difference, capacitance-eddy current joint features, and ultrasonic energy ratio and performs non-linear feature fusion based on a preset weight to generate a comprehensive defect characterization parameter and perform hierarchical determination. The digital output end of the hardware acceleration fusion engine is communicatively connected to the data bus end of the industrial interface module. The power input end of the industrial interface module is electrically connected to the multi-stage regulated output end of the power supply module. The industrial interface module outputs the determination result externally.

[0009] Preferably, the six-modal sensing array includes 64 composite probe units. The optical interference signal output end, capacitance-eddy current signal output end, and ultrasonic signal output end of each composite probe unit are respectively connected to the corresponding channel input ports of the heterogeneous signal conditioning chain through shielded coaxial cables.

[0010] Preferably, the composite probe unit includes a vertical cavity surface emitting laser, a beam splitting prism, a first photodiode, a second photodiode, a capacitor plate, an AD9833 signal generator, an eddy current coil, a PZT piezoelectric ceramic, and a MAX4420 driver chip; The positive electrode of the vertical cavity surface emitting laser is electrically connected through an LT3471 driver chip and its negative electrode is grounded. The incident surface of the beam splitting prism is optically aligned with the emitting end of the vertical cavity surface emitting laser. The reflecting surface and the transmitting surface of the beam splitting prism respectively point to the photosensitive surfaces of the first photodiode and the second photodiode. The anodes of the first photodiode and the second photodiode are respectively connected to the non-inverting input end and the inverting input end of the OPA657 transimpedance amplifier in the heterogeneous signal conditioning chain. The cathodes of the first photodiode and the second photodiode are both grounded; The outer electrode plate of the capacitor electrode plate is connected to the sine wave output end of the AD9833 signal generator, the AD9833 signal generator is connected to the SPI interface of the FPGA programmable gate array in the hardware acceleration fusion engine, and the inner electrode plate of the capacitor electrode plate is connected to the reference input end of the AD630 phase-locked amplifier in the heterogeneous signal conditioning chain; Both ends of the eddy current coil are connected to the output end of the IRS2092 power amplifier chip in the heterogeneous signal conditioning chain. The center tap of the eddy current coil is grounded. The transmitting end of the PZT piezoelectric ceramic is connected to the output end of the MAX4420 driver chip in the heterogeneous signal conditioning chain, and the receiving end of the PZT piezoelectric ceramic is connected to the non-inverting input end of the VCA810 variable gain amplifier in the heterogeneous signal conditioning chain.

[0011] Preferably, the heterogeneous signal conditioning chain includes an AD8302 phase detector, an OPA657 transimpedance amplifier, an AD630 phase-locked amplifier, an LTC1562 programmable filter, an IRS2092 power amplifier chip, a MAX4420 driver chip, a VCA810 variable gain amplifier, an AD5280 digital potentiometer, and an RMS detector AD736; The output end of the OPA657 transimpedance amplifier is connected to the signal input end of the AD8302 phase detector. The output end of the AD8302 phase detector is connected to the reference end of the AD630 phase-locked amplifier to output a phase difference voltage signal. The signal input end of the AD630 phase-locked amplifier is connected to the output end of the LTC1562 programmable filter. The differential offset adjustment end of the AD630 phase-locked amplifier is connected to a potentiometer to adjust the differential offset voltage. The other end of the potentiometer is connected to power. The output end of the AD630 phase-locked amplifier is connected to the X1 input end of the AD834 analog multiplier in the hardware acceleration fusion engine. The signal input end of the LTC1562 programmable filter is connected to the output end of the AD630 phase-locked amplifier. The output end of the LTC1562 programmable filter is connected to the Y1 input end of the AD834 analog multiplier in the hardware acceleration fusion engine. The output pins of the two second-order sections of the LTC1562 programmable filter are respectively connected to the two resistance ends of the AD5280 digital potentiometer. The AD5280 digital potentiometer is connected to the FPGA programmable gate array in the hardware acceleration fusion engine through an SPI interface; The controlled end of the IRS2092 power amplifier chip is connected to the FPGA programmable gate array in the hardware acceleration fusion engine. The high-voltage side output end and the low-voltage side output end of the IRS2092 power amplifier chip are respectively connected to both ends of the eddy current coil in the composite probe unit; The input terminal of the MAX4420 driver chip is connected to the FPGA (Field Programmable Gate Array) in the hardware acceleration fusion engine to receive the ultrasonic trigger signal. The output terminal of the MAX4420 driver chip is connected to the transmitting end of the PZT (Piezoelectric Ceramic). The input terminal of the VCA810 variable gain amplifier is connected to the receiving end of the PZT. The gain control terminal of the VCA810 variable gain amplifier is connected to the output terminal of the DAC8811 digital-to-analog converter in the hardware acceleration fusion engine. The output terminal of the VCA810 variable gain amplifier is connected to the AD8307 logarithmic amplifier. The input terminal of the RMS detector AD736 is connected to the output terminal of the AD8307 logarithmic amplifier. The output terminal of the RMS detector AD736 is connected to the hardware acceleration fusion engine.

[0012] Preferably, the hardware acceleration fusion engine includes an AD834 analog multiplier, a first OPA2188 integrator, a BBD (Bucket Brigade Device) delay line, an ADF4351 frequency synthesizer, an ADG732 multiplexer, a second OPA2188 integrator, an FPGA (Field Programmable Gate Array), a TL594 controller, and an AD7960 analog-to-digital converter; The X1 input terminal of the AD834 analog multiplier receives the capacitance signal. The Y1 input terminal of the AD834 analog multiplier receives the eddy current signal. The output terminal of the AD834 analog multiplier is connected to the non-inverting input terminal of the first OPA2188 integrator. The inverting input terminal of the first OPA2188 integrator is connected to its output terminal through an integrating capacitor. The output terminal of the first OPA2188 integrator is connected to the input terminal of the RMS detector AD736; The clock terminal of the BBD delay line is connected to the clock output terminal of the ADF4351 frequency synthesizer. The input terminal of the BBD delay line is connected to the common terminal of the ADG732 multiplexer. The output terminal of the BBD delay line is connected to the non-inverting input terminal of the second OPA2188 integrator. The inverting input terminal of the second OPA2188 integrator is connected to its output terminal through an integrating capacitor. The output terminal of the second OPA2188 integrator is connected to the input terminal of the AD7960 analog-to-digital converter; The enable terminal, clock terminal, and data terminal of the ADF4351 frequency synthesizer are all connected to the FPGA (Field-Programmable Gate Array). Each channel of the ADG732 multiplexer is connected to the FPGA. The input terminal of the ADG732 multiplexer is connected to the capacitance signal output terminal of each composite probe unit. The input terminal of the FPGA is connected to the parallel output terminal of the AD7960 analog-to-digital converter. The PWM output terminal of the FPGA is connected to the feedback input terminal of the TL594 controller. The output terminal of the TL594 controller is connected to the input terminal of the IRS2092 power amplifier chip in the heterogeneous signal conditioning chain. The AD7960 analog-to-digital converter receives the conversion start signal from the FPGA.

[0013] Preferably, the hardware acceleration fusion engine further includes a 74HC85 comparator chain, an AD8479 differential amplifier, a DAC8811 digital-to-analog converter, an AD734 analog multiplier, and an AD5290 digital potentiometer; The 74HC85 comparator chain includes four serially connected 74HC85 comparators. The input terminal of the first 74HC85 comparator in the 74HC85 comparator chain is connected to the output terminal of the AD8479 differential amplifier to receive a differential signal. The input terminals of each 74HC85 comparator are connected to the output terminal of the DAC8811 digital-to-analog converter to receive an analog threshold. The output terminal of the last 74HC85 comparator is connected to the input / output terminal of the FPGA; The in-phase and anti-phase input terminals of the AD8479 differential amplifier are respectively connected to the output terminals of the first AD834 multiplier and the second AD834 multiplier. The input terminal of the DAC8811 digital-to-analog converter is connected to the output terminal of the FPGA to receive a dynamic threshold setting value. The AD734 analog multiplier is connected to the capacitance signal feature from the AD630 phase-locked amplifier, the eddy current signal feature from the LTC1562 programmable filter, the ultrasonic energy ratio from the RMS detector AD736, and the extended feature from the ADG732 multiplexer through a normalization feature bus. The input terminal of the AD734 analog multiplier is connected to the sliding terminal of the AD5290 digital potentiometer. The output terminal of the AD734 analog multiplier is connected to the input terminal of the FPGA, The A terminal and B terminal of the AD5290 digital potentiometer are respectively connected to power and ground. The data terminal and clock terminal of the AD5290 digital potentiometer are connected to the FPGA. The X1 input terminal of the second AD834 multiplier is connected to the output terminal of the RMS detector AD736 to receive the ultrasonic energy feature. The Y1 input terminal of the second AD834 multiplier receives the temperature compensation signal of the dynamic environment compensation network.

[0014] Preferably, the dynamic environment compensation network includes a DS18B20 temperature sensor, a KFG-5-120 strain gauge, an INA826 instrumentation amplifier, an AD7124-8 analog-to-digital converter, and a PID compensator; The output end of the DS18B20 temperature sensor is connected to the input end of the AD7124-8 analog-to-digital converter. The clock end of the AD7124-8 analog-to-digital converter is connected to the clock end of the FPGA programmable gate array in the hardware acceleration fusion engine. The output end of the AD7124-8 analog-to-digital converter is connected to the input end of the FPGA programmable gate array in the hardware acceleration fusion engine to transmit temperature data. The full-bridge output end of the KFG-5-120 strain gauge is connected to the input end of the INA826 instrumentation amplifier. The output end of the INA826 instrumentation amplifier is connected to the input end of the PID compensator to receive stress signals. The output end of the PID compensator is connected to the Y1 input end of the second AD834 multiplier in the hardware acceleration fusion engine.

[0015] Preferably, the industrial interface module includes a CAN transceiver TCAN332, a DP83848 Ethernet PHY, and an RA8875 touch screen controller; The TXD end and RXD end of the CAN transceiver TCAN332, the RMII interface of the DP83848 Ethernet PHY, and the RA8875 touch screen controller are all connected to the input / output end of the FPGA programmable gate array in the hardware acceleration fusion engine.

[0016] Preferably, the power supply module includes a 24V industrial power supply, an LT8645 multi-channel voltage regulator, a π-type filter, a TPS54335 buck converter, a TPS3809 monitoring chip, and a TVS tube SMAJ40A; The input end of the LT8645 multi-channel voltage regulator is connected to the 24V industrial power supply. The output end of the LT8645 multi-channel voltage regulator is powered through a π-type filter. The enable end of the TPS54335 buck converter is connected to the reset output end of the TPS3809 monitoring chip. The output end of the LT8645 multi-channel voltage regulator outputs power. The anode of the TVS tube SMAJ40A is connected in parallel to the positive pole of the 24V industrial power supply, and the cathode of the TVS tube SMAJ40A is grounded.

[0017] The present invention has the following beneficial effects: When the present invention is working, the six-modal sensor array cooperates with components such as vertical cavity surface emitting lasers and beam splitting prisms to realize photoelectric signal conversion and preliminary amplification. In the heterogeneous signal conditioning chain, the capacitor plates, eddy current coils, and PZT piezoelectric ceramics are respectively driven by different signal generators and power amplifier chips to detect various characteristics, and are processed by filtering, demodulation, etc. After quantization, each signal is input into the hardware acceleration fusion engine together with the capacitor-eddy current characteristics. The dynamic environmental compensation network monitors environmental factors and performs signal correction. The characteristics after fusion processing are used to determine the type, and finally the judgment result is output to achieve online detection of aluminum profile defects while maintaining the power consumption of the entire machine in an industrial environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 It is a structural block diagram of the present invention.

[0020] In the figure, 1. Six-modal sensor array; 2. Heterogeneous signal conditioning chain; 3. Hardware-accelerated fusion engine; 4. Dynamic environmental compensation network; 5. Industrial interface module; 6. Power module. DETAILED DESCRIPTION

[0021] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0022] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0023] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0024] In the description of the present invention, it should be understood that the orientation or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the orientation or positional relationships shown in the drawings, or the orientation or positional relationships in which the inventive product is customarily placed during use, or the orientation or positional relationships commonly understood by those skilled in the art. These are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation on the present invention.

[0025] In addition, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and should not be construed as indicating or implying relative importance.

[0026] In the description of the present invention, it should also be noted that unless otherwise clearly specified and limited, the terms "set", "installed", "connected", "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication between two elements inside. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0027] An aluminum profile appearance quality detection system, as Figure 1 shown, includes a six-modal sensing array 1, a heterogeneous signal conditioning chain 2, a hardware acceleration fusion engine 3, a dynamic environment compensation network 4, an industrial interface module 5, and a power supply module 6; The output end of the six-modal sensing array 1 is electrically coupled to the input end of the heterogeneous signal conditioning chain 2. The six-modal sensing array 1 synchronously collects optical interference, capacitance, eddy current, ultrasonic, temperature, and strain data and performs spatio-temporal alignment of multi-modal data based on the ultrasonic propagation time. The output end of the heterogeneous signal conditioning chain 2 is communicatively connected to the analog signal input end of the hardware acceleration fusion engine 3. The heterogeneous signal conditioning chain 2 processes the multi-modal data from the six-modal sensing array 1 and transmits it. The output end of the dynamic environment compensation network 4 is connected to the gain control end of the heterogeneous signal conditioning chain 2; The compensation control end of the hardware acceleration fusion engine 3 is signal-connected to the feedback input end of the dynamic environment compensation network 4. The hardware acceleration fusion engine 3 extracts optical phase difference, capacitance-eddy current combined features, and ultrasonic energy ratio and performs non-linear feature fusion based on a preset weight to generate comprehensive defect characterization parameters and perform hierarchical determination. The digital output end of the hardware acceleration fusion engine 3 is communicatively connected to the data bus end of the industrial interface module 5. The power input end of the industrial interface module 5 is electrically connected to the multi-stage regulated output end of the power supply module 6. The industrial interface module 5 outputs the determination result externally.

[0028] Preferably, the six-modal sensing array 1 includes 64 composite probe units. The optical interference signal output terminal, the capacitance-eddy current signal output terminal, and the ultrasonic signal output terminal of each composite probe unit are respectively connected to the corresponding channel input ports of the heterogeneous signal conditioning chain 2 through shielded coaxial cables.

[0029] Preferably, the composite probe unit includes a vertical cavity surface emitting laser, a beam splitting prism, a first photodiode, a second photodiode, a capacitor plate, an AD9833 signal generator, an eddy current coil, a PZT piezoelectric ceramic, and a MAX4420 driver chip; The positive electrode of the vertical cavity surface emitting laser is connected to power through an LT3471 driver chip, and its negative electrode is grounded. The incident surface of the beam splitting prism is optically aligned with the emitting end of the vertical cavity surface emitting laser. The reflecting surface and the transmitting surface of the beam splitting prism respectively point to the photosensitive surfaces of the first photodiode and the second photodiode. The anodes of the first photodiode and the second photodiode are respectively connected to the non-inverting input terminal and the inverting input terminal of the OPA657 transimpedance amplifier in the heterogeneous signal conditioning chain 2, and the cathodes of the first photodiode and the second photodiode are both grounded; The outer plate of the capacitor plate is connected to the sine wave output terminal of the AD9833 signal generator. The AD9833 signal generator is connected to the SPI interface of the FPGA programmable gate array in the hardware acceleration fusion engine 3. The inner plate of the capacitor plate is connected to the reference input terminal of the AD630 phase-locked amplifier in the heterogeneous signal conditioning chain 2; The two ends of the eddy current coil are connected to the output terminal of the IRS2092 power amplifier chip in the heterogeneous signal conditioning chain 2. The center tap of the eddy current coil is grounded. The transmitting end of the PZT piezoelectric ceramic is connected to the output terminal of the MAX4420 driver chip in the heterogeneous signal conditioning chain 2. The receiving end of the PZT piezoelectric ceramic is connected to the non-inverting input terminal of the VCA810 variable gain amplifier in the heterogeneous signal conditioning chain 2.

[0030] Preferably, the heterogeneous signal conditioning chain 2 includes an AD8302 phase detector, an OPA657 transimpedance amplifier, an AD630 phase-locked amplifier, an LTC1562 programmable filter, an IRS2092 power amplifier chip, a MAX4420 driver chip, a VCA810 variable gain amplifier, an AD5280 digital potentiometer, and an RMS detector AD736; The output terminal of the OPA657 transimpedance amplifier is connected to the signal input terminal of the AD8302 phase detector. The output terminal of the AD8302 phase detector is connected to the reference terminal of the AD630 lock-in amplifier to output a phase difference voltage signal. The signal input terminal of the AD630 lock-in amplifier is connected to the output terminal of the LTC1562 programmable filter. The differential offset adjustment terminal of the AD630 lock-in amplifier is connected to a potentiometer to adjust the differential offset voltage, and the other end of the potentiometer is connected to the electrical setting. The output terminal of the AD630 lock-in amplifier is connected to the X1 input terminal of the AD834 analog multiplier in the hardware acceleration fusion engine 3. The signal input terminal of the LTC1562 programmable filter is connected to the output terminal of the AD630 lock-in amplifier. The output terminal of the LTC1562 programmable filter is connected to the Y1 input terminal of the AD834 analog multiplier in the hardware acceleration fusion engine 3. The output pins of the two second-order sections of the LTC1562 programmable filter are respectively connected to the two resistor terminals of the AD5280 digital potentiometer. The AD5280 digital potentiometer is connected to the FPGA programmable gate array in the hardware acceleration fusion engine 3 through the SPI interface; The controlled terminal of the IRS2092 power amplifier chip is connected to the FPGA programmable gate array in the hardware acceleration fusion engine 3. The high-voltage side output terminal and the low-voltage side output terminal of the IRS2092 power amplifier chip are respectively connected to both ends of the eddy current coil in the composite probe unit; The input terminal of the MAX4420 driver chip is connected to the FPGA programmable gate array in the hardware acceleration fusion engine 3 to receive the ultrasonic trigger signal. The output terminal of the MAX4420 driver chip is connected to the transmitting terminal of the PZT piezoelectric ceramic. The input terminal of the VCA810 variable gain amplifier is connected to the receiving terminal of the PZT piezoelectric ceramic. The gain control terminal of the VCA810 variable gain amplifier is connected to the output terminal of the DAC8811 digital-to-analog converter in the hardware acceleration fusion engine 3. The output terminal of the VCA810 variable gain amplifier is connected to the AD8307 logarithmic amplifier. The input terminal of the RMS detector AD736 is connected to the output terminal of the AD8307 logarithmic amplifier. The output terminal of the RMS detector AD736 is connected to the hardware acceleration fusion engine 3.

[0031] Preferably, the hardware acceleration fusion engine 3 includes an AD834 analog multiplier, a first OPA2188 integrator, a BBD delay line, an ADF4351 frequency synthesizer, an ADG732 multiplexer, a second OPA2188 integrator, an FPGA programmable gate array, a TL594 controller, and an AD7960 analog-to-digital converter; The X1 input terminal of the AD834 analog multiplier receives a capacitive signal, and the Y1 input terminal of the AD834 analog multiplier receives an eddy current signal. The output terminal of the AD834 analog multiplier is connected to the non-inverting input terminal of the first OPA2188 integrator. The inverting input terminal of the first OPA2188 integrator is connected to its output terminal through an integrating capacitor. The output terminal of the first OPA2188 integrator is connected to the input terminal of the RMS detector AD736; The clock terminal of the BBD delay line is connected to the clock output terminal of the ADF4351 frequency synthesizer. The input terminal of the BBD delay line is connected to the common terminal of the ADG732 multiplexer. The output terminal of the BBD delay line is connected to the non-inverting input terminal of the second OPA2188 integrator. The inverting input terminal of the second OPA2188 integrator is connected to its output terminal through an integrating capacitor. The output terminal of the second OPA2188 integrator is connected to the input terminal of the AD7960 analog-to-digital converter; The enable terminal, clock terminal, and data terminal of the ADF4351 frequency synthesizer are all connected to the FPGA programmable gate array. Each channel of the ADG732 multiplexer is connected to the FPGA programmable gate array. The input terminal of the ADG732 multiplexer is connected to the capacitive signal output terminals of each composite probe unit. The input terminal of the FPGA programmable gate array is connected to the parallel output terminal of the AD7960 analog-to-digital converter. The PWM output terminal of the FPGA programmable gate array is connected to the feedback input terminal of the TL-594 controller. The output terminal of the TL-594 controller is connected to the input terminal of the IRS2092 power amplifier chip in the heterogeneous signal conditioning chain 2. The AD7960 analog-to-digital converter receives the conversion start signal from the FPGA programmable gate array.

[0032] Preferably, the hardware acceleration fusion engine 3 further includes a 74HC85 comparator chain, an AD8479 differential amplifier, a DAC8811 digital-to-analog converter, an AD734 analog multiplier, and an AD5290 digital potentiometer; The 74HC85 comparator chain includes four serially connected 74HC85 comparators. The input terminal of the first 74HC85 comparator in the 74HC85 comparator chain is connected to the output terminal of the AD8479 differential amplifier to receive a differential signal. The input terminals of each 74HC85 comparator are connected to the output terminal of the DAC8811 digital-to-analog converter to receive an analog threshold. The output terminal of the last 74HC85 comparator is connected to the input / output terminal of the FPGA programmable gate array; The non-inverting and inverting input terminals of the AD8479 differential amplifier are respectively connected to the output terminals of the first AD834 multiplier and the second AD834 multiplier. The input terminal of the DAC8811 digital-to-analog converter is connected to the output terminal of the FPGA programmable gate array to receive the dynamic threshold setting value. The AD734 analog multiplier is connected to the capacitance signal feature from the AD630 phase-locked amplifier, the eddy current signal feature from the LTC1562 programmable filter, the ultrasonic energy ratio from the RMS detector AD736, and the extended feature from the ADG732 multiplexer through the normalization feature bus. The input terminal of the AD734 analog multiplier is connected to the sliding terminal of the AD5290 digital potentiometer, and the output terminal of the AD734 analog multiplier is connected to the input terminal of the FPGA programmable gate array. The A terminal and B terminal of the AD5290 digital potentiometer are respectively connected to power and ground. The data terminal and clock terminal of the AD5290 digital potentiometer are connected to the FPGA programmable gate array. The X1 input terminal of the second AD834 multiplier is connected to the output terminal of the RMS detector AD736 to receive the ultrasonic energy feature. The Y1 input terminal of the second AD834 multiplier receives the temperature compensation signal of the dynamic environment compensation network 4.

[0033] Preferably, the dynamic environment compensation network 4 includes a DS18B20 temperature sensor, a KFG-5-120 strain gauge, an INA826 instrumentation amplifier, an AD7124-8 analog-to-digital converter, and a PID compensator; The output terminal of the DS18B20 temperature sensor is connected to the input terminal of the AD7124-8 analog-to-digital converter. The clock terminal of the AD7124-8 analog-to-digital converter is connected to the clock terminal of the FPGA programmable gate array in the hardware acceleration fusion engine 3. The output terminal of the AD7124-8 analog-to-digital converter is connected to the input terminal of the FPGA programmable gate array in the hardware acceleration fusion engine 3 to transmit temperature data. The full-bridge output terminal of the KFG-5-120 strain gauge is connected to the input terminal of the INA826 instrumentation amplifier. The output terminal of the INA826 instrumentation amplifier is connected to the input terminal of the PID compensator to receive the stress signal. The output terminal of the PID compensator is connected to the Y1 input terminal of the second AD834 multiplier in the hardware acceleration fusion engine 3.

[0034] Preferably, the industrial interface module 5 includes a CAN transceiver TCAN332, a DP83848 Ethernet PHY, and an RA8875 touch screen controller; The TXD terminal and RXD terminal of the CAN transceiver TCAN332, the RMII interface of the DP83848 Ethernet PHY, and the RA8875 touch screen controller are all connected to the input / output terminals of the FPGA programmable gate array in the hardware acceleration fusion engine 3.

[0035] Preferably, the power supply module 6 includes a 24V industrial power supply, an LT8645 multi-channel voltage regulator, a π-type filter, a TPS54335 buck converter, a TPS3809 monitoring chip, and a TVS diode SMAJ40A; The input end of the LT8645 multi-channel voltage regulator is connected to the 24V industrial power supply. The output end of the LT8645 multi-channel voltage regulator is powered through a π-type filter. The enable end of the TPS54335 buck converter is connected to the reset output end of the TPS3809 monitoring chip. The output end of the LT8645 multi-channel voltage regulator supplies power. The anode of the TVS diode SMAJ40A is connected in parallel to the positive pole of the 24V industrial power supply, and the cathode of the TVS diode SMAJ40A is grounded.

[0036] When the system works, 64 composite probe units of the six-mode sensing array 1 synchronously trigger the optical VCSEL light source, the capacitance-eddy current excitation signal, and the ultrasonic pulse emission, ensuring that the acquisition time reference of multimodal data is consistent. According to the propagation speed of ultrasonic waves in the aluminum profile and the distance between adjacent composite probes, the propagation delay of the optical and capacitance signals relative to the ultrasonic signal is calculated, and compensated to the same time coordinate system. The synchronized optical interference signal, capacitance-eddy current signal, and ultrasonic echo are input into the heterogeneous signal conditioning chain 2. After phase-locked amplification, dynamic filtering, and gain adjustment, they are output to the dynamic environment compensation network 4; According to the difference between the real-time temperature measurement value and the reference temperature, the amplitude drift of the capacitance signal is corrected according to the linear compensation model, so that the capacitance data strictly corresponds to the change in physical thickness. The mechanical stress distribution is detected by a strain gauge, and the phase shift of the ultrasonic trigger timing is dynamically adjusted to compensate for the detection error caused by uneven contact pressure between the probe and the aluminum profile surface; Based on the voltage difference between two photodiodes and the interference fringe sensitivity coefficient, the optical phase difference feature reflecting the minute unevenness on the surface is calculated. Through the logarithmic product of the capacitance change rate and the eddy current decay time, the capacitance-eddy current combined feature characterizing the abnormal conductivity of the substrate is generated. According to the time window integral ratio of the ultrasonic emission energy and the reflection energy, the scattering intensity of the defect on the sound wave is quantified. The optical phase difference, capacitance-eddy current combined feature, and ultrasonic energy ratio are superimposed according to the preset weights, and the square root cross term of the optical and capacitance features is introduced to generate a comprehensive defect index; Through a comparator chain with three levels of thresholds, the comprehensive defect index is gradually judged with three times the standard deviation of the dynamic background noise. In the first-level judgment, if the comprehensive defect index exceeds the noise threshold, it is marked as "suspected defect". In the second-level judgment, if the optical or eddy current feature significantly exceeds the threshold, it is marked as "confirmed defect". In the third-level judgment, if the multimodal feature combination meets the preset type rules, the final classification result is output. The concave and convex bones are distinguished according to the positive and negative polarities of the optical phase difference, and the crack interference is excluded by combining the ultrasonic energy ratio. The defect type code is output through a hardware decision tree.

[0037] The system needs to implement the detection of coating defects on aluminum profiles, and its more specific working process starts from the synchronous data acquisition of the six-modal sensing array 1.

[0038] The vertical cavity surface emitting laser emits an 850nm beam, which is split by a beam splitter prism to form an interference optical path. The first photodiode and the second photodiode receive the surface topography information and convert it into a differential electrical signal. After being amplified by the OPA657 transimpedance amplifier, it is input into the AD8302 phase detector to analyze the displacement difference.

[0039] The capacitance plate detects the change in coating thickness under the excitation of a 1MHz sine wave generated by the AD9833 signal generator. The inner plate signal of the capacitance plate is demodulated by the AD630 lock-in amplifier and jointly analyzed with the induction magnetic field attenuation characteristics of the eddy current coil.

[0040] The PZT piezoelectric ceramic emits a 5MHz ultrasonic pulse under the drive of the MAX4420 driver chip. The echo signal is received by the receiving end of the PZT piezoelectric ceramic, and then undergoes time gain compensation by the VCA810 variable gain amplifier and quantization of the energy reflection ratio by the RMS detector AD736. The three-channel modal data is processed by the hardware acceleration fusion engine 3. Among them, the AD834 analog multiplier performs non-linear fusion on the capacitance change rate and the logarithm of eddy current attenuation to generate a joint feature quantity. The BBD delay line realizes the time-domain correlation analysis of 64-channel signals under the 10MHz clock of the ADF4351 frequency synthesizer. The FPGA programmable gate array extracts multi-scale defect features through wavelet transform and matches them with the pre-stored template.

[0041] At the same time, the dynamic environment compensation network 4 operates in real time: the DS18B20 temperature sensor monitors the temperature and corrects the signal amplitude through the AD7124-8 analog-to-digital converter. The KFG-5-120 strain gauge detects mechanical stress and the ultrasonic trigger phase is adjusted by the PID compensator. The fused feature data simulates a neural network through the 74HC85 comparator chain and the AD734 analog multiplier, where the weights are set by the AD5290 digital potentiometer to achieve defect classification. Finally, the defect coordinates and the types of concave bones / convex bones / cracks are synchronously output via the CAN bus TCAN332 and the DP83848 Ethernet PHY, and the RA8875 touch screen controller displays the three-dimensional thickness distribution.

[0042] The power supply module 6 provides stable power supply through the LT8645 multi-channel voltage regulator and the TPS54335 buck converter, and the TVS tube SMAJ40A realizes EMC protection under multiple working conditions. Thus, this system can output judgment results to realize the on-line detection of aluminum profile defects while maintaining the overall power consumption in an industrial environment.

[0043] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. An aluminum profile appearance quality detection system, characterized in that, It includes a six-modal sensing array (1), a heterogeneous signal conditioning chain (2), a hardware-accelerated fusion engine (3), a dynamic environment compensation network (4), an industrial interface module (5), and a power supply module (6); The output end of the six-modal sensing array (1) is electrically coupled to the input end of the heterogeneous signal conditioning chain (2). The six-modal sensing array (1) synchronously collects optical interference, capacitance, eddy current, ultrasonic, temperature, and strain data and performs spatio-temporal alignment of multi-modal data based on the ultrasonic propagation time. The output end of the heterogeneous signal conditioning chain (2) is communicatively connected to the analog signal input end of the hardware-accelerated fusion engine (3). The heterogeneous signal conditioning chain (2) processes the multi-modal data from the six-modal sensing array (1) and transmits it. The output end of the dynamic environment compensation network (4) is connected to the gain control end of the heterogeneous signal conditioning chain (2); The compensation control end of the hardware-accelerated fusion engine (3) is signal-connected to the feedback input end of the dynamic environment compensation network (4). The hardware-accelerated fusion engine (3) extracts the optical phase difference, the combined capacitance-eddy current feature, and the ultrasonic energy ratio and performs non-linear feature fusion based on a preset weight to generate a comprehensive defect characterization parameter and perform hierarchical determination. The digital output end of the hardware-accelerated fusion engine (3) is communicatively connected to the data bus end of the industrial interface module (5). The power input end of the industrial interface module (5) is electrically connected to the multi-stage regulated output end of the power supply module (6). The industrial interface module (5) outputs the determination result externally.

2. The appearance quality detection system for aluminum profiles according to claim 1, wherein The six-modal sensing array (1) includes 64 composite probe units. The optical interference signal output end, the capacitance-eddy current signal output end, and the ultrasonic signal output end of each composite probe unit are respectively connected to the corresponding channel input ports of the heterogeneous signal conditioning chain (2) through shielded coaxial cables.

3. The appearance quality detection system for aluminum profiles according to claim 2, characterized in that, The composite probe unit includes a vertical cavity surface emitting laser, a beam splitter prism, a first photodiode, a second photodiode, a capacitor plate, an AD9833 signal generator, an eddy current coil, a PZT piezoelectric ceramic, and a MAX4420 driver chip; The positive electrode of the vertical cavity surface emitting laser is powered through an LT3471 driver chip, and its negative electrode is grounded. The incident surface of the beam splitter prism is optically aligned with the emitting end of the vertical cavity surface emitting laser. The reflecting surface and the transmitting surface of the beam splitter prism respectively point to the photosensitive surfaces of the first photodiode and the second photodiode. The anodes of the first photodiode and the second photodiode are respectively connected to the non-inverting input end and the inverting input end of the OPA657 transimpedance amplifier in the heterogeneous signal conditioning chain (2). The cathodes of the first photodiode and the second photodiode are both grounded; The outer layer plate of the capacitor plate is connected to the sine wave output end of the AD9833 signal generator. The AD9833 signal generator is connected to the SPI interface of the FPGA programmable gate array in the hardware-accelerated fusion engine (3). The inner layer plate of the capacitor plate is connected to the reference input end of the AD630 phase-locked amplifier in the heterogeneous signal conditioning chain (2); Both ends of the eddy current coil are connected to the output end of the IRS2092 power amplifier chip in the heterogeneous signal conditioning chain (2). The center tap of the eddy current coil is grounded. The transmitting end of the PZT piezoelectric ceramic is connected to the output end of the MAX4420 driver chip in the heterogeneous signal conditioning chain (2), and the receiving end of the PZT piezoelectric ceramic is connected to the non-inverting input end of the VCA810 variable gain amplifier in the heterogeneous signal conditioning chain (2).

4. An aluminum profile appearance quality detection system according to claim 1, characterized in that, The heterogeneous signal conditioning chain (2) includes an AD8302 phase detector, an OPA657 transimpedance amplifier, an AD630 lock-in amplifier, an LTC1562 programmable filter, an IRS2092 power amplifier chip, a MAX4420 driver chip, a VCA810 variable gain amplifier, an AD5280 digital potentiometer, and an RMS detector AD736; The output end of the OPA657 transimpedance amplifier is connected to the signal input end of the AD8302 phase detector. The output end of the AD8302 phase detector is connected to the reference end of the AD630 lock-in amplifier to output a phase difference voltage signal. The signal input end of the AD630 lock-in amplifier is connected to the output end of the LTC1562 programmable filter. The differential offset adjustment end of the AD630 lock-in amplifier is connected to a potentiometer to adjust the differential offset voltage. The other end of the potentiometer is connected to power. The output end of the AD630 lock-in amplifier is connected to the X1 input end of the AD834 analog multiplier in the hardware acceleration fusion engine (3). The signal input end of the LTC1562 programmable filter is connected to the output end of the AD630 lock-in amplifier. The output end of the LTC1562 programmable filter is connected to the Y1 input end of the AD834 analog multiplier in the hardware acceleration fusion engine (3). The output pins of the two second-order sections of the LTC1562 programmable filter are respectively connected to the two resistor ends of the AD5280 digital potentiometer. The AD5280 digital potentiometer is connected to the FPGA programmable gate array in the hardware acceleration fusion engine (3) through an SPI interface; The controlled end of the IRS2092 power amplifier chip is connected to the FPGA programmable gate array in the hardware acceleration fusion engine (3). The high-side output end and the low-side output end of the IRS2092 power amplifier chip are respectively connected to both ends of the eddy current coil in the composite probe unit; The input terminal of the MAX4420 driver chip is connected to the FPGA programmable gate array in the hardware acceleration fusion engine (3) to receive the ultrasonic trigger signal. The output terminal of the MAX4420 driver chip is connected to the transmitting end of the PZT piezoelectric ceramic. The input terminal of the VCA810 variable gain amplifier is connected to the receiving end of the PZT piezoelectric ceramic. The gain control terminal of the VCA810 variable gain amplifier is connected to the output terminal of the DAC8811 digital-to-analog converter in the hardware acceleration fusion engine (3). The output terminal of the VCA810 variable gain amplifier is connected to the AD8307 logarithmic amplifier. The input terminal of the RMS detector AD736 is connected to the output terminal of the AD8307 logarithmic amplifier. The output terminal of the RMS detector AD736 is connected to the hardware acceleration fusion engine (3).

5. The appearance quality detection system for aluminum profiles according to claim 1, characterized in that The hardware acceleration fusion engine (3) includes an AD834 analog multiplier, a first OPA2188 integrator, a BBD delay line, an ADF4351 frequency synthesizer, an ADG732 multiplexer, a second OPA2188 integrator, an FPGA programmable gate array, a TL594 controller, and an AD7960 analog-to-digital converter; The X1 input terminal of the AD834 analog multiplier receives the capacitance signal. The Y1 input terminal of the AD834 analog multiplier receives the eddy current signal. The output terminal of the AD834 analog multiplier is connected to the non-inverting input terminal of the first OPA2188 integrator. The inverting input terminal of the first OPA2188 integrator is connected to its output terminal through an integrating capacitor. The output terminal of the first OPA2188 integrator is connected to the input terminal of the RMS detector AD736; The clock terminal of the BBD delay line is connected to the clock output terminal of the ADF4351 frequency synthesizer. The input terminal of the BBD delay line is connected to the common terminal of the ADG732 multiplexer. The output terminal of the BBD delay line is connected to the non-inverting input terminal of the second OPA2188 integrator. The inverting input terminal of the second OPA2188 integrator is connected to its output terminal through an integrating capacitor. The output terminal of the second OPA2188 integrator is connected to the input terminal of the AD7960 analog-to-digital converter; The enable terminal, clock terminal, and data terminal of the ADF4351 frequency synthesizer are all connected to the FPGA programmable gate array. Each channel of the ADG732 multiplexer is connected to the FPGA programmable gate array. The input terminal of the ADG732 multiplexer is connected to the capacitance signal output terminal of each composite probe unit. The input terminal of the FPGA programmable gate array is connected to the parallel output terminal of the AD7960 analog-to-digital converter. The PWM output terminal of the FPGA programmable gate array is connected to the feedback input terminal of the TL594 controller. The output terminal of the TL594 controller is connected to the input terminal of the IRS2092 power amplifier chip in the heterogeneous signal conditioning chain (2). The AD7960 analog-to-digital converter receives the conversion start signal from the FPGA programmable gate array.

6. The appearance quality detection system for aluminum profiles according to claim 5, characterized in that, The hardware acceleration fusion engine (3) further includes a 74HC85 comparator chain, an AD8479 differential amplifier, a DAC8811 digital-to-analog converter, an AD734 analog multiplier, and an AD5290 digital potentiometer; The 74HC85 comparator chain includes four serially connected 74HC85 comparators. The input terminal of the first 74HC85 comparator in the 74HC85 comparator chain is connected to the output terminal of the AD8479 differential amplifier to receive a differential signal. The input terminals of each 74HC85 comparator are connected to the output terminal of the DAC8811 digital-to-analog converter to receive an analog threshold. The output terminal of the last 74HC85 comparator is connected to the input / output terminal of the FPGA programmable gate array; The in-phase and anti-phase input terminals of the AD8479 differential amplifier are respectively connected to the output terminals of the first AD834 multiplier and the second AD834 multiplier. The input terminal of the DAC8811 digital-to-analog converter is connected to the output terminal of the FPGA programmable gate array to receive a dynamic threshold setting value. The AD734 analog multiplier is connected to the capacitance signal feature from the AD630 phase-locked amplifier, the eddy current signal feature from the LTC1562 programmable filter, the ultrasonic energy ratio from the RMS detector AD736, and the extended feature from the ADG732 multiplexer through a normalized feature bus. The input terminal of the AD734 analog multiplier is connected to the sliding terminal of the AD5290 digital potentiometer. The output terminal of the AD734 analog multiplier is connected to the input terminal of the FPGA programmable gate array. The A terminal and B terminal of the AD5290 digital potentiometer are respectively connected to power and ground. The data terminal and clock terminal of the AD5290 digital potentiometer are connected to the FPGA programmable gate array. The X1 input terminal of the second AD834 multiplier is connected to the output terminal of the RMS detector AD736 to receive an ultrasonic energy feature. The Y1 input terminal of the second AD834 multiplier receives a temperature compensation signal from the dynamic environment compensation network (4).

7. The appearance quality detection system for aluminum profiles according to claim 1, characterized in that The dynamic environment compensation network (4) includes a DS18B20 temperature sensor, a KFG-5-120 strain gauge, an INA826 instrumentation amplifier, an AD7124-8 analog-to-digital converter, and a PID compensator; The output end of the DS18B20 temperature sensor is connected to the input end of the AD7124-8 analog-to-digital converter. The clock end of the AD7124-8 analog-to-digital converter is connected to the clock end of the FPGA programmable gate array in the hardware acceleration fusion engine (3). The output end of the AD7124-8 analog-to-digital converter is connected to the input end of the FPGA programmable gate array in the hardware acceleration fusion engine (3) to transmit temperature data. The full-bridge output end of the KFG-5-120 strain gauge is connected to the input end of the INA826 instrumentation amplifier. The output end of the INA826 instrumentation amplifier is connected to the input end of the PID compensator to receive stress signals. The output end of the PID compensator is connected to the Y1 input end of the second AD834 multiplier in the hardware acceleration fusion engine (3).

8. The appearance quality detection system for aluminum profiles according to claim 1, wherein, The industrial interface module (5) includes a CAN transceiver TCAN332, a DP83848 Ethernet PHY, and an RA8875 touch screen controller; The TXD end and RXD end of the CAN transceiver TCAN332, the RMII interface of the DP83848 Ethernet PHY, and the RA8875 touch screen controller are all connected to the input / output end of the FPGA programmable gate array in the hardware acceleration fusion engine (3).

9. The appearance quality detection system of an aluminum profile according to claim 1, characterized in that, The power supply module (6) includes a 24V industrial power supply, an LT8645 multi-channel voltage regulator, a π-type filter, a TPS54335 buck converter, a TPS3809 monitoring chip, and a TVS tube SMAJ40A; The input end of the LT8645 multi-channel voltage regulator is connected to the 24V industrial power supply. The output end of the LT8645 multi-channel voltage regulator is powered through a π-type filter. The enable end of the TPS54335 buck converter is connected to the reset output end of the TPS3809 monitoring chip. The output end of the LT8645 multi-channel voltage regulator outputs power. The anode of the TVS tube SMAJ40A is connected in parallel to the positive pole of the 24V industrial power supply, and the cathode of the TVS tube SMAJ40A is grounded.

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