Semiconductor device power circulation and high-temperature reverse bias coupling test method and system

Abstract

The invention discloses a semiconductor device power cycle and high-temperature reverse bias coupling test method and system, and relates to the field of semiconductor device tests.The method comprises the steps that test conditions are set, and a first parameter is obtained; based on the first parameter, setting a switching period of the high-temperature reverse bias test and the power cycle test, and setting an initial state; performing first judgment on the cycle index of the to-be-tested device based on the initial state; selecting to carry out a power cycle test or a high-temperature reverse bias test based on a result of the first judgment; after aging failure of the device is detected in the power cycle test or the high-temperature reverse bias test or all preset test periods are completed, the test is ended; according to the invention, a complete power cycle test can be carried out on the device, a high-temperature reverse bias test can be carried out on the tested device while the power cycle test is carried out on other test branches, and the coupling test of power cycle and high-temperature reverse bias of the semiconductor device is realized.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor device testing, and particularly to a method and system for coupling power cycling and high-temperature reverse bias testing of semiconductor devices. Background Art

[0002] Power semiconductor devices, as core components for energy conversion and transmission, are widely used in fields such as new energy vehicles, rail transit, and industry. In order to ensure the stability of semiconductor devices in various products, many devices need to undergo some necessary aging and screening tests before use to ensure the reliable operation of the devices. Power cycling test is one of the most important reliability tests for power semiconductors and is also the most core reliability assessment before the device leaves the factory. Its principle is to heat the semiconductor device under test by applying a certain current, and then cool the semiconductor device under test through a water cooling system by cutting off the current, and repeat the process of heating and cooling to approximately simulate the actual operating conditions of the semiconductor device to predict the long-term operating life and reliability of the device; high-temperature reverse bias test is a key test to verify the working stability and reliability of power devices at high temperatures. Its principle is to apply a reverse bias voltage to the drain-source terminals of the semiconductor device under test and monitor the change in leakage current to verify the leakage current of the power device under long-term high-temperature stable operation.

[0003] Currently, the power cycling test device and high-temperature reverse bias test device for semiconductor devices are generally independent test machines. Such machines are expensive, and if purchased specifically, it will be a large expense for the testing company or department. Summary of the Invention

[0004] In view of the above problems, the present invention is proposed.

[0005] Therefore, the technical problem solved by the present invention is: the problems of independent equipment, high cost, large space occupation, and complex operation in the power cycling test and high-temperature reverse bias test of semiconductor devices.

[0006] To solve the above technical problems, the present invention provides the following technical solutions:

[0007] In a first aspect, an embodiment of the present invention provides a method for coupling power cycling and high-temperature reverse bias testing of semiconductor devices, including:

[0008] Setting test conditions and obtaining a first parameter;

[0009] Based on the test conditions and the first parameter, setting the switching period between the high-temperature reverse bias test and the power cycling test, and setting the initial state;

[0010] Based on the switching period and the initial state, making a first judgment on the number of cycles of the device under test;

[0011] Based on the result of the first judgment, select to perform a power cycle test or a high-temperature reverse bias test;

[0012] When device aging failure is detected during the power cycle test or the high-temperature reverse bias test, or after all preset test cycles are completed, the test ends.

[0013] As a preferred solution of the power cycle and high-temperature reverse bias coupling test method for semiconductor devices, wherein:

[0014] The first judgment of the number of cycles of the device under test based on the switching period and the initial state includes:

[0015] Judge whether the number of cycles of the device under test undergoing the power cycle test is less than the number of switching periods, and obtain the first judgment result.

[0016] As a preferred solution of the power cycle and high-temperature reverse bias coupling test method for semiconductor devices, wherein:

[0017] The selection of performing a power cycle test or a high-temperature reverse bias test based on the result of the first judgment includes:

[0018] When the first judgment result indicates that the number of cycles of the power cycle test of the device under test is less than the number of switching periods, perform the power cycle test.

[0019] When the first judgment result indicates that the number of cycles of the power cycle test of the device under test is greater than or equal to the number of switching periods, perform a third judgment: judge whether the test branch control switch is off;

[0020] When the third judgment result indicates that the test branch switch is not off, continue the power cycle test until the third judgment result indicates that the test branch switch is off;

[0021] When the third judgment result indicates that the test branch switch is off, perform the high-temperature reverse bias test.

[0022] As a preferred solution of the power cycle and high-temperature reverse bias coupling test method for semiconductor devices, wherein:

[0023] The power cycle test includes:

[0024] Calculate the cyclic thermal resistance of the device under test;

[0025] Based on the cyclic thermal resistance, perform a second judgment: judge whether the device under test is aging and failing;

[0026] When the second judgment result indicates that the device under test fails, end the test;

[0027] When the second judgment result indicates that the device under test does not fail, continue the power cycle test.

[0028] As a preferred solution for the power cycle and high temperature reverse bias coupling test method of semiconductor devices, wherein:

[0029] The high temperature reverse bias test includes:

[0030] When the high-temperature environment test duration in the high-temperature reverse bias test ends, the water cooler is controlled to cool down to the set temperature. After the water cooler reaches a stable cooling state, the leakage current of the device under test is obtained, and the fourth judgment is performed: whether the device has aged and failed in the high-temperature reverse bias test.

[0031] As a preferred solution for the power cycle and high temperature reverse bias coupling test method of semiconductor devices, wherein:

[0032] The high temperature reverse bias test also includes:

[0033] When the fourth judgment result indicates that the device has aged and failed in the high-temperature reverse bias test, the test is terminated;

[0034] When the fourth judgment result indicates that the device has not aged and failed in the high-temperature reverse bias test, the DC voltage source is controlled to be turned off until the DC voltage source is stepped down and stabilized, and then the third judgment is performed;

[0035] When the third judgment result indicates that the test branch switch is not turned off, no action is taken until the third judgment result indicates that the test branch switch is turned off;

[0036] When the third judgment result indicates that the test branch control switch is turned off, a power cycle experiment is performed.

[0037] In a second aspect, an embodiment of the present invention provides a semiconductor device power cycling and high-temperature reverse bias coupling test system, comprising:

[0038] Initialization module, used to set test conditions and obtain the first parameter;

[0039] A condition state setting module, used to set a switching period of the high temperature reverse bias test and the power cycle test and set an initial state based on the test condition and the first parameter;

[0040] A judgment module, configured to make a first judgment on the number of cycles of the device under test based on the switching period and the initial state;

[0041] The test module is used to select a power cycle test or a high temperature reverse bias test based on the result of the first judgment; the test ends when device aging failure is detected during the power cycle test or the high temperature reverse bias test, or after all preset test cycles are completed.

[0042] As a preferred solution for semiconductor device power cycling and high-temperature reverse bias coupling test system, it:

[0043] The test system includes multiple test branches connected in parallel, a DC voltage source, a DC current source, and a water cooler;

[0044] Each test branch includes: a test branch switch, a device under test connected in series with the test branch switch, a DC voltage source connected in parallel with the device under test, and the DC voltage source provides a drain-source reverse bias voltage for the device under test; an auxiliary device connected in parallel with the device under test, and each auxiliary device conducts only when the branch where it is located is in a power cycling state, and is used to replace the device under test;

[0045] Each test branch forms a closed loop with the DC current source, and each test branch switch conducts only once within a power cycling test period;

[0046] The DC current source is used to provide a constant load current for the test branch, and the water cooler is provided corresponding to the test branch. The water cooler is used to cool each device under test and provide a high-temperature reverse bias test environment.

[0047] In a third aspect, an embodiment of the present invention provides a computing device, including:

[0048] A memory and a processor;

[0049] The memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions. When the one or more programs are executed by the one or more processors, the one or more processors implement the semiconductor device power cycling and high-temperature reverse bias coupling test method as described in any embodiment of the present invention.

[0050] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, which stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, the semiconductor device power cycling and high-temperature reverse bias coupling test method as described above is implemented.

[0051] The beneficial effects of the present invention: By controlling the switches of the auxiliary device and the DC voltage source, the test branch is controlled to perform a power cycling test or a high-temperature reverse bias test. This not only enables the device to perform a complete power cycling test, but also enables the high-temperature reverse bias test on the device under test while the other test branches are performing a power cycling test, realizing the coupling test of semiconductor device power cycling and high-temperature reverse bias. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0053] Figure 1 is the overall flowchart of the power cycle and high-temperature reverse bias coupling test method for semiconductor devices according to the present invention;

[0054] Figure 2 is the test circuit topology diagram of the power cycle and high-temperature reverse bias coupling test method for semiconductor devices according to the present invention. Detailed implementation manners

[0055] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following describes the detailed implementation manners of the present invention in conjunction with the accompanying drawings of the specification. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0056] Many specific details are set forth in the following description in order to fully understand the present invention, but the present invention may also be implemented in other ways different from those described herein. Those skilled in the art can make similar generalizations without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed below.

[0057] Secondly, the so-called "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation manner of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that excludes other embodiments.

[0058] Embodiment 1

[0059] Referring to Figure 1 , which is the first embodiment of the present invention. This embodiment provides a power cycle and high-temperature reverse bias coupling test method for semiconductor devices, including:

[0060] S100: Set test conditions and obtain the first parameter;

[0061] S200: Based on the test conditions and the first parameter, set the switching period of the high-temperature reverse bias test and the power cycle test, and set the initial state;

[0062] S300: Based on the switching period and the initial state, make a first judgment on the number of cycles of the device under test;

[0063] S400: Based on the result of the first judgment, select to perform a power cycle test or a high-temperature reverse bias test;

[0064] S500: The test ends when device aging failure is detected during power cycle testing or high-temperature reverse bias testing, or after all preset test cycles are completed.

[0065] It should be noted that through steps S100 - S500, two test functions are integrated onto one platform, making full use of device resources and reducing the capital expenditure required to purchase two independent test devices. In addition, since only one system needs to be maintained and supported, the long-term operating cost is also reduced. The space occupied by a single integrated platform is much smaller than that of two independent test machines. The multi-functional integrated platform also means that the test time can be flexibly arranged according to requirements, thus better managing the space resources and time resources of the laboratory. In terms of the operation process, technicians only need to be familiar with one set of operating systems and interfaces, which can reduce training time and improve work efficiency. At the same time, performing two types of tests on the same platform enhances data consistency and provides a more reliable result comparison, especially in tests that require correlative analysis of power cycle results and high-temperature reverse bias tests.

[0066] Embodiment 2

[0067] Referring to Figure 1 - Figure 2 , as an embodiment of the present invention, based on the previous embodiment, a method for coupling power cycle and high-temperature reverse bias testing of semiconductor devices is provided, including:

[0068] In the embodiment of the present application, setting the test conditions and obtaining the first parameter in step S100 include:

[0069] Using a constant temperature device to heat the device to a specified temperature and obtaining the relationship curve between the junction temperature and saturation voltage drop of the device under test;

[0070] The first parameter includes the cycle period, heating time, cooling time, maximum junction temperature, minimum junction temperature of the power cycle, the test duration, test voltage, and storage temperature of the high-temperature reverse bias test, the initial saturation voltage drop and initial thermal resistance value of the device.

[0071] Determine the test conditions before the experiment and input the corresponding failure setting value to facilitate determining the judgment condition for device aging failure. When the saturation voltage drop or thermal resistance value exceeds the failure setting value during the test, the test stops and a failure notice is issued.

[0072] In another possible implementation, when heating the device under test to the specified temperature, a PID temperature control system can be used, setting the heating rate to 5°C / min until the target temperature is reached; thermocouple sensors are arranged on the front and back surfaces of the device to monitor the temperature change in real time: if the temperature fluctuation exceeds ±0.5°C, the heating power is automatically adjusted; according to the heat capacity and heat dissipation characteristics of the device, optimize the heating time so that the device is stable at the target temperature for at least 5 minutes before testing.

[0073] When obtaining the junction temperature - saturation voltage drop relationship curve, measurement points can be set every 10 °C within the junction temperature range of the device (such as 25 °C to 150 °C); in a constant temperature environment, by adjusting the load current (such as 10 mA, 100 mA, 500 mA), measure the saturation voltage drop (VCE) of the device; use a high - precision digital multimeter (such as Keysight 34461A) to record data, ensuring that the measurement accuracy is within ±0.1%.

[0074] In the embodiment of the present application, in the above - mentioned step S200, based on the test conditions and the first parameter, set the switching period of the high - temperature reverse bias test and the power cycle test. The set initial state includes:

[0075] According to the test duration of the high - temperature reverse bias and the cycle period of the power cycle, evenly distribute the switching period of the two tests of the device under test, namely the high - temperature reverse bias test and the power cycle test;

[0076] Exemplarily, for example, after the device under test undergoes 100 cycles of power cycle test, it switches to the high - temperature reverse bias test. After 100 cycles of power cycle test are carried out on other branches, the device under test switches back to the power cycle test, and so on.

[0077] As Figure 2 shown, it is the topological diagram of the power cycle and high - temperature reverse bias coupling test circuit of the semiconductor device, where T1 and T2 are measurement branch switches, T3 is an auxiliary device, DUT is the device under test, S1 is the switch in series with the DC voltage source, and V is the voltage of the DC voltage source.

[0078] Set the drive pulse signals for controlling IGBTs T1 and T2 according to the cycle period, heating time, and cooling time of the power cycle; set the mechanical relay switches S1 and S2 and the gate drive pulses of the device under test and the auxiliary IGBT T3 according to the switching period of the two tests.

[0079] It should be noted that IGBT represents Insulated Gate Bipolar Transistor.

[0080] In the embodiment of the present application, in the above - mentioned step S300, based on the switching period and the initial state, the first judgment on the number of cycles of the device under test includes:

[0081] Judge whether the number of cycles of the device under test undergoing the power cycle test is less than the number of switching periods to obtain the first judgment result;

[0082] In another possible implementation, use a single - chip microcomputer (such as STM32) or FPGA to implement the counting of the number of cycles; every time a power cycle test is completed, the counter is incremented by 1.

[0083] In the embodiments of the present application, the selection of performing a power cycle test or a high-temperature reverse bias test based on the result of the first judgment in step S400 includes:

[0084] When the result of the first judgment indicates that the number of power cycle test cycles of the device under test is less than the switching period number, a power cycle test is performed;

[0085] Specifically, the power cycle test includes:

[0086] Measure and store the saturation voltage drop, case surface temperature, virtual junction temperature, test current, saturation voltage drop, current power cycle number of the device under test during the power cycle test, the test duration, voltage value, temperature and leakage current of the device under test during the high-temperature reverse bias;

[0087] Obtain the drive pulse signals of the switches of each test branch;

[0088] In the initial state, switch S1 is open, S2 is closed, and auxiliary IGBT T3 is off, ready to perform the power cycle test.

[0089] According to the measured saturation voltage drop of the device under test at a small current, combined with the junction temperature - saturation voltage drop relationship curve, obtain the junction temperature of the device under test, and calculate the power loss according to the load current and the saturation voltage drop of the device under test at the load current, expressed as:

[0090] P V =V CE ·I Load

[0091] where, P V represents the power loss, I Load represents the load current, and V CE represents the saturation voltage drop of the device under test at the load current.

[0092] Determine the cyclic thermal resistance of the device under test according to the junction temperature, power loss and case surface temperature of the device under test, expressed as:

[0093]

[0094] where, R thjhs represents the cyclic thermal resistance of the device under test, T j represents the junction temperature of the device under test, and T C represents the case surface temperature.

[0095] Perform a second judgment: determine whether the device under test is aged and failed;

[0096] Specifically, when the measured thermal resistance and the measured saturation voltage drop exceed the failure set value, the device under test is aged and failed, otherwise, the device is not failed.

[0097] Exemplarily, for different criteria for device aging failure in power cycle testing, the corresponding thresholds are different. In the AQG324 standard, when the saturation voltage drop under load current rises by 5%, the bonding wire is considered to have failed, and when the thermal resistance rises by 20%, the solder layer is considered to have failed.

[0098] When the second judgment result indicates that the device under test has failed, the high-voltage source, load current, switches S1 and S2, and the drive circuit are sequentially cut off, and the test ends.

[0099] When the second judgment result indicates that the device under test has not failed, the power cycle test continues.

[0100] When the first judgment result indicates that the number of power cycle test cycles of the device under test is greater than or equal to the switching period number, prepare to switch from the power cycle test to the high-temperature reverse bias test, and perform a third judgment: determine whether the test branch control switch T1 is turned off.

[0101] When the third judgment result indicates that the test branch switch is not turned off, continue the power cycle test until the third judgment result indicates that the test branch switch is turned off.

[0102] When the third judgment result indicates that the test branch switch is turned off, perform the test switch and start the high-temperature reverse bias test.

[0103] Specifically, the high-temperature reverse bias test includes:

[0104] Control the auxiliary IGBT T3 to conduct, disconnect the switch S2 in series with the voltage source, close the switch S1 in series with the test branch switch, and turn off the device under test; control the DC voltage source to start, and when the voltage supply of the DC voltage source is stable, obtain and record the leakage current of the device under test.

[0105] It should be noted that the leakage current of the device under test is used to draw the change curve of the leakage current of the device under test, so as to determine the device failure.

[0106] When the high-temperature environment test duration in the high-temperature reverse bias test ends, control the water cooler to cool down to the set temperature. After the water cooler reaches the stable cooling state, obtain the leakage current of the device under test and perform a fourth judgment: determine whether the device ages and fails in the high-temperature reverse bias test.

[0107] Specifically, when the leakage current of the device rises to the set threshold or shows a rapid increase, it is determined that the device ages and fails in the high-temperature reverse bias test.

[0108] It should be noted that the duration of the high-temperature environment test needs to be determined according to the test requirements of the operator before the experiment; since the constant temperature device (or water-cooling device) will experience a certain fluctuation before reaching the set temperature, when the temperature fluctuation does not exceed 2°C within 5 minutes, it is considered to reach the state of stable temperature reduction. The leakage current of the device under test is mainly used for the aging process of the device under test in the high-temperature reverse bias test, and the coupling test results need to be compared and analyzed in combination with the test results of three groups of experiments: power cycling, power cycling + high-temperature gate bias, and high-temperature gate bias.

[0109] When the fourth judgment result indicates that the device fails due to aging in the high-temperature reverse bias test, the high-voltage source, load current, switches S1 and S2, and the drive circuit are sequentially cut off to end the test;

[0110] When the fourth judgment result indicates that the device does not fail due to aging in the high-temperature reverse bias test, the DC voltage source is controlled to turn off. After the DC voltage source is stable in voltage reduction, the third judgment is performed;

[0111] When the third judgment result indicates that the test branch switch is not turned off, no action is taken until the third judgment result indicates that the test branch switch is turned off;

[0112] When the third judgment result indicates that the test branch control switch T1 is turned off, the auxiliary device T3 is controlled to turn off, the switch S1 in series with the voltage source is closed, and the switch S2 in series with the test branch switch is opened, so that the device under test is turned on, and preparations are made for the power cycling experiment.

[0113] In another possible implementation manner, if it is detected that the device fails due to aging, the high-voltage source, load current, switches S1 and S2, and the drive circuit are automatically cut off, and a failure notice is issued.

[0114] If all the preset test cycles are completed, the test data is automatically saved, all power supplies are cut off, and a test completion notice is issued.

[0115] Python or MATLAB is used to analyze the test data to generate a test report, including the thermal resistance change curve, leakage current change curve, and failure analysis results of the device.

[0116] Embodiment 3

[0117] The above is a schematic solution of the power cycling and high-temperature reverse bias coupling test method for semiconductor devices in this embodiment. It should be noted that the technical solution of the power cycling and high-temperature reverse bias coupling test system for semiconductor devices belongs to the same concept as the technical solution of the above power cycling and high-temperature reverse bias coupling test method for semiconductor devices. For the details not described in detail in the technical solution of the power cycling and high-temperature reverse bias coupling test system for semiconductor devices in this embodiment, reference can be made to the description of the technical solution of the above power cycling and high-temperature reverse bias coupling test method for semiconductor devices.

[0118] This embodiment also provides a semiconductor device power cycle and high temperature reverse bias coupling test system, including:

[0119] An initialization module, configured to set test conditions and obtain a first parameter;

[0120] A condition status setting module, configured to set a switching period for high temperature reverse bias testing and power cycle testing and set an initial state based on the test conditions and the first parameter;

[0121] A judgment module, configured to make a first judgment on the number of cycles of the device under test based on the switching period and the initial state;

[0122] A test module, configured to select to perform a power cycle test or a high temperature reverse bias test based on the result of the first judgment; when device aging failure is detected during the power cycle test or the high temperature reverse bias test, or after all preset test cycles are completed, the test ends.

[0123] The test system includes multiple test branches connected in parallel, a DC voltage source, a DC current source, and a water cooler;

[0124] Each test branch includes: a test branch switch, a device under test connected in series with the test branch switch, a DC voltage source connected in parallel with the device under test, and the DC voltage source provides a drain-source reverse bias voltage for the device under test; an auxiliary device connected in parallel with the device under test, and each auxiliary device is only turned on when the branch where it is located is in a power cycle state and is used to replace the device under test;

[0125] Each test branch forms a closed loop with the DC current source, and each test branch switch is only turned on once within a power cycle test period;

[0126] The DC current source is used to provide a constant load current for the test branch, and the water cooler is set corresponding to the test branch, and the water cooler is used to cool each device under test and provide a high temperature reverse bias test environment.

[0127] This embodiment also provides a computing device, applicable to the case of a semiconductor device power cycle and high temperature reverse bias coupling test method, including:

[0128] A memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to implement the semiconductor device power cycle and high temperature reverse bias coupling test method as proposed in the above embodiment.

[0129] This embodiment also provides a storage medium, on which a computer program is stored, and when the program is executed by a processor, it implements the semiconductor device power cycle and high temperature reverse bias coupling test method as proposed in the above embodiment.

[0130] The storage medium proposed in this embodiment and the semiconductor device power cycle and high-temperature reverse bias coupling test method proposed in the above embodiment belong to the same inventive concept. Technical details not described in detail in this embodiment can be referred to in the above embodiment, and this embodiment has the same beneficial effects as the above embodiment.

[0131] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention, and they should all be covered by the scope of the claims of the present invention.

Claims

1. A power cycle and high temperature reverse bias coupling test method for semiconductor devices, characterized in that, include: Set the test conditions and obtain the first parameter; Based on the test conditions and the first parameter, setting a switching period between the high-temperature reverse bias test and the power cycle test, and setting an initial state; Based on the switching period and the initial state, a first judgment is made on the number of cycles of the device under test; Based on the result of the first judgment, selecting to perform a power cycle test or a high temperature reverse bias test; The test ends when device aging failure is detected during power cycling test or high temperature reverse bias test, or after all preset test cycles are completed.

2. The power cycle and high temperature reverse bias coupling test method for a semiconductor device according to claim 1, wherein The first determination of the number of cycles of the device under test based on the switching period and the initial state includes: It is determined whether the number of cycles of the device under test that is undergoing a power cycle test is less than the number of switching cycles to obtain a first determination result.

3. The power cycle and high-temperature reverse bias coupling test method for a semiconductor device according to claim 2, characterized in that The selecting of performing the power cycle test or the high temperature reverse bias test based on the result of the first judgment includes: When the first judgment result indicates that the number of power cycle test cycles of the device under test is less than the number of switching cycles, performing a power cycle test; When the first judgment result indicates that the number of power cycle test cycles of the device under test is greater than or equal to the number of switching cycles, a third judgment is performed: determining whether the test branch control switch is turned off; When the third judgment result indicates that the test branch switch is not turned off, the power cycle test is continued until the third judgment result indicates that the test branch switch is turned off; When the third judgment result indicates that the test branch switch is turned off, a high temperature reverse bias test is performed.

4. The power cycle and high temperature reverse bias coupling test method for a semiconductor device according to claim 3, wherein The power cycling test includes: Calculate the cyclic thermal resistance value of the device under test; Performing a second judgment based on the cyclic thermal resistance value: judging whether the device under test has aged and failed; When the second judgment result indicates that the device under test fails, the test is terminated; When the second judgment result indicates that the device under test has not failed, the power cycle test is continued.

5. The power cycle and high temperature reverse bias coupling test method for a semiconductor device according to claim 4, characterized in that, The high temperature reverse bias test includes: When the high-temperature environment test duration in the high-temperature reverse bias test ends, the water cooler is controlled to cool down to the set temperature. After the water cooler reaches a stable cooling state, the leakage current of the device under test is obtained, and the fourth judgment is performed: whether the device has aged and failed in the high-temperature reverse bias test.

6. The power cycle and high temperature reverse bias coupling test method for a semiconductor device according to claim 5, characterized in that The high temperature reverse bias test also includes: When the fourth judgment result indicates that the device has aged and failed in the high-temperature reverse bias test, the test is terminated; When the fourth judgment result indicates that the device has not aged and failed in the high-temperature reverse bias test, the DC voltage source is controlled to be turned off until the DC voltage source is stepped down and stabilized, and then the third judgment is performed; When the third judgment result indicates that the test branch switch is not turned off, no action is taken until the third judgment result indicates that the test branch switch is turned off; When the third judgment result indicates that the test branch control switch is turned off, a power cycle experiment is performed.

7. A semiconductor device power cycling and high-temperature reverse bias coupling test system, characterized in that, include: Initialization module, used to set test conditions and obtain the first parameter; A condition state setting module, used to set a switching period of the high temperature reverse bias test and the power cycle test and set an initial state based on the test condition and the first parameter; A judgment module, configured to make a first judgment on the number of cycles of the device under test based on the switching period and the initial state; A testing module, configured to select a power cycle test or a high-temperature reverse bias test based on a result of the first judgment; The test ends when device aging failure is detected during power cycling test or high temperature reverse bias test, or after all preset test cycles are completed.

8. The semiconductor device power cycle and high temperature reverse bias coupling test system according to claim 7, wherein, include: Multiple test branches connected in parallel, a DC voltage source, a DC current source, and a water cooler; The test branch includes: a test branch switch, a device under test connected in series with the test branch switch, a DC voltage source connected in parallel with the device under test, and the DC voltage source provides a drain-source reverse bias voltage for the device under test; an auxiliary device connected in parallel with the device under test, and each auxiliary device conducts only when the branch where it is located is in a power cycling state, and is used to replace the device under test; Each test branch forms a closed loop with the DC current source, and each test branch switch conducts only once within a power cycling test period; The DC current source is used to provide a constant load current for the test branch, the water cooler is provided corresponding to the test branch, and the water cooler is used to cool each device under test and provide a high-temperature reverse bias test environment.

9. A computing device, comprising: A memory and a processor; The memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions. When the computer-executable instructions are executed by the processor, the steps of the semiconductor device power cycling and high-temperature reverse bias coupling test method according to any one of claims 1 to 6 are implemented.

10. A computer-readable storage medium, which stores computer-executable instructions. When the computer-executable instructions are executed by a processor, the steps of the semiconductor device power cycling and high-temperature reverse bias coupling test method according to any one of claims 1 to 6 are implemented.

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