Power electronic real-time simulation system and simulation method suitable for Simulink model

Abstract

The invention discloses a power electronic real-time simulation system and simulation method suitable for a Simulink model, the system comprises an upper computer, an FPGA resolver and a controller which are connected in sequence, the upper computer is used for loading a power electronic model built in Simulink and performing model analysis and circuit analysis on the power electronic model to obtain circuit model parameters; the FPGA resolver is used for pre-storing the circuit model parameters into an internal random access memory, and reading the circuit model parameters after receiving a real-time simulation calculation starting signal issued by the upper computer; and the controller is used for sending a control signal, so that the FPGA resolver starts iterative simulation calculation after reading circuit model parameters and receiving the control signal to obtain voltage and current signals of nodes and / or branches in the power electronic model, and sends the voltage and current signals to the upper computer for waveform display. According to the invention, real-time simulation of the power electronic model can be conveniently and quickly completed, the method has universality, and the efficiency of power electronic project development can be remarkably improved.

Description

Technical Field

[0001] The present invention relates to the technical field of real-time simulation, and particularly to a power electronics real-time simulation system and a simulation method applicable to Simulink models. Background Art

[0002] With the in-depth research on power electronics technology, power electronic devices have become more complex and large-scale, and the corresponding design and debugging difficulties have become higher and higher. The requirements for high-precision and small-step power electronics real-time simulation have gradually increased. Therefore, in the design and development process of power electronic products, it is very necessary to use real-time simulation technology to simulate and verify the products.

[0003] Power electronics real-time simulation technology is to convert a pure digital power electronics model into a real-time running simulation model. Currently, the commonly used real-time simulations mainly include two types: based on CPU (Central Processing Unit) and based on FPGA (Field Programmable Gate Array). Due to its serial computing architecture, it is difficult for CPU to achieve high-precision simulation below the microsecond level; while for the real-time simulation technology based on FPGA, although it can achieve high-precision and fast simulation, as a hardware circuit, FPGA requires certain hardware programming capabilities when building a simulation model, and its versatility is relatively low, which cannot meet the development needs of power electronic products. Summary of the Invention

[0004] The present invention aims to solve at least to some extent the technical problems in the related technologies. For this reason, the first object of the present invention is to provide a power electronics real-time simulation system applicable to Simulink models. This system enables users not to master the relevant hardware programming languages of FPGA during use. They only need to build the required power electronics model in Simulink software, and directly run this system after completing the offline simulation verification of the power electronics model, then they can conveniently and quickly complete the real-time simulation of the power electronics model. Therefore, the present invention can achieve seamless connection between Simulink offline simulation and real-time simulation. After the offline simulation verification is completed, the power electronics model does not need to be modified, and real-time simulation can be directly carried out. Therefore, the present invention has the advantages of convenience and speed, and has versatility, and can meet the development needs of power electronic products.

[0005] The second object of the present invention is to provide a power electronics real-time simulation method applicable to Simulink models.

[0006] To achieve the above object, the present invention is realized through the following technical solutions:

[0007] A power electronics real-time simulation system applicable to Simulink models includes:

[0008] The host computer is used to load the power electronics model built in Simulink, perform model parsing and circuit analysis on the power electronics model to obtain circuit model parameters, and send the circuit model parameters externally;

[0009] The FPGA solver is used to receive the circuit model parameters, pre-store the circuit model parameters in the internal random access memory, and read the circuit model parameters after receiving the real-time simulation calculation start signal sent by the host computer;

[0010] The controller is used to send control signals so that the FPGA solver starts iterative simulation calculation after reading the circuit model parameters and receiving the control signals, obtains the voltage and current signals of the nodes and / or branches in the power electronics model, and sends the voltage and current signals to the host computer for waveform display.

[0011] Preferably, the controller is further used to receive the analog signals sent by the FPGA solver, and re-send control signals to the FPGA solver after processing to complete real-time simulation closed-loop control.

[0012] Preferably, the circuit model parameters include the incidence matrix of the actual circuit in the power electronics model, the branch admittance matrix, the initial values of the branch equivalent current source vectors, and the inverse nodal admittance matrix, where the incidence matrix is used to reflect the association situation between each branch.

[0013] Preferably, the host computer includes a Simulink model loading module, which is used to load the power electronics model built in Simulink and decompress the power electronics model into an xml file.

[0014] Preferably, the host computer further includes a model parsing module, which is used to parse the xml file into Component files, Line files, and Branch files, and perform circuit analysis based on the three types of parsed files to obtain the circuit model parameters.

[0015] Preferably, the Component file is used to identify various components in the power electronics model, and obtain the names of each component, the ID of each component, the type of each component, and the node list and branch list connected by each component.

[0016] Preferably, the Line file is used to identify the connection situation between each component and the signals to be measured in the power electronics model, and the host computer is further used to send the signals to be measured to the FPGA solver.

[0017] Preferably, the Branch file is used to identify each branch of the power electronics model.

[0018] Preferably, the host computer further includes:

[0019] A communication setting module, configured to set the communication type, set the local IP and local communication port of the host computer, and set the remote IP and remote communication port of the FPGA solver for communicating with the host computer;

[0020] A data sending module, configured to send circuit model parameters and signals to be measured;

[0021] An oscilloscope configuration module, configured to select real-time simulation data to be observed, bind the real-time simulation data to oscilloscope channels, and set the gain of the output waveform;

[0022] A sampling rate setting module, configured to modify the sampling frequency of the virtual oscilloscope;

[0023] A virtual oscilloscope, configured to display waveforms of voltage and current data obtained by the FPGA solver through calculation.

[0024] To achieve the above object, a second aspect of the present invention provides a power electronics real-time simulation method applicable to a Simulink model, which is applied to the above-mentioned power electronics real-time simulation system. The method includes:

[0025] Build a power electronics model in Simulink;

[0026] The host computer loads the power electronics model, performs model parsing and circuit analysis on the power electronics model to obtain circuit model parameters, and sends the circuit model parameters to the FPGA solver;

[0027] The FPGA solver receives the circuit model parameters, pre-stores the circuit model parameters in the internal random access memory, and after receiving the real-time simulation calculation start signal sent by the host computer, reads the circuit model parameters, and at the same time receives the control signal sent by the controller to start iterative simulation calculation;

[0028] Send the analog signal obtained by the iterative simulation calculation to the controller to implement real-time simulation closed-loop control, and at the same time send the voltage and current signals of the nodes and / or branches in the power electronics model at each simulation step to the host computer for waveform display.

[0029] The present invention has at least the following technical effects:

[0030] The present invention provides a power electronics real-time simulation system and a simulation method applicable to Simulink models. In this system, users do not need to master the relevant hardware programming languages of FPGAs during use. They only need to build the power electronics models to be simulated in Simulink software, and directly run this system after completing the offline simulation verification of the power electronics models, then they can conveniently and quickly complete the real-time simulation of the power electronics models, solving the problems of high difficulty in use and low practicability of existing real-time simulations. Since the present invention can achieve seamless connection between Simulink offline simulation and real-time simulation, and the power electronics models do not need to be modified after the offline simulation verification and can be directly subjected to real-time simulation, the present invention has the advantages of convenience and speed, and has universality. It can meet the development needs of power electronics products and can significantly improve the development efficiency of power electronics projects.

[0031] Additional aspects and advantages of the present invention will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a structural block diagram of the power electronics real-time simulation system applicable to Simulink models according to an embodiment of the present invention.

[0033] Figure 2 It is a schematic diagram of the real-time simulation host computer software according to an embodiment of the present invention.

[0034] Figure 3 It is a flowchart of the power electronics real-time simulation method applicable to Simulink models according to an embodiment of the present invention.

[0035] Figure 4 It is a schematic diagram of the communication settings of the real-time simulation host computer software according to an embodiment of the present invention.

[0036] Figure 5 It is a schematic diagram of the virtual oscilloscope part of the real-time simulation host computer software according to an embodiment of the present invention.

[0037] Figure 6 It is a flowchart of the real-time simulation calculation of the FPGA solver according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0038] The following details this embodiment, and the examples of the embodiment are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0039] The power electronic real-time simulation system and simulation method applicable to Simulink (simulation software) models of this embodiment will be described below with reference to the accompanying drawings.

[0040] Figure 1 It is a structural block diagram of the power electronic real-time simulation system applicable to Simulink models of the embodiments of the present invention. As Figure 1 shown, the power electronic real-time simulation system applicable to Simulink models includes a host computer 10, an FPGA solver 20, and a controller 30 that are connected in sequence.

[0041] The host computer 10 is used to load the power electronic model built in Simulink, perform model parsing and circuit analysis on the power electronic model to obtain circuit model parameters, and send the circuit model parameters to the FPGA solver 20 through Ethernet UDP (a user datagram protocol) communication; the FPGA solver 20 receives the circuit model parameters, pre-stores the circuit model parameters in the internal random access memory, and after receiving the real-time simulation calculation start signal sent by the host computer 10, reads the circuit model parameters from the random access memory, and at the same time starts iterative simulation calculation after receiving the control signal sent by the controller 30, obtains the voltage and current signals of the nodes and / or branches in the power electronic model, and sends the voltage and current signals to the host computer 10 through Ethernet for waveform display.

[0042] Among them, the FPGA solver 20 also sends the calculated analog signal to the controller 30, so that the controller 30 re-sends the control signal to the FPGA solver 20 after receiving and processing the analog signal, thereby completing the real-time simulation closed-loop control.

[0043] Specifically, the working principle of this system is divided into the following steps:

[0044] (1) Build a model library in Simulink software: Four IO (input / output) modules of analog input (AI), analog output (AO), digital input (DI), and digital output (DO). Identify and save the branches connected to the self-built model library and the Scope (display output signal module).

[0045] (2) Decompress the Simulink model file: The host computer 10 can perform decompression processing on the.slx simulation model built in Simulink software. In this embodiment, the host computer 10 includes a load Simulink model module, that is, Figure 2 the load file module 1 in it, which is used to load the power electronic model built in Simulink software and decompress the power electronic model into an xml (extensible markup language) file.

[0046] (3) XML file parsing function: The decompressed system_root.xml file contains relevant parameters of the circuit model required for real-time simulation. In this embodiment, the host computer 10 further includes a model parsing module, namely Figure 2 the circuit analysis module 2 in

[0047] which is used to parse the xml file into Component (composition) files, Line (connection) files, and Branch (branch) files, and perform circuit analysis based on the three types of parsed files to obtain circuit model parameters. Among them, the Component file can identify various components in the power electronics model, and obtain the names of each component, the ID (identity identifier) of each component, the type of each component, and the node list and branch list connected by each component. The Line file can identify the connection situation between components and the signals to be measured in the power electronics model; it should be noted that the host computer 10 is also used to send the signals to be measured to the FPGA solver 20. The Branch file can identify each branch of the power electronics model.

[0048] (4) Establish communication between the host computer 10 and the FPGA solver 20 based on UDP Ethernet. All UDP data packets sent by the host computer 10 are designed with a start bit and an end bit to facilitate the FPGA solver 20 to receive. In this embodiment, the host computer 10 further includes a communication setting module, namely Figure 2 the communication connection module 3 in Figure 2 which is used to set the communication type, set the local IP (Internet Protocol address) and local communication port of the host computer 10, and set the remote IP and remote communication port of the FPGA solver 20 communicating with the host computer 10. The host computer 10 also includes

[0049] the send data module 4 in

[0050] which is used to send circuit model parameters and signals to be measured.

[0049] (5) The FPGA solver 20 receives the circuit matrix, that is, the circuit model parameters transmitted by the host computer 10, and runs the internal calculation model after receiving the real-time simulation calculation start signal. And after each simulation step calculation is completed, according to the requirements of the host computer 10, the corresponding data is sent back to the host computer 10; at the same time, the data required for closed-loop control is output to the controller 30 through a DAC (digital-to-analog converter).

[0050] (6) The host computer 10 receives the calculation results of the FPGA solver 20 and converts the data into waveforms for display on the virtual oscilloscope 7; the controller 30 receives the analog signals sent by the FPGA solver 20, processes them, and then resends control signals to the FPGA solver 20 to complete real-time simulation closed-loop control.

[0051] In this embodiment, the host computer 10 further includes Figure 2 the oscilloscope configuration module 5 in, and the real-time simulation data to be observed can be selected through the oscilloscope configuration module 5, the real-time simulation data is bound to the oscilloscope channel, and the gain of the output waveform is set. The host computer 10 further includes Figure 2 the sampling rate setting module 6 in and the above-mentioned virtual oscilloscope 7, and the sampling frequency of the virtual oscilloscope 7 can be modified through the sampling rate setting module 6, and the voltage and current data calculated by the FPGA solver 20 are displayed in waveform through the virtual oscilloscope 7.

[0052] For the host computer 10, more specifically, the main components of the host computer 10 include a toolbar, an oscilloscope configuration module 5, and a virtual oscilloscope 7. The toolbar part has four function modules: a load file module 1, a circuit analysis module 2, a communication connection module 3, and a send data module 4. Among them, the load file module 1 is responsible for reading the power electronics model built in Simulink, decompressing the model, creating a project in the folder where the circuit model is located, and generating a system_root.xml file. The circuit analysis module 2 is responsible for analyzing the decompressed system_root.xml file, converting the power electronics model composed of various power electronics devices such as inductors, capacitors, resistors, power supplies, and switches into a circuit matrix for real-time simulation calculation. The FPGA solver 20 receives the relevant circuit matrix and can complete real-time simulation calculation; at the same time, the circuit analysis module 2 can also identify the Scope module in the power electronics model and the self-built IO ports, identify the specific positions of these modules in the circuit model, generate the signals to be measured and send them to the FPGA solver 20. After each simulation step is calculated, the FPGA solver 20 will send the relevant data of the real-time simulation calculation according to the received signals to be measured. The communication connection module 3 can set the relevant parameters of UDP Ethernet communication, including the local host address and local host port of the host computer 10, and the remote host address and remote host port of the FPGA solver 20. The send data module 4 is responsible for sending the relevant circuit matrix and the signals to be measured parsed by the circuit analysis module 2 to the FPGA solver 20.

[0053] The oscilloscope configuration module 5 in this embodiment includes several parts such as output channel binding and channel gain setting. After loading the power electronics model, the output channel binding part will analyze the power electronics model and list the signals to be observed, including the Scope module and the four types of IO ports encapsulated in the self-built model library. These parameters can be bound to different channels and displayed on the virtual oscilloscope 7 at the same time. The channel gain setting function can adjust the gain of the parameters of the already bound channels, facilitating waveform comparison on the virtual oscilloscope 7. The sampling rate setting module 6 can set the sampling frequency of the virtual oscilloscope 7, facilitating the observation of real-time simulation waveforms. It can be understood that since the parameters and channels have been bound in the oscilloscope configuration module 5, the waveforms output by each channel can be displayed on the virtual oscilloscope 7.

[0054] Furthermore, the simulation calculation method of the FPGA solver 20 of this system will be described in detail. In this embodiment, the simulation calculation method adopted is a real-time simulation method for solving power electronic circuits using the node voltage method. The specific calculation process is as follows:

[0055] 1) First, number the nodes and branches of the actual circuit. In the actual circuit, each power electronic device is listed as a separate branch, and the two branches are connected through nodes, transforming the actual circuit into a circuit network composed of nodes and branches. Select any node in the actual circuit as the reference node, and the voltage of any other node related to the reference node is called the node voltage. The polarity of the node voltage is selected to be negative on the reference node side and positive on the other side.

[0056] 2) Perform equivalent modeling on the actual circuit: The voltage source branch is equivalent to a current source branch; the switch branch is processed using the binary LC (inductor-capacitor) method. When the switch is on, it is equivalent to an inductor branch, and when the switch is off, it is equivalent to a capacitor branch; list the VCR (volt-ampere characteristic) equations of the inductor and capacitor. The VCR equations of the inductor and capacitor contain derivative terms. The backward Euler method can be selected to discretize the derivative terms, and the inductor branch and capacitor branch can be equivalent to a branch with a resistor and a current source in parallel. Then the actual circuit is transformed into a Norton equivalent circuit containing only resistors and equivalent current sources, and the branch current vector I of each branch in the circuit b The calculation method is I b = Y b V b - I s , where Y b is the branch admittance matrix, V b is the branch voltage vector, and I s is the branch equivalent current source vector.

[0057] 3) Apply Kirchhoff's current law (KCL) to the electrical network: For any node, the algebraic sum of all branch currents involved in this node is zero. KCL can be expressed in matrix form as:

[0058] AI b = 0 (1)

[0059] Among them, A is the incidence matrix of the circuit. Each row element of the incidence matrix A represents the incidence situation between a node and all branches.

[0060] 4) Apply Kirchhoff's voltage law (KVL) to the electrical network: In any loop, the algebraic sum of all branch voltages is zero. For an electrical network with n nodes, n - 1 node voltage equations can be listed excluding the reference node voltage. KVL can be expressed in matrix form as:

[0061] V b = A T V n (2)

[0062] Among them, A T is the transpose of the incidence matrix A, which also represents the incidence situation between nodes and voltages in the circuit. V n is the node voltage vector of the circuit.

[0063] 5) According to the aforementioned equivalent modeling method, list the matrix form for calculating the branch current vector of the equivalent model:

[0064] I b = Y b V b - I s (3)

[0065] Substitute equation (2) into equation (3) to eliminate the branch voltage vector V b , and we get:

[0066] I b = Y b A T V n - I s (4)

[0067] Substitute equation (4) into equation (3) to eliminate the branch current vector I b , and we get:

[0068] AY b A T V n - AI s = 0 (5)

[0069] Let Y n = AY b A T represent the circuit admittance matrix, and In ＝ AI s represent the node injection current vector. The node voltage vector V can be obtainedn The calculation formula is as follows:

[0070] Y n V n = I n (6)

[0071] The node voltage vector V n can be expressed by the available node injection current vector as:

[0072]

[0073] wherein, is the inverse matrix of the node admittance matrix, that is, the node admittance inverse matrix.

[0074] The above calculation process is the real-time simulation algorithm of this system. By performing iterative calculations on the above calculation process in the FPGA solver 20, the real-time simulation of the power electronics model can be completed.

[0075] Furthermore, the present invention also provides a power electronics real-time simulation method applicable to the Simulink model, which is applied to the above power electronics real-time simulation system.

[0076] Figure 3 is the flowchart of the power electronics real-time simulation method applicable to the Simulink model according to the embodiment of the present invention. As Figure 3 shown, the method includes:

[0077] Step S1: Build a power electronics model in Simulink.

[0078] Step S2: The host computer loads the power electronics model, performs model parsing and circuit analysis on the power electronics model to obtain circuit model parameters, and sends the circuit model parameters to the FPGA solver.

[0079] Step S3: The FPGA solver receives the circuit model parameters, pre-stores the circuit model parameters in the internal random access memory, and after receiving the real-time simulation calculation start signal sent by the host computer, reads the circuit model parameters, and at the same time receives the control signal sent by the controller to start iterative simulation calculation.

[0080] Step S4: Send the analog signal of the iterative simulation calculation to the controller to achieve real-time simulation closed-loop control, and at the same time send the voltage and current signals of the nodes and / or branches in the power electronics model at each simulation step to the host computer for waveform display.

[0081] The specific steps of the real-time simulation method are as follows:

[0082] Step 1: First, the user can build a power electronics model to be simulated in Simulink software, set the simulation step size, verify the control algorithm, and perform offline simulation. After the offline simulation verification is completed, the user can add an IO port model as shown in Figure 1 to the power electronics model to make the offline simulation model real-time. In the development of power electronics projects, the control algorithm often needs to be continuously updated and modified. By adding IO port devices to make the power electronics model real-time, it can ensure that when the user needs to modify the power electronics model, they can re-perform offline simulation without deleting the IO port devices. Figure 1 The IO port devices in

[0083] are only used as identification signals, indicating the data interfaces that need to be input or output by the power electronics model in subsequent real-time simulations, and will not affect the results of offline simulations. Figure 2 Step 2: Run the host computer software for real-time simulation of power electronics as shown in

[0084] The software includes a Simulink model loading module 1, a circuit analysis module 2, a communication connection module 3, a data sending module 4, an oscilloscope configuration module 5, a sampling rate setting module 6, and a virtual oscilloscope 7. In the Simulink model loading module 1, select the power electronics model to be simulated in real-time, and the host computer software will decompress the real-time processed power electronics model to generate a system_root.xml file that can represent the power electronics model under the path / simulation model name / simulink / systems / . b In the circuit analysis module 2, the system_root.xml file can be parsed. As known from the previous described simulation calculation process, the FPGA solver needs to receive the initial values of the incidence matrix A, branch admittance matrix Y s of the actual circuit, the branch equivalent current source vector I and the node admittance inverse matrix

[0085] To obtain the above matrix and vector data, the system_root.xml file can be parsed into three types of files: Component, Line, and Branch.

[0086] The Line file is used to identify the connections between components in a circuit model, and can be divided into the electrical line NetLine that forms the actual circuit topology and the signal line SignalLine that represents the signal to be measured. Among them, the electrical line NetLine reflects the connection situation of components in the actual circuit. The electrical lines in the circuit are connected through nodes. Therefore, the electrical line NetLine contains the Node file that forms the circuit, and can identify the node ID, the list of components connected to the node, and the list of connected branches; the signal line SignalLine represents the signal to be measured in the circuit model: the real-time simulation IO ports and waveform display module Scope added in the power electronics model can identify the ports connected by the signal line and the signal line ID.

[0087] The Branch file is used to identify the branches in the circuit model. In the power electronics model, each component is listed as a separate branch. The Branch file can identify each branch in the model and obtain the branch ID, branch start point, branch end point, branch direction, and branch type.

[0088] The incidence matrix A reflects the incidence situation between branches. Its number of rows is the number of nodes in the circuit - 1, and the number of columns is the number of branches in the circuit. Each element inside the incidence matrix A is 0 or ±1. The incidence matrix A can be composed of the node ID in the Node file, the branch start point and branch end point in the Branch file. Traverse and query the node list and branch list in the Component file. If the node ID is the same as the branch start point, the element of the incidence matrix A takes +1; if the node ID is the same as the branch end point, the element of the incidence matrix A takes -1; in other cases, the element of the incidence matrix A takes 0.

[0089] Branch admittance matrix Y b is a main diagonal matrix with the number of rows and columns both equal to the number of branches in the circuit, and the elements on its main diagonal are the admittances of each branch in the circuit. Branch admittance matrix Y b is obtained by judging the branch type in the Branch file. Traverse and query the branch list in the Component class. If the branch type is a resistor, the admittance of this branch is 1 / resistance; if the branch type is a voltage source, the admittance of this branch is 1 / internal resistance of the power source; if the branch type is an inductor, the admittance of this branch is Δt / L, where L is the inductance value of the branch; if the branch type is a capacitor, the admittance of this branch is C / Δt, where C is the capacitance value of the branch; if the branch type is a switch, the admittance of this branch is G S =Δt / L = C / Δt, where Δt is the simulation step size.

[0090] Branch equivalent current source vector I S has the same dimension as the number of branches in the circuit, and its initial value is determined by the values of the current sources and voltage sources in the circuit. Branch equivalent current source vector I SThe initial value is obtained by judging the branch type in the Branch file. First, create an instance of the voltage source vector VectorV and an instance of the current source vector VectorI, and then traverse and query the branch list in the Component class. If the branch type is a voltage source, write the voltage source value into VectorV; if the branch type is a current source, write the current source value into VectorI. After the traversal is completed, calculate the initial value I of the equivalent current source vector of the branch S(0) = Y b * VectorV - VectorI.

[0091] Node admittance inverse matrix The number of rows and columns of is the same as the number of nodes in the circuit. It is necessary to first complete the matrix multiplication calculation Y n = AY b A T Get the node admittance matrix Y n , and then perform an inverse operation on the node admittance matrix to obtain the node admittance inverse matrix

[0092] Step 4: As Figure 4 shown, perform the upper computer software communication settings. The communication type can be set to UDP Ethernet; the local IP and port of the upper computer; and the remote IP and port of the FPGA solver communicating with the upper computer. The oscilloscope configuration module 5 can select the real-time simulation data to be observed, bind the real-time simulation data to the oscilloscope channel, and set the gain of the output waveform. The sampling rate setting module 6 can modify the sampling frequency of the virtual oscilloscope 7.

[0093] Step 5: As Figure 5 shown, the virtual oscilloscope 7 can display the data waveforms of the corresponding channels. The X-axis of the virtual oscilloscope 7 is the time of real-time simulation, and the Y-axis is the magnitude of the output waveform data. After clicking the connection button on the right side of the virtual oscilloscope 7, the upper computer sends a signal to the FPGA solver through UDP Ethernet. After receiving the signal, the FPGA solver starts the real-time simulation calculation.

[0094] Step 6: As Figure 6 shown, start executing the real-time simulation calculation process of the FPGA solver. Before receiving the real-time simulation calculation start signal sent by the upper computer, the FPGA solver first receives the circuit model parameters parsed by the upper computer through Ethernet and stores the circuit model parameters in the internal RAM (random access memory) of the FPGA for pre-storage; after the upper computer issues the real-time simulation calculation start signal, the FPGA solver initializes the program and reads the circuit model parameters pre-stored in the RAM; at the same time, receive the control signal sent by the controller, that is Figure 6The PWM (pulse width modulation) signal in it starts iterative simulation calculations, and sends the calculated analog signal to the controller to achieve closed-loop control; then, the calculation results of each simulation step h are sent to the host computer through Ethernet for waveform display.

[0095] In summary, the present invention provides a power electronics real-time simulation system and simulation method applicable to Simulink models. This system enables users not to master the relevant hardware programming languages of FPGAs during use. They only need to build the power electronics models to be simulated in Simulink software, and directly run this system after completing the offline simulation verification of the power electronics models, then they can conveniently and quickly complete the real-time simulation of the power electronics models, solving the problems of high usage difficulty and low practicability of existing real-time simulations. Since the present invention can achieve seamless connection between Simulink offline simulation and real-time simulation, and the power electronics model does not need to be modified after the offline simulation verification, it can directly perform real-time simulation. Therefore, the present invention has the advantages of convenience and speed, and has generality. It can meet the development needs of power electronics products and can significantly improve the development efficiency of power electronics projects.

[0096] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without more limitations, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0097] Although the content of the present invention has been introduced in detail through the above preferred embodiments, it should be recognized that the above description should not be considered as a limitation of the present invention. After those skilled in the art have read the above content, various modifications and alternatives to the present invention will be obvious. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims

1. A real-time simulation system for power electronics applicable to Simulink models, characterized in that, Including: A host computer, which is used to load a power electronics model built in Simulink, perform model parsing and circuit analysis on the power electronics model to obtain circuit model parameters, and send the circuit model parameters externally; An FPGA solver, which is used to receive the circuit model parameters, pre-store the circuit model parameters in an internal random access memory, and read the circuit model parameters after receiving a real-time simulation calculation start signal sent by the host computer; A controller, which is used to send a control signal, so that after the FPGA solver reads the circuit model parameters and receives the control signal, it starts iterative simulation calculation to obtain voltage and current signals of nodes and / or branches in the power electronics model, and sends the voltage and current signals to the host computer for waveform display.

2. The real-time power electronics simulation system applicable to the Simulink model according to claim 1, characterized in that, The controller is further used to receive analog signals sent by the FPGA solver, and re-send control signals to the FPGA solver after processing, so as to complete real-time simulation closed-loop control.

3. The real-time power electronics simulation system applicable to the Simulink model according to claim 1, characterized in that, The circuit model parameters include the incidence matrix of the actual circuit in the power electronics model, the branch admittance matrix, the initial value of the branch equivalent current source vector, and the inverse nodal admittance matrix, wherein the incidence matrix is used to reflect the association situation between each branch.

4. The real-time simulation system for power electronics applicable to the Simulink model according to claim 1, wherein The host computer includes a Simulink model loading module, which is used to load a power electronics model built in Simulink and decompress the power electronics model into an xml file.

5. The real-time power electronics simulation system applicable to the Simulink model according to claim 4, characterized in that, The host computer further includes a model parsing module, which is used to parse the xml file into Component files, Line files, and Branch files, and perform circuit analysis based on the three types of parsed files to obtain the circuit model parameters.

6. The real-time simulation system for power electronics applicable to the Simulink model according to claim 5, characterized in that, The Component file is used to identify various components in the power electronics model, and obtain the names of each component, the ID of each component, the type of each component, and the node list and branch list connected by each component.

7. The real-time power electronics simulation system applicable to the Simulink model according to claim 5, characterized in that, The Line file is used to identify the connection situation between each component and the signals to be measured in the power electronics model. The host computer is further used to send the signals to be measured to the FPGA solver.

8. The real-time simulation system for power electronics applicable to the Simulink model according to claim 5, wherein, The Branch file is used to identify each branch of the power electronics model.

9. The real-time power electronics simulation system applicable to the Simulink model according to claim 5, characterized in that, The host computer further includes: A communication setting module, which is used to set the communication type, set the local IP and local communication port of the host computer, and set the remote IP and remote communication port of the FPGA solver communicating with the host computer; A data sending module, which is used to send circuit model parameters and signals to be measured; An oscilloscope configuration module, which is used to select real-time simulation data to be observed, bind the real-time simulation data to an oscilloscope channel, and set the gain of the output waveform; A sampling rate setting module, which is used to modify the sampling frequency of the virtual oscilloscope; A virtual oscilloscope, which is used to display waveforms of voltage and current data solved by the FPGA solver.

10. A real-time simulation method for power electronics applicable to Simulink models, characterized in that, Applied to the power electronics real-time simulation system according to any one of claims 1-9, the method includes: Building a power electronics model in Simulink; The host computer loads the power electronics model, performs model parsing and circuit analysis on the power electronics model to obtain circuit model parameters, and sends the circuit model parameters to the FPGA solver; The FPGA solver receives the circuit model parameters, pre-stores the circuit model parameters in the internal random access memory, and after receiving the real-time simulation calculation start signal sent by the host computer, reads the circuit model parameters, and at the same time receives the control signal sent by the controller to start iterative simulation calculation; Send the analog signal of the iterative simulation calculation to the controller to achieve real-time simulation closed-loop control, and at the same time send the voltage and current signals of the nodes and / or branches in the power electronics model of each simulation step to the host computer for waveform display.

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