Test device and test method

Abstract

The present application provides a test device and a test method, which can be applied to the field of memory testing technology. The test device includes: a test board, which simulates the transmission of test data signals and test electrical signals by a memory unit inserted in a memory slot to be tested; a dial memory module for controlling a dial switch to configure the test memory address of a first memory based on a predetermined memory address, so that the control module of the motherboard to be tested performs read and write operations on the first memory through an integrated circuit bus to obtain a test data signal; a function detection module for collecting a test electrical signal from a power module of the motherboard to be tested, a response signal from a control module, and log data, and testing the test electrical signal, response signal, and log data to obtain a function test result; and a plurality of signal lead-out test points for leading the test data signal and the test electrical signal to an external detection device, so that the external detection device obtains a signal test result based on the test data signal and the test electrical signal.

Description

Technical Field

[0001] The present application relates to the field of memory testing technology, and more specifically to a testing device and a testing method. Background Art

[0002] As servers process increasing amounts of data and processing speeds, they often use multiple memory devices to store both the data to be calculated and the associated data after calculation, thereby improving server performance. Therefore, before a memory device can function properly, it's often necessary to test it to ensure it's compatible with the server. Summary of the Invention

[0003] In view of the above problems, the present application provides a testing device and a testing method.

[0004] According to the first aspect of the present application, a testing device is provided, comprising: a test board, for simulating the transmission of test data signals and test electrical signals by a memory unit inserted in a memory slot to be tested when the test board is inserted into the memory slot to be tested of the mainboard to be tested; a dial memory module, arranged on the test board, comprising a dial switch and a first memory, for controlling the dial switch to configure the test memory address of the first memory based on a predetermined memory address, so that the control module of the mainboard to be tested performs read and write operations on the first memory through an integrated circuit bus to obtain a test data signal; a function detection module, arranged on the test board, for collecting a test electrical signal from a power module of the mainboard to be tested, a response signal from the control module and log data, and testing the test electrical signal, the response signal and the log data to obtain a function test result; a plurality of signal lead-out test points, arranged on a side of the test board away from the memory slot to be tested, for leading out the test data signal and the test electrical signal to an external detection device, so that the external detection device obtains a signal test result based on the test data signal and the test electrical signal.

[0005] The second aspect of the present application provides a testing method, including: when a test board is inserted into a memory slot to be tested of a mainboard to be tested, based on a predetermined memory address, controlling a dip switch in a dip memory module to configure a test memory address of a first memory; in response to a control module performing read and write operations on the first memory through an integrated circuit bus, obtaining and transmitting a test data signal to a plurality of signal lead-out test points; using a function detection module to collect a test electrical signal from a power module of the mainboard to be tested, a response signal and log data from a control module of the mainboard to be tested, and using the function detection module to test the test electrical signal, response signal and log data to obtain a functional test result; transmitting a test electrical signal to a plurality of signal lead-out test points so that an external detection device obtains a signal test result based on the test data signal and the test electrical signal.

[0006] According to an embodiment of the present application, the test device may include a test board, a dial memory module, a function detection module and a plurality of signal lead-out test points, the dial memory module and the function detection module are both arranged on the test board, the plurality of signal lead-out test points are all arranged on a side of the test board away from the memory slot to be tested, and the dial memory module includes a dial switch and a first memory. In the case where it is necessary to use the test device to test the memory slot to be tested, the memory unit to be tested and the motherboard to be tested, one side of the test board can be inserted into the memory slot to be tested, so as to use the test board to simulate the memory unit to be tested being inserted into the memory slot to be tested, and the test board is used to simulate the memory unit transmitting the test data signal and the test electrical signal, so that the memory unit to be tested does not need to be inserted into the memory slot to be tested during the test phase, so as to avoid damage to the memory unit caused by failure of the memory slot to be tested and the motherboard to be tested, thereby improving the detection efficiency.

[0007] According to an embodiment of the present application, a plurality of dip switches electrically connected to the first memory are adjusted according to a predetermined memory address of the memory slot to be tested, so that the test memory address of the first memory on the test board inserted into the memory slot to be tested matches the predetermined memory address, thereby using the control module on the motherboard to be tested to pass I 2 C signal path or I 3 The integrated circuit bus of the C signal path performs read and write operations on the first memory, so that the first memory stores binary data instructions corresponding to the signal commands issued by the control module. By contacting the external detection device with the multiple signal lead-out test points located on the upper side of the test board, the binary data instructions are led out to the multiple signal lead-out test points and the external detection device through the signal path in the test board. The external detection device is used to collect the test data signal transmitted by the control module on the mainboard to be tested through the memory slot to be tested and the test board, thereby realizing the lead-out of the test data signal to the outside of the test board, so that the test data signal can be simply and efficiently obtained by using the external detection device, thereby improving the detection efficiency, and then batches of memory slots and mainboards to be tested can be tested.

[0008] According to the embodiments of the present application, the function detection module can be used to collect the test electrical signal that supplies power to the memory unit through the memory slot to be tested or the response signal and log data issued by the control module according to different test requirements, so as to test the test electrical signal, response signal or log data respectively, and obtain the functional test results of the memory slot to be tested and the motherboard to be tested, thereby realizing the functional detection of the power supply function and the control module. At the same time, by contacting the external detection device with the multiple signal lead-out test points located on the upper side of the test board, the test electrical signal can be led out to the multiple signal lead-out test points and the external detection device through the conductive path in the test board. The power supply signal of the motherboard to be tested can be collected by the external detection device, and the test electrical signal can be led out to the outside of the test board to facilitate analysis and detection of the test electrical signal, thereby performing an overall test of the memory slot to be tested, the memory unit to be tested and the motherboard to be tested, so that the memory unit can move normally when inserted into the memory slot. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above contents and other objects, features and advantages of the present application will become more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings, in which:

[0010] Figure 1 A schematic diagram of a testing device according to an embodiment of the present application is shown;

[0011] Figure 2 A schematic diagram of a DIP memory module according to an embodiment of the present application is shown;

[0012] Figure 3 A schematic diagram of a function detection module according to an embodiment of the present application is shown;

[0013] Figure 4 A schematic diagram of a testing device according to another embodiment of the present application is shown;

[0014] Figure 5 A flow chart of a testing method according to an embodiment of the present application is shown.

[0015] Figure 6 A flow chart of a power consumption test according to an embodiment of the present application is shown;

[0016] Figure 7 A flowchart of memory slot detection according to an embodiment of the present application is shown;

[0017] Figure 8 A flow chart of log detection according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0018] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present application. In the detailed description below, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present application. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present application.

[0019] The terms used herein are only for describing specific embodiments and are not intended to limit this application. The terms "comprise," "include," etc. used herein indicate the presence of the features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0020] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0021] When expressions such as "at least one of A, B, and C, etc." are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0022] As servers process increasing amounts of data and processing speeds, they often use multiple memory devices to store both the data to be calculated and the associated data after calculation, thereby improving server performance. Therefore, before a memory device can function properly, it's often necessary to test it to ensure it's compatible with the server.

[0023] An embodiment of the present application provides a testing device, a test board, which is used to simulate the transmission of test data signals and test electrical signals by a memory unit inserted in a memory slot to be tested of a mainboard to be tested when the test board is inserted into the memory slot to be tested; a dial memory module, which is arranged on the test board and includes a dial switch and a first memory, and is used to control the dial switch to configure the test memory address of the first memory based on a predetermined memory address, so that the control module of the mainboard to be tested performs read and write operations on the first memory through an integrated circuit bus to obtain a test data signal; a function detection module, which is arranged on the test board and is used to collect a test electrical signal from a power module of the mainboard to be tested, a response signal from the control module and log data, and test the test electrical signal, response signal and log data to obtain a function test result; a plurality of signal lead-out test points are set on a side of the test board away from the memory slot to be tested, and are used to lead out the test data signal and the test electrical signal to an external detection device, so that the external detection device obtains a signal test result based on the test data signal and the test electrical signal.

[0024] According to an embodiment of the present application, a testing device may include a testing board, a dip memory module, a function detection module, and a plurality of signal lead-out test points.

[0025] According to an embodiment of the present application, a test board is used to simulate the transmission of test data signals and test electrical signals by a memory unit inserted in a memory slot to be tested of a motherboard to be tested when the test board is inserted in the memory slot to be tested.

[0026] The test board can be equipped with multiple conductive paths, I 2 C signal path, I 3 C signal path, through the conductive path and the signal path, can transmit the electrical signal and the data signal to the corresponding detection module and the test point, so as to facilitate the detection of the electrical signal and the data signal.

[0027] Before testing, multiple test boards need to be inserted into multiple memory slots to be tested on the main circuit board to be tested, so that the test boards can simulate the memory bars to be tested, that is, memory units. Then, the mainboard to be tested and the baseboard management controller and processor arranged on the mainboard to be tested are put into normal operating working state, so as to transmit test electrical signals and test data signals to the memory slots to be tested and the test boards, so that the test boards can simulate the memory units to be tested to perform signal transmission and other detection work, thereby testing the memory slots to be tested, the mainboard to be tested and the memory units to be tested.

[0028] According to an embodiment of the present application, a dip memory module is arranged on a test board and includes a dip switch and a first memory, which is used to control the dip switch to configure the test memory address of the first memory based on a predetermined memory address, so that the control module of the mainboard to be tested performs read and write operations on the first memory through the integrated circuit bus to obtain a test data signal.

[0029] The control module of the motherboard to be tested may include a baseboard management controller and a processor provided on the motherboard to be tested.

[0030] The dip memory module may include multiple dip switches, usually 3 dip switches, and the multiple dip switches are electrically connected to the first memory. By toggling the dip switches, the 0 / 1 address of the first memory is switched, so that the test memory address of the first memory is the same as the predetermined memory address of the memory slot to be tested, so that the data signal is stored in the first memory for retrieval. The predetermined memory address can be a memory address pre-assigned by the baseboard management controller or processor to multiple memory slots. Usually, there can be eight memory slots to be tested on both sides of the baseboard management controller or processor. The eight memory slots to be tested on one side can be defined as A0, A1, B0, B1, C0, C1, D0, and D1, and the eight memory slots to be tested on the other side can be defined as E0, E1, F0, F1, G0, G1, H0, and H1. The predetermined memory addresses of the memory slots to be tested A0 and E0 can be the same. Similarly, the predetermined memory addresses of the memory slots to be tested A1, E1, B0, F0, B1, F1, C0, G0, C1, G1, D0, H0, D1, and H1 can be the same.

[0031] According to an embodiment of the present application, a functional detection module is arranged on a test board, and is used to collect a test electrical signal from the power module of the mainboard to be tested, a response signal and log data from the control module, and to test the test electrical signal, response signal and log data to obtain a functional test result.

[0032] By inserting the test board into the memory slot to be tested, the functional detection module is used to collect the test electrical signals provided by the motherboard to the memory slot and the memory unit to be tested, as well as the response signals and log data from the baseboard management controller or processor. Then, according to the test requirements, the collected test electrical signals, response signals and log data are tested respectively to obtain the functional test results corresponding to each test.

[0033] According to an embodiment of the present application, multiple signal lead-out test points are arranged on a side of the test board away from the memory slot to be tested, and are used to lead out test data signals and test electrical signals to external detection equipment, so that the external detection equipment can obtain signal test results based on the test data signals and test electrical signals.

[0034] Multiple signal lead-out test points are electrically connected to the dial memory module and the function detection module through signal paths and conductive paths, so that when an external detection device is used to electrically connect to the multiple signal lead-out test points, the test data signal and the test electrical signal can be led out to the external detection device, so that the test data signal and the test electrical signal can be read and detected by the external detection device, wherein the external detection device can be an oscilloscope.

[0035] By setting multiple signal lead-out test points on the side of the test board away from the memory slot to be tested, that is, on the side of the test board away from the memory slot to be tested, there is no need to make the probe head of the external detection equipment penetrate into the bottom of the memory stick. Especially when multiple memory sticks are inserted on the motherboard, it is difficult for the probe head of the external detection equipment to penetrate into the contact test point at the bottom of each memory stick, which greatly reduces the difficulty of obtaining test data signals and test electrical signals. Multiple external detection devices can be used to obtain test electrical signals and test data signals from multiple test boards at the same time, which is convenient for waveform capture.

[0036] According to an embodiment of the present application, the test device may include a test board, a dial memory module, a function detection module and a plurality of signal lead-out test points, the dial memory module and the function detection module are both arranged on the test board, the plurality of signal lead-out test points are all arranged on a side of the test board away from the memory slot to be tested, and the dial memory module includes a dial switch and a first memory. In the case where it is necessary to use the test device to test the memory slot to be tested, the memory unit to be tested and the motherboard to be tested, one side of the test board can be inserted into the memory slot to be tested, so as to use the test board to simulate the memory unit to be tested being inserted into the memory slot to be tested, and the test board is used to simulate the memory unit transmitting the test data signal and the test electrical signal, so that the memory unit to be tested does not need to be inserted into the memory slot to be tested during the test phase, so as to avoid damage to the memory unit caused by failure of the memory slot to be tested and the motherboard to be tested, thereby improving the detection efficiency.

[0037] According to an embodiment of the present application, a plurality of dip switches electrically connected to the first memory are adjusted according to a predetermined memory address of the memory slot to be tested, so that the test memory address of the first memory on the test board inserted into the memory slot to be tested matches the predetermined memory address, thereby using the control module on the motherboard to be tested to pass I 2 C circuit bus or I 3 The integrated circuit bus of the C circuit bus performs read and write operations on the first memory, so that the first memory stores binary data instructions corresponding to the signal commands issued by the control module. By contacting the external detection device with multiple signal lead-out test points located on the upper side of the test board, the binary data instructions are led out to the multiple signal lead-out test points and the external detection device through the signal path in the test board. The external detection device is used to collect the test data signal transmitted by the control module on the mainboard to be tested through the memory slot to be tested and the test board, thereby realizing the lead-out of the test data signal to the outside of the test board, so that the test data signal can be simply and efficiently obtained by using the external detection device, thereby improving the detection efficiency, and then batches of memory slots and mainboards to be tested can be tested.

[0038] According to the embodiments of the present application, the function detection module can be used to collect the test electrical signal that supplies power to the memory unit through the memory slot to be tested or the response signal and log data issued by the control module according to different test requirements, so as to test the test electrical signal, response signal or log data respectively, and obtain the functional test results of the memory slot to be tested and the motherboard to be tested, thereby realizing the functional detection of the power supply function and the control module. At the same time, by contacting the external detection device with the multiple signal lead-out test points located on the upper side of the test board, the test electrical signal can be led out to the multiple signal lead-out test points and the external detection device through the conductive path in the test board. The power supply signal of the motherboard to be tested can be collected by the external detection device, and the test electrical signal can be led out to the outside of the test board to facilitate analysis and detection of the test electrical signal, thereby performing an overall test of the memory slot to be tested, the memory unit to be tested and the motherboard to be tested, so that the memory unit can move normally when inserted into the memory slot.

[0039] Figure 1 A schematic diagram of a testing device according to an embodiment of the present application is shown.

[0040] like Figure 1 As shown, the test device may include a test board 101 , a DIP memory module 102 , a function detection module 103 and a plurality of signal lead-out test points 104 , and the test board 101 is inserted into a memory slot 105 to be tested.

[0041] According to an embodiment of the present application, the testing device may further include a plurality of testing gold finger pins, a warning module and an information interface.

[0042] According to an embodiment of the present application, a plurality of test gold finger pins are provided on the test board, and are used to electrically connect to the memory slot to be tested when the test board is inserted into the memory slot to be tested, so that the test data signal and the test electrical signal are transmitted to the test board.

[0043] The multiple test gold finger pins can be the same multiple memory gold finger pins as the bottom of the memory unit. The side provided with the multiple test gold finger pins is inserted into the memory slot to be tested, so that the multiple test gold finger pins and the pins in the memory slot to be tested are electrically connected, thereby transmitting the test data signal or test electrical signal on the motherboard to be tested to the test board through the gold finger pins.

[0044] According to an embodiment of the present application, a warning module is provided on the test board and is used to generate a warning mark according to the functional test result.

[0045] The warning module may include multiple warning lights. According to different test results, the on and off and the frequency and number of on and off of the multiple warning lights may be controlled to correspond to different test results, thereby making it easy to intuitively see the status and results of the current test.

[0046] According to an embodiment of the present application, an information interface is provided on a side of the test board away from the memory slot to be tested, and is used to connect to an external testing device so that the functional test results are transmitted to the external testing device.

[0047] The information interface can be a USB interface or a Bluetooth interface, which is connected to the information interface through an external detection device, so that the functional test results can be transmitted to the external detection device, so as to facilitate further analysis of the functional test results in the external detection device. The external detection device connected to the information interface can be a computing processing device, such as a computer.

[0048] According to an embodiment of the present application, the testing device may further include a warning module and an information interface. By working with the warning module, the current functional test results can be displayed, thereby facilitating the use of external detection equipment connected to the information interface to obtain abnormal functional test results, analyze the test results, debug the memory slots to be tested and the motherboard to be tested, and other operations, thereby improving detection efficiency and detection intuitiveness.

[0049] According to an embodiment of the present application, the first memory can also be used to obtain and back up the test data signal in response to the control module performing a write operation on the first memory through the integrated circuit bus when the predetermined memory address and the test memory address are the same, so as to read the test data signal when the test equipment is connected to multiple signal lead-out test points.

[0050] The first memory can be an EEPROM (Electrically Erasable Programmable Read-Only Memory). Based on the predetermined memory address of the memory slot to be tested, multiple dip switches are turned to make the test memory address the same as the predetermined memory address, thereby completing the initialization configuration of the address of the test board.

[0051] The relationship between the setting of the DIP switch, the test memory address of the first memory, and the memory slot to be tested may be as shown in Table 1.

[0052] Table 1

[0053]

[0054] Among them, each test board can have three dip switches, corresponding to the test memory addresses that need to be debugged. For example, when it is determined that the current memory slot to be tested is the memory slot with address A0, it can be determined that the predetermined memory address of the memory slot to be tested is 0x00, and the dip switch needs to be adjusted to make the test memory address of the first memory 0x00.

[0055] When the test memory address configuration is completed, a control instruction can be sent to the baseboard management controller or processor in the control module on the motherboard to be tested, so that the baseboard management controller or processor generates a binary data instruction and transmits it to the I 2 C circuit bus or I 3 The C circuit bus is converted into a data waveform signal corresponding to the binary data instruction to perform a write operation on the first memory, so that the first memory stores the corresponding binary data instruction according to the received data waveform signal and performs backup processing. When an external detection device is electrically connected to the signal lead test point, the backup stored binary data instruction passes through the I 2 C circuit bus or I 3 The C circuit bus is converted into a data waveform signal and collected by an external detection device. Among them, the binary data instruction generated by the baseboard management controller in the control module and the data waveform signal corresponding to the binary data instruction generated by the baseboard management controller can be detected by I 2 C circuit bus transmission, the binary data instructions generated by the processor and the data waveform signal corresponding to the binary data instructions generated by the processor can be transmitted through the I 3 C circuit bus transmission.

[0056] According to an embodiment of the present application, by adjusting the 0 / 1 of multiple dip switches on the test board, the test memory address of the first memory is made the same as the predetermined memory address, so that the baseboard management controller or processor can perform read and write operations on the first memory, and by controlling the baseboard management controller or processor to perform write operations on the first memory, the binary data instructions are backed up and stored in the first memory. When an external detection device is used to obtain a test data signal through multiple signal lead-out test points set on a side of the test board away from the memory slot to be tested, the binary data instructions stored in the first memory are transmitted through the I in the test board. 2 C circuit bus or I 3 The C circuit bus is converted into a test data signal and collected by an external detection device, thereby achieving the goal of leading the test data signal to the external detection device through multiple signal lead-out test points set on the outside, without having to insert a probe into the test point of one of the multiple memory sticks to obtain the collected signal, thereby improving the convenience of obtaining the test data signal and being able to simultaneously obtain the test data signals transmitted by multiple memory slots to be tested. Furthermore, by analyzing and detecting the test data signal obtained from the baseboard management controller or processor, it is possible to 2 C circuit bus or I 3 The signal quality of the test data signal transmitted by the C circuit bus is detected and evaluated to obtain a signal quality detection result of the memory slot to be tested.

[0057] Figure 2A schematic diagram of a DIP memory module according to an embodiment of the present application is shown.

[0058] like Figure 2 As shown, the test device may include a test board 101, a dip memory module 102, a function detection module 103 and multiple signal lead-out test points 104. The test board 101 is inserted into the memory slot 105 to be tested. The dip memory module 102 may include three dip switches 201 and a first memory 202. By adjusting the three dip switches 201, the test memory address of the first memory 202 can be adjusted.

[0059] According to an embodiment of the present application, the plurality of signal lead-out test points may include a first data signal lead-out test point and a second data signal lead-out test point.

[0060] According to an embodiment of the present application, the first data signal lead-out test point is used to lead the first test data signal sent from the management controller to an external detection device.

[0061] The first data signal lead-out test point can be connected to I 2 The test point corresponding to the test data signal transmitted by the C circuit bus, the first test data signal can be represented as a data signal corresponding to the binary data instruction issued by the baseboard management controller.

[0062] According to an embodiment of the present application, the second data signal lead-out test point is used to lead the second test data signal sent from the processor to an external detection device.

[0063] The second data signal lead-out test point can be connected to I 3 The test point corresponds to the test data signal transmitted by the C circuit bus, and the second test data signal can be represented as a data signal corresponding to the binary data instruction issued by the processor.

[0064] According to the embodiment of the present application, by respectively establishing a first data signal lead-out test point and a second data signal lead-out test point, an external detection device can be electrically connected to different lead-out test points to obtain different first test data signals or second test data signals, thereby being able to detect the I 2 The signal quality of the first test data signal transmitted by the C circuit bus and the 3 The signal quality of the second test data signal transmitted by the C circuit bus is detected and evaluated respectively.

[0065] According to an embodiment of the present application, the functional test result may include a power consumption test sub-result, a slot self-test test sub-result, and a log fault test sub-result.

[0066] According to an embodiment of the present application, the function detection module may include an electrical signal acquisition submodule, a microcontroller, a memory slot self-test submodule and a log storage submodule.

[0067] According to an embodiment of the present application, the electrical signal acquisition submodule is electrically connected to the microcontroller, and is used to acquire and transmit test electrical signals and signal acquisition time information to the microcontroller, wherein the test electrical signals include test voltage signals and test current signals.

[0068] The electrical signal acquisition submodule may include a voltage acquisition unit and a current acquisition unit. The current acquisition unit may include a current measuring resistor. The voltage acquisition unit is first used to acquire the test voltage signal from the mainboard to be tested, and then the test voltage signal is passed through the current measuring resistor to obtain a test current signal. Therefore, when power consumption testing is required, the current power consumption test sub-result can be detected based on the test voltage signal and the test current signal.

[0069] According to an embodiment of the present application, the plurality of signal lead-out test points may further include an electrical signal lead-out test point.

[0070] According to an embodiment of the present application, the electrical signal lead-out test point is used to lead the test electrical signal to an external detection device.

[0071] The electrical signal lead-out test point may include a voltage signal lead-out test point or a current signal lead-out test point. By electrically connecting an external detection device to the electrical signal lead-out test point, a test electrical signal can be obtained, so that the test electrical signal can be analyzed and processed to obtain the power supply status of the memory slot and memory unit of the motherboard to be tested.

[0072] According to an embodiment of the present application, by setting up an electrical signal lead-out test point, even in the case of multiple memory slots to be tested, an external detection device can be used to simply obtain the test electrical signal, thereby detecting and evaluating the test voltage signal or test current signal transmitted by the motherboard to be tested through the conductive path.

[0073] According to an embodiment of the present application, a microcontroller is used to perform a power consumption test on the test electrical signal in response to receiving a test electrical signal and signal acquisition time information, and obtain a power consumption test sub-result; obtain a response signal and log data, and test the response signal and log data respectively to obtain a slot self-test test sub-result and a log fault test sub-result.

[0074] When it is necessary to perform a memory slot test to be tested and a fault detection test on the log data of the motherboard to be tested, a slot test request and a fault detection request can be sent to the baseboard management controller or processor on the motherboard to be tested through the microcontroller, so that the microcontroller performs detection based on the response signal or log data received from the baseboard management controller or processor, thereby obtaining the slot self-test sub-result or the log fault test sub-result.

[0075] According to an embodiment of the present application, the memory slot self-test submodule is electrically connected to the microcontroller and is used to store the slot self-test sub-results.

[0076] When it is necessary to test the memory slot to be tested, the microcontroller can store the obtained response signal and slot self-test sub-result in the memory slot self-test sub-module, so that the test results and response signal can be retrieved from the memory slot self-test sub-module at any time.

[0077] According to an embodiment of the present application, the log storage submodule is electrically connected to the microcontroller and is used to store log fault test sub-results.

[0078] When a fault detection test of log data is required, the microcontroller can store the acquired log data and log fault test sub-results in the log storage submodule, so that the test results and log data can be retrieved from the log storage submodule at any time for analysis and inspection.

[0079] According to an embodiment of the present application, the function detection module may include an electrical signal acquisition submodule, a microcontroller, a memory slot self-test submodule, and a log storage submodule. The electrical signal acquisition submodule collects test voltage signals and test current signals in real time. External detection equipment can be used to obtain real-time power supply information from the tested motherboard to the tested memory slots and memory units, so as to analyze the power supply status based on the waveform information of the test electrical signals, and then transmit the test voltage signals and test current signals to the microcontroller. The microcontroller can then acquire and analyze the test electrical signals, response signals, and log data according to different test requirements. When power consumption testing is required, the microcontroller performs power consumption testing based on the received test voltage signal and test current signal to obtain power consumption test sub-results, so as to analyze the power consumption of the current baseboard management controller or processor. When self-test of the memory slot to be tested is required, the microcontroller can obtain the corresponding response signal from the baseboard management controller or processor to determine whether there is an abnormality in the current memory slot to be tested. When log data testing is required, the microcontroller can obtain the corresponding log data from the baseboard management controller or processor to perform fault analysis and detection on the log data, thereby achieving the goal of simultaneously obtaining test electrical signals of multiple memory slots to be tested even when multiple memory slots to be tested are arranged on the motherboard to be tested. At the same time, the microcontroller can be used to perform different test analyses according to different test requirements, thereby performing diversified and multi-dimensional tests on the motherboard to be tested, the memory slot to be tested and the memory unit, so that the memory unit can operate normally with the baseboard management controller or processor.

[0080] Figure 3 A schematic diagram of a function detection module according to an embodiment of the present application is shown.

[0081] like Figure 3 As shown, the test board 101 is inserted into the memory slot 105 to be tested and is provided with a dial memory module 102, a function detection module 103 and multiple signal lead-out test points 104. The function detection module 103 includes a voltage acquisition unit 301, a current acquisition unit 302, a microcontroller 303, a memory slot self-test submodule 304 and a log storage submodule 305. The test voltage signal and the test current signal are collected by the voltage acquisition unit 301 and the current acquisition unit 302, and the function detection is performed using the microcontroller 303.

[0082] According to an embodiment of the present application, the log fault test sub-result may include power consumption transient state test information and operation state test information.

[0083] The instantaneous power consumption test information can be represented as the status information of the instantaneous power consumption provided by the current motherboard under test to the memory slot under test. The operating status test information can be represented as the total power consumption of the baseboard management controller or processor per unit time. Based on the operating status test information, the working status of the current baseboard management controller or processor can be judged.

[0084] According to an embodiment of the present application, the microcontroller is further configured to obtain power consumption instantaneous state test information based on a test power consumption instantaneous value and a first power consumption threshold value obtained based on a test voltage signal and a test current signal.

[0085] Upon receiving the test voltage signal and the test current signal, the microcontroller multiplies the test voltage signal and the test current signal to obtain an instantaneous test power consumption value. Based on the instantaneous test power consumption value and a first power consumption threshold, if the instantaneous test power consumption value is greater than or equal to the first power consumption threshold, the microcontroller determines that the power consumption instantaneous state test information may be an instantaneous high power consumption state; if the instantaneous test power consumption value is less than the first power consumption threshold, the microcontroller determines that the power consumption instantaneous state test information may be an instantaneous normal power consumption state.

[0086] According to an embodiment of the present application, the operating status test information of the control module is obtained according to the total test power consumption value and the second power consumption threshold obtained based on the test voltage signal, the test current signal and the signal acquisition period.

[0087] While collecting the measurement voltage signal and the measurement current signal, the time of collecting the signal, that is, the signal collection period, is obtained, and integration processing is performed based on the test voltage signal, the test current signal and the signal collection period to obtain the total power consumption value per unit time, that is, the total test power consumption value, and the total power consumption curve is drawn based on the total power consumption value per unit time.

[0088] Based on the total power consumption value obtained after the integration process and the second power consumption threshold, if the total test power consumption value is greater than or equal to the second power consumption threshold, the operating status test information is determined to be in a full-load operating state. If the total test power consumption value is less than the second power consumption threshold, the operating status test information is determined to be in a normal operating state. Based on the operating status test information, the current operating state of the baseboard management controller or processor can be evaluated, thereby adjusting the baseboard management controller or processor.

[0089] According to an embodiment of the present application, when the microcontroller receives the test voltage signal and the test current signal, it obtains the signal acquisition period, multiplies the test voltage signal and the test current signal to obtain the instantaneous value of the test power consumption, and then integrates the test voltage signal, the test current signal and the signal acquisition period to obtain the total value of the test power consumption. A threshold judgment is performed based on the instantaneous value of the test power consumption and the first power consumption threshold as well as the total value of the test power consumption and the second power consumption threshold. The current power consumption instantaneous state test information and the operating state test information are analyzed to obtain the current power consumption instantaneous state test information and the operating state test information, thereby realizing the power consumption processing of the test voltage signal and the test current signal by the microcontroller, and thereby determining the current working state of the memory slot to be tested, the motherboard to be tested and the baseboard management controller or processor based on the analyzed instantaneous power consumption test information and the operating state test information, so as to facilitate adjustment.

[0090] Based on the instantaneous power consumption test information and the operating status test information, the multiple warning lights in the warning module can be used to perform detection and reminder operations. For example, when the instantaneous power consumption value of the test is greater than or equal to the first power consumption threshold, the red warning light is controlled to be constantly on. When the instantaneous power consumption value of the test is less than the first power consumption threshold, the green warning light is controlled to be constantly on. When the total power consumption value is greater than or equal to the second power consumption threshold, the red warning light is controlled to flash. When the total power consumption value is less than the second power consumption threshold, the green warning light is controlled to flash.

[0091] According to an embodiment of the present application, the microcontroller is further configured to send a handshake signal to the control module via the integrated circuit bus.

[0092] When it is necessary to detect the slot status of the memory slot to be tested, the microcontroller can actively send a handshake signal to the baseboard management controller or processor, where the slot status may include whether the memory slot to be tested has poor contact or damage, resulting in the signal being unable to be transmitted normally.

[0093] According to an embodiment of the present application, in response to the positive response signal from the control module, it is confirmed that the slot self-test sub-test result is that the slot is normal.

[0094] When the slot status of the memory slot to be tested is normal, the baseboard management controller or processor, upon receiving a handshake signal sent from the microcontroller, will generate an affirmative response signal corresponding to the handshake signal and send it to the microcontroller, thereby analyzing and indicating that the current slot status of the memory slot to be tested is normal. When the slot status of the memory slot to be tested is abnormal, the baseboard management controller or processor may not be able to receive the handshake signal, and thus cannot generate and send an affirmative response signal to the microcontroller, or an abnormality occurs in the integrated circuit bus, causing the affirmative response signal generated by the baseboard management controller or processor to change, and the microcontroller receives the abnormal response signal, thereby analyzing and indicating that the current slot status of the memory slot to be tested is abnormal.

[0095] According to an embodiment of the present application, the slot self-test sub-test result and the positive response signal are packaged to obtain and send test self-test information to the memory slot self-test sub-module.

[0096] After receiving the test self-test information, the memory slot self-test submodule backs up and saves the test self-test information so that the slot self-test result of the memory slot to be tested can be retrieved at any time for detection and analysis.

[0097] According to an embodiment of the present application, when it is necessary to detect and analyze the slot status of the memory slot to be tested, the microcontroller can be used to autonomously send a handshake signal to the control module. When the baseboard management controller or processor receives the handshake signal, it will generate an affirmative response signal corresponding to the handshake signal and send it to the microcontroller. When the microcontroller receives the affirmative response signal, it can confirm that the slot self-test sub-test result of the current memory slot to be tested is normal. If the microcontroller cannot receive any response signal or receives an abnormal response signal, it can confirm that the slot self-test sub-test result of the current memory slot to be tested is abnormal, thereby realizing slot self-test of the memory slot to be tested, so as to facilitate timely repair of the memory slot to be tested. At the same time, the slot self-test sub-test result and the affirmative response signal are stored in the memory slot self-test sub-module, so as to facilitate the retrieval of historical self-test records and information at any time, so as to make initial or secondary adjustments to the installed memory slot to be tested or the installed memory slot to be tested or the memory slot after detection, thereby improving the efficiency of detection and maintenance.

[0098] According to the slot self-test sub-test result, multiple warning lights in the warning module can also be used to perform detection reminder operations. For example, when the slot self-test sub-test result shows that the slot is abnormal, the red warning light is controlled to flash ten times at an interval of 1s. When the slot self-test sub-test result shows that the slot is normal, the green warning light is controlled to flash ten times at an interval of 1s.

[0099] According to an embodiment of the present application, the microcontroller is further configured to send a log data collection instruction to the control module.

[0100] When it is necessary to detect whether the log data of the baseboard management controller or the processor is correct, the microcontroller can actively send a log data collection instruction to the baseboard management controller or the processor to facilitate the detection of the log data.

[0101] According to an embodiment of the present application, in response to log data from a control module, fault diagnosis is performed on the log data to obtain a log fault test sub-result.

[0102] After receiving the log data collection instruction, the baseboard management controller or processor can send log data containing detection temperature, whether the module voltage is stable, whether each module on the motherboard to be tested is in place, whether the memory is lost, external devices such as hard disk, network card speed and bandwidth information to the microcontroller. The microcontroller performs data fault keyword retrieval or typo detection based on the received log data, and obtains the log fault test sub-result based on the detection result.

[0103] According to an embodiment of the present application, the log data and the log fault test sub-result are packaged to obtain and send a test log data packet to the log storage sub-module.

[0104] After receiving the log data and the log fault test sub-result, the log storage sub-module backs up and saves the log data and the log fault test sub-result so that the log data and the log fault test sub-result can be retrieved at any time for detection and analysis. At the same time, the log data and the log fault test sub-result can also be backed up and stored in the first memory.

[0105] According to an embodiment of the present application, when it is necessary to detect and analyze log data, a microcontroller can be used to send a log data collection instruction to a baseboard management controller or a processor. The baseboard management controller or the processor sends the log data to the microcontroller according to the received log data collection instruction. The microcontroller performs fault detection on the received log data and stores the detection results in a log storage submodule, thereby realizing self-inspection of the log data, so as to facilitate timely confirmation of the fault of the log data, thereby maintaining the baseboard management controller or the processor.

[0106] Based on the log fault test sub-result, multiple warning lights in the warning module can also be used to provide detection reminders. For example, if the log fault test sub-result indicates the presence of fault log data, the red warning light will be controlled to flash ten times at a frequency of 0.5 seconds. Depending on the fault anomaly, the red warning light will be controlled to flash at different frequencies. If the log fault test sub-result indicates no fault log data, the green warning light will be controlled to flash ten times at a frequency of 0.5 seconds. Using warning lights of different colors and frequencies, the current test results and test progress can be quickly displayed.

[0107] Figure 4 A schematic diagram of a testing device according to another embodiment of the present application is shown.

[0108] like Figure 4As shown, the test device includes a test board 101, a dip memory module 102, a function detection module 103, multiple signal lead-out test points 104, an alarm module 401, an information interface 402 and multiple test gold finger pins 403. The dip memory module 102 includes three dip switches 201 and a first memory 202. The function detection module 103 includes a voltage acquisition unit 301, a current acquisition unit 302, a microcontroller 303, a memory slot self-test submodule 304 and a log storage submodule 305. The multiple signal lead-out test points 104 include a first data signal lead-out test point 404, a second data signal lead-out test point 405 and an electrical signal lead-out test point 406.

[0109] Figure 5 A flow chart of a testing method according to an embodiment of the present application is shown.

[0110] like Figure 5 As shown, the testing method of this embodiment includes operations S510 to S540.

[0111] In operation S510, when the test board is inserted into the memory slot to be tested of the motherboard to be tested, based on a predetermined memory address, a DIP switch in the DIP memory module is controlled to configure a test memory address of the first memory.

[0112] In operation S520 , in response to the control module performing a read and write operation on the first memory through the integrated circuit bus, a test data signal is obtained and transmitted to a plurality of signal output test points.

[0113] In operation S530, the function detection module is used to collect the test electrical signal from the power module of the mainboard to be tested, the response signal and log data from the control module of the mainboard to be tested, and the function detection module is used to test the test electrical signal, response signal and log data to obtain the function test result.

[0114] In operation S540 , a test electrical signal is transmitted to a plurality of signal extraction test points so that an external detection device obtains a signal test result according to the test data signal and the test electrical signal.

[0115] According to an embodiment of the present application, when a test board is inserted into a memory slot to be tested of a mainboard to be tested, the test memory address of the first memory is configured by controlling a plurality of dip switches in a dip memory module based on a predetermined memory address, so that the test memory address of the first memory is the same as the predetermined memory address, thereby completing the initialization configuration of the first memory. Then, in response to the control module, read and write operations are performed on the first memory through an integrated circuit bus to obtain a test data signal. The function detection module is used to collect a test electrical signal from the power module of the mainboard to be tested. By electrically connecting an external detection device to a plurality of signal lead-out test points, the test data signal and the test electrical signal are led out to the external detection device, thereby obtaining a monitoring result of the transmission quality of the data signal of the memory slot to be tested. Moreover, since the test data signal and the test electrical signal are led out to a test board far away from the memory slot to be tested, it is convenient for an external detection device to perform detection, so that even when multiple memory slots to be tested are tested simultaneously, the test data signals and test electrical signals of multiple memory slots to be tested can be obtained simultaneously. The microcontroller then performs corresponding tests based on the collected test electrical signals, response signals and log data to obtain functional test results, thereby improving detection efficiency and enabling batches of memory slots and motherboards to be tested to be tested.

[0116] Figure 6 A flow chart of a power consumption test according to an embodiment of the present application is shown.

[0117] like Figure 6As shown, the voltage acquisition unit and the current acquisition unit are used to respectively acquire the test voltage signal and the test current signal S601, and the acquired test voltage signal and test current signal are transmitted to the microcontroller S602. The microcontroller multiplies the test voltage signal and the test current signal to obtain the instantaneous value of the test power consumption S603, and determines whether the instantaneous value of the test power consumption is greater than or equal to the first power consumption threshold S604. When the instantaneous value of the test power consumption is greater than or equal to the first power consumption threshold, it is determined that the power consumption instantaneous state test information can be an instantaneous high power consumption state and the red warning light of the warning module is always on S605. When the instantaneous value of the test power consumption is less than the first power consumption threshold, it is determined that the power consumption instantaneous state test information can be an instantaneous normal power consumption state and the green warning light of the warning module is always on S606. The test power consumption instantaneous value and the power consumption instantaneous state test information are stored in the first memory for easy adjustment. Take S607, and the microcontroller can also obtain the signal collection period in the process of collecting the test voltage signal and collecting the test current signal, integrate the test voltage signal, the test current signal and the signal collection period to obtain the total test power consumption S608, and judge whether the total test power consumption is greater than or equal to the second power consumption threshold S609. When the total test power consumption is greater than or equal to the second power consumption threshold, it is determined that the operating status test information can be in a full-load working state and the red warning light of the warning module is turned on S610. When the total test power consumption is less than the second power consumption threshold, it is determined that the operating status test information can be a normal working state and the green warning light of the warning module is always on S611. At the same time, the total test power consumption curve can be drawn according to the result of the integration processing, and the total test power consumption and the operating status test information are stored in the first memory for easy retrieval S612.

[0118] Figure 7 A flowchart of memory slot detection according to an embodiment of the present application is shown.

[0119] like Figure 7As shown, the microcontroller sends a handshake signal to the control module S701 and determines whether the communication is successful S702. When the slot status of the memory slot to be tested is normal, the control module generates and sends an affirmative response signal to the microcontroller after receiving the handshake signal, so that the microcontroller can obtain the slot self-test sub-test result according to the received signal. When the slot self-test sub-test result is that the self-test is normal, the green warning light of the warning module can be turned on normally S703. When the slot status of the memory slot to be tested is abnormal, the baseboard management controller or the processor may not be able to receive the handshake signal, and thus cannot generate and send an affirmative response signal to the microcontroller, or an abnormality occurs in the integrated circuit bus, resulting in a change in the affirmative response signal generated by the baseboard management controller or the processor, and the microcontroller receives the abnormal response signal, so that the microcontroller can obtain the slot self-test sub-test result according to the received signal. When the slot self-test sub-test result is that the self-test is abnormal, the red warning light of the warning module can be turned on normally S704.

[0120] Figure 8 A flow chart of log detection according to an embodiment of the present application is shown.

[0121] like Figure 8 As shown, the microcontroller sends a log data collection instruction to the control module. When the control module receives the log data collection instruction, it sends the log data to the microcontroller S801. The microcontroller performs data fault keyword retrieval or typo detection on the log data, and determines whether the log data contains data fault keywords or typos S802. In the case of a fault anomaly, the red warning light of the warning module can be turned on normally, and according to the pre-set fault anomaly result, the red warning light can be flashed at a predetermined flashing frequency S803. In the case of no fault anomaly, the green warning light of the warning module can be turned on normally S804.

[0122] According to an embodiment of the present application, the program code for executing the computer program provided by the embodiment of the present application can be written in any combination of one or more programming languages. Specifically, these computer programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C" or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (for example, using an Internet service provider to connect via the Internet).

[0123] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the above-mentioned module, program segment, or a part of code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of the boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0124] Those skilled in the art will appreciate that the features described in the various embodiments of this application may be combined and / or coupled in various ways, even if such combinations or couplings are not explicitly described in this application. In particular, the features described in the various embodiments of this application may be combined and / or coupled in various ways without departing from the spirit and teachings of this application. All such combinations and / or couplings fall within the scope of this application.

[0125] The embodiments of the present application have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present application. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be advantageously used in combination. Without departing from the scope of the present application, those skilled in the art may make various substitutions and modifications, and these substitutions and modifications should all fall within the scope of the present application.

Claims

1. A testing device, characterized in that: The device comprises: The test board is used to simulate the transmission of test data signals and test electrical signals by the memory unit inserted in the memory slot to be tested of the motherboard to be tested when the test board is inserted in the memory slot to be tested; a DIP memory module, provided on the test board, comprising a DIP switch and a first memory, for controlling the DIP switch to configure a test memory address of the first memory based on a predetermined memory address, so that the control module of the motherboard to be tested performs a read and write operation on the first memory via an integrated circuit bus to obtain the test data signal; a function detection module, provided on the test board, for collecting a test electrical signal from the power module of the motherboard to be tested, a response signal from the control module, and log data, and testing the test electrical signal, the response signal, and the log data to obtain a function test result; Multiple signal lead-out test points are arranged on a side of the test board away from the memory slot to be tested, and are used to lead the test data signal and the test electrical signal to an external detection device so that the external detection device can obtain a signal test result based on the test data signal and the test electrical signal.

2. The device according to claim 1, characterized in that The first memory is further configured to: When the predetermined memory address and the test memory address are the same, in response to the control module performing a write operation on the first memory through the integrated circuit bus, a test data signal is obtained and the test data signal is backed up so as to read the test data signal when the test equipment is connected to the plurality of signal lead-out test points.

3. The device according to claim 1, characterized in that The functional test results include power consumption test sub-results, slot self-test test sub-results, and log fault test sub-results. The functional detection module includes: an electrical signal acquisition submodule, electrically connected to the microcontroller, for acquiring and transmitting the test electrical signal and signal acquisition time information to the microcontroller, wherein the test electrical signal includes a test voltage signal and a test current signal; The microcontroller is configured to, in response to receiving the test electrical signal and the signal acquisition time information, perform a power consumption test on the test electrical signal to obtain the power consumption test sub-result; obtain the response signal and the log data, and test the response signal and the log data respectively to obtain the slot self-test sub-result and the log fault test sub-result; a memory slot self-test submodule, electrically connected to the microcontroller and configured to store the slot self-test sub-results; The log storage submodule is electrically connected to the microcontroller and is used to store the log fault test sub-result.

4. The device according to claim 3, characterized in that The log fault test sub-result includes power consumption transient state test information and operation state test information; the microcontroller is further configured to: Obtaining the power consumption instantaneous state test information according to the test power consumption instantaneous value and a first power consumption threshold value obtained based on the test voltage signal and the test current signal; The operating status test information of the control module is obtained according to the total test power consumption value obtained based on the test voltage signal, the test current signal and the signal acquisition period and the second power consumption threshold.

5. The device according to claim 3, characterized in that The microcontroller is also used to: sending a handshake signal to the control module via the integrated circuit bus; In response to a positive response signal from the control module, confirming that a result of the slot self-test subtest is that the slot is normal; The slot self-test sub-test result and the affirmative response signal are packaged to obtain and send test self-test information to the memory slot self-test sub-module.

6. The device according to claim 3, characterized in that The microcontroller is also used to: Sending a log data collection instruction to the control module; In response to the log data from the control module, performing fault diagnosis on the log data to obtain the log fault test sub-result; The log data and the log fault test sub-result are packaged to obtain and send a test log data packet to the log storage sub-module.

7. The device according to claim 1, characterized in that The control module includes a management controller and a processor, and the multiple signal lead test points include: A first data signal lead-out test point, used for leading a first test data signal sent from the management controller to the external detection device; A second data signal lead-out test point, used for leading a second test data signal sent from the processor to the external detection device; The electrical signal lead-out test point is used to lead the test electrical signal to the external detection equipment.

8. The device according to claim 1, characterized in that The device further comprises: A warning module, provided on the test board, for generating a warning mark according to the functional test result; An information interface is provided on a side of the test board away from the memory slot to be tested, and is used for connecting to the external testing device so that the functional test result is transmitted to the external testing device.

9. The device according to claim 1, characterized in that The device further comprises: A plurality of test gold finger pins are arranged on the test board and are used to electrically connect to the memory slot to be tested when the test board is inserted into the memory slot to be tested, so that the test data signal and the test electrical signal are transmitted to the test board.

10. A testing method, applied to the testing device according to any one of claims 1 to 9, characterized in that: The method comprises: When the test board is inserted into the memory slot to be tested of the motherboard to be tested, based on the predetermined memory address, the DIP switch in the DIP memory module is controlled to configure the test memory address of the first memory; In response to the control module performing a read and write operation on the first memory through the integrated circuit bus, a test data signal is obtained and transmitted to a plurality of signal output test points; Collecting a test electrical signal from a power module of the motherboard to be tested, a response signal from a control module of the motherboard to be tested, and log data using a function detection module, and testing the test electrical signal, the response signal, and the log data using the function detection module to obtain a function test result; The test electrical signal is transmitted to the plurality of signal lead-out test points so that an external detection device obtains a signal test result according to the test data signal and the test electrical signal.

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