Method, device and equipment for evaluating asymmetric deformation of wafer and medium
By calculating the equivalent stress value of wafer surface morphology measurement data and identifying potential asymmetric deformation directions, the evaluation lag problem of asymmetric deformation in wafers during semiconductor manufacturing is solved, and advance prevention and improvement of device quality is achieved.
Patent Information
- Application Number
- CN202510349420.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-24
- Publication Date
- 2025-08-01
AI Technical Summary
The prior art cannot effectively evaluate and prevent the asymmetric deformation of wafers during semiconductor manufacturing, resulting in loss of focus and waste of production capacity during semiconductor device manufacturing.
The equivalent stress values in each sampling diameter direction are calculated based on the morphological measurement data of the wafer surface, the potential asymmetric deformation direction and tendency are determined, the equivalent stress values are calculated using the Stoney formula, and the asymmetric deformation risk is identified in advance through the evaluation device and equipment.
Asymmetric deformation is identified and evaluated in advance during the wafer production stage, avoiding defective products from flowing into subsequent processes, improving the quality of semiconductor devices and reducing the probability of asymmetric deformation.
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Figure CN120413451A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of semiconductor manufacturing technologies, and in particular, to a method, apparatus, device, and medium for evaluating the asymmetric deformation of a wafer. Background Art
[0002] In the process of semiconductor device manufacturing, as the substrate of semiconductor devices, multiple layers of thin films are deposited on the surface of a wafer. The stress generated by these thin films will cause the wafer to deform, especially bend. Currently, in related solutions, the thin film stress is usually considered to be uniform across the entire surface of the wafer, and the uniform thin film stress usually causes the wafer to have symmetric deformation, and thus it is considered that the curvature change caused by the bend of the wafer is also fixed.
[0003] However, it is found in the specific implementation process that the wafer usually has asymmetric deformation during the semiconductor device manufacturing process, and for this asymmetric deformation, it is also evaluated during or after the implementation of the semiconductor device manufacturing process, which has hysteresis.
[0004] Therefore, there is a need to provide a stage that can evaluate the asymmetric deformation of the wafer in advance during the wafer production stage. Summary of the Invention
[0005] The present disclosure provides a method, apparatus, device, and medium for evaluating the asymmetric deformation of a wafer; it can evaluate in advance the possible asymmetric deformation of the wafer during the back-end semiconductor device manufacturing process during the wafer production stage.
[0006] The technical solution of the present disclosure is implemented as follows: In a first aspect, the present disclosure provides a method for evaluating the asymmetric deformation of a wafer, the method including: Obtaining an equivalent stress value corresponding to each sampling diameter direction based on the topography measurement data of each sampling diameter direction on the wafer surface; Determining the sampling diameter directions corresponding to the maximum value and the minimum value among the equivalent stress values corresponding to all sampling diameter directions as potential asymmetric deformation directions; Determining a metric value of the tendency of asymmetric deformation to occur according to the equivalent stress value and the topography measurement data of the potential asymmetric deformation direction.
[0007] In a second aspect, the present disclosure provides an apparatus for evaluating the asymmetric deformation of a wafer, the apparatus including: an obtaining unit, a first determining unit, and a second determining unit, wherein, The obtaining unit is configured to obtain an equivalent stress value corresponding to each sampling diameter direction based on the topography measurement data of each sampling diameter direction on the wafer surface; The first determination unit is configured to determine the sampling diameter directions corresponding to the maximum value and the minimum value among the equivalent stress values corresponding to all sampling diameter directions as potential asymmetric deformation directions; The second determination unit is configured to determine the diameter direction with the highest probability of asymmetric deformation and a metric value of the tendency of asymmetric deformation according to the topography measurement data of the potential asymmetric deformation direction.
[0008] In a third aspect, the present disclosure provides a computing device, which includes a processor and a memory; the processor is configured to execute instructions stored in the memory to implement the method for evaluating wafer asymmetric deformation as described in the first aspect.
[0009] In a fourth aspect, the present disclosure provides a computer-readable storage medium, which stores at least one instruction, and the at least one instruction is used to be executed by a processor to implement the method for evaluating wafer asymmetric deformation as described in the first aspect.
[0010] The present disclosure provides a method, device, equipment and medium for evaluating wafer asymmetric deformation; after calculating the stress distribution of the topography measurement data of each sampling diameter direction on the wafer surface and determining the sampling diameter directions that are most likely to undergo asymmetric deformation, the tendency of asymmetric deformation is evaluated or measured according to the equivalent stress values and topography measurement data of these sampling diameter directions that are most likely to undergo asymmetric deformation, so as to evaluate in advance the possible asymmetric deformation of the wafer in the subsequent semiconductor device manufacturing process during the wafer production stage, avoid wafers that are prone to asymmetric deformation from flowing into the subsequent semiconductor device process, improve the quality of semiconductor devices, and also can give process guidance for the subsequent semiconductor device process by evaluating in advance and reduce the probability of asymmetric deformation. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 It is a schematic flowchart of a method for evaluating wafer asymmetric deformation provided by the present disclosure.
[0012] Figure 2 It is a schematic diagram of sampling the topography measurement data of the entire wafer surface provided by the present disclosure.
[0013] Figure 3 It is a curve graph of the topography measurement values in a sampling diameter direction provided by the present disclosure.
[0014] Figure 4 It is another curve graph of the topography measurement values in a sampling diameter direction provided by the present disclosure.
[0015] Figure 5 It is a schematic diagram of the distribution of normalized equivalent stress values provided by the present disclosure.
[0016] Figure 6 Another graph of the measured values of the topography in the sampling diameter direction provided by the present disclosure.
[0017] Figure 7 Yet another graph of the measured values of the topography in the sampling diameter direction provided by the present disclosure.
[0018] Figure 8 A schematic diagram of the distribution of stress values provided by the present disclosure.
[0019] Figure 9 A schematic diagram of the composition of a device for evaluating the asymmetric deformation of a wafer provided by the present disclosure.
[0020] Figure 10 A schematic diagram of the structure of a computing device provided by the present disclosure. Detailed implementation manners
[0021] Next, the technical solutions in the present disclosure will be clearly and completely described in conjunction with the accompanying drawings in the present disclosure.
[0022] Due to the inherent defects in the wafer manufacturing process, the wafer surface does not present a flat surface as a whole, but shows a fluctuating phenomenon with different height values at each point. This fluctuating phenomenon of the wafer surface topography is irregular and can have any shape. During the semiconductor device manufacturing process, multiple layers of thin films are deposited on the wafer surface. Due to the irregularity of the fluctuating phenomenon of the wafer surface topography, the stress generated by these thin films is not fixed, but changes with the fluctuating phenomenon. Therefore, the bending deformation of the wafer caused by the thin film stress is not symmetric, but asymmetric.
[0023] Currently, for the evaluation of this asymmetric deformation, it is usually carried out during or after the implementation of the semiconductor device manufacturing process, which has a lag. And this asymmetric deformation cannot be flattened under the clamping pressure in the semiconductor device manufacturing process, such as in the case of lithography, resulting in some parts of the exposure area may be out of focus, or it may be difficult for the lithography scanner to correctly expose the chip, reducing the quality of the semiconductor device and wasting production capacity resources.
[0024] Based on this, the present disclosure hopes to be able to evaluate the possible asymmetric deformation of the wafer in the subsequent semiconductor device manufacturing process during the wafer manufacturing process, that is, in the wafer production stage, so as to be able to timely evaluate the possible asymmetric deformation of the wafer and give guidance for the subsequent semiconductor device manufacturing process.
[0025] Therefore, referring to Figure 1, which shows a method for evaluating the asymmetric deformation of a wafer provided by the present disclosure. This method may include steps S101 to S103.
[0026] In step S101, equivalent stress values corresponding to each sampling diameter direction are obtained based on the topography measurement data of each sampling diameter direction on the wafer surface.
[0027] In some examples, the fluctuation phenomenon of the wafer surface topography is generated during the process of wire cutting a single crystal silicon rod and is retained after the grinding and / or polishing process. In the present disclosure, this fluctuation phenomenon can be reflected by the topography measurement data of the wafer surface.
[0028] Specifically, the shape of the entire surface of the wafer in the thickness direction is measured by a wafer topography measurement device to obtain topography measurement data. In some examples, the shape of the entire surface of the wafer in the thickness direction can be the shape of the entire front surface of the wafer in the thickness direction, or the shape of the entire back surface or intermediate curved surface of the wafer in the thickness direction. The present disclosure does not make specific limitations on this.
[0029] In some examples, after obtaining the topography measurement data of the entire surface of the wafer, the topography measurement data of each sampling diameter direction on the wafer surface can be obtained therefrom. For example, as Figure 2 shown, in the topography measurement data of the entire surface of the wafer, the direction perpendicular to the notch is set as the angle reference (0°). From this angle reference, according to the set sampling angle, such as 5°, it rotates 180° counterclockwise along the arrow shown, and the sampling of the entire surface of the wafer can be completed, obtaining about 36 sampling diameter directions as shown in Figure 2 , and the topography measurement data corresponding to each sampling diameter direction. To avoid the risk of data omission, the sampling angle is usually not set to exceed 5°.
[0030] Due to the irregularity of the fluctuation phenomenon of the wafer surface topography, the curves presented by the topography measurement data of each sampling diameter direction in the corresponding diameter direction are different. Based on this, in subsequent semiconductor device manufacturing processes, as a thin film is deposited on the wafer surface, the stresses generated by the thin film in different diameter directions are different, and thus the bending deformation formed by the thin film stress is also different.
[0031] Based on this, according to the topography measurement data of each sampling diameter direction on the wafer surface, the equivalent stress values corresponding to each sampling diameter direction can be calculated. The specific implementation manner thereof can refer to the implementation manner and its examples described later in the present disclosure.
[0032] In step S102, the sampling diameter directions corresponding to the maximum and minimum values among the equivalent stress values corresponding to all sampling diameter directions are determined as potential asymmetric deformation directions.
[0033] In the present disclosure, in the case where the fluctuation phenomenon of the wafer surface topography is understood as a ripple, the bending stiffness in the direction parallel to the ripple on the wafer surface is increased, while the stiffness in the direction perpendicular to the ripple is weakened. That is to say, it is not easy for the wafer surface to deform in the direction parallel to the ripple, while it is easier for the wafer surface to deform in the direction perpendicular to the ripple.
[0034] Based on the above understanding, among all the sampling diameter directions, the sampling diameter directions with the maximum and minimum equivalent stress values can characterize the undulation direction of the ripple, that is, the direction perpendicular to the ripple. Combining the above understanding, asymmetric deformation is most likely to occur in these two directions. Therefore, in order to evaluate the asymmetric deformation of the wafer, the present disclosure uses these two directions as potential asymmetric deformation directions for subsequent evaluation of the tendency of asymmetric deformation.
[0035] In step S103, according to the equivalent stress values of the potential asymmetric deformation directions and the topography measurement data, a metric value for the tendency of asymmetric deformation to occur is determined.
[0036] In the present disclosure, based on the equivalent stress values of the potential asymmetric deformation directions and the topography measurement data, three metric values for characterizing the tendency of asymmetric deformation to occur are exemplarily proposed.
[0037] First, in combination with the description of the foregoing step S102, the two potential asymmetric deformation directions can characterize the undulation direction of the ripple, that is, the direction perpendicular to the ripple. Then, the difference in the equivalent stress values of these two potential asymmetric deformation directions can characterize the in-plane difference of the ripple undulation across the entire wafer surface. The greater such a difference is, the more likely asymmetric deformation is to occur.
[0038] Second, among the two potential asymmetric deformation directions, the direction with a larger undulation wave number can be considered as the sampling diameter direction where asymmetric deformation is more likely to occur, and the more undulation wave numbers there are, the greater the possibility of asymmetric deformation.
[0039] Then, on the sampling diameter direction where asymmetric deformation is more likely to occur as described above, the peak-to-valley (PV) can also be used to characterize the tendency of asymmetric deformation to occur. The larger the PV value is, the greater the possibility of asymmetric deformation.
[0040] Through the above technical solution, after calculating the stress distribution based on the topography measurement data in each sampling diameter direction on the wafer surface and determining the sampling diameter direction where asymmetric deformation is most likely to occur, the tendency of asymmetric deformation is evaluated or measured according to the equivalent stress values and topography measurement data in these potential sampling diameter directions where asymmetric deformation is most likely to occur, so as to evaluate in advance during the wafer production stage the possible asymmetric deformation of the wafer in the subsequent semiconductor device manufacturing process, avoid wafers prone to asymmetric deformation from flowing into the subsequent semiconductor device process, improve the quality of semiconductor devices, and also, process guidance can be given to the subsequent semiconductor device process through advance evaluation to reduce the probability of asymmetric deformation occurring.
[0041] For the foregoing Figure 1 In some possible implementation manners of the shown technical solution, obtaining the equivalent stress value corresponding to each sampling diameter direction based on the topography measurement data in each sampling diameter direction on the wafer surface includes: In the topography measurement data of the entire surface of the wafer, rotate according to a set sampling angle and cover the entire surface of the wafer to obtain the topography measurement data in the sampling diameter direction corresponding to each sampling angle; In the topography measurement data in each sampling diameter direction, obtain the topography measurement values of two sampling points symmetric about the wafer center, and obtain the equivalent stress value corresponding to the sampling diameter direction based on the topography measurement values of the two sampling points.
[0042] Specifically, for the above implementation manner, taking Figure 2 as an example, after obtaining multiple sampling diameter directions, the topography measurement data corresponding to each sampling diameter direction can be extracted from the topography measurement data of the entire surface of the wafer. Refer to Figure 3 , which shows a schematic diagram of the topography measurement data corresponding to a sampling diameter direction, and the topography measurement data can be presented as Figure 3 the curve of the topography measurement values corresponding to each sampling point in the sampling diameter direction shown. In Figure 3 , the abscissa represents the distance between each sampling point in the sampling diameter direction and the wafer center, with the unit of mm, and the ordinate represents the topography measurement value of the corresponding sampling point, with the unit of nm. The topography measurement value can exemplarily be the height value (Height) of the wafer surface at the sampling point relative to the front surface, back surface or central plane of the wafer. This disclosure will not elaborate on this. In some examples, the distances from the two sampling points symmetric about the wafer center to the wafer center are equal, and this distance can be 145 mm, 120 mm or 70 mm.
[0043] In some examples, taking the height value (Height) as an example again, Figure 4 shows the curve of the topography measurement values in a sampling diameter direction. From Figure 4After obtaining two exemplary sampling points (P1 and P2) at distances of -145 mm and 145 mm from the center of the wafer respectively, the topography measurement values of these two sampling points are obtained respectively, and based on the topography measurement values of these two sampling points, the tangents corresponding to these two sampling points in the topography measurement value curve are calculated by numerical differentiation (such as Figure 4 L1 and L2 shown in
[0044] After obtaining the included angle formed by the tangents L1 and L2, the present disclosure can determine the equivalent stress value corresponding to the sampling diameter direction according to the included angle between the two tangents
[0045] Specifically, determining the equivalent stress value corresponding to the sampling diameter direction according to the included angle between the two tangents and the distance L between the two sampling points includes: Based on the ratio of the included angle between the tangents of two sampling points with equal distances from the center of the wafer and the distance between the two sampling points with equal distances from the center of the wafer, the equivalent stress value corresponding to the sampling diameter direction is calculated by the Stoney formula.
[0046] Specifically, the Stoney formula can generally be expressed as , where and represent the Young's modulus and Poisson's ratio of the wafer as the substrate at the Z position, represents the thickness of the wafer as the substrate, represents the thickness of the deposited film, and represent the first radius of curvature of the substrate before backsealing and the second radius of curvature of the substrate after backsealing respectively. Since the present disclosure is implemented in the production and manufacturing process of the wafer and no film is deposited, therefore, in the technical solution of the present disclosure, the stress value obtained based on the Stoney formula should be the equivalent stress value. Based on this, the present disclosure rewrites the Stoney formula into , and since is the radius of curvature, combined with Figure 4 the included angle of the tangent and the distance between the sampling points shown in , based on this, according to the rewritten Stoney formula above, is normalized, and Figure 4The normalized equivalent stress values corresponding to the sampling diameter direction shown. In the present disclosure, exemplary can be 188 Gpa, is 0.26, is 7.75×10 -4 m, is 4×10 -7 m.
[0047] It should be noted that after obtaining the equivalent stress values in all sampling diameter directions, a schematic diagram of the normalized equivalent stress value distribution curve of the entire surface of the wafer can be obtained, as Figure 5 shown. In Figure 5 , the abscissa represents the angle corresponding to the sampling diameter direction, with the unit of °, and the ordinate represents the normalized equivalent stress value, with the unit of Mpa. As can be seen from Figure 5 , the peak value in the equivalent stress value distribution curve is 5.5 Mpa, corresponding to the abscissa of 175°, and the valley value is -13.7 Mpa, corresponding to the abscissa of 75°. The angles identified by these two abscissas are the potential asymmetric deformation directions, which are respectively marked as θ1 = 175° and θ2 = 75°.
[0048] For the foregoing Figure 1 technical solution shown, in some possible implementation manners, according to the equivalent stress value and the topography measurement data in the potential asymmetric deformation direction, a metric value indicating the tendency of asymmetric deformation to occur is determined, including: Determining the difference in the equivalent stress values in the potential asymmetric deformation direction as the first metric value indicating the tendency of asymmetric deformation to occur; In the potential asymmetric deformation direction, determining the maximum value of the number of peaks in the topography measurement data as the second metric value indicating the tendency of asymmetric deformation to occur, and determining the third metric value indicating the tendency of asymmetric deformation to occur according to the topography measurement data in the potential asymmetric deformation direction with the largest number of peaks in the topography measurement data.
[0049] For the above implementation manner, in some examples, determining the third metric value indicating the tendency of asymmetric deformation to occur according to the topography measurement data in the potential asymmetric deformation direction with the largest number of peaks in the topography measurement data includes: Obtaining the peak-valley values according to the topography measurement data in the potential asymmetric deformation direction with the largest number of peaks in the topography measurement data, and determining the peak-valley values in the potential asymmetric deformation direction with the largest number of peaks in the topography measurement data as the third metric value.
[0050] For the above implementation manners and their examples, in combination with the foregoing examples, the sampling diameter directions with the maximum and minimum equivalent stress values of θ1 and θ2 can characterize the undulation direction of the ripple, that is, the direction perpendicular to the ripple direction. In combination with the foregoing description, asymmetric deformation is most likely to occur in these two directions. In the present disclosure, the difference ΔR between the equivalent stress values in the two directions of θ1 and θ2 is used as the first metric value, which can characterize the in-plane difference formed by the ripple undulation across the entire wafer surface. The greater such a difference is, the more likely it is to have asymmetric deformation.
[0051] In addition, for the two potential asymmetric deformation directions of θ1 and θ2, the corresponding topography measurement value curves are as Figure 6 and Figure 7 shown. In Figure 6 and Figure 7 , the ordinate represents the height value (Height) with the unit of nm. By comparing Figure 6 and Figure 7 , it can be seen that Figure 6 the topography measurement value curve of θ2 = 75° shown includes 2 peaks, Figure 7 and the topography measurement value curve of θ1 = 175° shown only includes 1 peak. Therefore, the maximum value of the number of peaks (i.e., 2) is used as the second metric value, and θ2 corresponding to the appearance of 2 peaks can be considered as the sampling diameter direction in the potential asymmetric deformation directions where asymmetric deformation is most likely to occur. Moreover, the more the number of peaks, the more the number of undulation waves, and thus it can be determined that the possibility of asymmetric deformation is greater.
[0052] In addition, for the direction θ2 with the largest number of peaks, the PV value in this direction can be determined according to its topography measurement value curve and used as the third metric value. As in Figure 6 , the edge removal amount EE is set to 5 mm, the PV value is 4100 nm, and the greater the PV value is, the greater the degree of ripple undulation is, and the greater the possibility of asymmetric deformation is.
[0053] Based on the foregoing technical solutions, their implementation manners and examples, the present disclosure conducts a thin film deposition experiment on the wafer example involved in the above technical solution, that is, after depositing a silicon oxide thin film with a thickness of 4050 angstroms on the wafer surface by APCVD, according to the original Stoney formula the thin film stress in each sampling diameter direction is calculated as shown in Figure 8 , and from Figure 8It can be seen that the maximum value of the film stress appears at 75°, and the minimum value appears at 175°. The film stress values at these two points are 139.95 MPa and 83.52 MPa respectively. Calculating their relative ratio gives 0.5968. Compared with the wafer example in the foregoing technical solution, the angles at which the actual film stress has the maximum and minimum values are the same as those in the example of the foregoing technical solution. Moreover, the angle in the sampling diameter direction where asymmetric deformation is most likely to occur in the foregoing technical solution is 75 degrees, which is consistent with the angle at which the maximum value of the film stress appears in the experiment. Therefore, the present disclosure can accurately evaluate in advance the direction in which the wafer is most likely to undergo asymmetric deformation and the tendency of asymmetric deformation before semiconductor device manufacturing.
[0054] In some examples, the foregoing technical solution can be applied to evaluate the wafer at the end of wafer processing. For example, the evaluation is implemented after the multi-wire cutting process, so as to eliminate wafers that are very likely to undergo asymmetric deformation in the subsequent semiconductor manufacturing process at an early stage of the process.
[0055] In addition, the evaluation result of a single wafer can predict the evaluation results of other wafers, thereby enabling effective quality control decisions regarding the production batch. For example, the evaluation result of a single wafer can be used to predict the evaluation results of other wafers produced from the same ingot and / or multi-wire group used in the cutting process. In this way, efficient production of wafers is achieved within the quality control limits without the need for a time-consuming and resource-consuming evaluation process for each wafer independently.
[0056] Furthermore, after obtaining the foregoing evaluation result, the subsequent semiconductor device manufacturing process can be guided according to the evaluation result. For example, if large deformation is likely to occur in a certain direction X during the semiconductor device manufacturing process, then the direction most likely to undergo asymmetric deformation can be made close to the direction perpendicular to direction X, so as to utilize the property that deformation is not likely to occur in the direction parallel to the ripple.
[0057] Based on the same inventive concept as the foregoing technical solution, refer to Figure 9 which shows an apparatus 90 for evaluating asymmetric deformation of a wafer provided by the present disclosure. The apparatus 90 includes: an acquisition unit 901, a first determination unit 902, and a second determination unit 903, where The acquisition unit 901 is configured to obtain the equivalent stress values corresponding to each sampling diameter direction based on the topography measurement data of each sampling diameter direction on the wafer surface; The first determination unit 902 is configured to determine the sampling diameter directions corresponding to the maximum and minimum values among the equivalent stress values corresponding to all sampling diameter directions as the potential asymmetric deformation directions; The second determination unit 903 is configured to determine the diameter direction with the highest probability of asymmetric deformation and a metric value of the tendency of asymmetric deformation according to the topography measurement data of the potential asymmetric deformation direction.
[0058] In some examples, the acquisition unit 901 is configured to: In the topography measurement data of the entire surface of the wafer, rotate according to a set sampling angle and cover the entire surface of the wafer to obtain the topography measurement data of the sampling diameter direction corresponding to each sampling angle; In the topography measurement data of each sampling diameter direction, obtain the topography measurement values of two sampling points symmetric about the wafer center, and obtain the equivalent stress value corresponding to the sampling diameter direction based on the topography measurement values of the two sampling points.
[0059] In some examples, the acquisition unit 901 is configured to: In the topography measurement data of each sampling diameter direction, obtain the topography measurement values of two sampling points at equal distances from the wafer center; Based on the topography measurement values of the two sampling points at equal distances from the wafer center, numerically calculate the tangents respectively corresponding to the two sampling points in the topography curve in the sampling diameter direction; the topography curve is a curve representing the topography measurement values respectively corresponding to all sampling points in the sampling diameter direction; Determine the equivalent stress value corresponding to the sampling diameter direction according to the included angle between the tangents of the two sampling points at equal distances from the wafer center and the distance between the two sampling points at equal distances from the wafer center.
[0060] In some examples, the acquisition unit 901 is configured to: Based on the ratio of the included angle between the tangents of the two sampling points at equal distances from the wafer center and the distance between the two sampling points at equal distances from the wafer center, calculate the equivalent stress value corresponding to the sampling diameter direction by the Stoney formula.
[0061] In some examples, the second determination unit 903 is configured to: Determine the difference between the equivalent stress values of the potential asymmetric deformation direction as the first metric value of the tendency of asymmetric deformation; In the potential asymmetric deformation direction, determine the maximum value of the number of peaks in the topography measurement data as the second metric value of the tendency of asymmetric deformation, and determine the third metric value of the tendency of asymmetric deformation according to the topography measurement data of the potential asymmetric deformation direction with the largest number of peaks in the topography measurement data.
[0062] In some examples, the second determination unit 903 is configured to: Obtain the peak-valley values according to the topography measurement data in the direction of the largest potential asymmetric deformation corresponding to the number of peaks in the topography measurement data, and determine the peak-valley values in the direction of the largest potential asymmetric deformation corresponding to the number of peaks in the topography measurement data as the third metric value.
[0063] Please refer to Figure 10 , which shows a structural block diagram of a computing device 100 provided by an exemplary embodiment of the present disclosure. In some examples, the computing device 100 may be at least one of devices such as a smart phone, a smart watch, a desktop computer, a laptop computer, a virtual reality terminal, an augmented reality terminal, a wireless terminal, and a laptop portable computer. The computing device 100 has a communication function and can access a wired network or a wireless network. The computing device 100 may generally refer to one of a plurality of terminals. Those skilled in the art can know that the number of the above terminals may be more or less. In some examples, the computing device 100 may receive the topography measurement data of the entire surface of the wafer based on the accessed wired network or wireless network. It can be understood that the computing device 100 undertakes the calculation and processing work of the technical solution of the present disclosure, and the present disclosure does not limit this.
[0064] As Figure 10 shown, the computing device 100 in the present disclosure may include one or more of the following components: a processor 1010 and a memory 1020.
[0065] Optionally, the processor 1010 connects various parts within the entire computing device 100 using various interfaces and lines. By running or executing instructions, programs, code sets, or instruction sets stored in the memory 1020, and by invoking data stored in the memory 1020, it performs various functions of the computing device 100 and processes data. Optionally, the processor 1010 can be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), or programmable logic array (PLA). The processor 1010 can integrate one or a combination of several of a central processing unit (CPU), a graphics processing unit (GPU), a neural-network processing unit (NPU), and a baseband chip, etc. Among them, the CPU mainly processes the operating system, user interface, application programs, etc.; the GPU is responsible for rendering and drawing the content to be displayed on the touch display screen; the NPU is used to implement artificial intelligence (AI) functions; the baseband chip is used to process wireless communication. It can be understood that the above baseband chip may not be integrated into the processor 1010 and can be implemented separately by a single chip.
[0066] The memory 1020 can include random access memory (RAM) and can also include read-only memory (ROM). Optionally, the memory 1020 includes a non-transitory computer-readable storage medium. The memory 1020 can be used to store instructions, programs, code, code sets, or instruction sets. The memory 1020 can include a program storage area and a data storage area. Among them, the program storage area can store instructions for implementing the operating system, instructions for at least one function (such as touch control function, sound playback function, image playback function, etc.), instructions for implementing each of the above method embodiments, etc.; the data storage area can store data created according to the use of the computing device 100, etc.
[0067] In addition, those skilled in the art can understand that the structure of the computing device 100 shown in the above figures does not limit the computing device 100. The computing device 100 may include more or fewer components than those shown in the figures, or combine certain components, or have different component arrangements. For example, the computing device 100 may further include components such as a display screen, a camera module, a microphone, a speaker, a radio frequency circuit, an input unit, sensors (such as an acceleration sensor, an angular velocity sensor, a light sensor, etc.), an audio circuit, a WiFi module, a power supply, a Bluetooth module, etc., which will not be elaborated here.
[0068] The present disclosure also provides a computer-readable storage medium storing at least one instruction for being executed by a processor to implement the method for evaluating the asymmetric deformation of a wafer as described in the above various embodiments.
[0069] The present disclosure also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions to enable the computing device to implement the method for evaluating the asymmetric deformation of a wafer as described in the above various embodiments.
[0070] Those skilled in the art should be able to realize that in the above one or more examples, the functions described in the present disclosure can be implemented by hardware, software, firmware, or any combination thereof. When implemented using software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium. The computer-readable medium includes computer storage media and communication media, where the communication media includes any medium facilitating the transmission of a computer program from one place to another. The storage media can be any available medium accessible by a general-purpose or special-purpose computer.
[0071] It should be noted that the technical solutions described in the present disclosure can be arbitrarily combined without conflict.
[0072] As described above, the above are only the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, and all should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.
Claims
1. A method for evaluating the asymmetric deformation of a wafer, characterized in that, The method includes: Obtaining the equivalent stress value corresponding to each sampling diameter direction based on the topography measurement data in each sampling diameter direction on the wafer surface; Determining the sampling diameter directions corresponding to the maximum and minimum values among the equivalent stress values corresponding to all sampling diameter directions as potential asymmetric deformation directions; Determining a metric value for the tendency of asymmetric deformation to occur based on the equivalent stress value and topography measurement data in the potential asymmetric deformation direction.
2. The method according to claim 1, characterized in that, The obtaining the equivalent stress value corresponding to each sampling diameter direction based on the topography measurement data in each sampling diameter direction on the wafer surface includes: In the topography measurement data of the entire surface of the wafer, rotating according to a set sampling angle and covering the entire surface of the wafer to obtain the topography measurement data in the sampling diameter direction corresponding to each sampling angle; In the topography measurement data in each sampling diameter direction, obtaining the topography measurement values of two sampling points symmetric about the wafer center, and obtaining the equivalent stress value corresponding to the sampling diameter direction based on the topography measurement values of the two sampling points.
3. The method according to claim 2, characterized in that, The obtaining the topography measurement values of two sampling points symmetric about the wafer center in the topography measurement data in each sampling diameter direction, and obtaining the equivalent stress value corresponding to the sampling diameter direction based on the topography measurement values of the two sampling points includes: In the topography measurement data in each sampling diameter direction, obtaining the topography measurement values of two sampling points at equal distances from the wafer center; Calculating the tangents corresponding to the two sampling points in the topography curve in the sampling diameter direction by means of numerical differentiation based on the topography measurement values of the two sampling points at equal distances from the wafer center; the topography curve is a curve representing the topography measurement values corresponding to all sampling points in the sampling diameter direction; Determining the equivalent stress value corresponding to the sampling diameter direction according to the included angle between the tangents of the two sampling points at equal distances from the wafer center and the distance between the two sampling points at equal distances from the wafer center.
4. The method according to claim 3, wherein The determining the equivalent stress value corresponding to the sampling diameter direction according to the included angle between the tangents of the two sampling points at equal distances from the wafer center and the distance between the two sampling points at equal distances from the wafer center includes: Calculating the equivalent stress value corresponding to the sampling diameter direction by the Stoney formula based on the ratio of the included angle between the tangents of the two sampling points at equal distances from the wafer center and the distance between the two sampling points at equal distances from the wafer center.
5. The method according to claim 1, wherein The determining a metric value for the tendency of asymmetric deformation to occur based on the equivalent stress value and topography measurement data in the potential asymmetric deformation direction includes: Determining the difference in the equivalent stress values in the potential asymmetric deformation direction as the first metric value for the tendency of asymmetric deformation to occur; In the potential asymmetric deformation directions, determining the maximum value of the number of peaks in the topography measurement data as the second metric value for the tendency of asymmetric deformation to occur, and determining the third metric value for the tendency of asymmetric deformation to occur based on the topography measurement data in the potential asymmetric deformation direction with the largest number of peaks in the topography measurement data.
6. The method according to claim 5, wherein The third metric value for determining the tendency of asymmetric deformation based on the topography measurement data in the direction of the maximum potential asymmetric deformation corresponding to the number of peaks in the topography measurement data includes: Obtaining peak-valley values from the topography measurement data in the direction of the maximum potential asymmetric deformation corresponding to the number of peaks in the topography measurement data, and determining the peak-valley values in the direction of the maximum potential asymmetric deformation corresponding to the number of peaks in the topography measurement data as the third metric value.
7. An apparatus for evaluating the asymmetric deformation of a wafer, characterized in that The device includes: an acquisition unit, a first determination unit, and a second determination unit, where The acquisition unit is configured to obtain the equivalent stress value corresponding to each sampling diameter direction based on the topography measurement data in each sampling diameter direction on the wafer surface; The first determination unit is configured to determine the sampling diameter directions corresponding to the maximum and minimum values among the equivalent stress values corresponding to all sampling diameter directions as the potential asymmetric deformation directions; The second determination unit is configured to determine the diameter direction with the highest probability of asymmetric deformation and the metric value of the tendency of asymmetric deformation based on the topography measurement data in the potential asymmetric deformation direction.
8. The device according to claim 7, wherein The acquisition unit is configured to: In the topography measurement data of the entire surface of the wafer, rotate according to a set sampling angle and cover the entire surface of the wafer to obtain the topography measurement data in the sampling diameter direction corresponding to each sampling angle; In the topography measurement data in each sampling diameter direction, obtain the topography measurement values of two sampling points at equal distances from the wafer center; Based on the topography measurement values of the two sampling points at equal distances from the wafer center, calculate the tangents corresponding to the two sampling points in the topography curve in the sampling diameter direction by numerical differentiation; the topography curve is a curve representing the topography measurement values corresponding to all sampling points in the sampling diameter direction; Determine the equivalent stress value corresponding to the sampling diameter direction according to the included angle between the tangents of the two sampling points at equal distances from the wafer center and the distance between the two sampling points at equal distances from the wafer center.
9. The device according to claim 7, characterized in that, The second determination unit is configured to: Determine the difference between the equivalent stress values in the potential asymmetric deformation direction as the first metric value of the tendency of asymmetric deformation; Among the potential asymmetric deformation directions, determine the maximum value of the number of peaks in the topography measurement data as the second metric value of the tendency of asymmetric deformation, and determine the third metric value of the tendency of asymmetric deformation based on the topography measurement data in the direction of the maximum potential asymmetric deformation corresponding to the number of peaks in the topography measurement data.
10. A computing device, characterized in that, The computing device includes a processor and a memory; the processor is configured to execute instructions stored in the memory to implement the method for evaluating wafer asymmetric deformation according to any one of claims 1 to 6.
11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores at least one instruction, and the at least one instruction is configured to be executed by a processor to implement the method for evaluating wafer asymmetric deformation according to any one of claims 1 to 6.