Digital-to-analog converter circuit and digital-to-analog converter calibration method

Abstract

The invention provides a digital-to-analog converter circuit and a digital-to-analog converter calibration method, and relates to the technical field of circuits. The circuit comprises a reference voltage source, a resistance network, a resistance calibration circuit and a sink node. The reference voltage source is used for providing reference voltage. The resistance network comprises a plurality of resistance branches, and each resistance branch is connected to the reference voltage source. And the resistance calibration circuit is used for calibrating the equivalent resistance of at least part of the resistance branches, so that the equivalent resistance of each resistance branch keeps a matching relationship. And the aggregation node is used for aggregating the output signals of the resistor branches in the resistor network to generate analog signals. According to the digital-to-analog converter circuit, the additional resistance calibration circuit is inserted into the digital-to-analog converter circuit, so that the equivalent resistance of the resistance branch in the resistance network is adjustable, the problem of resistance mismatch in the digital-to-analog converter is relieved to a certain extent, and the precision of the digital-to-analog converter is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of circuit technologies, and in particular, to a digital-to-analog converter circuit and a digital-to-analog converter calibration method. Background Art

[0002] In a resistive digital-to-analog converter, due to factors such as manufacturing tolerances, there will be a deviation between the actual value and the ideal value of the resistors in the digital-to-analog converter. This will cause resistor mismatch, resulting in a significant decrease in the accuracy of the digital-to-analog converter. Summary of the Invention

[0003] To overcome the problems in the related art, the present disclosure provides a digital-to-analog converter circuit and a digital-to-analog converter calibration method.

[0004] According to a first aspect of an embodiment of the present disclosure, a digital-to-analog converter circuit is provided, including: A reference voltage source for providing a reference voltage; A resistor network including a plurality of resistor branches, each resistor branch being respectively connected to the reference voltage source; A resistor calibration circuit for calibrating the equivalent resistance of at least some of the resistor branches so that the equivalent resistances of the respective resistor branches maintain a matching relationship; the resistor calibration circuit includes: a switch array, by adjusting the on / off states of the switch components in the switch array, to change the equivalent resistance of the resistor calibration circuit; A convergence node for converging the output signals of the respective resistor branches in the resistor network to generate an analog signal.

[0005] In some embodiments, the number of the resistor calibration circuits is the same as the number of the branches to be calibrated in the plurality of resistor branches, and each resistor calibration circuit is connected in series with the corresponding branch to be calibrated.

[0006] In some embodiments, the switch array includes: A plurality of resistor compensation units, each resistor compensation unit including at least two switch components connected in parallel, and at least one switch component in each resistor compensation unit being in a closed state.

[0007] In some embodiments, the plurality of resistor compensation units in each resistor calibration circuit are connected in series with each other.

[0008] In some embodiments, the on-resistances of the respective switch components in the same resistor compensation unit are the same.

[0009] In some embodiments, the on-resistances of the respective switch components in different resistor compensation units are different.

[0010] In some embodiments, the ratio between the on-resistances of the respective switch components in different resistor compensation units is 20 : 2 1 : 2 2 : ……: 2 n-1 , where n is the number of resistor compensation units.

[0011] In some embodiments, the equivalent resistance of the resistor calibration circuit is negatively correlated with the number of switch components in the closed state in the switch array.

[0012] In some embodiments, the reference voltage source includes: a first reference voltage source and a second reference voltage source. The first reference voltage source is used to provide a high-level reference voltage, and the second reference voltage source is used to provide a low-level reference voltage. Each resistor branch is configured to selectively connect to the first reference voltage source or the second reference voltage source.

[0013] According to a second aspect of the embodiments of the present disclosure, a method for calibrating a digital-to-analog converter is provided, which is applied to the digital-to-analog converter circuit as described in the first aspect, and includes: Acquire the true output voltage of each branch to be calibrated in the resistor network. For any branch to be calibrated, when the error between the true output voltage and the ideal output voltage of the branch to be calibrated is greater than a preset error, adjust the on-off relationship of at least some switch components in the resistor calibration circuit connected in series with the branch to be calibrated to reduce the error.

[0014] The technical solutions provided by the embodiments of the present disclosure may include the following beneficial effects: The digital-to-analog converter circuit provided by the embodiments of the present disclosure includes: a reference voltage source, a resistor network, a resistor calibration circuit, and a convergence node. Among them, the reference voltage source is used to provide a reference voltage. The resistor network includes a plurality of resistor branches, and each resistor branch is respectively connected to the reference voltage source. The resistor calibration circuit is used to calibrate the equivalent resistance of at least some resistor branches so that the equivalent resistances of the respective resistor branches maintain a matching relationship. The convergence node is used to converge the output signals of the respective resistor branches in the resistor network to generate an analog signal. The present disclosure inserts an additional resistor calibration circuit in the digital-to-analog converter circuit to make the equivalent resistance of the resistor branches in the resistor network adjustable, thereby alleviating the problem of resistor mismatch in the digital-to-analog converter to a certain extent and improving the accuracy of the digital-to-analog converter. Description of the Drawings

[0015] Figure 1 Shows a schematic structural diagram of a digital-to-analog converter circuit in an embodiment of the present disclosure.

[0016] Figure 2 Shows a schematic structural diagram of a resistor calibration circuit in an embodiment of the present disclosure.

[0017] Figure 3 Schematic diagram of a digital-to-analog converter based on a binary weighted network structure in an embodiment of the present disclosure.

[0018] Figure 4 Schematic diagram of a digital-to-analog converter based on an R-2R ladder network structure in an embodiment of the present disclosure.

[0019] Figure 5 Schematic diagram of the resistance calibration process of an MSB branch in an embodiment of the present disclosure.

[0020] Figure 6 Schematic diagram of the flow of a digital-to-analog converter calibration method in an embodiment of the present disclosure. Detailed implementation manners

[0021] Here, exemplary embodiments will be described in detail, and examples thereof are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0022] The terms used in the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. The singular forms "a", "the", and "said" used in the present disclosure and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0023] In addition, the terms "first", "second", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0024] In a resistive digital-to-analog converter (DAC), resistor mismatch is a common problem. A resistive DAC realizes the conversion from a digital signal to an analog signal through a precisely set resistor network, where the value of each resistor in the resistor network needs to be strictly matched with other resistors (i.e., maintain a certain proportional relationship) to ensure that the output analog signal can accurately reflect the input digital signal.

[0025] Resistor mismatch refers to a large deviation between the actual value and the ideal value of each resistor in the resistor array. In a resistive DAC, ideally, each resistor in the resistor array should have the same resistance value or be arranged in a specific ratio. However, due to manufacturing tolerances or other factors, the resistance values of the actual resistors may be different, which leads to resistor mismatch.

[0026] In view of this, embodiments of the present disclosure provide a digital-to-analog converter circuit, which can compensate for mismatched resistors by setting an additional resistor calibration circuit.

[0027] The following will describe this exemplary embodiment in detail with reference to the accompanying drawings and embodiments.

[0028] First, please refer to Figure 1 , Figure 1 which shows a schematic diagram of the architecture of a digital-to-analog converter circuit in an embodiment of the present disclosure.

[0029] As Figure 1 shown, the digital-to-analog converter circuit provided by the embodiments of the present disclosure includes: a reference voltage source 100, a resistor network 200, a resistor calibration circuit 300, and a convergence node 400.

[0030] Among them, the resistor network 200 includes a plurality of resistor branches 210, and each resistor branch 210 is respectively connected to the reference voltage source 100.

[0031] The resistor calibration circuit 300 is used to calibrate the equivalent resistance of at least some of the resistor branches 210 so that the equivalent resistances of the respective resistor branches 210 maintain a matching relationship.

[0032] The convergence node 400 is used to converge the output signals of the respective resistor branches 210 in the resistor network 200 to generate an analog signal.

[0033] In some embodiments, the reference voltage source 100 includes: a first reference voltage source and a second reference voltage source. Among them, the first reference voltage source is used to provide a high-level reference voltage, and the second reference voltage source is used to provide a low-level reference voltage.

[0034] Each resistor branch 210 is configured to selectively connect to the first reference voltage source or the second reference voltage source.

[0035] Specifically, each resistor branch 210 can selectively connect to the first reference voltage source or the second reference voltage source according to the bit of the binary digital signal corresponding thereto.

[0036] For example, in the case where the received digital signal is "0100", the resistor branch 210 corresponding to the first bit (from left to right) "0" in the digital signal can be connected to the second reference voltage source, the resistor branch 210 corresponding to the second bit "1" in the digital signal can be connected to the first reference voltage source, the resistor branch 210 corresponding to the third bit "0" in the digital signal can be connected to the second reference voltage source, and the resistor branch 210 corresponding to the fourth bit "0" in the digital signal can be connected to the second reference voltage source.

[0037] That is to say, when the bit corresponding to the resistor branch 210 is "1", the resistor branch 210 can be connected to the first reference voltage source. When the bit corresponding to the resistor branch 210 is "0", the resistor branch 210 can be connected to the second reference voltage source.

[0038] Based on this, each resistor branch 210 can convert each bit in the input multi-bit digital signal into a voltage or current corresponding to a binary weight ratio by selectively connecting to the first reference voltage source or the second reference voltage source, and converge at the convergence node 400 into an analog signal corresponding to the input digital signal.

[0039] In some embodiments, the first reference voltage source and the second reference voltage source can be constant voltage sources, and the voltage output by the first reference voltage source is greater than the voltage output by the second reference voltage source, so that the first reference voltage source can provide a high-level reference voltage and the second reference voltage source can provide a low-level reference voltage.

[0040] In some embodiments, the voltage output by the second reference voltage source can be 0V. In this case, the second reference voltage source can be a ground wire. That is to say, when the bit corresponding to the resistor branch 210 is "0", the resistor branch 210 can be grounded.

[0041] In some embodiments, the number of resistor branches 210 in the resistor network 200 is the same as the maximum number of bits of the digital signal that the digital-to-analog converter circuit can support. For example, when the digital-to-analog converter can be used to convert a 12-bit digital signal, the number of resistor branches 210 in the resistor network 200 is 12.

[0042] In some embodiments, the number of resistor calibration circuits 300 is the same as the number of branches to be calibrated among the multiple resistor branches 210. Each resistor calibration circuit 300 is connected in series with the corresponding branch to be calibrated, and is used to calibrate the equivalent resistance of the branch to be calibrated connected in series therewith.

[0043] Among them, the branch to be calibrated can be all the resistor branches 210 in the resistor network 200, or can be some of the resistor branches 210 in the resistor network 200. The resistor calibration circuit 300 can be connected in series to one end of the branch to be calibrated close to the reference voltage source 100, or can be connected in series to one end of the branch to be calibrated far from the reference voltage source 100. The embodiments of the present disclosure do not limit this.

[0044] Exemplarily, the resistor calibration circuit 300 can generate equivalent resistances of different magnitudes, so as to compensate to a certain extent the equivalent resistance of the branch to be calibrated in the case of mismatch of the resistance of the branch to be calibrated, so that the equivalent resistance of the branch to be calibrated can maintain a matching relationship with the equivalent resistances of other resistor branches 210.

[0045] Among them, the equivalent resistances of the respective resistor branches 210 maintaining a matching relationship can be understood as that the equivalent resistances of the respective resistor branches 210 maintain a certain proportional relationship within an allowable error range.

[0046] Specifically, in a digital-to-analog converter circuit, depending on its architecture design, the equivalent resistances of the respective resistor branches 210 may be equal in an ideal state, or may be in a ratio of 1:2:4:8: ……:2 n-1 (where n is the maximum number of bits supported by the digital-to-analog converter). Affected by factors such as resistor manufacturing process, temperature, and aging degree, it is difficult for the equivalent resistances of the respective resistor branches 210 to reach the ideal state. Therefore, within the premise of meeting the output accuracy of the digital-to-analog converter, the equivalent resistances of the respective resistor branches 210 can have a certain allowable error.

[0047] In some embodiments, the convergence node 400 is connected to the ends of the respective resistor branches away from the reference voltage source 100, and is used to converge the voltages or currents output by the respective resistor branches 210 to generate an analog signal.

[0048] Thus, the embodiments of the present disclosure provide a resistor calibration circuit 300 in the digital-to-analog converter circuit.

[0049] Next, please refer to Figure 2 , Figure 2 which shows a schematic structural diagram of a resistor calibration circuit 300 in the embodiments of the present disclosure.

[0050] As Figure 2 shown, the resistor calibration circuit 300 may include: a switch array 310. Among them, by adjusting the on / off states of the switch components 312 in the switch array 310, the equivalent resistance of the resistor calibration circuit 300 can be changed.

[0051] Exemplarily, the switch array 310 may be provided with a plurality of resistors based on series and / or parallel relationships (not shown in the figure). By adjusting the on / off relationships of the switch components 312, the connection relationships between these resistors can be adjusted, so that the resistor calibration circuit 300 generates equivalent resistances of different magnitudes.

[0052] It can be understood that since the switch component 312 can generate a certain resistance value when conducting, and the on-resistance of the switch component 312 is controllable. Therefore, the switch components 312 connected in series and / or in parallel can be directly set to obtain a resistor calibration circuit 300 with an adjustable equivalent resistance.

[0053] Please continue to refer to Figure 2, in some embodiments, the switch array 310 may include: a plurality of resistor compensation units 311. Each resistor compensation unit 311 includes at least two switch components 312 connected in parallel with each other, and at least one switch component 312 in each resistor compensation unit 311 is in a closed state.

[0054] As described above, since the switch component 312 itself has a conduction resistance, the resistance calibration circuit 300 can be formed by the pure switch components 312 in the manner of this embodiment. Thereby, the use of resistor elements in the resistance calibration circuit 300 can be avoided to reduce the cost and area of the circuit.

[0055] In some embodiments, the equivalent resistance of the resistance calibration circuit 300 is negatively correlated with the number of switch components 312 in the switch array that are in a closed state. Specifically, the switch components 312 inside each resistor compensation unit 311 are connected in parallel with each other, so the equivalent resistance of each resistor compensation unit 311 can be adjusted by adjusting the on-off relationship of the switch components 312. That is, the equivalent resistance of each resistor compensation unit 311 is negatively correlated with the number of switch components 312 in a conducting state. And the sum of the equivalent resistances provided by each resistor compensation unit 311 is the total resistance of the resistance calibration circuit 300.

[0056] In some embodiments, the conduction resistances of the respective switch components 312 in the same resistor compensation unit 311 are the same. With such a setting, the equivalent resistance of the resistor compensation unit 311 can be in an inverse proportion relationship with the conduction resistance of a single switch component 312 in the resistor compensation unit 311. That is, the equivalent resistance of the resistor compensation unit 311 = the conduction resistance of a single switch component 312 ÷ the number of conducting switch components 312. Thereby, it is convenient to determine the equivalent resistance of the resistor compensation unit 311.

[0057] For example, for a certain resistor compensation unit 311, the conduction resistances of its switch components 312 can be made to be all 10 Ω, and the respective switch components 312 are in a parallel relationship. Then, when one switch component 312 is conducting, the equivalent resistance of the resistor compensation unit 311 is 10 Ω; when two switch components 312 are conducting, the equivalent resistance of the resistor compensation unit 311 is 5 Ω; when three switch components 312 are conducting, the equivalent resistance of the resistor compensation unit 311 is 3.3333 Ω; and when four switch components 312 are conducting, the equivalent resistance of the resistor compensation unit 311 is 2.5 Ω.

[0058] By connecting the respective resistance compensation units 311 in series with each other and connecting the respective switch components 312 in the same resistance compensation unit 311 in parallel, the resistance calibration circuit 300 can have an equivalent resistance with more gears using a smaller number of switch components 312. This reduces the consumption of the switch components 312 and lowers the manufacturing cost and the area of the circuit. For example, assume there are four resistance compensation units 311, and each resistance compensation unit has two switch components 312 with the same on-resistance. At this time, by adjusting the on-off relationship of the switch components 312, sixteen gears of equivalent resistance can be generated by eight switch components. If the eight switch components are connected in series in groups of four, only two gears of equivalent resistance can be provided.

[0059] In some embodiments, the on-resistances of the respective switch components 312 in different resistance compensation units 311 are different. It can be understood that since the respective resistance compensation units 311 are in a series relationship, the equivalent resistance value of the resistance calibration circuit 300 is the sum of the equivalent resistance values of the respective resistance compensation units 311. By differentially setting the on-resistances of the switch components 312 in different resistance compensation units 311, a larger adjustable range of equivalent resistance can be generated in the resistance calibration circuit 300 using a smaller number of resistance compensation units 311.

[0060] In some embodiments, the ratio between the on-resistances of the respective switch components 312 in different resistance compensation units 311 is 2 0 :2 1 :2 2 :……:2 n-1 , where n is the number of resistance compensation units 311. For example, when the on-resistance of the switch component 312 in the first resistance compensation unit 311 is R, the on-resistance of the switch component 312 in the second resistance compensation unit 311 is 2R, the on-resistance of the switch component 312 in the third resistance compensation unit 311 is 4R, and the on-resistance of the switch component 312 in the fourth resistance compensation unit 311 is 8R, that is, the ratio between them is 2 0 :2 1 :2 2 :2 3 .

[0061] By setting the on-resistance ratio in a binary relationship, the range of equivalent resistance that the resistance calibration circuit 300 can generate can be expanded as much as possible.

[0062] It should be noted that the on-resistance of the switch component 312 in the resistance compensation unit 311 mentioned here refers to the on-resistance of one switch component 312 in the resistance compensation unit 311, rather than the on-resistances of all the parallel switch components 312 in the resistance compensation unit 311. By designing the on-resistance of the switch component 312 in each resistance compensation unit 311 in this way, the number of switch components 312 in the same resistance compensation unit 311 can be streamlined, and the error range that the resistance calibration circuit 300 can calibrate can be made larger.

[0063] In some embodiments, the number of resistance compensation units 311 can be four. Among them, the first resistance compensation unit includes two switch components with an on-resistance of 2.4 Ω each; the second resistance compensation unit includes two switch components with an on-resistance of 4.8 Ω each; the third resistance compensation unit includes two switch components with an on-resistance of 9.6 Ω each; and the fourth resistance compensation unit includes two switch components with an on-resistance of 19.2 Ω each.

[0064] With such a setting, the resistance calibration circuit 300 can be used to calibrate common resistor mismatches in a digital-to-analog converter, and can minimize the area and cost of the resistance calibration circuit 300 as much as possible.

[0065] It can be understood that the switch component 312 in the present disclosure can be implemented by utilizing the on-off characteristics of transistors such as MOS transistors and bipolar transistors. Further, taking MOS as an example, by changing parameters such as the channel length and oxide layer thickness of the MOS transistor, the on-resistance of the MOS transistor can be controlled, thereby obtaining the resistance calibration circuit 300 described in each of the above embodiments.

[0066] In addition, it should be understood that the embodiments of the present disclosure aim to alleviate the resistor matching problem to a certain extent by adjusting the equivalent resistance of the resistance calibration circuit in the mismatch state, so that the output accuracy of the digital-to-analog converter reaches an available range, rather than making the mismatched resistor branches reach a completely matched state.

[0067] Figure 3 shows a schematic diagram of a digital-to-analog converter based on a binary weighted network structure in an embodiment of the present disclosure. This digital-to-analog converter is implemented based on Figure 1 the digital-to-analog converter architecture shown and Figure 2 the resistance calibration circuit 300 shown. Repeated parts will not be elaborated.

[0068] As Figure 3 shown, in a digital-to-analog converter based on a binary weighted network structure, the equivalent resistance value of each resistor branch 210 is negatively correlated with the binary weight of the digital signal bit corresponding to each resistor branch 210.

[0069] For example, inFigure 3 Among the four resistor branches 210 shown, the ideal proportional relationship of the resistors in each resistor branch 210 from left to right is 1:2:4:8, that is, 2 0 :2 1 :2 2 :2 3 . Among them, the proportional coefficient 1 corresponds to the most significant bit (MSB) of the digital signal, and the equivalent resistors in each resistor branch 210 need to satisfy this proportional relationship as much as possible.

[0070] Please continue to refer to Figure 3 , the resistor branch 210 corresponding to the MSB includes a fixed resistor 501, and a resistor calibration circuit 300 is connected in series below the fixed resistor 501. Thus, when the fixed resistor 501 in the resistor branch 210 is mismatched, the equivalent resistor generated by the resistor calibration circuit 300 can compensate for the resistance value of the fixed resistor 501 in the resistor branch 210.

[0071] It can be understood that since the resistor calibration circuit 300 connected in series with the fixed resistor 501 has a certain resistance in any state, for the fixed resistor 501 connected in series with the resistor calibration circuit 300, when designing the resistance value of the fixed resistor 501, the resistance in the default state of the resistor calibration circuit 300 should be subtracted. For example, when the ideal resistance in a certain resistor branch 210 is R, if the resistance of the resistor calibration circuit 300 in the default state is R', the fixed resistor 501 in the resistor branch 210 should be R - R'. Such a setting can compensate for the resistance mismatch in the resistor branch 210 by adjusting the resistance provided by the resistor calibration circuit 300 within a certain range.

[0072] Although Figure 3 is not shown, according to actual requirements, a resistor calibration circuit 300 can be connected in series above or below the fixed resistor 501 in any resistor branch 210 in Figure 3 .

[0073] Figure 4 shows a schematic diagram of a digital-to-analog converter based on an R-2R ladder network structure in an embodiment of the present disclosure. This digital-to-analog converter is implemented based on the digital-to-analog converter architecture shown in Figure 1 and the resistor calibration circuit 300 shown in Figure 2 , and the repeated parts will not be described again.

[0074] As Figure 4As shown, in the digital-to-analog converter based on the R-2R ladder network structure, each resistor branch 210 includes a first resistor 601 and a second resistor 602. Among them, the first resistor 601 is used to connect the reference voltage source 100 to the output node, and the second resistor 602 is used to connect the output nodes of two adjacent resistor branches 210. At this time, the matching relationship between the resistor branches 210 is as follows: the resistance value of the first resistor 601 in the same resistor branch 210 is twice that of the second resistor 602, the resistance values of the first resistors 601 in different resistor branches 210 are the same, and the resistance values of the second resistors 602 are the same.

[0075] Please continue to refer to Figure 4 , a resistor calibration circuit 300 is connected in series below the first resistor 601 in the first resistor branch 210 from right to left. Thus, when the first resistor 601 in this resistor branch 210 is mismatched, the equivalent resistance generated by the resistor calibration circuit 300 can be used to compensate for the resistance value of the first resistor 601 in this resistor branch 210.

[0076] It can be understood that since the resistor calibration circuit 300 connected in series with the first resistor 601 has a certain resistance in any state, for the first resistor 601 connected in series with the resistor calibration circuit 300, when designing the resistance value of the first resistor 601, the resistance in the default state of the resistor calibration circuit 300 should be subtracted, and the embodiments of the present disclosure will not elaborate on this.

[0077] Although Figure 4 is not shown, according to actual requirements, the resistor calibration circuit 300 can be connected in series above or below the first resistor 601 in any resistor branch 210 in Figure 4 .

[0078] Next, please refer to Figure 5 , Figure 5 Taking the resistor branch corresponding to the MSB in the digital-to-analog converter shown in Figure 4 as an example, the calibration effect of the resistor calibration circuit 300 on the equivalent resistance of the resistor branch in the present disclosure will be described exemplarily.

[0079] As Figure 5 shown, the resistor calibration circuit 300 is connected in series below the resistor branch corresponding to the MSB. The resistor calibration circuit 300 includes four mutually connected in series resistor compensation units, and each resistor compensation unit is respectively composed of two switch components with the same on-resistance. The on-resistances of the switch components in the four resistor compensation units are 2.4 Ω, 4.8 Ω, 9.6 Ω, and 19.2 Ω respectively.

[0080] That is to say, the first resistor compensation unit is obtained by paralleling two switch components with a conduction resistance of 2.4 Ω each, the second resistor compensation unit is obtained by paralleling two switch components with a conduction resistance of 4.8 Ω each, and so on. The present disclosure will not elaborate on this.

[0081] In each of the above resistor compensation units, one switch component in each resistor compensation unit is default to be in the conducting state so that the resistor branch can be conducted to the reference voltage source. Exemplarily, two switch components with a conduction resistance of 19.2 Ω can be default to be in the conducting state, so that the resistor calibration circuit 300 can generate a larger equivalent resistance through adjustment or a smaller equivalent resistance through adjustment, thereby realizing flexible compensation for the resistor branch.

[0082] Ideally, in Figure 5 the circuit branch shown, the sum of the resistances of the two first resistors (R 1a1 , R 1a2 ) should be twice the resistance of the second resistor (R 2a ). After introducing the resistor calibration circuit 300, since the resistor calibration circuit 300 can default to generate an equivalent resistance of 26.4 Ω to compensate for R 1a1 and R 1a2 . Therefore, when R 2a in the resistor branch is 10 kΩ, the design value of R 1a1 can be set to 10 kΩ, and the design value of R 1a2 can be set to 9.9736 kΩ.

[0083] Assume that due to process deviation, the actual R 1a2 is 0.1% less than the design value, that is, 9.9636 kΩ. Then, in this state, any switch component with a conduction resistance of 19.2 Ω in the resistor calibration circuit 300 can be set to the off state, so that the equivalent resistance generated by the resistor calibration circuit 300 reaches 36 Ω, so that the sum of the resistance values of the resistor calibration circuit 300 and R 1a1 and R 1a2 is 19.9996 kΩ, and the error compared with the ideal value of 10 kΩ is only 0.004%, so as to meet the accuracy requirements of the digital-to-analog converter.

[0084] Similarly, if the produced resistor unit has a resistance value 0.1% higher than the preset value, all switch components in the resistor calibration circuit 300 can be set to the conducting state to reduce the equivalent resistance value of the resistor calibration circuit 300, so that the sum of the resistance values of the resistor calibration circuit 300 and R 1a1 and R 1a2 is 10.0012 kΩ, which also meets the accuracy requirements of the digital-to-analog converter.

[0085] Based on the same inventive concept, an embodiment of the present disclosure also provides a method for calibrating a digital-to-analog converter, which is applied to a digital-to-analog conversion circuit having the architecture as shown in Figure 1 the digital-to-analog conversion circuit shown.

[0086] Specifically, Figure 6 FIG. shows a schematic flow chart of a method for calibrating a digital-to-analog converter in an embodiment of the present disclosure. As shown in Figure 6 the figure, the method provided in the embodiment of the present disclosure includes the following steps.

[0087] S601, collect the actual output voltages of each branch to be calibrated in the resistor network.

[0088] S602, for any branch to be calibrated, when the error between the actual output voltage and the ideal output voltage of the branch to be calibrated is greater than a preset error, adjust the on-off relationship of at least some switch components in the resistor calibration circuit connected in series with the branch to be calibrated to reduce the error.

[0089] In some embodiments, the switch components in the resistor calibration circuit may have a preset on-off relationship. For example, the resistor calibration circuit can be made to correspond to the median of the equivalent resistances that can be generated by adjusting the on-off relationship of the switch components under the preset switch on-off relationship, so that the resistor calibration circuit can compensate for the resistor mismatch caused by both large resistors and small resistors.

[0090] The embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings. However, the present disclosure is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present disclosure, various simple modifications can be made to the technical solutions of the present disclosure, and these simple modifications all fall within the protection scope of the present disclosure.

[0091] In addition, any combination can be made among various different embodiments of the present disclosure, as long as it does not violate the idea of the present disclosure, and it should also be regarded as the content disclosed by the present disclosure.

Claims

1. A digital-to-analog converter circuit, characterized in that, Comprising: A reference voltage source for providing a reference voltage; A resistor network including a plurality of resistor branches, each resistor branch being respectively connected to the reference voltage source; A resistor calibration circuit for calibrating the equivalent resistance of at least some of the resistor branches so as to maintain a matching relationship among the equivalent resistances of the respective resistor branches; The resistor calibration circuit includes: a switch array, by adjusting the on / off states of the switch components in the switch array, to change the equivalent resistance of the resistor calibration circuit; A convergence node for converging the output signals of the respective resistor branches in the resistor network to generate an analog signal.

2. The digital-to-analog converter circuit according to claim 1, wherein The number of the resistor calibration circuits is the same as the number of the branches to be calibrated among the plurality of resistor branches, and each resistor calibration circuit is connected in series with the corresponding branch to be calibrated.

3. The digital-to-analog converter circuit according to claim 1, wherein The switch array includes: A plurality of resistor compensation units, each resistor compensation unit including at least two switch components connected in parallel with each other, and at least one switch component in each resistor compensation unit being in a closed state.

4. The digital-to-analog converter circuit according to claim 3, wherein The plurality of resistor compensation units in each resistor calibration circuit are connected in series with each other.

5. The digital-to-analog converter circuit according to claim 3, wherein The on-resistances of the respective switch components in the same resistor compensation unit are the same.

6. The digital-to-analog converter circuit according to claim 3, wherein The on-resistances of the respective switch components in different resistor compensation units are different.

7. The digital-to-analog converter circuit according to claim 6, wherein The ratio of the on-resistances of the respective switch components in different resistance compensation units is 2 0 :2 1 :2 2 :……:2 n-1 , where n is the number of resistance compensation units.

8. The digital-to-analog converter circuit according to any one of claims 1 to 7, characterized in that, The equivalent resistance of the resistor calibration circuit is negatively correlated with the number of the switch components in the switch array that are in a closed state.

9. The digital-to-analog converter circuit according to claim 1, wherein The reference voltage source includes: a first reference voltage source and a second reference voltage source, the first reference voltage source being used to provide a high-level reference voltage, and the second reference voltage source being used to provide a low-level reference voltage; Each resistor branch is configured to selectively connect to the first reference voltage source or the second reference voltage source.

10. A method for calibrating a digital-to-analog converter, characterized in that, Applied to the digital-to-analog converter circuit according to any one of claims 1 to 9, comprising: Collecting the actual output voltages of the respective branches to be calibrated in the resistor network; For any branch to be calibrated, when the error between the actual output voltage and the ideal output voltage of the branch to be calibrated is greater than a preset error, adjusting the on / off relationship of at least some of the switch components in the resistor calibration circuit connected in series with the branch to be calibrated to reduce the error.

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