Correction method and device for phase inconsistency of inner and outer rings of APSK (Advanced Phase Shift Keying)

Abstract

The invention provides a correction method and device for phase inconsistency of an APSK inner ring and an APSK outer ring, and relates to the technical field of wireless communication, and the method comprises the steps: receiving a digital signal modulated by the APSK, and carrying out the processing of the digital signal through a moving average line equalization algorithm; calculating an inner ring phase offset corresponding to the inner ring phase based on a preset rule, and synchronously correcting the inner ring phase and the outer ring phase; the offset corresponding to the outer ring phase is calculated again, and the outer ring phase of the digital signal is corrected for the second time; respectively controlling the inner ring phase and the outer ring phase to rotate so as to change the phase state of the digital signal, and scanning in each new phase state to obtain corresponding frame header data; and when the frame header data is detected to accord with the preset frame header template standard, determining that the inner and outer ring phase correction of the digital signal is completed. By implementing the method, the influence of the power amplifier compression process on the 16 APSK inner and outer ring phase dislocation can be resisted, the demodulation precision of the 16 APSK modulated digital signal is improved, and the overall performance and reliability of wireless communication are further improved.

Description

Technical Field

[0001] This application relates to the field of wireless communication technologies, and particularly to a method, apparatus, storage medium, and program product for correcting the phase inconsistency between the inner and outer circles of APSK. Background Art

[0002] Most channels are not suitable for transmitting baseband signals because baseband signals are generally low-frequency signals that will experience significant attenuation and distortion during transmission. Signal modulation can convert baseband signals into a form suitable for propagation in the transmission medium and reduce interference and distortion that may occur during transmission.

[0003] In related technologies, the modulation of digital signals mainly includes modulation methods such as ASK (Amplitude Shift Keying), FSK (Frequency Shift Keying), PSK (Phase Shift Keying), and APSK (Amplitude Phase Shift Keying). Among them, APSK modulation usually includes two signal point sets, an inner circle and an outer circle, to improve power efficiency and error resistance. If the signal points in the inner and outer circles experience different phase offsets during transmission, a relatively high bit error rate may occur during demodulation at the receiving end.

[0004] However, when the digital signal modulated by APSK is processed by a power amplifier, due to its non-linear characteristics, the amplitude and phase of the signal will be distorted, and this distortion may cause the signal points in the inner and outer circles to have phase offsets. In addition, in a multipath propagation environment, different paths of the signal may also cause phase offsets, thereby affecting the demodulation performance of the signal. Summary of the Invention

[0005] This application provides a method and apparatus for correcting the phase inconsistency between the inner and outer circles of APSK to address the problem of phase offsets between the inner and outer circles caused by the phase inconsistency when the digital signal modulated by APSK is amplified by a power amplifier or passes through a multipath complex channel.

[0006] In a first aspect, this application provides a method for correcting the phase inconsistency between the inner and outer circles of APSK, which is applied to an APSK inner and outer circle phase correction apparatus. The method includes: Receiving a digital signal modulated by APSK and processing it using a moving average equalization algorithm. The digital signal includes an inner circle phase and an outer circle phase. The inner circle phase has 4 inner circle signal points, and the outer circle phase has 12 outer circle signal points; Calculate the inner - circle phase offset corresponding to the inner - circle phase based on a preset rule, and synchronously correct the inner - circle phase and the outer - circle phase of the digital signal according to the inner - circle phase offset; Calculate the outer - circle phase offset corresponding to the outer - circle phase, and correct the outer - circle phase of the digital signal again according to the outer - circle phase offset. The calculation rule of the outer - circle phase offset is the same as that of the inner - circle phase offset; Control the inner - circle phase and the outer - circle phase to rotate respectively to change the phase state of the digital signal, and scan and obtain the corresponding frame - header data in each new phase state. The rotation period of the inner - circle phase is 90 degrees, and the rotation period of the outer - circle phase is 30 degrees; If it is detected that the frame - header data conforms to the preset frame - header template standard, it is determined that the inner - and outer - circle phase correction of the digital signal is completed.

[0007] Through the above - mentioned embodiments, the APSK inner - and outer - circle phase correction device first processes the received digital signal modulated by APSK using the moving - average equalization algorithm, initially differentiates and corrects the phase deviation between the inner and outer circles. Then, based on a preset rule, it calculates and corrects the inner - and outer - circle phase offsets. Finally, by controlling the rotation of the inner and outer circles and scanning the frame - header data, it filters out the frame - header data that can correctly match the preset frame - header template. This method can counteract the influence of the power - amplifier compression process on the phase misalignment between the inner and outer circles of 16 - APSK, improve the demodulation accuracy of the digital signal modulated by 16 - APSK, and thus improve the overall performance and reliability of wireless communication.

[0008] In some embodiments, the step of calculating the inner - circle phase offset corresponding to the inner - circle phase based on a preset rule specifically includes: Determine the boundary information of the inner - circle phase and the outer - circle phase; Extract inner - circle signal points successively and continuously twice in the inner - circle phase according to the boundary information to obtain a first group of inner - circle signal points and a second group of inner - circle signal points respectively; Perform the fourth - power operation on the first group of inner - circle signal points and the second group of inner - circle signal points respectively and perform cumulative summation to obtain a first cumulative phase and a second cumulative phase; If it is detected that the difference between the first cumulative phase and the second cumulative phase does not exceed the preset change threshold, divide the second cumulative phase by the radian representation of the power value to obtain the inner - circle phase offset.

[0009] Through the above - mentioned embodiments, the APSK inner - and outer - circle phase correction device determines the boundary information of the inner and outer circles, continuously extracts inner - circle signal points twice for processing to obtain two phase offsets, and judges whether there is a phase - jump situation by comparing the change difference between adjacent phase offsets, thereby more accurately measuring and correcting the phase offset, and optimizing the overall quality and communication efficiency of the digital signal.

[0010] In some embodiments, after the step of respectively performing a fourth-power operation on the first group of inner-ring signal points and the second group of inner-ring signal points and performing an accumulative summation to obtain a first accumulative phase and a second accumulative phase, the method further includes: If it is detected that the difference between the first accumulative phase and the second accumulative phase exceeds a preset change threshold, then unwrap the second accumulative phase, and after subtracting 180 degrees, obtain a target accumulative phase; Divide the target accumulative phase by the radian representation of the power value to obtain the inner-ring phase offset.

[0011] Through the above embodiments, the APSK inner and outer ring phase correction device determines whether a phase jump occurs in the inner-ring phase by comparing the deviation between two consecutive accumulative phases with a preset change threshold. If a phase jump occurs, unwrapping processing is performed and the phase value is adjusted, which can effectively cope with sudden large-scale phase changes, ensure the stability of signal demodulation, and reduce the possibility of signal misinterpretation caused by large offsets.

[0012] In some embodiments, after the step of respectively controlling the inner-ring phase and the outer-ring phase to rotate to change the phase state of the digital signal and scanning to obtain corresponding frame header data at each new phase state, the method further includes: If it is detected that the frame header data does not conform to the preset frame header template standard, continue to scan to obtain new frame header data by changing the phase state of the digital signal.

[0013] Through the above embodiments, the APSK inner and outer ring phase correction device continues to adjust the phase state to obtain new frame header data when it is detected that the frame header data does not conform to the preset standard. This dynamic adjustment and detection process enhances the adaptability to signal changes and ensures effective signal correction and synchronization under variable transmission conditions.

[0014] In some embodiments, before the step of determining that the inner and outer ring phase correction of the digital signal is completed if it is detected that the frame header data conforms to the preset frame header template standard, the method further includes: Calculate the frame header bit error rate corresponding to each frame header in the frame header data, where the frame header data includes multiple frame headers; Determine whether there are continuously more than a preset number of frame header bit error rates equal to zero or the difference from the zero value is less than a preset threshold; if so, determine that the frame header data conforms to the preset frame header template standard; If not, determine that the frame header data does not conform to the preset frame header template standard.

[0015] Through the above embodiments, the APSK inner and outer ring phase correction device continuously monitors the bit error rates of multiple frame headers and compares them with preset thresholds to ensure the accuracy of the final target frame header recognition, thereby improving the reliability of communication and the overall quality of the signal.

[0016] In some embodiments, after the step of determining that the inner and outer circle phase correction of the digital signal is completed if it is detected that the frame header data conforms to the preset frame header template standard, the method further includes: If it is detected that the inner and outer circle phase correction of the digital signal is completed, frame synchronization is performed at the receiver end of the digital signal based on the currently captured frame header data; After the frame synchronization is completed, the digital signal is demodulated to obtain the original baseband signal.

[0017] Through the above embodiments, the APSK inner and outer circle phase correction device performs frame synchronization and demodulation after phase correction, ensuring that the signal after the correction process can be correctly synchronized and quickly converted into the original baseband signal.

[0018] In some embodiments, before the step of receiving the APSK-modulated digital signal and processing it using the moving average equalization algorithm, the method further includes: Adjusting the APSK-modulated digital signal using a preset complex exponential phase factor; Calculating the maximum residual frequency offset error of the adjusted digital signal within a preset sampling interval; If it is detected that the maximum residual frequency offset error exceeds a preset deviation threshold, a deviation warning is issued.

[0019] Through the above embodiments, the APSK inner and outer circle phase correction device adjusts the digital signal using a complex exponential phase factor, which can optimize the initial state of the signal, reduce the complexity and errors that may occur in subsequent processing, improve the efficiency of the overall processing flow and the quality of the signal, and can effectively perform preliminary correction especially when the frequency offset is large.

[0020] In a second aspect, the present application provides an APSK inner and outer circle phase correction device, which includes: one or more processors and a memory; The memory is coupled to the one or more processors, and the memory is used to store computer program code, and the computer program code includes computer instructions. The one or more processors call the computer instructions so that the APSK inner and outer circle phase correction device can implement a correction method for APSK inner and outer circle phase inconsistency provided in the above embodiments, which will not be elaborated here.

[0021] In a third aspect, the present application provides a computer-readable storage medium, including instructions, when the instructions run on the APSK inner and outer circle phase correction device, the APSK inner and outer circle phase correction device can implement a correction method for APSK inner and outer circle phase inconsistency provided in the above embodiments, which will not be elaborated here.

[0022] Fourthly, the present application provides a computer program product. When the computer program product runs on the APSK inner and outer ring phase correction device, the APSK inner and outer ring phase correction device can implement a correction method for the inconsistent phase of the APSK inner and outer rings provided in the above embodiments, which will not be elaborated here.

[0023] One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages: 1. By calculating the phase offset based on a preset rule and synchronously correcting the inner and outer ring phases, then separately calculating the offset of the outer ring phase to perform a secondary correction on the outer ring behavior, and then combining the controlled rotation of the inner and outer ring phases and the frame header data scanning, the frame header data matching the preset frame header template is screened out. This not only enhances the resistance to phase misalignment caused by power amplifier compression, but also significantly improves the demodulation accuracy of the 16APSK modulation signal, thereby improving the overall communication performance and reliability in a complex wireless transmission environment.

[0024] 2. By continuously extracting the inner ring signal points twice and processing the obtained phase offset data, and combining the change difference between the two phase offsets, it is judged whether a phase jump occurs. When a large-range phase change is detected, through the unwrapping process and phase adjustment, this method can timely and accurately respond to sudden large-phase offsets, ensure the stability of signal demodulation, significantly reduce the risk of misinterpretation, and optimize the quality and communication efficiency of digital signals.

[0025] 3. Using the complex exponential phase factor to perform an initial adjustment on the digital signal, optimizing the initial state of the signal, reducing the complexity and potential errors of subsequent processing, and effectively performing an initial correction especially in the case of a large frequency offset. In addition, by continuously monitoring the bit error rate of multiple frame headers and comparing it with a preset threshold, the accuracy of the final frame header recognition is ensured. Description of the Drawings

[0026] Figure 1 is a flowchart of a correction method for the inconsistent phase of the APSK inner and outer rings in the embodiments of the present application; Figure 2 is another flowchart of a correction method for the inconsistent phase of the APSK inner and outer rings in the embodiments of the present application; Figure 3 (a) is an exemplary constellation diagram of a digital signal modulated by APSK received at the signal receiving end in the embodiments of the present application; Figure 3 (b) is an exemplary constellation diagram of the digital signal modulated by APSK processed by the APSK inner and outer ring phase correction device at the signal receiving end using the moving average equalization algorithm in the embodiments of the present application; Figure 4(a) is an exemplary diagram of the phase change during the real-time correction of the inner and outer circle phases in an embodiment of the present application; Figure 4 (b) is a signal constellation diagram after the inner and outer circle phases are respectively corrected in an embodiment of the present application; Figure 5 is a schematic structural diagram of an entity device of the APSK inner and outer circle phase correction device in an embodiment of the present application. Detailed implementation manners

[0027] The terms used in the following embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. As used in the specification and appended claims of the present application, the singular forms "a", "an", "the", "above-mentioned", "said", and "this" are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term " / and / " used in the present application refers to any or all possible combinations including one or more of the listed items.

[0028] Hereinafter, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as implying or suggesting relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present application, unless otherwise stated, the meaning of "a plurality" is two or more.

[0029] For ease of understanding, the method provided in this embodiment is described in a process below. Specifically, as Figure 1 shown, it is a flow diagram of a method for correcting the inconsistency between the inner and outer circle phases of APSK in an embodiment of the present application.

[0030] S101. Receive the digitally modulated signal after APSK modulation and process it using the moving average equalization algorithm.

[0031] Among them, APSK modulation is a composite modulation method that transmits digital information by simultaneously changing the amplitude and phase of the carrier signal. It usually includes two signal point sets, an inner circle and an outer circle, to improve power efficiency and error resistance. After the signal receiving end receives the APSK modulated signal sent by the signal transmitting end, the APSK inner and outer circle phase correction device at the signal receiving end processes it using the moving average equalization algorithm (MMA). Moving average equalization is an adaptive equalization technology that compensates for channel distortion by dynamically adjusting the equalizer coefficients to optimize the received signal quality.

[0032] Specifically, as Figure 3As shown in (a), it is an exemplary constellation diagram of the digital signal modulated by APSK received by the signal receiving end in the embodiment of the present application. The APSK inner and outer circle phase correction device receives the APSK-modulated digital signal transmitted through the wireless channel. This signal is usually affected by factors such as multipath interference and noise interference, resulting in phase and amplitude offsets of the constellation points in the inner and outer circles. To mitigate this distortion, the APSK inner and outer circle phase correction device adopts a moving average algorithm. By continuously tracking the statistical characteristics of the received signal, it adaptively adjusts the tap coefficients of the equalizer to minimize the mean square error of the output signal. Specifically, as shown in Figure 3 As shown in (b), it is an exemplary constellation diagram of the digital signal modulated by APSK after being processed by the moving average equalization algorithm by the APSK inner and outer circle phase correction device at the signal receiving end in the embodiment of the present application. Through MMA equalization processing, linear distortion can be effectively compensated, the original constellation pattern of the signal can be restored, and a good foundation is provided for subsequent phase correction.

[0033] In a specific embodiment, the APSK inner and outer circle phase correction device receives a digital signal modulated by 16APSK. The inner circle (inner circle phase) of this signal contains 4 constellation points (inner circle signal points), and the outer circle (outer circle phase) contains 12 constellation points (outer circle signal points). Due to the influence of the non-ideal characteristics of the channel, the positions of the constellation points in the inner and outer circles are offset, resulting in an increase in the demodulation error rate. At this time, the APSK inner and outer circle phase correction device uses the moving average algorithm to perform adaptive equalization processing on the received signal. By continuously adjusting the equalizer coefficients, the statistical characteristics of the output signal are made to approach the transmitted signal, and the distortion of the constellation diagram is gradually corrected.

[0034] S102. Calculate the inner circle phase offset corresponding to the inner circle phase based on a preset rule, and synchronously correct the inner circle phase and the outer circle phase of the digital signal according to the inner circle phase offset.

[0035] Since the MMA equalization processing mainly deals with the problem of phase offset caused by different paths of the signal in a multipath propagation environment and cannot solve the problem of inconsistent inner and outer circle phases caused by the amplification of the APSK-modulated digital signal through a power amplifier, it is necessary to further correct the offset of the inner and outer circle phases on the basis of step S101.

[0036] Specifically, the APSK inner and outer circle phase correction device extracts the constellation points of the inner circle phase of the digital signal after MMA equalization, and calculates its average phase offset according to a preset rule. The specific preset rule is as follows: determine the boundary information of the inner circle phase in the constellation diagram, and then successively extract the inner circle signal points twice continuously in the constellation diagram of the inner circle phase to obtain the first group of inner circle signal points and the second group of inner circle signal points respectively; then perform the fourth power operation on the first group of inner circle signal points and the second group of inner circle signal points respectively and perform cumulative summation to obtain the first cumulative phase and the second cumulative phase; if the difference between the first cumulative phase and the second cumulative phase does not exceed the preset change threshold, then divide the second cumulative phase by the radian representation of the power value to obtain the inner circle phase offset; if the difference between the first cumulative phase and the second cumulative phase exceeds the preset change threshold, then unwrap the second cumulative phase, and then subtract 180 degrees to obtain the target cumulative phase; then divide the target cumulative phase by the radian representation of the power value to obtain the inner circle phase offset.

[0037] After obtaining the inner circle phase offset, the APSK inner and outer circle phase correction device uses it as a correction factor to perform a summation operation with the phase values of each constellation point of the inner circle and the outer circle respectively to cancel the phase deviation. Specifically as Figure 4 shown in (b) therein, the constellation diagram composed of blue sampling points is the constellation diagram after the first correction of the inner and outer circle phases. This process realizes the synchronous correction of the inner and outer circle phases, so that their relative phase relationship remains consistent.

[0038] S103. Calculate the outer circle phase offset corresponding to the outer circle phase, and correct the outer circle phase of the digital signal again according to the outer circle phase offset.

[0039] The APSK inner and outer circle phase correction device further measures the remaining offset of the outer circle phase of the digital signal and performs secondary correction on the outer circle phase. Since the number of outer circle constellation points is large and it is more affected by the channel, there may be residual phase deviation. By separately calculating the outer circle phase offset and performing correction, the accuracy of phase synchronization can be further improved and the demodulation error rate can be reduced.

[0040] Specifically, after completing the synchronous correction of the inner and outer circle phases, the APSK inner and outer circle phase correction device extracts the outer circle constellation points of the corrected signal, and adopts the same preset rule as the calculation of the inner circle phase offset to obtain the average outer circle phase offset. Since the inner circle phase has been synchronously corrected, the outer circle phase offset reflects the remaining phase deviation of the outer circle relative to the inner circle. The APSK inner and outer circle phase correction device uses this offset as a correction factor again to adjust the phase value of each outer circle constellation point to realize the secondary correction of the outer circle phase. Specifically as Figure 4As shown in (b), the constellation diagram composed of red sampling points is the constellation diagram after the second correction of the outer ring phase. This process reduces the residual deviation of the outer ring phase and makes the inner and outer ring phases more precisely aligned.

[0041] Furthermore, specifically as Figure 4 shown in (a), it is an exemplary schematic diagram of the phase change during the real-time correction of the inner and outer ring phases in the embodiment of the present application. Among them, the abscissa represents the number of sampling points, and the ordinate represents the value of the phase. By comparing these two curves, it can be observed how the phases of these two signals change with the sampling process at different sampling points.

[0042] S104. Control the rotation of the inner ring phase and the outer ring phase respectively to change the phase state of the digital signal, and scan and obtain the corresponding frame header data at each new phase state.

[0043] In steps S102 to S103, although the correction of the inner and outer ring phases is completed, making the signal points of the inner and outer rings all located at the ideal positions, the signal points of the inner and outer rings at this time are not necessarily at the corresponding ideal positions. For example, an inner ring signal point A should be at 3π / 4 in the second quadrant position among the 4 rational positions (π / 4, 3π / 4, 5π / 4, and 7π / 4), but it is actually at π / 4. Although the inner ring signal point A is at a non-corresponding rational position, further phase adjustment is required for this.

[0044] In this step, the APSK inner and outer ring phase correction device applies rotation angles to the inner ring and outer ring phases respectively, traverses all possible phase states within 360 degrees at a certain step size (the rotation step size of the inner ring phase is 90 degrees, and the rotation step size of the outer ring phase is 30 degrees), and searches for and extracts the corresponding frame header data at each phase state. Among them, the frame header is the starting flag of the data frame and contains key synchronization information. By scanning the frame header data in different phase states, it can be further determined whether each inner ring signal point is at the corresponding ideal position.

[0045] For example, in a specific embodiment, the rotation step size of the inner ring phase is 90 degrees, and the rotation step size of the outer ring phase is 30 degrees. The APSK inner and outer ring phase correction device sequentially applies rotations of 0 degrees, 90 degrees, 180 degrees, and 270 degrees to the inner ring phase, and at the same time applies rotations of 0 degrees, 30 degrees, 60 degrees, 90 degrees, etc. to the outer ring phase to generate a series of phase states. For each state, the frame header scanning module searches for a specific frame header flag, such as "1011011", in the received data. Once this specific frame header flag is detected, the complete frame header data, such as "10110110001000100", is extracted. By detecting whether the frame header data in different phase states matches, the optimal inner and outer ring phase synchronization state can be determined.

[0046] S105. Whether the frame header data conforms to the preset frame header template standard.

[0047] The APSK inner and outer ring phase correction device determines whether the frame header data obtained by scanning meets the preset standard template to evaluate the effect of phase correction. Among them, the frame header template defines the ideal frame header data structure and content, reflecting the expected characteristics under the best phase synchronization state. By comparing the actually obtained frame header data with the standard template, the accuracy of phase correction can be quantified.

[0048] Specifically, the APSK inner and outer ring phase correction device extracts the frame header data obtained by scanning in each phase state and compares it bit by bit with the preset standard frame header template. Among them, the standard template usually includes keyword fields such as a fixed frame synchronization sequence and data length, as well as an allowable error range. The bit stream of the frame header data is compared with the corresponding positions of the template one by one, and the number of matching bits and the number of error bits are counted. If the matching degree reaches the preset threshold and the error rate is lower than the allowable range, the frame header data is considered to meet the standard. Otherwise, if there are significant differences or too many errors, it is determined to be unqualified. After evaluating the frame header data in all phase states, the optimal result with the highest matching degree and the lowest error rate with the template can be selected.

[0049] S106. Determine that the inner and outer ring phase correction of the digital signal is completed.

[0050] The APSK inner and outer ring phase correction device makes a judgment on the completion of the inner and outer ring phase correction according to the result of the frame header data evaluation. When the frame header data obtained by scanning conforms to the preset standard template, it is determined that the current phase synchronization state is close enough to the optimal value, and it can be considered that the inner and outer ring phase correction has been basically completed. At this time, the constellation diagram distortion of the digital signal is fully compensated, and the demodulation performance reaches the best.

[0051] Specifically, the APSK inner and outer ring phase correction device selects the optimal frame header data with the highest matching degree and the lowest error rate with the standard template from the frame header evaluation results in all phase states. The phase state corresponding to this data is the best inner and outer ring phase synchronization point. The APSK inner and outer ring phase correction device determines the inner and outer ring phase values in this optimal phase state as the final corrected result, completing the entire inner and outer ring phase correction process. Thereafter, the receiving end can use this phase value to synchronize and demodulate the received signal to obtain accurate data information.

[0052] In the above embodiments, the APSK inner and outer ring phase correction device processes the received digitally modulated APSK signal by using the moving average equalization algorithm to initially distinguish and correct the phase deviation between the inner and outer rings. Then, based on a preset rule, the phase offset between the inner and outer rings is calculated and corrected. Finally, by controlling the rotation of the inner and outer ring phases and scanning the header data, the header data that can correctly match the preset header template is screened out. This method can counteract the influence of the power amplifier compression process on the phase misalignment between the inner and outer rings of 16-APSK, improve the demodulation accuracy of the digitally modulated 16-APSK signal, and thus improve the overall performance and reliability of wireless communication.

[0053] The following is a further and more specific process description of the method provided in this embodiment. Specifically, as Figure 2 shown, it is another process schematic diagram of a method for correcting the phase inconsistency between the inner and outer rings of APSK in an embodiment of the present application.

[0054] S201. Adjust the digitally modulated APSK signal by using a preset complex exponential phase factor.

[0055] The specific adjustment formula is: where s k is the original APSK modulated signal, S k is the adjusted digital signal, is the frequency offset, is the initial phase offset, j is the imaginary unit, and T b is the symbol period.

[0056] By multiplying each symbol of the received signal by this complex exponential factor, the APSK inner and outer ring phase correction device realizes a rough correction of the signal constellation diagram, partially offsetting the constellation diagram distortion caused by the power amplifier non-linearity. This creates better conditions for subsequent fine phase correction. The specific parameter values of this complex exponential phase factor and can be set according to the prior knowledge of the system and are not limited here.

[0057] S202. Calculate the maximum residual frequency offset error of the adjusted digital signal within a preset sampling interval.

[0058] After being adjusted by the complex exponential phase factor, the APSK inner and outer ring phase correction device can adopt the Kay algorithm to estimate the frequency deviation by calculating the phase difference between adjacent symbols. Specifically, the APSK inner and outer ring phase correction device selects a preset sampling interval, such as 1000 sampling points, and slides the estimation window of the Kay algorithm, such as 100 sampling points, within this interval, and a series of frequency offset estimation values can be obtained. Then, find the one with the largest absolute value among all the estimation values, and record it as the maximum residual frequency offset error, which is used to evaluate the effect of the complex exponential phase factor adjustment.

[0059] S203. Whether the maximum residual frequency offset error exceeds the preset deviation threshold.

[0060] The APSK inner and outer ring phase correction device compares the maximum residual frequency offset error calculated in step S202 with the preset deviation threshold to determine whether to issue a warning.

[0061] Optionally, the preset deviation threshold is 2000Hz or 0.002π. When it is detected that the maximum residual frequency offset error exceeds this preset deviation threshold, a deviation warning is issued. Otherwise, step S205 is normally executed.

[0062] S204. Deviation warning.

[0063] When the maximum residual frequency offset error reaches or exceeds the preset threshold, the APSK inner and outer ring phase correction device activates the deviation warning mechanism to prompt the system to take countermeasures. The specific prompting method is not limited here.

[0064] In the above embodiment, the APSK inner and outer ring phase correction device uses the complex exponential phase factor to adjust the digital signal, which can optimize the initial state of the signal, reduce the complexity and errors that may occur in subsequent processing, improve the efficiency of the overall processing flow and the quality of the signal. Especially when the frequency offset is large, it can effectively perform preliminary correction.

[0065] S205. Receive the digital signal modulated by APSK and process it using the moving average equalization algorithm.

[0066] This step is the same as step S101 and will not be elaborated here.

[0067] S206. According to the boundary information of the inner ring phase and the outer ring phase, extract the inner ring signal points twice successively in the inner ring phase to obtain the first group of inner ring signal points and the second group of inner ring signal points respectively.

[0068] The APSK inner and outer ring phase correction device first determines the boundary positions of the inner ring phase and the outer ring phase in the constellation diagram. Optionally, the constellation diagram of 16APSK modulation consists of 4 signal points in the inner ring and 12 signal points in the outer ring, which are located at different radii and phase angles respectively. By analyzing the amplitude and phase statistical characteristics of the received signal, the demarcation radius and angle range of the inner and outer rings can be estimated.

[0069] After determining the boundary information, the APSK inner and outer ring phase correction device extracts the inner ring signal points twice at a certain time interval within the boundary of the inner ring phase. This time interval can be flexibly set according to parameters such as the symbol rate and sampling rate to obtain a suitable observation window. The inner ring signal points extracted for the first time are called the first group, and the second time is called the second group. The number of signal points in each group is equal to the number of signal points in the inner ring, that is, 4.

[0070] S207. Perform the fourth-power operation on the first group of inner ring signal points and the second group of inner ring signal points respectively and perform cumulative summation to obtain the first cumulative phase and the second cumulative phase.

[0071] Specifically, the APSK inner and outer ring phase correction device calculates the fourth power of the 4 inner ring signal points in the first group respectively, that is, calculates the fourth power of each complex signal point. Then, the APSK inner and outer ring phase correction device adds these 4 fourth-power results to obtain the cumulative phase S1 of the first group. Similarly, the APSK inner and outer ring phase correction device performs the fourth-power operation and cumulative summation on the 4 inner ring signal points in the second group to obtain the cumulative phase S^2 of the second group. For example, in a specific embodiment, the 4 inner ring signal points in the first group are (1 + j), (-1 + j), (-1 - j), (1 - j) respectively, and the signal points in the second group are (0.8 + 0.6j), (-0.6 + 0.8j), (-0.8 - 0.6j), (0.6 - 0.8j) respectively. After the fourth-power operation and cumulative summation, we can get: S1 = 16, S2 = 8.1472.

[0072] S208. Whether the difference between the first cumulative phase and the second cumulative phase exceeds the preset change threshold After obtaining the first cumulative phase S1 and the second cumulative phase S2, the APSK inner and outer ring phase correction device determines whether the inner ring phase has a jump by comparing whether the difference between these two values exceeds the preset change threshold.

[0073] Specifically, the APSK inner and outer ring phase correction device calculates the difference ΔS between S1 and S2 (ΔS = S2 - S1), and then compares the absolute value of ΔS with the preset change threshold Th, that is: If |ΔS| ≤ Th, it is determined that the inner circle phase is stable and no jump occurs; if |ΔS| > Th, it is determined that the inner circle phase has jumped. Among them, the change threshold Th can be set according to factors such as modulation mode and signal-to-noise ratio. For 16APSK, the 4 signal points of the inner circle are distributed at 90° on the constellation diagram. Ideally, the difference between the two accumulated phases should be 0. Considering the influence of noise and estimation error, Th is usually set to a small positive value close to 0, such as 1, 0.5, etc., which is not limited here.

[0074] For example, in a specific embodiment, the first accumulated phase S1 = 16, the second accumulated phase S2 = 8.1472, and the preset change threshold Th = 1. Then the difference between the two is ΔS = 8.1472 - 16 = -7.8528, and the absolute value |ΔS| = 7.8528 > Th, exceeding the preset threshold. This indicates that a phase jump may have occurred during the process of extracting the inner circle signal points for the first and second times, and unwrapping processing is required.

[0075] On the contrary, if |ΔS| ≤ Th, it means that the phases of the inner circle signal points extracted twice are relatively stable, and the change in the accumulated phase is within the normal range, and it can be directly used to estimate the average phase offset.

[0076] It should be noted that since the ideal positions of the inner circle signal points are fixed, the accumulated phases at adjacent moments should theoretically remain stable. If there is a difference exceeding the threshold, it means that the inner circle phase may have a large offset or jump.

[0077] S209. Divide the second accumulated phase by the radian representation of the power value to obtain the inner circle phase offset.

[0078] If the difference ΔS between the first accumulated phase S1 and the second accumulated phase S2 does not exceed the preset change threshold Th, it means that the phase of the inner circle signal point is relatively stable, and the second accumulated phase S2 can be directly used to estimate the average phase offset of the inner circle. At this time, the APSK inner and outer circle phase correction device only needs to divide S2 by the radian representation of the power value.

[0079] Specifically, the APSK inner and outer circle phase correction device divides S2 by the power value 4 to obtain the normalized accumulated phase S2' (S2' = S2 / 4). Then, S2' is converted to radian representation, that is, multiplied by 2π, to obtain the inner circle phase offset θ2 (S2' × (2π)). For example, in an embodiment, the second accumulated phase S2 = 8.1472, and the difference from the first accumulated phase S1 does not exceed the change threshold. After normalization and radian conversion, we can get: S2' = 8.1472 / 4 = 2.0368; θ2 = 2.0368 × (2π) = 12.8rad = 733.7°; Among them, θ2 is the calculated inner - circle phase offset, which reflects the average deviation of the inner - circle signal points from the ideal position.

[0080] In the above - mentioned embodiment, the APSK inner - and - outer - circle phase correction device determines the boundary information of the inner and outer circles, extracts the inner - circle signal points continuously twice for processing to obtain two phase offsets, and judges whether there is a phase jump by comparing the change difference between adjacent phase offsets, thereby more accurately measuring and correcting the phase offset, and optimizing the overall quality and communication efficiency of the digital signal.

[0081] S210: Unwrap the second accumulated phase, and then subtract 180 degrees to obtain the target accumulated phase.

[0082] If the difference ΔS between the first accumulated phase S1 and the second accumulated phase S2 exceeds the preset change threshold Th, it indicates that a phase jump may have occurred during the process of extracting the inner - circle signal points twice. This kind of jump is usually due to the circular ambiguity effect caused by the phase accumulation exceeding 360°, and unwrapping processing is required to restore the true phase - offset trend.

[0083] Specifically, the APSK inner - and - outer - circle phase correction device first unwraps the second accumulated phase S2. Since S2 is a complex number, the argument θ2 of it can be obtained by using the argument function angle of the complex number, that is, θ2 = angle(S2). Then, the APSK inner - and - outer - circle phase correction device judges whether θ2 exceeds 180°. If it exceeds, subtract 360° until θ2 falls within the range of - 180° to 180°. The unwrapped argument is denoted as θ2', that is, θ2' = mod(θ2 + 180°, 360°)-180°. Among them, mod represents the modulo operation, that is, taking the remainder after dividing by 360°. Such processing can limit θ2' between - 180° and 180°, eliminating the circular ambiguity effect.

[0084] Next, the APSK inner - and - outer - circle phase correction device subtracts 180° from the unwrapped argument θ2' to obtain the target accumulated phase θ2”, that is, θ2” = θ2'-180°. Thus, the accumulated phases before and after the phase jump are unified into a continuous interval, which is convenient for subsequent estimation of the inner - circle phase offset.

[0085] For example, in an embodiment, the second accumulated phase S2 = (-8 + 6j), and the difference between it and the first accumulated phase S1 exceeds the change threshold. First, find the argument of S2: θ2 = angle(-8 + 6j)=143.1°; Since θ2 does not exceed 180°, no phase unwrapping is required. Directly subtract 180° from it to obtain the target accumulated phase: θ2” = 143.1°-180°=-36.9°.

[0086] This indicates that, considering the influence of phase jumps, the average phase offset of the inner - loop signal points extracted for the second time is approximately - 36.9°, which is close to - 1 / 4 turn of the ideal value.

[0087] S211: Divide the target accumulated phase by the radian representation of the power value to obtain the inner - loop phase offset.

[0088] After obtaining the target accumulated phase θ2”, the APSK inner - and - outer - loop phase correction device converts it into the average phase offset of the inner - loop signal points by dividing by the radian representation of the power value, which serves as the basis for subsequent correction. The specific calculation process is similar to step S209 and will not be elaborated here.

[0089] In the above - mentioned embodiment, the APSK inner - and - outer - loop phase correction device determines whether there is a phase jump in the inner - loop phase by comparing the deviation between two consecutive accumulated phases with a preset change threshold. If a phase jump occurs, unwrapping processing is performed and the phase value is adjusted, which can effectively cope with sudden large - range phase changes, ensure the stability of signal demodulation, and reduce the possibility of signal misinterpretation caused by large - scale offsets.

[0090] S212: Correct the inner - loop phase and outer - loop phase of the digital signal.

[0091] This step is the same as steps S102 and S103 and will not be elaborated here.

[0092] S213: Control the rotation of the inner - loop phase and outer - loop phase respectively to change the phase state of the digital signal, and scan and obtain the corresponding frame - header data at each new phase state.

[0093] This step is the same as step S104 and will not be elaborated here.

[0094] S214: Calculate the frame - header bit - error rate corresponding to each frame - header in the frame - header data.

[0095] Specifically, the APSK inner - and - outer - loop phase correction device extracts the frame - header data obtained at each phase state, compares it bit - by - bit with a preset standard frame - header template, and counts the number of error bits. Then, divide the number of error bits by the total number of bits in the frame - header to obtain the bit - error rate of this frame - header.

[0096] S215: Determine whether there are more than a preset number of consecutive frame - header bit - error rates equal to zero or the difference from zero is less than a preset threshold.

[0097] After obtaining the bit - error rate of each frame - header, the APSK inner - and - outer - loop phase correction device further determines whether the current phase state meets the optimal frame - synchronization condition.

[0098] Specifically, the APSK inner and outer circle phase correction device sets a preset quantity N and a preset threshold T. Then, by checking whether there are consecutive N frame headers with an error rate equal to 0 in the current phase state, or although not equal to 0 but the difference from 0 is less than the threshold T. If this condition is met, it is determined that the frame header data in the current phase state conforms to the preset frame header template standard and can be used for frame synchronization. Conversely, if there are no consecutive N frame headers with an error rate of zero (or close to zero), it is determined that the frame header data in the current state is not ideal enough and the inner and outer circle phases need to be continuously adjusted to search for the optimal synchronization point.

[0099] For example, in a specific embodiment, the APSK inner and outer circle phase correction device sets N = 10 and T = 0.1%. In a certain phase state, it is detected that there are consecutive 12 frame headers with an error rate of 0, meeting the condition. While in another phase state, although there are consecutive 9 frame headers with an error rate less than 0.1%, it does not meet the requirement of being consecutive 10, so it is determined not to meet the standard.

[0100] It can be understood that the number of such consecutive frame headers with an error rate of zero (or close to zero) reflects the effect of phase correction. The more the number, the higher the current inner and outer circle phase synchronization accuracy and the better the demodulation performance.

[0101] In the above embodiment, the APSK inner and outer circle phase correction device ensures the accuracy of the final target frame header recognition by continuously monitoring the error rate of multiple frame headers and comparing it with the preset threshold, thereby improving the reliability of communication and the overall quality of the signal.

[0102] S216. Perform frame synchronization at the receiver end of the digital signal based on the currently captured frame header data.

[0103] After the error rate calculation and continuity judgment in steps S214 and S215, the APSK inner and outer circle phase correction device has determined the optimal inner and outer circle phase synchronization state. In this step, the APSK inner and outer circle phase correction device uses the frame header data captured in this state to perform frame synchronization at the signal receiving end.

[0104] Specifically, the APSK inner and outer circle phase correction device provides the frame header data in the optimal phase state to the frame synchronization module of the receiver. This module determines the starting position of each data frame by matching specific synchronization flags in the frame header data. Once a matching synchronization flag is detected, the receiver (receiving end) can accurately locate the frame boundary and achieve synchronous reception of the data frame.

[0105] S217. Demodulate the digital signal after completing frame synchronization to obtain the original baseband signal.

[0106] After frame synchronization is completed, the receiver has determined the correct boundary information of the data frame. Using this time reference, the APSK inner and outer circle phase correction device can perform precise demodulation processing on the received modulated signal to recover the original baseband data. The specific demodulation process is a conventional technical means in this field and will not be elaborated here.

[0107] In the above embodiment, the APSK inner and outer circle phase correction device performs frame synchronization and demodulation after phase correction, ensuring that the signal after the correction process can be correctly synchronized and quickly converted into the original baseband signal.

[0108] The APSK inner and outer circle phase correction device of the embodiment of the present invention is an electronic device. Figure 5 The schematic diagram of the architecture of the electronic device suitable for implementing the embodiment of the present invention is shown.

[0109] It should be noted that Figure 5 The shown electronic device is only an example and should not bring any limitation to the functions and usage scope of the embodiment of the present invention.

[0110] Those of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructions (computer programs), or the relevant hardware can be controlled by instructions (computer programs). The instructions can be stored in a computer-readable storage medium and loaded and executed by a processor. The electronic device of this embodiment includes a storage medium and a processor. Among them, multiple instructions are stored in the storage medium, and these instructions can be loaded by the processor to execute any step of the method provided by the embodiment of the present invention.

[0111] Specifically, the storage medium and the processor are electrically connected directly or indirectly to achieve data transmission or interaction. For example, these components can be electrically connected to each other through one or more signal lines. The storage medium stores computer-executable instructions for implementing the data access control method, including at least one software function module that can be stored in the storage medium in the form of software or firmware. The processor executes various functional applications and data processing by running the software programs and modules stored in the storage medium. The storage medium can be, but is not limited to, a random access memory (Random Access Memory, abbreviated as RAM), a read-only memory (Read Only Memory, abbreviated as ROM), a programmable read-only memory (Programmable Read-Only Memory, abbreviated as PROM), an erasable programmable read-only memory (Erasable Programmable Read-Only Memory, abbreviated as EPROM), an electrically erasable programmable read-only memory (Electric Erasable Programmable Read-Only Memory, abbreviated as EEPROM), etc. Among them, the storage medium is used to store the program, and the processor executes the program after receiving the execution instruction.

[0112] Furthermore, the software programs and modules in the above storage medium may further include an operating system, which may include various software components and / or drivers for managing system tasks (such as memory management, storage device control, power management, etc.), and may communicate with various hardware or software components to provide a running environment for other software components. The processor can be an integrated circuit chip with signal processing capabilities. The above-mentioned processor can be a general-purpose processor, including a central processing unit (Central Processing Unit, abbreviated as CPU), a network processor (Network Processor, abbreviated as NP), etc., which can implement or execute the various methods, steps and logic flow block diagrams disclosed in this embodiment. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0113] Since the instructions stored in the storage medium can execute the steps in any of the methods provided in the embodiments of the present invention, the beneficial effects of any of the methods provided in the embodiments of the present invention can be achieved. For details, please refer to the previous embodiments and will not be repeated here.

[0114] As described above, it is only the preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A correction method for the inconsistent phases of the inner and outer circles of APSK, applied to an APSK inner and outer circle phase correction device, characterized in that The method includes: Receiving a digitally modulated signal through APSK and processing it using a moving average equalization algorithm. The digital signal includes an inner ring phase and an outer ring phase. The inner ring phase has 4 inner ring signal points, and the outer ring phase has 12 outer ring signal points; Calculating an inner ring phase offset corresponding to the inner ring phase based on a preset rule, and synchronously correcting the inner ring phase and the outer ring phase of the digital signal according to the inner ring phase offset; Calculating an outer ring phase offset corresponding to the outer ring phase, and correcting the outer ring phase of the digital signal again according to the outer ring phase offset. The calculation rule of the outer ring phase offset is the same as that of the inner ring phase offset; Controlling the inner ring phase and the outer ring phase to rotate respectively to change the phase state of the digital signal, and scanning to obtain corresponding frame header data in each new phase state. The rotation period of the inner ring phase is 90 degrees, and the rotation period of the outer ring phase is 30 degrees; If it is detected that the frame header data conforms to the preset frame header template standard, it is determined that the inner and outer ring phase corrections of the digital signal are completed.

2. The method according to claim 1, wherein The step of calculating the inner ring phase offset corresponding to the inner ring phase based on the preset rule specifically includes: Determining the boundary information of the inner ring phase and the outer ring phase; Successively and continuously extracting inner ring signal points twice in the inner ring phase according to the boundary information to obtain a first group of inner ring signal points and a second group of inner ring signal points respectively; Performing a fourth-power operation on the first group of inner ring signal points and the second group of inner ring signal points respectively and performing cumulative summation to obtain a first cumulative phase and a second cumulative phase; If it is detected that the difference between the first cumulative phase and the second cumulative phase does not exceed a preset change threshold, dividing the second cumulative phase by the radian representation of the power value to obtain the inner ring phase offset.

3. The method according to claim 2, wherein After the step of performing a fourth-power operation on the first group of inner ring signal points and the second group of inner ring signal points respectively and performing cumulative summation to obtain a first cumulative phase and a second cumulative phase, it further includes: If it is detected that the difference between the first cumulative phase and the second cumulative phase exceeds the preset change threshold, unwrapping the second cumulative phase, and then subtracting 180 degrees to obtain a target cumulative phase; Dividing the target cumulative phase by the radian representation of the power value to obtain the inner ring phase offset.

4. The method according to claim 1, wherein After the step of controlling the inner ring phase and the outer ring phase to rotate respectively to change the phase state of the digital signal, and scanning to obtain corresponding frame header data in each new phase state, it further includes: If it is detected that the frame header data does not conform to the preset frame header template standard, continue to scan to obtain new frame header data by changing the phase state of the digital signal.

5. The method according to claim 1, wherein Before the step of if it is detected that the frame header data conforms to the preset frame header template standard, it is determined that the inner and outer ring phase corrections of the digital signal are completed, it further includes: Calculating the frame header error rate corresponding to each frame header in the frame header data. The frame header data includes multiple frame headers; Judging whether there are continuously more than a preset number of frame header error rates equal to zero or the difference from the zero value is less than a preset threshold; If so, it is determined that the header data conforms to the preset header template standard; If not, it is determined that the header data does not conform to the preset header template standard.

6. The method according to claim 1, characterized in that, After the step of determining that the inner and outer circle phase correction of the digital signal is completed if it is detected that the header data conforms to the preset header template standard, the following is further included: If it is detected that the inner and outer circle phase correction of the digital signal is completed, frame synchronization is performed at the receiver end of the digital signal according to the currently captured header data; After the frame synchronization is completed, the digital signal is demodulated to obtain the original baseband signal.

7. The method according to claim 1, characterized in that Before the step of receiving the digitally modulated signal by APSK and processing it using the moving average equalization algorithm, the following is further included: The digitally modulated signal by APSK is adjusted using a preset complex exponential phase factor; The maximum residual frequency offset error of the adjusted digital signal is calculated within a preset sampling interval; If it is detected that the maximum residual frequency offset error exceeds the preset deviation threshold, a deviation warning is given.

8. An APSK inner and outer ring phase correction device, characterized in that The APSK inner and outer circle phase correction device includes: one or more processors and a memory; The memory is coupled to the one or more processors, and the memory is used to store computer program code, the computer program code includes computer instructions, and the one or more processors call the computer instructions to cause the APSK inner and outer circle phase correction device to execute the method according to any one of claims 1-7.

9. A computer-readable storage medium, comprising instructions, characterized in that, When the instruction runs on the APSK inner and outer circle phase correction device, it causes the APSK inner and outer circle phase correction device to execute the method according to any one of claims 1-7.

10. A computer program product, characterized in that, When the computer program product runs on the APSK inner and outer circle phase correction device, it causes the APSK inner and outer circle phase correction device to execute the method according to any one of claims 1-7.

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