Thin film transistor device based on sandwich structure active layer and preparation method thereof

Abstract

The invention discloses a thin film transistor device based on a sandwich structure active layer and a preparation method thereof, relates to the technical field of electronic devices, and solves the problem of low device carrier concentration caused by scattering of moving electrons in the thin film transistor active layer. The thin film transistor comprises a substrate, a grid electrode, a grid insulating layer, a sandwich structure active layer, a source electrode and a drain electrode from bottom to top. Wherein the sandwich structure active layer sequentially comprises a wide-band-gap metal oxide semiconductor, a narrow-band-gap metal oxide semiconductor and a wide-band-gap metal oxide semiconductor from bottom to top. The sandwich-structured active layer has an energy band gap, so that a Fermi level pinning effect is caused, a structure similar to a two-dimensional electron gas is formed, electrons can be effectively limited to move near an interface of the active layer, scattering is reduced, the mobility and the electrical property of a thin film transistor device are enhanced, and the thin film transistor device is suitable for the OLED display technology and the OLED display technology. Wide application prospects are realized.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic devices, and particularly to a thin-film transistor device based on a sandwich-structured active layer and a preparation method thereof, which is applicable to OLED display technology. Background Art

[0002] With the continuous progress of display technology, display devices are rapidly evolving towards large screens, transparency, high resolution, and flexibility. OLED (organic light-emitting diode) display technology has attracted much attention due to its advantages such as self-luminescence, wide viewing angle, and high contrast. However, traditional amorphous silicon TFT devices have problems such as low carrier mobility, which limits their application in the OLED display field. Although polysilicon TFTs exhibit relatively high carrier mobility, there are many challenges in large-scale manufacturing, including complex production processes and high process temperatures, which limit the possibility of large-area production under low-temperature conditions. In recent years, TFTs with metal oxide semiconductors as the active layer have developed rapidly. Such materials have high carrier mobility and relatively low preparation temperatures, making them an ideal choice for TFT devices in OLED display technology.

[0003] Recently, metal oxide semiconductor TFTs have developed rapidly due to their excellent carrier mobility, transparency, and relatively low production temperature, becoming an ideal choice for the TFT active layer. To further improve the display performance, TFT devices need to achieve higher carrier mobility, larger current on / off ratios, lower subthreshold swings, and smaller threshold voltages. In a standard TFT design, electrons in the active layer move along the conductive channel in the active layer, transmitting from the source electrode to the drain electrode. However, during the movement, electrons may collide with lattice defects, impurities, other electrons, or phonons (quanta of lattice vibrations), resulting in scattering. Especially in a high-temperature environment, these scattering events will greatly affect the electron mobility and the performance of the device. By preparing a sandwich active layer structure of wide-bandgap metal oxide semiconductor - narrow-bandgap metal oxide semiconductor - wide-bandgap metal oxide semiconductor. By forming a structure similar to a two-dimensional electron gas at the interface, electrons can be effectively confined to move near the interface of the active layer, reducing scattering, thereby improving the display quality of OLED displays. Summary of the Invention

[0004] The purpose of the present invention is to provide a thin-film transistor device based on a sandwich-structured active layer and a preparation method thereof, so as to solve the problem of poor electrical performance of the device caused by defect scattering in the thin-film transistor active layer, thereby improving the display quality of OLED displays.

[0005] The technical solution adopted by the present invention is as follows: A thin-film transistor device based on a sandwich-structured active layer includes, from bottom to top, a substrate, a gate electrode, a gate insulating layer, a metal oxide semiconductor active layer, a metal source electrode (7), and a metal drain electrode (8); Among them, the sandwich-structured active layer is, from bottom to top, a first wide-bandgap metal oxide semiconductor, a narrow-bandgap metal oxide semiconductor, and a second wide-bandgap metal oxide semiconductor, and specifically includes the following materials: Wide-bandgap metal oxide semiconductors: ZnO, Ga2O3, BeO, MgO, NiGa2O4, SnO2, LiGa5O8, IGTO, IGZO, etc. Narrow-bandgap metal oxide semiconductors: CuO, V2O5, PbO, Bi2O3, SnO2, InVO, ITO, IZO, etc. Furthermore: The raw material of the substrate includes a flexible substrate such as any one of polymer PET, PEN, PI, PE, PES, and PDMS; a rigid substrate such as glass, and its thickness is 100 - 600 μm.

[0006] Furthermore: The raw material of the gate electrode includes thin films of ITO, gold, silver, aluminum, and copper, and its thickness is 10 - 40 μm.

[0007] Furthermore: The raw material of the gate insulating layer includes alumina, hafnium oxide, zirconium oxide, silicon oxide, silicon nitride, PMMA, PVA, PI, etc., and its thickness is 100 - 300 nm.

[0008] Furthermore, in the thin-film transistor device based on the sandwich-structured active layer, due to the energy band difference between the wide-bandgap metal oxide semiconductor material and the narrow-bandgap metal oxide semiconductor material, the Fermi level pinning effect is caused, and a structure similar to a two-dimensional electron gas is formed at the junction of the interface of the intermediate layer. Specifically, due to the relatively narrow bandgap of the narrow-bandgap metal oxide semiconductor, it forms an electron potential well in the heterojunction region, while the wide-bandgap metal oxide semiconductor forms an electron potential barrier. This structure causes electrons to accumulate at the energy potential barrier and can only move in two dimensions, thereby reducing electron scattering and enhancing the gate electrode voltage's ability to regulate the channel. It also improves the mobility of the thin-film transistor by reducing trap states at the interface and suppressing reactions with environmental species. This design not only increases the carrier concentration but also improves the device's stability.

[0009] A preparation method for a thin-film transistor device based on a sandwich-structured active layer includes the following steps: Step S1: Wash and dry the substrate (1), clean the substrate (1) with acetone solution, deionized water, and isopropyl acetone, and blow it dry with nitrogen after cleaning; Step S2: Prepare the gate electrode (2) on the surface of the substrate (1) by magnetron sputtering or evaporation; Step S3: Prepare the gate insulating layer (3) on the surface of the gate electrode (2); Step S4: Use DC magnetron sputtering to prepare the sandwich-structured active layer; Step S5: Use DC magnetron sputtering to prepare the metal source electrode (7) and the metal drain electrode (8) on the active layer; Step S6: Perform annealing treatment at an annealing temperature of 200 - 300 °C.

[0010] The beneficial effects of the present invention are as follows: 1. The present invention improves the poor electrical properties of thin-film transistors by using a sandwich-structured active layer. Different metal oxide semiconductor materials with different bandgaps are used, which have an energy band gap, resulting in the Fermi level pinning effect and forming a structure similar to a two-dimensional electron gas. Using the structure of wide-bandgap metal oxide semiconductor - narrow-bandgap metal oxide semiconductor - wide-bandgap metal oxide semiconductor, due to the bandgap difference, the narrow-bandgap material forms an electron potential well in the heterojunction region, while the wide-bandgap material forms an electron potential barrier. This structure causes electrons to accumulate at the energy potential barrier and can only move in two dimensions, thereby reducing electron scattering and enhancing the gate electrode voltage's ability to regulate the channel, improving the mobility of the thin-film transistor. Through the sandwich-structured active layer of the present invention, the electrical characteristics of the thin-film transistor will be greatly improved.

[0011] 2. If the materials selected for the wide and narrow bandgap metal oxide semiconductors are both highly transparent materials, a fully transparent device can be prepared for use in the field of full transparent displays.

[0012] 3. The device prepared by the present invention has the characteristics of ultra-light, ultra-thin, and fully transparent, and can be made flexible, and can be used to manufacture various wearable devices for industries such as smart home and medical care. Description of the Drawings

[0013] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the proportional relationships of the various components in the drawings of this specification do not represent the proportional relationships in actual material selection and design. They are merely schematic diagrams of the structure or position, where: Figure 1 is the structural schematic diagram of the present invention; Figure 2 is the process flow chart; Figure 3 is the electrical performance comparison diagram of the device and components of the present invention; Markings in the figure: 1 - Substrate, 2 - Gate electrode, 3 - Gate insulating layer, 4 - First layer of wide-bandgap metal oxide semiconductor, 5 - Second layer of narrow-bandgap metal oxide semiconductor, 6 - Wide-bandgap metal oxide semiconductor, 7 - Metal source electrode, 8 - Metal drain electrode. Detailed implementation mode

[0014] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention, that is, the described embodiments are only some embodiments of the present invention, rather than all embodiments.

[0015] As Figure 1 shown, the thin-film transistor device based on the sandwich-structured active layer includes, from bottom to top, a substrate, a gate electrode, a gate insulating layer, a metal oxide semiconductor active layer, and source and drain electrodes; The thin-film transistor device with a sandwich-structured active layer includes, from bottom to top, a substrate, a gate electrode, a gate insulating layer, a sandwich-structured active layer, a metal source electrode (7) and a metal drain electrode (8). The sandwich-structured active layer is, from bottom to top, a first wide-bandgap metal oxide semiconductor, a narrow-bandgap metal oxide semiconductor, and a second wide-bandgap metal oxide semiconductor in sequence.

[0016] Specific structure: The substrate is glass, the gate electrode is ITO (150 nm), the gate insulating layer material is PMMA, the active layer material is the sandwich-structured active layer metal oxide semiconductor, and the source and drain electrodes are Al.

[0017] A preparation method for a thin-film transistor device based on a sandwich-structured active layer, as Figure 2 shown, includes the following steps: Step S1: Clean the glass substrate 1 with deionized water, acetone solution, deionized water, and isopropyl alcohol for 15 minutes in sequence, place the cleaned substrate in an ultraviolet ozone (UVO3) cleaner for 15 minutes, and finally dry it with nitrogen; Step S2: Prepare a gate electrode on the surface of the substrate by magnetron sputtering or evaporation; Step S3: Prepare a gate insulating layer on the surface of the gate electrode; Step S4: Use DC magnetron sputtering to prepare a sandwich-structured active layer; Step S5: Use DC magnetron sputtering to prepare source and drain electrodes on the active layer; Step S6: Perform annealing treatment, and the annealing temperature is 200 - 300 °C.

[0018] Furthermore: If the gate insulating layer is an organic material, then step S3 is specifically: Step S31: Prepare a solution of gate insulating layer material with a certain concentration; Step S32: Turn on the spin coater and the oil-free silent vacuum pump, and set the spin coating speed and time; Step S33: Place the substrate on which the gate electrode has been prepared on the rotating table, press the wafer suction button to fix the substrate on the rotating table; Step S34: Use a pipette to suck an appropriate amount of gate insulating layer material solution, drop it on the surface of the substrate, and press the start button; Step S35: After spin coating, place the substrate in a petri dish and send it into an oven for drying to complete the preparation of the gate insulating layer.

[0019] The specific steps of step S4 are as follows: Step S41: Place the wafer on which the insulating layer (3) has been sputtered into the LL chamber of the sputtering instrument. After evacuating the vacuum, move it to the PM chamber for sputtering the first layer of wide bandgap metal oxide semiconductor material, with a thickness of 30 - 50 nm; Step S42: After the first layer of sputtering is completed, set the parameters of the sputtering instrument and perform the second layer of active layer sputtering in the PM chamber. This material is a narrow bandgap metal oxide semiconductor material with good conductivity, and its thickness is 5 - 20 nm; Step S43: After the second layer of sputtering is completed, set the parameters of the sputtering instrument and perform the third layer of active layer sputtering in the PM chamber. This material is a wide bandgap metal oxide semiconductor material, with a thickness of 30 - 50 nm.

[0020] The fabricated device is tested to obtain the electrical characteristic parameters of the component and the device of the present invention, such as Figure 3 shown. The carrier mobility of the component is 10.24 cm2 / Vs, the off-state current is 1.12×10-10, the current on-off ratio is 3.36×105, the threshold voltage is 10.1 V, and the subthreshold swing is 1.78 V / dec. The carrier mobility of the device of the present invention is 28.2 cm2 / Vs, the off-state current is 2.94×10-10, the current on-off ratio is 1.26×106, the threshold voltage is 7.18, and the subthreshold swing is 2.38 V / dec.

[0021] The above are only the preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present invention shall be included in the protection scope of the present invention.

Claims

1. A thin-film transistor device based on a sandwich-structured active layer, characterized in that, From bottom to top, it includes a substrate (1), a gate electrode (2), a gate insulating layer (3), a sandwich-structured active layer, a metal source electrode (7), and a metal drain electrode (8); The sandwich-structured active layer is, from bottom to top, a first wide-bandgap metal oxide semiconductor (4), a narrow-bandgap metal oxide semiconductor (5), and a second wide-bandgap metal oxide semiconductor (6), and specifically includes the following materials: Both the first wide-bandgap metal oxide semiconductor (4) and the second wide-bandgap metal oxide semiconductor (6) are any one of ZnO, Ga2O3, BeO, MgO, NiGa2O4, SnO2, LiGa5O8, IGTO, and IGZO; The narrow-bandgap metal oxide semiconductor (5) is any one of CuO, V2O5, PbO, Bi2O3, SnO2, InVO, ITO, and IZO; The sandwich-structured active layer is a combination of the selected wide-bandgap metal oxide semiconductor material and the narrow-bandgap metal oxide semiconductor material.

2. The thin film transistor device based on the active layer of the sandwich structure according to claim 1, wherein The raw material of the substrate (1) includes a flexible substrate and a rigid substrate. The flexible substrate is any one of polymer PET, PEN, PI, PE, PES, and PDMS; the rigid substrate is glass, and its thickness ranges from 100 to 600 μm.

3. The thin film transistor device based on a sandwich-structured active layer according to claim 1, wherein The raw material of the gate electrode (2) is any one of ITO, gold, silver, aluminum, and copper thin films, and its thickness ranges from 10 to 40 μm.

4. The thin film transistor device based on the sandwich structure active layer according to claim 1, characterized in that, The raw material of the gate insulating layer (3) is any one of alumina, hafnium oxide, zirconium oxide, silicon oxide, silicon nitride, PMMA, PVA, and PI, and its thickness ranges from 100 to 300 nm.

5. A method for fabricating a thin film transistor device based on a sandwich-structured active layer, characterized in that, It includes the following steps: Step S1: Wash and dry the substrate (1), clean the substrate (1) with acetone solution, deionized water, and isopropyl acetone, and blow it dry with nitrogen after cleaning; Step S2: Prepare the gate electrode (2) on the surface of the substrate (1) by magnetron sputtering or evaporation; Step S3: Prepare the gate insulating layer (3) on the surface of the gate electrode (2); Step S4: Use DC magnetron sputtering to prepare the sandwich-structured active layer; Step S5: Use DC magnetron sputtering to prepare the metal source electrode (7) and the metal drain electrode (8) on the active layer; Step S6: Perform annealing treatment, and the annealing temperature is 200 - 300 °C.

6. The manufacturing method of the thin film transistor device based on the sandwich structure active layer according to claim 5, characterized in that, If the gate insulating layer is an organic material, the specific content of step S3 is: Step S31: Prepare a solution of the gate insulating layer (3) material with a certain concentration; Step S32: Turn on the spin coater and the oil-free silent vacuum pump, and set the spin speed and time; Step S33: Place the substrate (1) on which the gate electrode (2) has been prepared on the rotating table, press the wafer suction button to fix the substrate on the rotating table; Step S34: Use a pipette to suck an appropriate amount of the gate insulating layer (3) material solution, and then drip the solution onto the surface of the substrate through a filter head, cover the lid, and press the start button; Step S35: After spin coating, place the substrate in a petri dish and send it into an oven to dry, and complete the preparation of the gate insulating layer (3).

7. The manufacturing method of the thin film transistor device based on the active layer of the sandwich structure according to claim 5, characterized in that The specific content of step S4 is: Step S41: Place the wafer with the gate insulating layer (3) already sputtered into the LL chamber of the sputtering instrument. After evacuating the vacuum, move it to the PM chamber for sputtering the first wide-bandgap metal oxide semiconductor material with a thickness range of 30 - 50 nm; Step S42: After the sputtering of the first wide-bandgap metal oxide semiconductor is completed, set the parameters of the sputtering instrument and perform sputtering of the second narrow-bandgap metal oxide semiconductor in the PM chamber with a thickness range of 5 - 20 nm; Step S43: After the sputtering of the second narrow-bandgap metal oxide semiconductor is completed, set the parameters of the sputtering instrument and perform sputtering of the second wide-bandgap metal oxide semiconductor in the PM chamber with a thickness range of 30 - 50 nm.

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