Thin film transistor with dielectric layer made of high-K metal oxide and preparation method of thin film transistor

Abstract

The invention discloses a thin film transistor with a high-K metal oxide dielectric layer and a preparation method thereof.The thin film transistor sequentially comprises a first functional layer, a second functional layer, the high-K metal oxide dielectric layer, a metal oxide semiconductor channel layer and a top electrode, when a substrate is highly doped monocrystalline silicon, the first functional layer is a first gate electrode, and the second functional layer is a second gate electrode; the second functional layer is a highly-doped monocrystalline silicon substrate; when the substrate is conductive glass, the first functional layer is a conductive glass substrate, the second functional layer is a second gate electrode, the metal oxide dielectric layer is grown through the magnetron sputtering technology, gallium oxide materials which are stable in physicochemical property and excellent in insulating strength are preferentially utilized, and the performance of the high-k dielectric layer of the thin film transistor is improved. The preparation method provided by the invention effectively overcomes the defects of the existing process, and the prepared thin film transistor has better performance and reliability.

Description

Technical Field

[0001] The present invention relates to the technical field of thin film transistor preparation, and particularly relates to a thin film transistor with a high-k metal oxide as a dielectric layer and a preparation method thereof. Background Art

[0002] With the development of semiconductor technology, displays are moving towards high resolution, large area, and low cost, which puts forward higher requirements for the performance of TFTs (Thin Film Transistors). In the structure of TFTs, the dielectric layer plays a key role. Traditional silicon dioxide as the dielectric layer of TFTs will cause the quantum tunneling effect when trying to reduce the thickness to improve the carrier mobility of the device, resulting in a sharp increase in leakage current, and then silicon dioxide loses its insulation. Therefore, it has become an inevitable trend to use high dielectric constant (k) materials to replace silicon dioxide as the dielectric layer. High-k materials can use a thicker dielectric layer when obtaining the same capacitance density, effectively suppressing the quantum tunneling effect and reducing the leakage current of the dielectric layer. At the same time, while keeping the gate capacitance unchanged, the physical thickness of the gate dielectric is increased.

[0003] Currently, commonly used high-k dielectric materials include aluminum oxide, zirconium oxide, hafnium oxide, etc. Their preparation processes mainly include anodic oxidation method and solution method. The anodic oxidation method grows an oxide layer on the metal surface by anodic oxidation, which has certain advantages compared with the deposition method that requires a higher temperature; the solution method prepares an amorphous high-k metal oxide thin film through sol-gel spin coating and post-annealing processes, and then the metal oxide thin film is in an amorphous state through thermal annealing. For the channel layer, commonly used growth processes include chemical vapor deposition and solution method, etc. However, these processes have many limitations. The deposition rate of chemical vapor deposition is low, and the efficiency is low in application scenarios where a large number of thin films need to be produced quickly; it is necessary to handle a large gas system, and it is difficult to control the thin film composition; the reaction sources participating in the deposition and the remaining gas after the reaction are flammable, explosive or toxic, and measures to prevent environmental pollution need to be taken, and the equipment also has corrosion resistance requirements; it is difficult to operate when the thin film needs to be deposited locally or on a certain surface of the substrate. Although the solution method has low cost and simple method, in the industrial application of TFTs, the insulation performance of the film prepared by it is not as good as that of the film prepared by the vacuum method. Taking hafnium oxide as an example, the hafnium oxide thin film prepared by the solution method has a relatively low relative dielectric constant, a high leakage current density, poor thin film uniformity and denseness, and although the operation requirements are low, the yield is limited, and the chemical waste liquid generated during the preparation process has a great impact on the environment.

[0004] Therefore, how to solve the deficiencies and shortages of the prior art through an effective thin film transistor preparation method has become an important problem that needs to be solved urgently by researchers in this field. Summary of the Invention

[0005] The object of the present invention is to address the above problems and provide a thin film transistor with a high-K metal oxide as the dielectric layer and a preparation method therefor.

[0006] The technical solution of the present invention is as follows: A preparation method of a thin film transistor with a high-K metal oxide as the dielectric layer includes the following steps: Pretreating the substrate: cleaning the substrate to obtain a standby substrate; when the substrate is a highly doped single-crystalline silicon substrate, depositing a metal electrode on the first surface of the highly doped single-crystalline silicon substrate as the first gate electrode of the thin film transistor, and depositing a high-K metal oxide dielectric layer on the second surface of the highly doped single-crystalline silicon substrate; when the substrate is a conductive glass substrate, depositing an indium tin oxide film on the surface of the conductive glass substrate as the second gate electrode of the thin film transistor, and depositing a high-K metal oxide dielectric layer on the surface of the second gate electrode; Preparation of the high-K metal oxide dielectric layer: depositing using a magnetron sputtering device, controlling the initial chamber pressure of the magnetron sputtering device below 6E-4 Pa, introducing argon gas with a flow rate of 50 sccm before sputtering, the chamber pressure ≥ 0.4 Pa, pre-sputtering for 10 - 20 minutes with a radio frequency sputtering power of 100 - 200 W to clean the surface of the target; then introducing a mixed gas with an argon-oxygen ratio of 7:1 to 8:1, regulating the gas flow rate to maintain the chamber pressure at 0.6 - 0.9 Pa, and depositing with a radio frequency sputtering power of 200 - 350 W, controlling the sputtering rate at The rotation speed of the thin film transistor sample to be sputtered is controlled at 5 - 8 rpm; the target film thickness is set at 60 - 90 nm, and no external heating is applied during the deposition process; optionally, a thermal annealing treatment is performed after the deposition; Preparation of the metal oxide semiconductor channel layer: depositing a metal oxide semiconductor channel layer on the surface of the high-K metal oxide dielectric layer; Preparation of the metal electrode: depositing a metal electrode on the surface of the metal oxide semiconductor channel layer as the top electrode of the thin film transistor.

[0007] As an improvement of an embodiment of the present invention, the "cleaning the substrate to obtain a standby substrate" specifically includes: blowing the dust on the surface of the substrate with compressed nitrogen; placing the substrate in acetone, isopropyl alcohol, and ethanol in sequence, and cleaning with an ultrasonic cleaner for 10 - 20 minutes respectively; rinsing the substrate with an acidic cleaning solution, hydrofluoric acid, and high-purity deionized water, and drying to obtain a standby substrate.

[0008] As an improvement of an embodiment of the present invention, the "preparation of the metal oxide semiconductor channel layer" specifically includes:

[0009] A metal oxide semiconductor channel layer is deposited on the surface of the high-k metal oxide dielectric layer by a magnetron sputtering device. The initial chamber pressure of the magnetron sputtering device is controlled below 6E-4 Pa. Argon gas with a flow rate of 40 sccm is introduced before sputtering, and the chamber pressure is ≥0.4 Pa. Radio frequency sputtering power of 60-80 W is used for pre-sputtering for 5-10 minutes to clean the surface of the target; Subsequently, a mixed gas with an argon-oxygen ratio of 3:1 is introduced, and the gas flow rate is adjusted to maintain the chamber pressure at 0.6-0.65 Pa, and deposition is carried out at a radio frequency sputtering power of 50-60 W. The sputtering rate is controlled at The rotation speed of the thin film transistor sample to be sputtered is controlled at 5-8 rpm; The target film thickness is set at 10-30 nm, and the thin film transistor sample to be sputtered can be heated during the deposition process; After deposition, a thermal annealing treatment is carried out at 250-300 °C for 0.5-1 hour.

[0010] As an improvement of the embodiment of the present invention, the "depositing a metal electrode on the surface of the metal oxide semiconductor channel layer by sputtering technology as the top electrode of the thin film transistor" specifically includes: adopting a flowing magnetron sputtering method to deposit a metal electrode with a thickness of 80-120 nm on the surface of the metal oxide semiconductor channel layer. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Argon gas is introduced before sputtering and the flow rate is controlled at 80 sccm. The chamber pressure is adjusted to 0.6-0.7 Pa, and pre-sputtering is carried out at a DC sputtering power of 80 W for 12-18 minutes, and then metal electrode deposition is carried out at a DC sputtering power of 100-150 W.

[0011] As an improvement of the embodiment of the present invention, the "depositing an indium tin oxide thin film on the surface of the conductive glass substrate by sputtering technology as the second gate electrode of the thin film transistor" specifically includes: depositing an indium tin oxide thin film with a thickness of 60-80 nm on the surface of the conductive glass substrate. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Argon gas is introduced before sputtering and the flow rate is controlled at 60 sccm. The chamber pressure is adjusted to ≥0.5 Pa, and pre-sputtering is carried out at a radio frequency sputtering power of 80 W for 10 minutes. Subsequently, the argon gas flow rate is increased to 70-80 sccm and the chamber pressure is adjusted to 0.6-0.65 Pa, and deposition is carried out at a radio frequency sputtering power of 100 W. The sputtering rate is about The target film thickness is 60-80 nm. Heating is not required during the sputtering process. After sputtering, thermal annealing is carried out at 300 °C for 1 hour.

[0012] As an improvement of the embodiment of the present invention, when preparing the top electrode, a mask plate with an electrode pattern needs to be attached to the surface of the metal oxide semiconductor channel layer before sputtering the metal.

[0013] To achieve one of the above-mentioned invention purposes, an embodiment of the present invention provides a thin-film transistor based on a high-K metal oxide dielectric layer. The thin-film transistor sequentially includes a first functional layer, a second functional layer, a high-K metal oxide dielectric layer, a metal oxide semiconductor channel layer, and a top electrode. When the substrate is a highly doped single-crystalline silicon, the first functional layer is a first gate electrode, and the second functional layer is a highly doped single-crystalline silicon substrate; when the substrate is a conductive glass, the first functional layer is a conductive glass substrate, and the second functional layer is a second gate electrode.

[0014] As an improvement of an embodiment of the present invention, the highly doped single-crystalline silicon substrate is a P-type <100> crystal orientation highly doped single-crystalline silicon.

[0015] As an improvement of an embodiment of the present invention, the material of the high-K metal oxide dielectric layer is one of gallium oxide, aluminum oxide, or zirconium oxide.

[0016] As an improvement of an embodiment of the present invention, the material of the metal oxide semiconductor channel layer is one of indium oxide, indium gallium zinc oxide, or indium zinc oxide.

[0017] The preparation method of the thin-film transistor based on the high-K metal oxide dielectric layer provided by the embodiment of the present invention has the following advantages:

[0018] 1. The present invention uses magnetron sputtering technology, which can achieve rapid, low-energy consumption, and large-scale growth of metal oxide dielectric layer films, effectively overcoming problems such as low deposition rate of chemical vapor deposition, complex gas system treatment, environmental pollution, and difficulty in local deposition. It also solves the deficiencies of the solution method in terms of film performance, such as poor dielectric performance, high leakage current density, and poor uniformity and compactness.

[0019] 2. The present invention preferably uses gallium oxide as the material of the high-k metal oxide dielectric layer. Gallium oxide has stable chemical properties, is not easily corroded, has high mechanical strength, and stable performance at high temperatures; it has a high dielectric constant, which is beneficial to improving the capacitance density and performance of the device; it has good thermal stability and can maintain the stability of chemical and physical properties at a temperature of up to 1000°C; it has a low leakage current density, which improves the insulation performance and reliability of the thin-film transistor. Description of the Drawings

[0020] Figure 1 is a schematic flow chart of the preparation method of the thin-film transistor based on the high-K metal oxide dielectric layer of the present invention;

[0021] Figure 2 is a schematic structural diagram of the thin-film transistor with a highly doped silicon substrate of the present invention;

[0022] Figure 3 is a schematic structural diagram of the thin-film transistor with a conductive glass substrate of the present invention;

[0023] Figure 4 It is the dielectric strength test chart of gallium oxide, which is the material of the high-K metal oxide thin film described in the present invention. Detailed implementation manners

[0024] The following will describe the present invention in detail in conjunction with the specific implementation manners shown in the accompanying drawings. However, these implementation manners do not limit the present invention, and structural, method, or functional transformations made by those of ordinary skill in the art based on these implementation manners are all included within the protection scope of the present invention.

[0025] If the present invention involves directions (such as up, down, left, right, front, back, outside, inside, etc.) when being described, then the involved directions need to be defined.

[0026] The scope of the embodiments herein includes the entire scope of the claims and all available equivalents of the claims. Herein, the terms "first", "second", etc. are only used to distinguish one element from another element, and do not require or imply any actual relationship or order between these elements. In fact, the first element can also be called the second element, and vice versa. Moreover, the terms "comprising", "including" or any other variants thereof are intended to cover non-exclusive inclusion, so that a structure, device or equipment including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such structure, device or equipment. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of another identical element in the structure, device or equipment including the said element. The various embodiments herein are described in a progressive manner, and the key point of each embodiment is to illustrate the differences from other embodiments. The same and similar parts among the various embodiments can be referred to each other.

[0027] The directions or positional relationships indicated by the terms "longitudinal", "transverse", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. herein are based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and thus cannot be construed as a limitation to the present invention. In the description herein, unless otherwise specified and defined, the terms "installed", "connected", "connected to" should be understood in a broad sense. For example, it can be a mechanical connection or an electrical connection, or it can be the communication inside two elements. It can be directly connected or indirectly connected through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific circumstances.

[0028] The present invention provides a method for fabricating a thin film transistor based on a high-K metal oxide dielectric layer, as Figure 1 shown, comprising the following steps:

[0029] Step 201: Pretreat the substrate: Clean the substrate to obtain a standby substrate; specifically, blow the dust on the surface of the substrate with compressed nitrogen; place the substrate in acetone, isopropyl alcohol, and ethanol in sequence, and clean them with an ultrasonic cleaner for 10 - 20 minutes respectively; rinse the substrate with an acidic cleaning solution, hydrofluoric acid, and high-purity deionized water, and dry it to obtain a standby substrate.

[0030] Here, an acidic cleaning solution such as dilute nitric acid or hydrochloric acid is used to remove metal oxides, organic residues, and other impurities on the surface of the substrate, hydrofluoric acid is used to remove the silicon dioxide oxide layer on the surface of the highly doped single-crystalline silicon substrate 400; high-purity deionized water is used to remove the cleaning solution, hydrofluoric acid, and residues.

[0031] Step 202: When the substrate is a highly doped single-crystalline silicon substrate 400, deposit a metal electrode on the first surface of the highly doped single-crystalline silicon substrate 400 as the first gate electrode 500 of the thin film transistor, and deposit a high-K metal oxide dielectric layer 300 on the second surface of the highly doped single-crystalline silicon substrate 400;

[0032] When the substrate is a conductive glass substrate 600, deposit an indium tin oxide thin film on the surface of the conductive glass substrate as the second gate electrode 700 of the thin film transistor, and deposit a high-K metal oxide dielectric layer 300 on the surface of the second gate electrode 700;

[0033] Here, the "depositing an indium tin oxide thin film on the surface of the conductive glass substrate by sputtering technology as the second gate electrode 700 of the thin film transistor" specifically includes: depositing an indium tin oxide thin film with a thickness of 60 - 80 nm on the surface of the conductive glass substrate 600, the initial chamber pressure of the magnetron sputtering device is lower than 6E - 4 Pa, argon is introduced before sputtering and the flow rate is controlled at 60 sccm, the chamber pressure is adjusted to ≥0.5 Pa, pre-sputter for 10 minutes with a radio frequency sputtering power of 80 W, then increase the argon flow rate to 70 - 80 sccm and adjust the chamber pressure to 0.6 - 0.65 Pa, and deposit with a radio frequency sputtering power of 100 W, the sputtering rate is about The target film thickness is 60 - 80 nm, no heating is required during the sputtering process, and after sputtering, perform thermal annealing at 300 °C for 1 hour.

[0034] In the present invention, the highly doped single-crystalline silicon substrate 400 is a P-type <100>-oriented highly doped single-crystalline silicon. P-type high doping results in a large number of holes in the single-crystalline silicon, endowing it with good electrical conductivity, which can accelerate charge transfer, improve the response speed of thin-film transistors, reduce resistance, and decrease energy consumption. The regular and symmetric atomic arrangement structure of the <100> orientation is conducive to the lattice matching with subsequent functional layers, reducing interface defects, improving flatness and quality. It can be understood that the highly doped single-crystalline silicon substrate 400 can cooperate with other functional layers to provide stable and high-performance support for thin-film transistors, meeting the requirements of high speed, low power consumption, and high integration in fields such as large-scale integrated circuits and flat panel display driving circuits.

[0035] Preparation of the high-K metal oxide dielectric layer 300: Deposition is carried out using a magnetron sputtering device. The initial chamber pressure of the magnetron sputtering device is controlled below 6E-4 Pa. Argon with a flow rate of 50 sccm is introduced before sputtering, and the chamber pressure is ≥0.4 Pa. Radio frequency sputtering power of 100 - 200 W is used for pre-sputtering for 10 - 20 minutes to clean the surface of the target. Subsequently, a mixed gas with an argon-oxygen ratio of 7:1 to 8:1 is introduced, and the gas flow rate is adjusted to maintain the chamber pressure at 0.6 - 0.9 Pa. Deposition is carried out at a radio frequency sputtering power of 200 - 350 W, and the sputtering rate is controlled at The rotation speed of the thin-film transistor sample to be sputtered is controlled at 5 - 8 rpm; the target film thickness is set at 60 - 90 nm, and no external heating is applied during the deposition process; optionally, a thermal annealing treatment is carried out after deposition.

[0036] Here, radio frequency magnetron sputtering is a method of physical vapor deposition (PVD). An inert gas, such as argon, needs to be filled into the vacuum chamber. The radio frequency power supply applies a high-frequency alternating electric field between the target and the substrate, causing the gas to ionize and form a plasma. At the same time, the magnetron device generates a magnetic field on the surface of the target, constraining the movement trajectory of electrons, increasing the collision probability between electrons and gas molecules, and enhancing the plasma density. The positive ions in the plasma are accelerated to bombard the surface of the target, sputtering out target atoms, which are deposited on the substrate to form a thin film. DC magnetron sputtering is also based on the principle of physical vapor deposition. In a vacuum environment, a DC voltage is applied between the target and the substrate through a DC power supply to ionize the filled inert gas to generate a plasma. The magnetic field generated by the magnetron system makes the electrons move in a spiral near the surface of the target, increasing the gas ionization efficiency. The positive ions bombard the target, sputtering out target atoms and depositing them on the substrate to form a thin film. In the present invention, the high-k metal oxide dielectric layer and the metal oxide semiconductor channel layer have diverse material properties. The radio frequency magnetron sputtering technology can avoid sputtering abnormalities caused by charge accumulation. At the same time, the high plasma density it generates can endow the sputtered atoms with high energy, which helps to form a high-quality, dense and uniform thin film structure, ensuring the dielectric properties and semiconductor properties of the thin film, and improving the electrical performance and stability of the thin film transistor. Metal electrodes are usually made of conductive materials. The DC magnetron sputtering equipment has low cost, simple operation and fast deposition rate, can quickly deposit metal on the substrate to form a patterned electrode, improve production efficiency, and contribute to the preparation of high-performance thin film transistors.

[0037] In the present invention, the material of the high-K metal oxide dielectric layer 300 is one of gallium oxide, aluminum oxide or zirconium oxide. Preferably, the material of the high-K metal oxide dielectric layer 300 is gallium oxide. The bandgap of gallium oxide is about 5 eV, and the critical breakdown field strength is as high as about 8 MV / cm. It has good high-temperature resistance and acid resistance. It can be understood that using it as the dielectric layer of the thin film transistor, the relatively wide bandgap can effectively suppress leakage current, reduce power consumption, reduce heat generation to improve stability and lifespan; the high critical breakdown field strength enables it to work stably under high voltage and is suitable for high-power scenarios; the good high-temperature resistance makes its performance stable in high-temperature environments such as aerospace and industrial high-temperature scenarios, enhancing environmental adaptability; the acid resistance can resist acid erosion in the manufacturing process, improve production controllability and yield rate, and can also protect the device and extend its service life in environments where acidic substances may be encountered.

[0038] In practice, when the material of the high-K metal oxide dielectric layer film is gallium oxide, magnetron sputtering equipment is used for deposition. The initial chamber pressure of the magnetron sputtering equipment is lower than 6E-4 Pa. In order to create a high-vacuum environment and reduce the influence of impurity gases on the quality of the deposited film, the high purity of the gallium oxide film is ensured. Process gases are selected as high-purity argon and oxygen to ensure the chemical composition of the film. Before sputtering, argon with a flow rate of 50 sccm is first introduced, and the chamber pressure is adjusted to not less than 0.4 Pa to make the sputtering target glow, which is a necessary condition for plasma generation. Then, pre-sputtering is carried out for 10 minutes at a radio frequency sputtering power of 100 W, which can effectively clean the pollutants on the surface of the gallium oxide target and avoid impurities from mixing into the deposited film. Subsequently, a mixed gas with a ratio of argon to oxygen of 8:1 is introduced, and the actual gas flow rate is adjusted to make the chamber pressure 0.6 - 0.65 Pa, which can ensure the stability and activity of the plasma and is beneficial to the growth of high-quality gallium oxide films. Deposition is carried out at a radio frequency sputtering power of 250 W, which can provide sufficient energy for sputtering target atoms and at the same time control the sputtering rate at The growth rate of the film can be precisely controlled to ensure the uniformity and density of the film. During the deposition process, the thin film transistor sample is rotated at a speed of 5 - 8 rpm, so that the film can be evenly deposited on the substrate. The target film thickness is set to 60 nm according to the requirements of the actual device for the dielectric layer thickness. The deposition process is not heated and no thermal annealing is carried out after completion, which can avoid the influence of high temperature on the substrate and other functional layers, simplify the process steps, reduce costs, and maintain the performance characteristics of the gallium oxide film itself.

[0039] Here, depositing gallium oxide using magnetron sputtering technology at low temperature can make it form an insulating and transparent α, γ or σ-phase gallium oxide dielectric layer film. The prepared gallium oxide film has a high dielectric strength. As Figure 4 shown, the leakage current is not higher than 3 nA under a bias voltage of 100 V, avoiding the stress and defect problems that may be introduced by high-temperature processes.

[0040] When the material of the high-K metal oxide dielectric layer is aluminum oxide, magnetron sputtering equipment is used for deposition. The initial chamber pressure of the magnetron sputtering equipment is lower than 6E-4 Pa, and the process gases are high-purity argon and oxygen. Before sputtering, argon with a flow rate of 50 sccm is first introduced, and the chamber pressure is adjusted to not less than 0.4 Pa to make the sputtering target glow. Then, pre-sputtering is carried out for 20 minutes at a radio frequency sputtering power of 200 W to clean the pollutants on the surface of the aluminum oxide target. Subsequently, a mixed gas with a ratio of argon to oxygen of 7:1 is introduced, and the actual gas flow rate is adjusted to make the chamber pressure 0.8 - 0.9 Pa, and the aluminum oxide dielectric layer is deposited at a radio frequency sputtering power of 350 W. The sputtering rate is During the deposition process, the thin-film transistor sample is rotated at a speed of 5-8 rpm, the target film thickness is 90 nm, the deposition process is not heated, and after the deposition is completed, a thermal annealing treatment is carried out at 300-500 °C for 1 hour.

[0041] Here, pre-sputtering is carried out for 20 minutes at a radio frequency sputtering power of 200 W. Its function is to effectively clean the contaminants on the surface of the alumina target, prevent impurities from mixing into the subsequently deposited thin film, and affect the film quality. A radio frequency sputtering power of 350 W can provide sufficient energy to sputter the target atoms. The sputtering rate is controlled at The growth rate of the thin film can be precisely controlled, which helps to ensure the uniformity and denseness of the thin film. After the deposition is completed, a thermal annealing treatment is carried out at 300-500 °C for 1 hour, which helps to improve the crystal structure of the alumina thin film, release the stress inside the thin film, improve the stability and dielectric properties of the thin film, and further enhance the performance and reliability of the entire thin-film transistor.

[0042] Step 203: Preparation of the metal oxide semiconductor channel layer 200: Deposit the metal oxide semiconductor channel layer 200 on the surface of the high-K metal oxide dielectric layer 300; specifically, use a magnetron sputtering device to deposit the metal oxide semiconductor channel layer 200 on the surface of the high-K metal oxide dielectric layer 300. The initial chamber pressure of the magnetron sputtering device is controlled below 6E-4 Pa. Argon with a flow rate of 40 sccm is introduced before sputtering, and the chamber pressure ≥ 0.4 Pa. Pre-sputtering is carried out for 5-10 minutes at a radio frequency sputtering power of 60-80 W to clean the surface of the target; then a mixed gas with an argon-oxygen ratio of 3:1 is introduced, and the gas flow rate is adjusted to maintain the chamber pressure at 0.6-0.65 Pa, and deposition is carried out at a radio frequency sputtering power of 50-60 W. The sputtering rate is controlled at The rotation speed of the thin-film transistor sample to be sputtered is controlled at 5-8 rpm; the target film thickness is set to 10-30 nm, and the thin-film transistor sample to be sputtered can be optionally heated during the deposition process; after the deposition is completed, a thermal annealing treatment is carried out at 250-300 °C for 0.5-1 hour.

[0043] In the present invention, the material of the metal oxide semiconductor channel layer 200 is one of indium oxide, indium gallium zinc oxide or indium zinc oxide.

[0044] When the material of the metal oxide semiconductor channel layer is indium gallium zinc oxide, an indium gallium zinc oxide composite target with indium oxide, gallium oxide and zinc oxide mixed in a ratio of 1:1:1 is used, and deposition is carried out using a magnetron sputtering device. The initial chamber pressure of this device is lower than 6E4 Pa; before sputtering, argon gas with a flow rate of 40 sccm is first introduced, and the chamber pressure is adjusted to not less than 0.4 Pa to make the sputtering target glow. Then, pre-sputtering is carried out for 10 minutes with a radio frequency sputtering power of 80 W to clean the surface contaminants of the indium gallium zinc oxide target; subsequently, a mixed gas with a ratio of argon to oxygen of 3:1 is introduced, and the actual gas flow rate is regulated to adjust the chamber pressure to 0.6 - 0.65 Pa. The thin film transistor sample is heated to 200 °C, and indium gallium zinc oxide channel layer deposition is carried out with a radio frequency sputtering power of 60 W, and the sputtering rate is During the deposition process, the thin film transistor sample is rotated at a speed of 5 - 8 rpm, the target film thickness is 30 nm, and after deposition, a thermal annealing treatment is carried out at 300 °C for 1 hour.

[0045] When the material of the metal oxide semiconductor channel layer is indium zinc oxide, an indium zinc oxide composite target with indium oxide and zinc oxide mixed in a ratio of 9:1 is used, and deposition is carried out using a magnetron sputtering device. The initial chamber pressure of this device is lower than 6E4 Pa; before sputtering, argon gas with a flow rate of 40 sccm is first introduced, and the chamber pressure is adjusted to not less than 0.4 Pa to make the sputtering target glow. Then, pre-sputtering is carried out for 10 minutes with a radio frequency sputtering power of 80 W to clean the surface contaminants of the indium zinc oxide target; subsequently, a mixed gas with a ratio of argon to oxygen of 3:1 is introduced, and the actual gas flow rate is regulated to adjust the chamber pressure to 0.6 - 0.65 Pa. The thin film transistor sample is heated to 200 °C, and indium zinc oxide channel layer deposition is carried out with a radio frequency sputtering power of 60 W, and the sputtering rate is During the deposition process, the thin film transistor sample is rotated at a speed of 5 - 8 rpm, the target film thickness is 30 nm, and after deposition, a thermal annealing treatment is carried out at 300 °C for 1 hour.

[0046] Here, after deposition, a thermal annealing treatment is carried out at a preset temperature for a certain period of time, which helps to improve the crystal structure of the metal oxide, improve its semiconductor performance, and enhance the stability and reliability of the entire thin film transistor.

[0047] Step 204: Preparation of the metal electrode: Deposit a metal electrode on the surface of the metal oxide semiconductor channel layer 200 as the top electrode 100 of the thin film transistor. Specifically, use the flowing magnetron sputtering method to deposit a metal electrode with a thickness of 80 - 120 nm on the surface of the metal oxide semiconductor channel layer 200. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, introduce argon and control the flow rate at 80 sccm, adjust the chamber pressure to 0.6 - 0.7 Pa, pre-sputter for 12 - 18 minutes with a DC sputtering power of 80 W, and then deposit the metal electrode with a DC sputtering power of 100 - 150 W.

[0048] Here, when actually preparing the top electrode 100, a mask plate 101 with an electrode pattern needs to be attached to the surface of the metal oxide semiconductor channel layer 200 before sputtering the metal. Specifically, first, it is necessary to ensure that the surface of the high-K metal oxide dielectric layer 300 is clean and dry, without residues of impurities and contaminants, so as not to affect the bonding effect of the mask plate 101 and the subsequent sputtering quality. Align the mask plate 101 with an electrode pattern with the predetermined position on the surface of the high-K metal oxide dielectric layer 300, so that the electrode pattern on the mask plate 101 completely matches the electrode layout designed for the thin film transistor. Then, closely attach the mask plate 101 to the surface of the high-K metal oxide dielectric layer 300. Here, the mask plate 101 can define the deposition area of the sputtered metal through its pre-designed electrode pattern. It can be understood that attaching the mask plate 101 with an electrode pattern to the surface of the high-K metal oxide dielectric layer 300 avoids additional process steps such as complex lithography and etching, simplifies the preparation process, and greatly improves the production efficiency. At the same time, due to the accuracy of the mask plate 101, it can ensure the dimensional accuracy and shape accuracy of the top electrode 100, making the electrode layout of the thin film transistor more precise and standardized, which helps to improve the performance consistency and stability of the thin film transistor.

[0049] The present invention also provides a thin film transistor based on a high-K metal oxide dielectric layer, such as Figure 2 、 Figure 3As shown, the thin film transistor sequentially includes a first functional layer, a second functional layer, a high-K metal oxide dielectric layer 300, a metal oxide semiconductor channel layer 200, and a top electrode 100. When the substrate is a highly doped single-crystalline silicon, the first functional layer is a first gate electrode 500, and the second functional layer is a highly doped single-crystalline silicon substrate 400; when the substrate is a conductive glass, the first functional layer is a conductive glass substrate 600, and the second functional layer is a second gate electrode 700. Here, the highly doped single-crystalline silicon has good electrical conductivity and can act as a medium for charge transport. After the first gate electrode 500 is disposed on the first surface of the highly doped single-crystalline silicon substrate, the carriers in the highly doped single-crystalline silicon substrate 400 can be effectively regulated. When a voltage is applied to the gate electrode, the electric field affects the high-K metal oxide dielectric layer 300 and the metal oxide semiconductor channel layer 200 above through the highly doped single-crystalline silicon substrate 400, thereby realizing the control of the current in the channel. Compared with the highly doped single-crystalline silicon, the conductive glass has weaker electrical conductivity and carrier regulation ability. By disposing the second gate electrode 700 on the surface of the conductive glass substrate 600, an effective electric field can be constructed above the conductive glass substrate 600. When a voltage is applied to the second gate electrode 700, the electric field can affect the metal oxide semiconductor channel layer 200 through the high-K metal oxide dielectric layer 300, thereby controlling the current in the channel and effectively solving the problem of insufficient carrier regulation ability of the conductive glass substrate 600. Since the conductive glass itself has good transparency, it is suitable for applications in some occasions with requirements for transparency, such as the field of flat panel display and the like.

[0050] Example 1:

[0051] Fabricate a thin film transistor with a high-K metal oxide dielectric layer 300 being gallium oxide (substrate is highly doped single-crystalline silicon)

[0052] Step 1: Pretreat the substrate. Take a P-type <100> crystal-oriented highly doped single-crystalline silicon substrate 400 and blow the dust on its surface with compressed nitrogen. Then, immerse the substrate 400 in acetone, isopropanol, and ethanol in sequence, and clean it with an ultrasonic cleaner for 15 minutes respectively. After that, rinse the substrate with a dilute nitric acid solution to remove the metal oxides on the surface; use hydrofluoric acid to remove the silicon dioxide oxide layer on the surface; then rinse the residual cleaning solution, hydrofluoric acid, and other residues with high-purity deionized water, and finally dry it for standby.

[0053] Step 2: Preparation of the gate electrode and gallium oxide dielectric layer: Deposit a metal (such as aluminum) as the first gate electrode 500 on the first surface of the substrate 400 by magnetron sputtering. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Argon is introduced and the flow rate is controlled at 80 sccm. The chamber pressure is adjusted to 0.6 Pa, and deposition is carried out at a DC sputtering power of 150 W with a deposition thickness of 80 nm. Deposit the gallium oxide dielectric layer 300 on the second surface of the substrate 400. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, first introduce argon with a flow rate of 50 sccm and adjust the chamber pressure to not less than 0.4 Pa; then pre-sputter for 10 minutes at an RF sputtering power of 100 W. Subsequently, introduce a mixed gas of argon and oxygen with a ratio of 8:1, and regulate the actual gas flow rate to make the chamber pressure 0.6 Pa, and carry out deposition at an RF sputtering power of 250 W, and control the sputtering rate at During the deposition process, the thin-film transistor sample is rotated at a speed of 6 rpm, and the target film thickness is set to 60 nm. The deposition process is not heated, and no thermal annealing treatment is carried out after completion.

[0054] Step 3: Preparation of the indium oxide semiconductor channel layer: Deposit the indium oxide channel layer on the surface of the gallium oxide dielectric layer. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, first introduce argon with a flow rate of 40 sccm and adjust the chamber pressure to 0.4 Pa, then pre-sputter for 5 minutes at an RF sputtering power of 60 W. Subsequently, introduce a mixed gas of argon and oxygen with a ratio of 3:1, and regulate the gas flow rate ratio to 30 sccm:10 sccm to adjust the chamber pressure to 0.6 Pa, and carry out deposition of the indium oxide channel layer at an RF sputtering power of 50 W, and the sputtering rate is During the deposition process, the thin-film transistor sample is rotated at a speed of 6 rpm, the target film thickness is 10 nm, the deposition process is not heated, and after deposition is completed, thermal annealing treatment is carried out at 250 °C for 0.5 hours.

[0055] Step 4: Preparation of the top electrode: Attach a mask plate 101 with an electrode pattern on the surface of the indium oxide channel layer 200. Deposit metal nickel as the top electrode 100 by magnetron sputtering. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, introduce argon and control the flow rate at 80 sccm, adjust the chamber pressure to 0.65 Pa, pre-sputter for 15 minutes at a DC sputtering power of 80 W, and then carry out deposition of the metal electrode at a DC sputtering power of 120 W with a deposition thickness of 100 nm. Finally, a thin-film transistor with a high-doped single-crystalline silicon substrate and a high-K metal oxide dielectric layer 300 of gallium oxide is obtained.

[0056] Example 2

[0057] Preparation of a thin-film transistor with a high-K metal oxide dielectric layer of gallium oxide (the substrate is conductive glass)

[0058] Step 1: Pretreat the substrate. Take a conductive glass substrate 600, put it into acetone, isopropyl alcohol, and ethanol in sequence, clean it with an ultrasonic cleaner for 15 minutes respectively, then rinse it with deionized water, and finally dry it with nitrogen.

[0059] Step 2: Fabricate the gate electrode and the gallium oxide dielectric layer. Deposit an indium tin oxide thin film on the surface of the conductive glass substrate 600 as the second gate electrode 700 by sputtering technology. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, introduce argon gas and control the flow rate at 60 sccm, adjust the chamber pressure to 0.6 Pa, and pre-sputter for 10 minutes at a radio frequency sputtering power of 80 W. Subsequently, increase the argon gas flow rate to 75 sccm and adjust the chamber pressure to 0.62 Pa, and deposit at a radio frequency sputtering power of 100 W. The sputtering rate is about The target film thickness is 70 nm. Heating is not required during the sputtering process. After sputtering, perform thermal annealing at 300 °C for 1 hour. Deposit the gallium oxide dielectric layer 300 on the surface of the second gate electrode 700 (the specific process is the same as the preparation of the gallium oxide dielectric layer in Step 2 of Example 1).

[0060] Step 3: Fabricate the indium zinc oxide semiconductor channel layer. Use an indium zinc oxide composite target with indium oxide and zinc oxide mixed in a ratio of 9:1 to deposit the indium zinc oxide channel layer on the surface of the gallium oxide dielectric layer 300. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, first introduce argon gas with a flow rate of 40 sccm, adjust the chamber pressure to not less than 0.4 Pa to make the sputtering target glow, then pre-sputter for 10 minutes at a radio frequency sputtering power of 80 W. Subsequently, introduce a mixed gas of argon and oxygen with a ratio of 3:1, and adjust the gas flow rate ratio to 60 sccm:20 sccm, so that the chamber pressure is adjusted to 0.65 Pa. Heat the thin film transistor sample to 200 °C and deposit the indium zinc oxide channel layer at a radio frequency sputtering power of 60 W. The sputtering rate is During the deposition process, rotate the thin film transistor sample at a speed of 6 rpm. The target film thickness is 30 nm. After deposition, perform thermal annealing treatment at 300 °C for 1 hour.

[0061] Step 4: Fabricate the top electrode. Attach a mask plate 101 with an electrode pattern on the surface of the indium zinc oxide channel layer 200. Deposit metal nickel as the top electrode 100 by magnetron sputtering. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, introduce argon gas and control the flow rate at 80 sccm, adjust the chamber pressure to 0.65 Pa, pre-sputter for 15 minutes at a direct current sputtering power of 80 W, and then deposit the metal electrode at a direct current sputtering power of 120 W. The deposition thickness is 100 nm. Finally, a thin film transistor with a conductive glass substrate and a high-K metal oxide dielectric layer 300 being gallium oxide is obtained.

[0062] Example 3

[0063] A thin-film transistor with a high-K metal oxide dielectric layer 300 made of alumina (the substrate is highly doped single-crystalline silicon)

[0064] Step 1: Pretreat the substrate: Take a P-type <100> crystal orientation highly doped single-crystalline silicon substrate 400, and blow off the surface dust with compressed nitrogen. Immerse the substrate 400 in acetone, isopropyl alcohol, and ethanol in sequence, and clean it with an ultrasonic cleaner for 15 minutes each. Rinse it with a dilute nitric acid solution to remove metal oxides, remove the surface oxide layer with hydrofluoric acid, and then rinse the residue with high-purity deionized water and dry it for standby.

[0065] Step 2: Prepare the gate electrode and the alumina dielectric layer: Magnetron sputter a metal (such as aluminum) on the first surface of the substrate 400 as the first gate electrode 500. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa, introduce argon and control the flow rate at 80 sccm, adjust the chamber pressure to 0.6 Pa, and deposit at a DC sputtering power of 150 W with a deposition thickness of 80 nm. Deposit the alumina dielectric layer 300 on the second surface of the substrate 400. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, first introduce argon with a flow rate of 50 sccm, adjust the chamber pressure to not less than 0.4 Pa to make the sputtering target glow, and then pre-sputter for 20 minutes with an RF sputtering power of 200 W. Subsequently, introduce a mixed gas of argon and oxygen with a ratio of 7:1, and adjust the gas flow rate ratio to 49 sccm:7 sccm to make the chamber pressure adjusted to 0.8 - 0.9 Pa, and deposit the alumina dielectric layer with an RF sputtering power of 350 W. The sputtering rate is During the deposition process, rotate the thin-film transistor sample at a speed of 6 rpm, the target film thickness is 90 nm, no heating is performed during the deposition process, and after the deposition is completed, perform a thermal annealing treatment at 400 °C for 1 hour.

[0066] Step 3: Prepare the indium oxide semiconductor channel layer: Deposit the indium oxide channel layer on the surface of the alumina dielectric layer 300 (the specific process is the same as the preparation of the indium oxide semiconductor channel layer in Step 3 of Example 1).

[0067] Step 4: Prepare the top electrode: Attach a mask plate 101 with an electrode pattern on the surface of the indium oxide channel layer 200. Deposit metal nickel as the top electrode 100 by magnetron sputtering. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, introduce argon and control the flow rate at 80 sccm, adjust the chamber pressure to 0.65 Pa, pre-sputter for 15 minutes with a DC sputtering power of 80 W, and then deposit the metal electrode with a DC sputtering power of 120 W with a deposition thickness of 100 nm to obtain a thin-film transistor with a highly doped single-crystalline silicon substrate and a high-K metal oxide dielectric layer 300 made of alumina.

[0068] Example 4

[0069] A thin-film transistor with a high-K metal oxide dielectric layer 300 made of alumina (the substrate is conductive glass)

[0070] Step 1: Pretreat the substrate. Take the conductive glass substrate 600 and ultrasonically clean it with acetone, isopropyl alcohol, and ethanol for 15 minutes each in sequence. After rinsing with deionized water, dry it with nitrogen gas.

[0071] Step 2: Prepare the gate electrode and the alumina dielectric layer. Deposit an indium tin oxide thin film on the surface of the conductive glass substrate 600 as the second gate electrode 700 (the preparation of the gate electrode is the same as in Step 3 of Example 2). Deposit the alumina dielectric layer 300 on the surface of the second gate electrode 700 (the preparation of the alumina dielectric layer is the same as in Step 2 of Example 3).

[0072] Step 3: Prepare the indium gallium zinc oxide semiconductor channel layer. Use an indium gallium zinc oxide composite target with indium oxide, gallium oxide, and zinc oxide mixed in a ratio of 1:1:1. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, first introduce argon gas with a flow rate of 40 sccm, and adjust the chamber pressure to not less than 0.4 Pa to make the sputtering target glow. Then pre-sputter for 10 minutes with an RF sputtering power of 80 W. Subsequently, introduce a mixed gas of argon and oxygen with a ratio of 3:1, and control the actual gas flow rate to adjust the chamber pressure to 0.65 Pa. Heat the thin-film transistor sample to be sputtered to 200 °C, and deposit the indium gallium zinc oxide channel layer with an RF sputtering power of 60 W. The sputtering rate is During the deposition process, rotate the thin-film transistor sample at a speed of 6 rpm. The target film thickness is 30 nm. After the deposition is completed, perform a thermal annealing treatment at 300 °C for 1 hour.

[0073] Step 4: Prepare the top electrode. Attach a mask plate 101 with an electrode pattern on the surface of the indium gallium zinc oxide channel layer 200. Deposit metal nickel as the top electrode 100 by magnetron sputtering. The initial chamber pressure of the magnetron sputtering device is lower than 6E-4 Pa. Before sputtering, introduce argon gas and control the flow rate at 80 sccm, adjust the chamber pressure to 0.65 Pa, pre-sputter for 15 minutes with a DC sputtering power of 80 W, and then deposit the metal electrode with a DC sputtering power of 120 W. The deposition thickness is 100 nm, obtaining a thin-film transistor with a conductive glass substrate and a high-K metal oxide dielectric layer 300 made of alumina.

[0074] Table 1 Comparison table of the performance of the thin-film transistors prepared in each example

[0075]

[0076]

[0077] Here, the on-off ratio of the thin-film transistor refers to the ratio of the current when the transistor is on to the current when it is off. The higher the ratio, the better the switching performance. The threshold voltage is the gate voltage required to change the transistor from the off state to the on state, and its stability is very important. The subthreshold swing is the change amplitude of the drain current when the gate voltage changes by one unit in the subthreshold region. The smaller this value, the better the switching performance. The carrier mobility is used to measure the transmission speed of carriers in the semiconductor material. The higher the mobility, the better the transistor performance. From the table data, it can be seen that the on-off ratios of Examples 1-4 of the present invention are in the range of 1.46×10 6 ~1.96×10 6 , far exceeding 5.94×10 5 of the solution method of the comparative example. The thin film grown by the magnetron sputtering technology is uniform and dense, reducing interface defects, effectively improving the on-off ratio, and reflecting the advantages of this technology. The threshold voltages of the highly doped single-crystalline silicon substrates in Examples 1 and 3 are 0.12V and 0.04V respectively, and the threshold voltages of the conductive glass substrates in Examples 2 and 4 are both around 10V, indicating that the threshold voltage stability of the thin-film transistors in the embodiments of the present invention is better. Although the subthreshold swing of the embodiments is higher than that of the solution method of the comparative example, the gallium oxide dielectric layer preferably used in the present invention has a low leakage current density, high insulation performance and reliability, making up for the deficiency of the subthreshold swing. The carrier mobilities of the highly doped single-crystalline silicon substrates used in Examples 1 and 3 are relatively high (78.3 cm 2 / V·s and 89.2 cm 2 / V·s). The gallium oxide dielectric layer has stable high-temperature performance, providing a stable environment for carrier migration and helping to improve the carrier mobility, indicating that the materials and technologies used in the present invention effectively improve the comprehensive performance of the thin-film transistor.

[0078] It should be understood that although this specification is described according to embodiments, not each embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0079] The series of detailed descriptions listed above are only specific descriptions of the feasible embodiments of the present invention, and they are not used to limit the protection scope of the present invention. Any equivalent embodiments or changes made without departing from the technical spirit of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for fabricating a thin film transistor with a high-K metal oxide as the dielectric layer, characterized in that It includes the following steps: Pre-treating the substrate: cleaning the substrate to obtain a standby substrate; When the substrate is a highly doped single-crystalline silicon substrate (400), depositing a metal electrode on the first surface of the highly doped single-crystalline silicon substrate (400) as the first gate electrode (500) of the thin-film transistor, and depositing a high-K metal oxide dielectric layer (300) on the second surface of the highly doped single-crystalline silicon substrate (400); When the substrate is a conductive glass substrate (600), depositing an indium tin oxide film on the surface of the conductive glass substrate as the second gate electrode (700) of the thin-film transistor, and depositing a high-K metal oxide dielectric layer (300) on the surface of the second gate electrode (700); Preparation of high-K metal oxide dielectric layer (300): Deposition is carried out using a magnetron sputtering device. The initial chamber pressure of the magnetron sputtering device is controlled below 6E-4 Pa. Argon with a flow rate of 50 sccm is introduced before sputtering, and the chamber pressure is ≥0.4 Pa. Radio frequency sputtering power of 100 - 200 W is used for pre-sputtering for 10 - 20 minutes to clean the surface of the target; Subsequently, a mixed gas with an argon-oxygen ratio of 7:1 to 8:1 is introduced, and the gas flow rate is adjusted to maintain the chamber pressure at 0.6 - 0.9 Pa, and deposition is carried out at a radio frequency sputtering power of 200 - 350 W, and the sputtering rate is controlled at The rotation speed of the thin film transistor sample to be sputtered is controlled at 5 - 8 rpm; The target film thickness is set at 60 - 90 nm, and no external heating is applied during the deposition process; Optionally, a thermal annealing treatment is carried out after the deposition; Preparation of the metal oxide semiconductor channel layer (200): depositing a metal oxide semiconductor channel layer (200) on the surface of the high-K metal oxide dielectric layer (300); Preparation of the metal electrode: depositing a metal electrode on the surface of the metal oxide semiconductor channel layer (200) as the top electrode (100) of the thin-film transistor.

2. The method for manufacturing a thin film transistor according to claim 1, wherein The "cleaning the substrate to obtain a standby substrate" specifically includes: blowing off the dust on the surface of the substrate with compressed nitrogen; placing the substrate in acetone, isopropyl alcohol, and ethanol in sequence, and respectively cleaning with an ultrasonic cleaner for 10 - 20 minutes; rinsing the substrate with an acidic cleaning solution, hydrofluoric acid, and high-purity deionized water, and drying to obtain a standby substrate.

3. The method for manufacturing a thin film transistor according to claim 1, wherein The "preparation of the metal oxide semiconductor channel layer (200)" specifically includes: A metal oxide semiconductor channel layer (200) is deposited on the surface of the high-K metal oxide dielectric layer (300) by using a magnetron sputtering device. The initial chamber pressure of the magnetron sputtering device is controlled below 6E-4 Pa. Argon with a flow rate of 40 sccm is introduced before sputtering, and the chamber pressure is ≥ 0.4 Pa. Radio frequency sputtering power of 60 - 80 W is used for pre-sputtering for 5 - 10 minutes to clean the surface of the target; Subsequently, a mixed gas with an argon-oxygen ratio of 3:1 is introduced, and the gas flow rate is adjusted to maintain the chamber pressure at 0.6 - 0.65 Pa, and deposition is carried out with a radio frequency sputtering power of 50 - 60 W, and the sputtering rate is controlled at The rotation speed of the thin film transistor sample to be sputtered is controlled at 5 - 8 rpm; The target film thickness is set to 10 - 30 nm, and the thin film transistor sample to be sputtered can be heated during the deposition process; After deposition, thermal annealing treatment is carried out at 250 - 300 °C for 0.5 - 1 hour.

4. The method for manufacturing a thin film transistor according to claim 1, wherein The "depositing a metal electrode on the surface of the metal oxide semiconductor channel layer (200) as the top electrode (100) of the thin-film transistor by sputtering technology" specifically includes: adopting a flowing magnetron sputtering method to deposit a metal electrode with a thickness of 80 - 120 nm on the surface of the metal oxide semiconductor channel layer (200). The initial chamber pressure of the magnetron sputtering device is lower than 6E - 4 Pa. Argon is introduced before sputtering and the flow rate is controlled at 80 sccm. The chamber pressure is adjusted to 0.6 - 0.7 Pa, and pre-sputtering is carried out for 12 - 18 minutes with a DC sputtering power of 80 W, and then the metal electrode is deposited with a DC sputtering power of 100 - 150 W.

5. The method for manufacturing a thin film transistor according to claim 1, characterized in that, The step of "depositing an indium tin oxide thin film on the surface of the conductive glass substrate as the second gate electrode (700) of the thin film transistor" specifically includes: depositing an indium tin oxide thin film with a thickness of 60-80 nm on the surface of the conductive glass substrate (600), the initial chamber pressure of the magnetron sputtering device being lower than 6E-4 Pa, introducing argon before sputtering and controlling the flow rate at 60 sccm, adjusting the chamber pressure to ≥0.5 Pa, pre-sputtering for 10 minutes at a radio frequency sputtering power of 80 W, then increasing the argon flow rate to 70-80 sccm and adjusting the chamber pressure to 0.6-0.65 Pa, and depositing at a radio frequency sputtering power of 100 W, the sputtering rate being approximately The target film thickness is 60-80 nm, heating is not required during the sputtering process, and after sputtering, thermal annealing is performed at 300 °C for 1 hour.

6. The method for manufacturing a thin film transistor according to claim 1, wherein When preparing the top electrode (100), a mask plate (101) with an electrode pattern needs to be attached to the surface of the metal oxide semiconductor channel layer 200 before sputtering the metal.

7. A thin film transistor based on a high-K metal oxide dielectric layer, characterized in that, The thin-film transistor sequentially includes a first functional layer, a second functional layer, a high-K metal oxide dielectric layer (300), a metal oxide semiconductor channel layer (200), and a top electrode (100). When the substrate is a highly doped single-crystalline silicon, the first functional layer is the first gate electrode (500), and the second functional layer is the highly doped single-crystalline silicon substrate (400); when the substrate is a conductive glass, the first functional layer is the conductive glass substrate (600), and the second functional layer is the second gate electrode (700).

8. The thin film transistor according to claim 7, wherein The highly doped single-crystalline silicon substrate (400) is a P-type <100> crystal orientation highly doped single-crystalline silicon.

9. The thin film transistor according to claim 7, wherein The material of the high-K metal oxide dielectric layer (300) is one of gallium oxide, aluminum oxide or zirconium oxide.

10. The thin film transistor according to claim 7, wherein, The material of the metal oxide semiconductor channel layer (200) is one of indium oxide, indium gallium zinc oxide or indium zinc oxide.

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