Double-sided chip test fixture capable of being quickly locked
By designing the direct connection of the limit structure and RF cable assembly, the problems of poor locking, large signal transfer loss and poor heat dissipation effect of the double-sided chip test fixture in the prior art are solved, and efficient and accurate chip testing is achieved.
Patent Information
- Application Number
- CN202510494499.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-18
- Publication Date
- 2025-08-05
- Estimated Expiration
- 2045-04-18
AI Technical Summary
When testing double-sided RF chips, it is difficult to achieve an efficient and accurate locking structure, resulting in poor grounding, large signal transfer loss and poor heat dissipation effect.
A double-sided chip test fixture that can be fast locked is designed, and the maximum downward stroke is limited by limiting the chip, directly connecting the chip through the RF cable assembly, reducing signal transfer loss, and setting a heat dissipation structure at key locations to improve heat dissipation performance.
It realizes efficient and accurate testing of double-sided chips, reduces signal transfer loss, improves voltage standing wave ratio performance, and enhances heat dissipation effect to avoid chip damage.
Smart Images

Figure CN120427950A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a chip testing fixture, in particular to a double-sided chip testing fixture that can be quickly locked. Background Art
[0002] With the development of highly integrated processes, RF circuits are becoming widely used. Chips with the same size have more powerful functions. Single-sided packaging designs can no longer meet chip testing requirements. SIP double-sided chip packaging has become the mainstream development of high-end RF components. For example, the test device disclosed in the invention application with publication number CN110441640A can only test single-sided RF integrated circuits. When testing circuit boards or packaged chips with double-sided pads or components, the device needs to test both sides separately, which greatly reduces test efficiency.
[0003] Spring probes are typically used to test chip performance parameters when mounting the chip in a fixture. However, SIP double-sided RF chips have very strict grounding requirements, requiring simultaneous contact between the top and bottom contact points and the spring probes, and good ground matching. This cannot be achieved by simply clamping the chip with the probes, requiring a locking structure to hold the chip in place. For example, the double-sided test device disclosed in utility model application publication number CN 219065558U features a chip locking structure and an additional spring structure to prevent crushing. However, excessive downward travel can over-compress the springs, potentially damaging the chip and contacts.
[0004] The RF signal of the chip in the chip test fixture needs to be transmitted to the external standard interface through the printed circuit board or cable inside the fixture. The connection method between the probe that contacts the RF chip and the cable or printed circuit board is related to the RF performance of the entire link. The test machine socket disclosed in the utility model application with announcement number CN 211697911U has an RF link transmission structure as follows: one end of the spring pin is connected to the chip pad, and the other end is connected to the package substrate. The RF cable assembly is soldered to the package substrate and led to the external RF interface. That is, the transmission of the RF signal undergoes the following three transfers: chip → spring pin → package substrate → cable assembly. This transmission method that undergoes multiple transfers will introduce more transfer losses. At the same time, the signal reflection at the transfer point will also affect the voltage standing wave ratio performance of the link.
[0005] When testing a chip, heat is generated, which causes the temperature of the test device to rise, which may cause damage to the test device and the chip. It is necessary to design a heat dissipation structure in the chip testing device to prevent the device temperature from being too high. For example, the chip testing device disclosed in the utility model application with announcement number CN 216411489U achieves heat dissipation of the chip testing device by adding heat dissipation holes on both sides of the device and setting multiple internal and external fans. The chip testing device disclosed in the utility model application with announcement number CN 216979234 U achieves heat dissipation by adding through holes and through grooves in the base and the upper cover. The heat dissipation structure of these two devices is to add a heat dissipation structure and a fan to the device casing, and the heat dissipation effect is poor. Summary of the Invention
[0006] In order to achieve efficient and accurate testing of chips and improve the reliability and testing efficiency of chip testing, the present invention provides a double-sided chip testing fixture that can be quickly locked.
[0007] The purpose of the present invention is to be achieved by adopting the following technical solutions. A double-sided chip test fixture that can be quickly locked proposed according to the present invention includes a detachably connected upper shell and lower shell, the top of the upper shell is threadedly connected to a stud, the top of the stud is provided with a knob, a pressure plate is provided in the upper shell that is rotatably connected to the bottom of the stud, the bottom of the pressure plate is connected to the top surface of the upper RF mounting plate through a pressure spring, an upper common ground test plate is fixed below the upper RF mounting plate, a pressing piece is slidably passed through the upper RF mounting plate and the upper common ground test plate, the top of the pressing piece is fixed to the pressure plate, and the bottom end presses the upper common ground test plate upward to compress the pressure spring, a limiting piece is provided on the upper shell for stopping the pressure plate from moving downward to avoid crushing the pressure spring, a chip mounting area I is provided at the lower part of the upper common ground test plate, a chip limiting frame is provided at the top of the lower shell, and a chip limiting frame is provided at the upper part for matching with the chip mounting area I to accommodate the chip to be tested The chip mounting area II is a chip mounting area II, and a lower common ground test board and a test board are sequentially arranged below the chip limit frame. A heat sink is provided on the test board, and a fan is arranged below the lower shell; the upper RF mounting plate and the upper common ground test board are fixed with corresponding RF contacts I, and a RF interface I is provided on the upper shell. The tail of the RF contact I is connected to the RF interface I through the RF cable assembly I, and the spring pin contact of the RF contact I and the elastic spring pin component on the upper common ground test board are used to contact the upper surface of the chip to be tested, and the lower common ground test board and the test board are also fixed with corresponding RF contacts II, and a RF interface II is provided on the lower shell. The RF contact II is connected to the RF interface II through the RF cable assembly II, and the spring pin contact of the RF contact II and the spring spring pin component on the lower common ground test board are used to contact the lower surface of the chip to be tested.
[0008] Furthermore, locking buckles are hingedly provided on both sides of the upper shell, and a locking spring is provided between the upper end of the locking buckle and the outer side surface of the upper shell. The protrusion on the inner side of the lower end of the locking buckle is stuck in the groove of the outer side wall of the lower shell. When the upper end of the locking buckle is pressed, the locking spring is compressed and contracted, causing the lower end of the locking buckle to move outward and disengage from the groove of the outer side wall of the lower shell.
[0009] Furthermore, the pressure plate is an inverted U-shaped structure, including a top plate and side walls located on both sides of the lower part of the top plate. The pressure plate cover is above the upper RF mounting plate, and a pressure spring is provided between the bottom end of the side wall of the pressure plate and the upper RF mounting plate.
[0010] Furthermore, a limit screw is fixedly provided on the side wall of the upper shell, a U-shaped groove is provided at the bottom of the side wall of the pressure plate, the opening of the U-shaped groove is provided at the bottom of the side wall of the pressure plate, and the limit screw is slidingly provided in the U-shaped groove.
[0011] Furthermore, a limiting groove is provided at the bottom of the knob, and the limiting groove is an incomplete circular ring groove. A limiting guide pin is provided on the top surface of the upper shell, and the limiting guide pin is slidably provided in the limiting groove.
[0012] Furthermore, the bottom surface of the upper common ground test board is provided with a rectangular bump structure and a guide pin hole structure, and the chip limit frame is provided with a rectangular groove matching the rectangular bump structure and a positioning guide pin matching the guide pin hole structure.
[0013] Furthermore, the chip mounting area I is protrudingly arranged on the lower surface of the upper common test board, and a plurality of limiting protrusions are distributed around the chip mounting area I for limiting the chip to be tested to the chip mounting area I; the chip mounting area II is recessed on the chip limiting frame, and a plurality of limiting grooves are distributed around the chip mounting area II for limiting the chip to be tested to the chip mounting area II. When the chip mounting area II is aligned and matched with the chip mounting area I, the limiting grooves cooperate with the limiting protrusions.
[0014] Furthermore, the RF contact I and RF contact II both include an insulator, a spring pin, and an outer shell of a flange structure. The RF contact I is fixed to the upper RF mounting plate via the flange structure, and the RF contact II is fixed to the test board via the flange structure.
[0015] Furthermore, one side of the test board is connected to a socket.
[0016] Furthermore, the bottom of the lower shell is arranged on the fan, a fan protective cover is provided on the side of the fan facing the lower shell, and the fan is arranged on the fan base.
[0017] Compared with the prior art, the present invention is beneficial in that:
[0018] The present invention designs a chip locking structure capable of limiting the maximum downward pressing stroke, which is applied to a double-sided chip testing fixture to avoid chip damage.
[0019] The present invention installs a spring pin into an RF contact piece connected to an RF cable assembly. The core of the RF cable assembly is directly connected to the tail of the spring pin. At this time, the transmission path of the RF signal is: chip → cable assembly equipped with a spring pin. This solution reduces the switching loss in the link, can reduce the insertion loss of the test, and can improve the voltage standing wave ratio of the link, thereby achieving accurate testing.
[0020] The present invention designs a heat dissipation structure at a location where heat is generated in a chip testing device, so as to improve the heat dissipation performance of the testing device.
[0021] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, which can be implemented in accordance with the contents of the specification, and to make the objects, features and advantages of the present invention more obvious and easy to understand, the following preferred embodiments are specifically cited and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1 A partial cross-sectional schematic diagram of an embodiment of a double-sided chip testing fixture capable of rapid locking according to the present invention;
[0023] Figure 2 for Figure 1 3D schematic diagram of
[0024] Figure 3 for Figure 2 A three-dimensional schematic diagram of the upper and middle surface test assembly;
[0025] Figure 4 for Figure 3 A three-dimensional schematic diagram of the middle knob locking structure;
[0026] Figure 5 for Figure 3 Schematic diagram of the limiting structure of the middle knob and the upper rectangular shell;
[0027] Figure 6 for Figure 3 Schematic diagram of the wiring form of the RF cable assembly;
[0028] Figure 7 for Figure 6 A three-dimensional schematic diagram of the radio frequency contact;
[0029] Figure 8 for Figure 3 Bottom diagram of ;
[0030] Figure 9 for Figure 2 A three-dimensional schematic diagram of the middle and lower surface test assembly;
[0031] Figure 10 for Figure 9 The top schematic diagram of
[0032] Figure 11 for Figure 9 Schematic diagram of the structural distribution of the heat sink.
[0033] Reference numerals:
[0034] 1- Upper surface test assembly,
[0035] 11- Upper shell,
[0036] 111-limit guide pin,
[0037] 12-locking buckle,
[0038] 13- RF interface I,
[0039] 14-knob locking structure,
[0040] 141-knob,
[0041] 1411-limiting groove,
[0042] 142-stud,
[0043] 143-Press Plate,
[0044] 144-pressure spring,
[0045] 145- Upper RF mounting plate,
[0046] 146- common ground test board,
[0047] 1461-Chip mounting area I,
[0048] 1462-Rectangular bump I,
[0049] 1463-Rectangular Bump II,
[0050] 1464-guide pin hole I,
[0051] 1465-Guide pin hole II,
[0052] 147-fixing screw,
[0053] 148-Compression screw,
[0054] 149-Limiting screw,
[0055] 15- RF contact I,
[0056] 151- outer shell,
[0057] 152-Insulator,
[0058] 153-Elastic needle,
[0059] 16-RF cable assembly I,
[0060] 2- Lower surface test assembly,
[0061] 21-Chip limit frame,
[0062] 2101-Chip mounting area II,
[0063] 2102-Rectangular groove I,
[0064] 2103-Rectangular groove II,
[0065] 2104- Positioning guide pin I,
[0066] 2105-Positioning guide pin II,
[0067] 22-lower housing,
[0068] 23-socket,
[0069] 24-RF interface II,
[0070] 25-Fan guard,
[0071] 26- Fan,
[0072] 27-Fan base,
[0073] 28-RF Cable Assembly II,
[0074] 29-test board,
[0075] 210-heat sink,
[0076] 211-Lower common ground test board,
[0077] 212-lower shell frame,
[0078] 213-RF Contact II,
[0079] 3-Chip under test. DETAILED DESCRIPTION
[0080] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.
[0081] An embodiment of a double-sided chip test fixture that can be quickly locked according to the present invention is as follows: Figures 1 to 11 As shown. Figure 2 As shown, the fixture includes an upper surface test component 1 and a lower surface test component 2. The present invention is provided with a knob locking structure 14 that limits the maximum downward stroke to prevent crushing, thereby realizing rapid locking of the chip to be tested 3. The RF signal transmission path adopted by the present invention is: chip to be tested 3 → RF cable assembly connected with RF contacts, so as to reduce the switching loss of the link and improve the voltage standing wave ratio. At the position of the test board 29, the heat dissipation structure of the RF cable assembly is designed to improve the heat dissipation performance, thereby realizing reliable, efficient and accurate testing of the chip to be tested 3.
[0082] The upper surface test assembly 1 includes an upper shell 11, a locking buckle 12, an RF interface I13, a knob locking structure 14, an RF contact I15, and an RF cable assembly I16. The knob locking structure 14 includes a knob 141, a stud 142, a pressure plate 143, a pressure spring 144, an upper RF mounting plate 145, an upper common ground test plate 146, a fixing screw 147, a tightening screw 148, and a limit screw 149. The lower surface test assembly 2 includes a lower common ground test plate 211, a chip limit frame 21, a lower shell 22, a socket 23, an RF interface II 24, an RF cable assembly II 28, a test board 29, a heat sink 210, a fan guard 25, a fan 26, and a fan base 27.
[0083] like Figure 3 As shown, the upper surface test assembly 1 is provided with locking buckles 12 on both sides. These buckles 12 are hinged to the upper shell 11 via a pinhole and pin-axis structure, allowing the buckles 12 to rotate on the outer side of the upper shell 11. A locking spring is disposed between the upper end of the locking buckle 12 and the outer side of the upper shell 11. Under the supporting force of the locking spring, the locking buckle 12 is parallel to the outer side of the upper shell 11, and the inner protrusion of the lower end of the locking buckle 12 is locked in the groove on the outer wall of the lower surface test assembly 2. When the upper end of the locking buckle 12 is pressed, the locking spring is compressed and contracted, causing the lower end of the locking buckle 12 to move outward and away from the lower surface test assembly 2, causing the two locking buckles 12 to open relative to each other, thereby separating the upper surface test assembly 1 from the lower surface test assembly 2. When the upper end of the locking buckle 12 is not compressed, the restoring force of the locking spring causes the lower end of the locking buckle 12 to lock onto the lower surface test assembly, thereby connecting the upper surface test assembly 1 and the lower surface test assembly 2. The locking buckle 12 can be used to realize the convenient separation and connection of the upper surface test component 1 and the lower surface test component 2.
[0084] like Figure 4As shown, the upper surface test assembly 1 is equipped with a knob locking structure 14. Knob locking structure 14 comprises a knob 141 located above the upper housing 11. The bottom of knob 141 is provided with a stud 142 threadedly connected to the top of the upper housing 11. Stud 142 is rotatably connected to the top of a pressure plate 143 within the upper housing 11. Pressure plate 143 is an inverted U-shaped structure, comprising a top plate and sidewalls located on either side of the bottom of the top plate. The pressure plate covers the upper RF mounting plate 145. A pressure spring 144 is provided between the bottom end of the sidewall of pressure plate 143 and the upper RF mounting plate 145. The ends of pressure spring 144 respectively nestle within grooves at the bottom end of the sidewall of pressure plate 143 and within grooves on the upper surface of upper RF mounting plate 145. Two pressure springs 144 are provided on each side of pressure plate 143. An upper common ground test plate 146 is superimposed and fixed to the lower side of upper RF mounting plate 145 via fixing screws 147. The four corners of the upper RF mounting plate 145 and the upper common ground test plate 146 are all provided with tightening screws 148 from bottom to top, and the tightening screws 148 are fixed to the bottom end of the side wall of the pressure plate 143. The superimposed plate formed by the upper RF mounting plate 145 and the upper common ground test plate 146 is provided with a step hole for the tightening screw 148 to pass through. The larger diameter hole in the step hole has a diameter larger than the outer diameter of the head of the tightening screw 148, and the smaller diameter hole has a diameter smaller than the outer diameter of the head of the tightening screw 148 and larger than the thread outer diameter of the tightening screw 148, so that the tightening screw 148 can slide with the superimposed plate and can be stopped on the superimposed plate by the head of the tightening screw 148, preventing the superimposed plate from separating too much from the pressure plate 143, avoiding too large a distance between the superimposed plate and the pressure plate 143, and thus preventing the pressure spring 144 from falling out. A limit screw 149 is fixedly provided on the side wall of the upper shell 11, and a U-shaped groove is provided at the bottom of the side wall of the pressure plate 143. The opening of the U-shaped groove is provided at the bottom of the side wall of the pressure plate 143. The limit screw 149 is slidably provided in the U-shaped groove, which can limit the downward movement of the pressure plate 143. When the pressure plate 143 moves down too much, the limit screw 149 abuts against the bottom of the U-shaped groove, preventing the pressure plate 143 from crushing the pressure spring 144, thereby avoiding damage to the chip. Two limit screws 149 are provided on each side of the pressure plate 143. The limit screws 149 and the clamping screws 148 can limit the movement range of the pressure plate 143, and can keep the pressure spring 144 within a certain pressure range, so as to avoid the pressure spring 144 from being compressed to the limit and forming a rigid body to damage the chip. When the pre-pressure of the pressure spring 144 is within a certain range, the pressure plate 143 can maintain stable operation during the downward and upward pressure processes. Figure 5 As shown, a limiting groove 1411 is provided at the bottom of the knob 141, and the limiting groove 1411 is an incomplete circular ring groove. A limiting guide pin 111 is provided on the top surface of the upper shell 11, and the limiting guide pin 111 is slidably set in the limiting groove 1411, and is used to limit the number of turns of the knob 141 (less than 1 turn), thereby limiting the maximum downward stroke.
[0085] When knob 141 is turned clockwise, stud 142 drives pressure plate 143 downward. This compresses pressure spring 144, applying pressure to upper RF mounting plate 145. This in turn creates a closer contact between RF contact 15 and the spring probe assembly mounted on the upper RF mounting plate and the upper surface of chip under test 3. When the upward force applied to upper RF mounting plate 145 exceeds the pressure applied by pressure spring 144, upper RF mounting plate 145 stops applying force to chip under test 3, thereby preventing the chip from being crushed. If pressure plate 143 is pressed downward too far, it may become stuck by limit screw 149.
[0086] like Figure 6 As shown, the bottom of the upper surface test assembly 1 is designed with an upper common ground test board 146 and an upper RF mounting board 145, and the upper common ground test board 146 and the upper RF mounting board 145 are installed with RF contacts 115 and spring probe components. Figure 8 As shown, the bottom surface of the upper common ground test board 146 is provided with a rectangular bump structure (including rectangular bumps I 1462 and rectangular bumps II 1463 of different sizes) and a guide pin hole structure (asymmetrically distributed guide pin holes I 1464 and guide pin holes II 1465), which are used to realize the identification and guidance when the upper surface test component 1 and the lower surface test component 2 are fastened together. When the upper surface test component 1 is installed, it is initially positioned by the rectangular bump structure and accurately positioned by the guide pin hole structure, thereby realizing the precise positioning and installation of the upper surface test component 1 and the lower surface test component 2. The middle area below the upper common ground test board 146 is the chip mounting area I 1461, and the RF contact part I 15 and the spring probe component are arranged in the chip mounting area I 1461. The chip mounting area I 1461 is protruded from the lower surface of the upper common ground test board 146. The chip mounting area I 1461 is surrounded by limiting protrusions for limiting the chip 3 to be tested in the chip mounting area I 1461.
[0087] like Figure 7As shown, the RF contact 115 includes an insulator 152, a spring pin 153, and an outer shell 151 with a flange structure. The insulator 152 is disposed within the outer shell 151, and the spring pin 153 is disposed within the insulator 152. The spring pin 153 is elastically disposed within the insulator 152 and can be elastically expanded and contracted. The RF contact 115 is fixed to the upper RF mounting plate 145 via a flange structure and screws. The RF contact 115 is inserted through the upper RF mounting plate 145 and the upper common ground test board 146, so that the spring pin 153 at the head of the RF contact 115 is located within the chip mounting area 11461. The tail of the RF contact 115 is connected to the RF cable assembly 116. The chip mounting area 11461 is also provided with a spring probe component. The end of the spring pin component can be elastically expanded and contracted. The spring probe component is disposed on the upper common ground test board 146, and its end is located within the chip mounting area 11461. After contacting the chip 3 under test, it is used to achieve grounding of the chip 3 under test. When the chip 3 to be tested is tested, the end of the spring probe component and the contact of the spring pin 153 of the RF contact piece 115 are respectively in contact with the upper surface of the chip 3 to be tested. The tail of the spring pin 153 of the RF contact piece 115 is directly connected to the center core of the RF cable assembly 116, and the RF cable assembly 116 is connected to the RF interface 113 to realize RF signal transmission. The RF interface 113 is set on the upper shell 11. A total of 8 2.92mm RF interfaces 113 are set on both sides of the upper surface test component 1. The RF interface 113 can be directly connected to the plug of the vector network analyzer for testing. The inside of the interface is directly connected to the RF contact piece 15 through the RF cable assembly 116.
[0088] The pressing plate 23 , the upper RF mounting plate 145 , and the upper common ground test plate 146 are integrally slidably disposed in the upper housing 11 to protect the upper RF mounting plate 145 and the upper construction site test plate 146 .
[0089] like Figure 9 As shown, a chip limiting frame 21 is provided on the top of the lower surface test assembly 2. Figure 10As shown, the center position above the chip limit frame 21 is chip mounting area II 2101. Chip mounting area II 2101 is recessed into the chip limit frame 21. Multiple limiting grooves are distributed around chip mounting area II 2101 to confine the chip under test 3 within chip mounting area II 2101. When chip mounting area II 2101 is aligned with chip mounting area I 1461, the limiting grooves cooperate with the limiting protrusions. The limiting structure (including the limiting protrusions and limiting grooves) ensures that the mounting position of the chip under test 3 does not deviate. The chip limit frame 21 is provided with rectangular grooves (including rectangular groove I 2102 and rectangular groove II 2103) and positioning guide pins (including positioning guide pin I 2104 and positioning guide pin II 2105). When assembling the upper surface test component 1 and the lower surface test component 2, the rectangular groove on the chip limit frame 21 is engaged with the rectangular protrusion in the upper common ground test board 146 to achieve preliminary positioning, and precise positioning and installation are achieved through the cooperation of the positioning guide pins and the guide pin holes.
[0090] The top of the lower surface test assembly 2 is provided with a lower common ground test board assembly and a test board 29, and the lower common ground test board assembly and the test board 29 are sequentially arranged below the chip limit frame 21, and the lower common ground test board assembly and the test board 29 are fastened together by screws. The lower common ground test board assembly includes a lower common ground test board 211, a radio frequency contact II 213, and a spring probe component. A spring probe component and a radio frequency contact II 213 are installed on the lower common ground test board 211. The radio frequency contact II 213 on the lower common ground test board 211 is the same as the radio frequency contact I15 in the upper surface test assembly 1, and will not be repeated here. The radio frequency contact II 213 is provided through the lower common ground test board 211 and the test board 29, and is fixed to the test board 29 by a flange structure and screws. The spring pin contact of the radio frequency contact II 213 is located in the chip mounting area II2101, and the tail is connected to the radio frequency interface II 24 through the radio frequency cable assembly II 28. During testing, the top of the spring probe assembly and the spring pin contact of RF contact II 213 respectively contact the lower surface of the chip under test 3. The spring probe assembly is installed on the lower common ground test board 211, and the bottom contacts the upper surface of the test board 29. The spring pin tail of RF contact II 213 is directly connected to the center wire core of RF cable assembly II 28, thereby connecting to the 2.92mm RF interface II 24 through RF cable assembly II 28. One side of the test board 29 is connected to the socket 23. In this embodiment, the socket 23 is a J30J connector.
[0091] like Figure 11As shown, three heat sinks 210 are provided at the lower end of the test board 29. These heat sinks have a grid-like heat dissipation structure. The tops of the heat sinks 210 are fastened to the test board 29 and the lower common ground test board 211 via screws. This grid-like heat dissipation structure increases the heat dissipation area and can be adjusted to the wiring configuration of the RF cable assembly II 28 to avoid interference with the RF cable assembly II 28.
[0092] The chip limiting frame 21 is set on the upper common ground test board 211. The upper common ground test board 211 and the test board 29 are set in the lower shell 22. The radio frequency interface II 24 and the socket 23 are respectively set on the side walls of the lower shell 22.
[0093] A lower housing frame 212 is provided at the top of the lower housing 22. After the upper and lower surface test assemblies 1 and 2 are docked, the lower housing frame 212 surrounds the upper common ground test board 146. A groove is provided on the lower housing frame 212 to match the lower end of the locking buckle 12. The lower end of the locking buckle 12 is locked in the groove, thereby locking the upper and lower surface test assemblies 1 and 2.
[0094] The lower surface test assembly 2 is provided with a J30J connector socket interface and a 2.92mm RF interface structure on both sides. During testing, the socket is connected to the J30J plug, and the 2.92mm RF interface II 24 is connected to the vector network analyzer.
[0095] The bottom of the lower housing 22 is provided with a fan 26. A fan guard 25 is provided on the side of the fan 26 facing the lower housing 22. The fan 26 is provided on a fan base 27. The three are connected to the lower housing 22 by screws. The fan 26 and the heat sink 210 work together to realize the heat dissipation function of the test device.
[0096] To achieve good heat dissipation, the lower housing 22 is an inverted U-shaped structure with heat sink 210 disposed within the U-shaped structure. The test board 29 and the lower common ground test board 211 are located within the top plate of the lower housing 22 to protect the test board 29 and the lower common ground test board 211.
[0097] When operating this fixture, first press the upper ends of the locking buckles 12 on both sides of the upper surface test assembly 1. The locking springs are compressed and contracted, and the lower ends of the locking buckles 12 open, allowing the upper surface test assembly 1 to be removed, completing the separation of the upper surface test assembly 1 from the lower surface test assembly 2. Connect the 2.92mm RF interface II 24 on one side of the lower surface test assembly 2 to the vector network analyzer, tightening to a torque of approximately 0.8 to 1 N*m. Connect the J30J connector socket 23 on the other side to the J30J connector plug and tighten with screws. The recommended tightening torque is 0.25 to 0.3 N*m. Connect the 2.92mm RF interface I13 of the upper surface test assembly 1 to the vector network analyzer, tightening to a torque of approximately 0.8 to 1 N*m, and power on the fan 26. Place the chip 3 to be tested in the chip mounting area II 2101 in the center of the chip limit frame 21. Ensure that the orientation of the chip 3 to be tested is correct for the corresponding position of the interface. Press the upper end of locking buckle 12 to clamp upper surface test assembly 1. Engage the rectangular protrusion and rectangular groove to achieve preliminary positioning. Align the positioning guide pin and guide pin hole for precise positioning. Accurately align upper surface test assembly 1 with lower surface test assembly 2. Release the upper end of locking buckle 12 to tighten, completing assembly. Turn knob 141 clockwise until it stops, locking chip 3 under test and initiating testing.
[0098] The top of the clamp of the present invention is designed with a locking buckle structure that limits the maximum downward pressure stroke and prevents crushing. Turn the knob 141 clockwise, and the stud 142 drives the knob 141 and the pressure plate 143 to move downward. The pressure spring 144 is compressed, and the upper RF mounting plate 145 is subjected to downward pressure. When the upward force applied to the upper RF mounting plate 145 is greater than the pressure applied by the pressure spring, the upper RF mounting plate 145 stops moving downward, thereby playing a role in preventing crushing. The limit screws 149 located on both sides of the pressure plate 143 are fixed to the upper shell 11. The limit screws 149 will limit the maximum downward pressure stroke of the pressure plate 143. The limit groove 1411 at the bottom of the knob 141 and the limit guide pin 111 of the upper shell are used to limit the number of turns of the knob 141, thereby playing a role in limiting the maximum downward pressure stroke.
[0099] In the present invention, the radio frequency signal is transmitted using a radio frequency cable assembly. One end of the radio frequency cable assembly is a radio frequency contact equipped with a spring pin, and the other end is a standard 2.92 radio frequency interface. The end face of the radio frequency contact equipped with the spring pin can directly contact the chip 3 to be tested, and the signal of the chip 3 to be tested is led out to the standard 2.92 radio frequency interface. The insulator at the front end of the radio frequency contact extends into the hole position of the common ground test board (upper common ground test board 146, lower common ground test board 211), and the spring pin contact at the front end of the insulator is exposed to achieve precise contact with the chip 3 to be tested. The tail of the spring pin is directly connected to the center wire core of the radio frequency cable assembly. The outer shell of the radio frequency contact is a flange structure, and the radio frequency contact can be fixed to the common ground test board by screws.
[0100] In the present invention, the lower surface test assembly 2 is provided with a lower common ground test board assembly and a test board 29 structure, which is fastened to the lower housing 22 by screws. Three heat sinks 210 are fastened to the test board 29 by screws. The heat sink 210 has a grid-like structure, which not only increases the heat dissipation area to improve heat dissipation performance, but also allows for the configuration to be modified to avoid interference based on the wiring of the RF cable assembly, making the overall structure of the test device more compact. Slots are cut on both sides of the lower housing 22 to facilitate air circulation and heat dissipation. A fan guard 25 and a fan 26 for heat dissipation are arranged below the heat sink 210, thereby improving the heat dissipation performance of the chip test device.
[0101] In other embodiments of the present invention, in addition to being fixed by a locking buckle, the upper shell 11 and the lower shell 22 can also be detachably connected by other detachable connection structures, such as a bolt and nut structure.
[0102] In other embodiments of the present invention, the clamping screw 148 can be replaced by other forms of clamping members. For example, the clamping screw 148 can be replaced by a T-shaped column integrally provided with the pressure plate 143, and the head of the T-shaped column is stopped on the upper common ground test plate 146.
[0103] In other embodiments of the present invention, the limiting screw 149 may be replaced by other forms of limiting members, such as a limiting column vertically fixed to the upper shell.
[0104] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and alterations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.
Claims
1. A double-sided chip test fixture capable of rapid locking, comprising an upper shell (11) and a lower shell (22) that are detachably connected, characterized in that: The top of the upper shell (11) is threadedly connected to the stud (142), and the top of the stud (142) is provided with a knob (141). A pressure plate (143) is provided in the upper shell (11) and is rotatably connected to the bottom of the stud (142). The bottom of the pressure plate (143) is connected to the top surface of the upper radio frequency mounting plate (145) through a pressure spring (144). An upper common ground test plate (146) is fixed below the upper radio frequency mounting plate (145). A pressing piece is slidably passed through the upper radio frequency mounting plate (145) and the upper common ground test plate (146). The top of the pressing piece is fixed to the pressure plate (143). ), the bottom end presses the upper common ground test board (146) upward to compress the pressure spring (144), the upper shell (11) is provided with a limiter for stopping the pressure plate (143) from moving downward to avoid crushing the pressure spring (144), the lower part of the upper common ground test board (146) is provided with a chip mounting area I (1461); the top of the lower shell (22) is provided with a chip limiting frame (21), the upper part of the chip limiting frame (21) is provided with a chip mounting area II (2101) for matching with the chip mounting area I (1461) to accommodate the chip to be tested (3), the chip limiting A lower common ground test board (211) and a test board (29) are sequentially arranged below the frame (21), a heat sink (210) is provided on the test board (29), and a fan (26) is provided below the lower shell (22); the upper radio frequency mounting plate (145) and the upper common ground test board (146) are penetrated and fixed with corresponding radio frequency contacts I (15), a radio frequency interface I (13) is provided on the upper shell (11), the tail of the radio frequency contact I (15) is connected to the radio frequency interface I (13) through the radio frequency cable assembly I (16), the spring pin contact of the radio frequency contact I (15) and the upper common ground test board (146) are connected to the radio frequency interface I (13), and the spring pin contact of the radio frequency contact I (15) and the upper common ground test board (146) are connected to the upper common ground test board (146). The elastic spring pin component on the ground test board (146) is used to contact the upper surface of the chip to be tested (3); the lower common ground test board (211) and the test board (29) are also provided with fixed corresponding radio frequency contact pieces II (213); a radio frequency interface II (24) is provided on the lower shell (22); the radio frequency contact piece II (213) is connected to the radio frequency interface II (24) through a radio frequency cable assembly II (28); the spring pin contact of the radio frequency contact piece II (213) and the spring spring pin component on the lower common ground test board (211) are used to contact the lower surface of the chip to be tested (3).
2. The double-sided chip test fixture capable of rapid locking according to claim 1, characterized in that: The upper shell (11) is hingedly provided with locking buckles (12) on both sides, and a locking spring is provided between the upper end of the locking buckle (12) and the outer side surface of the upper shell (11). The protrusion on the inner side of the lower end of the locking buckle (12) is stuck in the groove of the outer side wall of the lower shell (22). When the upper end of the locking buckle (12) is pressed, the locking spring is compressed and contracted, so that the lower end of the locking buckle (12) moves outward and disengages from the groove of the outer side wall of the lower shell (22).
3. The double-sided chip test fixture capable of rapid locking according to claim 1, characterized in that: The pressure plate (143) is an inverted U-shaped structure, comprising a top plate and side walls located on both sides of the lower portion of the top plate. The pressure plate (143) covers the upper RF mounting plate (145). A pressure spring (144) is provided between the bottom end of the side wall of the pressure plate (143) and the upper RF mounting plate (145).
4. The double-sided chip test fixture capable of rapid locking according to claim 3, characterized in that: A limiting screw (149) is fixedly provided on the side wall of the upper shell (11), and a U-shaped groove is provided at the bottom of the side wall of the pressure plate (143). The opening of the U-shaped groove is provided at the bottom of the side wall of the pressure plate (143), and the limiting screw (149) is slidably provided in the U-shaped groove.
5. The double-sided chip testing fixture capable of rapid locking according to claim 1, characterized in that: A limiting groove (1411) is provided at the bottom of the knob (141), and the limiting groove (1411) is an incomplete circular ring groove. A limiting guide pin (111) is provided on the top surface of the upper shell (11), and the limiting guide pin (111) is slidably provided in the limiting groove (1411).
6. The double-sided chip test fixture capable of rapid locking according to claim 1, characterized in that: The bottom surface of the upper common ground test board (146) is provided with a rectangular bump structure and a guide pin hole structure, and the chip limit frame (21) is provided with a rectangular groove matching the rectangular bump structure and a positioning guide pin matching the guide pin hole structure.
7. The double-sided chip testing fixture capable of rapid locking according to claim 1, characterized in that: The chip mounting area I (1461) is protrudingly arranged on the lower surface of the upper common ground test board (146), and a plurality of limiting protrusions for limiting the chip to be tested (3) within the chip mounting area I (1461) are distributed around the chip mounting area I (1461); the chip mounting area II (2101) is recessed on the chip limiting frame (21), and a plurality of limiting grooves for limiting the chip to be tested (3) within the chip mounting area II (2101) are distributed around the chip mounting area II (2101), and when the chip mounting area II (2101) is aligned and matched with the chip mounting area I (1461), the limiting grooves cooperate with the limiting protrusions.
8. The double-sided chip testing fixture capable of rapid locking according to claim 1, characterized in that: The radio frequency contact part I (15) and the radio frequency contact part II (213) both include an insulator (152), a spring pin (153) and an outer shell (151) of a flange structure. The radio frequency contact part I (15) is fixed to the upper radio frequency mounting plate (145) through the flange structure, and the radio frequency contact part II (213) is fixed to the test plate (29) through the flange structure.
9. The double-sided chip testing fixture capable of rapid locking according to claim 1, characterized in that: One side of the test board (29) is connected to the socket (23).
10. The double-sided chip testing fixture capable of rapid locking according to claim 1, characterized in that: The bottom of the lower housing (22) is arranged on the fan (26), a fan guard (25) is provided on the side of the fan (26) facing the lower housing (22), and the fan (26) is arranged on a fan base (27).
Citation Information
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