Circuit, method and system for detecting current of printed circuit board

Abstract

The invention provides a current detection circuit, method and system of a printed circuit board, and belongs to the technical field of electronics. In the scheme provided by the invention, the intermediate dielectric layer of the PCB is provided with the plurality of via holes, one end of each via hole can be connected with the power supply circuit located at the bottom layer of the PCB, and the other end of each via hole can be connected with the load located at the top layer of the PCB, so that the power supply circuit can supply power to the load through the plurality of via holes. The current detection circuit comprises a sampling circuit and a control circuit. Wherein the sampling circuit can sample voltage drops at the two ends of at least two via holes at two moments respectively, and the control circuit can determine the actual current input to the load by the power supply circuit based on the voltage drops at the two moments. Since the sampling circuit can sample the voltage drop at the two ends of the two or more via holes, namely, multi-point sampling can be performed, the control circuit can accurately calculate the current input to the load based on the multi-point sampled voltage drop.

Description

Technical Field

[0001] This application relates to the field of electronic technology, and particularly to a current detection circuit, method and system for a printed circuit board. Background Art

[0002] A printed circuit board (PCB) is a platform for providing component connections. For example, chips and power circuits are usually arranged on the opposite bottom and top layers of the PCB respectively, and a plurality of vias are provided in the intermediate dielectric layer between the bottom and top layers, so that the power circuit and the chip can establish a connection, and further the power circuit can input current to the chip to supply power to the chip.

[0003] Since the current input to the chip may change at different times, it is usually necessary to detect the real-time current input to the chip and control the power circuit based on the detected current to adjust the power supply capacity to the load, that is, to improve the output dynamic response ability of the power circuit. However, since the currents input to the chip through different vias are generally different, it is difficult to accurately detect the actual current input to the chip. Summary of the Invention

[0004] This application provides a current detection circuit, method and system for a printed circuit board, which can solve the problem in the related art that it is difficult to accurately detect the actual current input to the chip.

[0005] In a first aspect, a current detection circuit for a PCB is provided. The PCB includes: a bottom layer, an intermediate dielectric layer and a top layer stacked in sequence, wherein the intermediate dielectric layer has a plurality of vias, and one end of the plurality of vias is used to connect a power circuit located on the bottom layer, and the other end of the plurality of vias is used to connect a load located on the top layer; the current detection circuit includes: a sampling circuit and a control circuit; the sampling circuit is respectively connected to at least two of the plurality of vias and the control circuit; the sampling circuit is configured to: sample the voltage drops at both ends of the at least two vias at a first moment and a second moment respectively; the control circuit is configured to: determine the actual current input from the power circuit to the load based on the first voltage drop at the first moment and the second voltage drop at the second moment.

[0006] In the current detection circuit of the PCB, since the sampling circuit can sample the voltage drops at both ends of two or more vias in the plurality of vias of the PCB, that is, it can perform multi-point sampling, the control circuit can accurately calculate the current input from the power circuit to the load based on the voltage drops of multi-point sampling.

[0007] Optionally, the control circuit can be used to: determine the first sampled current at the first moment based on the first voltage drop, the second voltage drop, the sampling interval between the first moment and the second moment, and the resistance values and inductance values of the at least two vias; determine the second sampled current at the second moment based on the first voltage drop, the first sampled current, the sampling interval, and the resistance values and inductance values of the at least two vias; determine the actual current based on the first sampled current and the second sampled current; and the actual current is positively correlated with the first sampled current and the second sampled current.

[0008] That is, the control circuit can also pre-determine the sampling interval between two moments, as well as the resistance value and inductance value of the via, and respectively determine the sampled currents at the two moments based on the voltage drops sampled by the sampling circuit at the two moments, the sampling interval between the two moments, and the resistance value and inductance value of the via, and then calculate the actual current based on the sampled currents. Thus, the accuracy of the calculated actual current can be ensured to be relatively high.

[0009] Optionally, the first sampled current I1 can satisfy: The second sampled current I2 can satisfy: The actual current I0 can satisfy: Where, R can be the resistance value of the at least two vias, L can be the inductance value of the at least two vias, V1 can be the first voltage drop, V2 can be the second voltage drop, Δt can be the sampling interval, and m can be the number of the at least two vias.

[0010] Optionally, the sampling circuit can include: at least two sampling resistor pairs connected to the at least two vias in one-to-one correspondence; each sampling resistor pair can include: two sampling resistors connected to the two ends of the corresponding via in one-to-one correspondence; and the sampling resistors connected to the same end of the at least two vias can be connected in parallel with each other and connected to the control circuit.

[0011] Based on the above parallel connection method of the sampling resistors, it can be known that the voltage drop sampled by the sampling circuit is actually the average value of the voltage drops at both ends of at least two vias. Thus, the control circuit can accurately calculate the actual current input to the load based on the average value of the voltage drop.

[0012] Optionally, the voltage drops sampled by the sampling circuit may be analog signals; the control circuit may include: an analog-to-digital converter (ADC) and a processor, where the ADC is respectively connected to the sampling circuit and the processor; the ADC may be configured to: convert both the first voltage drop and the second voltage drop from analog signals to digital signals; the processor may be configured to: determine the actual current based on the converted first voltage drop and second voltage drop.

[0013] That is, the control circuit can be set to include an ADC and a processor to reliably calculate the actual current based on the voltage drops sampled by the sampling circuit. Since the processor generally cannot directly process analog signals, by setting the ADC to first perform analog-to-digital conversion on the voltage drops sampled by the sampling circuit and then having the processor determine the actual current based on the voltage drops after the analog-to-digital conversion, it can ensure that the processor quickly and reliably calculates the actual current.

[0014] Optionally, the current detection circuit may further include: an amplifier circuit; the amplifier circuit may be respectively connected to the sampling circuit and the control circuit; the amplifier circuit may be configured to: amplify both the first voltage drop and the second voltage drop; the control circuit may be configured to: determine the actual current based on the amplified first voltage drop and second voltage drop.

[0015] By further setting an amplifier circuit to amplify the voltage drops sampled by the sampling circuit and then transmit them to the control circuit, it can ensure that the control circuit reliably obtains the voltage drops, and further ensure that the control circuit reliably determines the actual current.

[0016] In a second aspect, a method for detecting current in a PCB is provided. This method is applied to the current detection circuit of the PCB provided in the first aspect; the PCB includes: a bottom layer, an intermediate dielectric layer, and a top layer stacked in sequence. The intermediate dielectric layer has multiple vias, and one end of the multiple vias is used to connect to a power supply circuit located on the bottom layer, and the other end of the multiple vias is used to connect to a load located on the top layer; the method includes: sampling the voltage drops across the at least two vias at a first moment and a second moment respectively; determining the actual current input from the power supply circuit to the load based on the first voltage drop at the first moment and the second voltage drop at the second moment.

[0017] In a third aspect, a current detection system for a PCB is provided, which system includes: a power supply circuit, a load, and a current detection circuit for the PCB as provided in the first aspect; the PCB includes: a bottom layer, an intermediate dielectric layer, and a top layer stacked in sequence, and there are a plurality of vias in the intermediate dielectric layer; the power supply circuit is located on the bottom layer, the load is located on the top layer, one ends of the plurality of vias are used to connect the power supply circuit, and the other ends of the plurality of vias are used to connect the load; the current detection circuit is respectively connected to at least two of the plurality of vias and the power supply circuit, and the power supply circuit is further connected to the load; the current detection circuit is configured to: detect the actual current input from the power supply circuit to the load, and output a control signal to the power supply circuit based on the actual current; the power supply circuit is configured to: supply power to the load based on the control signal.

[0018] Optionally, the load includes: a ball grid array (BGA) packaged chip.

[0019] Optionally, the power supply circuit includes: a voltage regulator module (VRM).

[0020] In summary, the present application provides a current detection circuit, method, and system for a printed circuit board. In the solution provided by the present application, the intermediate dielectric layer of the PCB has a plurality of vias, and one ends of the plurality of vias can be connected to the power supply circuit located on the bottom layer of the PCB, and the other ends of the plurality of vias can be connected to the load located on the top layer of the PCB, so that the power supply circuit can supply power to the load through the plurality of vias. The current detection circuit includes a sampling circuit and a control circuit. Among them, the sampling circuit can sample the voltage drops at both ends of at least two vias at two moments respectively, and the control circuit can determine the actual current input from the power supply circuit to the load based on the voltage drops at the two moments. Since the sampling circuit can sample the voltage drops at both ends of two or more vias, that is, it can perform multi-point sampling, the control circuit can accurately calculate the current input to the load based on the voltage drops of multi-point sampling. Description of the Drawings

[0021] Figure 1 is a schematic structural diagram of a current detection circuit for a PCB provided by an embodiment of the present application;

[0022] Figure 2 is a schematic structural diagram of another current detection circuit for a PCB provided by an embodiment of the present application;

[0023] Figure 3 is a schematic structural diagram of yet another current detection circuit for a PCB provided by an embodiment of the present application;

[0024] Figure 4It is a schematic diagram of the circuit structure of a current detection circuit for a PCB provided by an embodiment of the present application;

[0025] Figure 5 It is a schematic diagram of the impedance model of a via in a PCB provided by an embodiment of the present application;

[0026] Figure 6 It is a schematic flowchart of a current detection method for a PCB provided by an embodiment of the present application;

[0027] Figure 7 It is a schematic diagram of the structure of a current detection system for a PCB provided by an embodiment of the present application;

[0028] Figure 8 It is a schematic diagram of the structure of another current detection system for a PCB provided by an embodiment of the present application. Specific Embodiments

[0029] The following will introduce in detail the current detection circuit, method and system for a printed circuit board provided by the embodiments of the present application with reference to the accompanying drawings. First, the key terms involved in the embodiments of the present application will be introduced.

[0030] PCB: It is a support for electronic devices and also a carrier for electrical connections of electronic devices. Since the PCB is made by electronic printing technology, it is also called a printed circuit board. The PCB generally includes a 4-layer board structure, an 8-layer board structure or a 14-layer board structure.

[0031] Chip: It is a microcircuit including multiple electronic components (such as transistors, resistors and capacitors), and belongs to a load described in the embodiments of the present application. A chip generally includes multiple separate functional modules, and a functional module can be called a die. The power consumption of different dies is generally different, and thus the current input from the power supply circuit to different dies will also be different.

[0032] BGA: It is a technology for packaging chips, mainly making an array of solder balls at the bottom of the package substrate as input / output ports for welding with the PCB. The chip packaged by the BGA technology is also called a BGA packaged chip.

[0033] The embodiments of the present application provide a current detection circuit for a PCB, which can accurately detect the actual current input to the chip. As Figure 1 shown, the PCB includes: a bottom layer 10, an intermediate dielectric layer 20 and a top layer 30 stacked in sequence.

[0034] Among them, there are multiple vias K0 in the intermediate dielectric layer 20, and one end of the multiple vias K0 is used to connect the power supply circuit 100 located on the bottom layer 10, and the other end of the multiple vias K0 is used to connect the load 200 located on the top layer 30. That is, the power supply circuit 100 can be set on the bottom layer 10 of the PCB, the load 200 can be set on the top layer 30 of the PCB, and vias K0 can be opened in the intermediate dielectric layer 20 of the PCB, so that the power supply circuit 100 and the load 200 can be reliably connected. And the intermediate dielectric layer 20 generally includes a conductive medium, so that the power supply circuit 100 and the load 200 can be electrically connected.

[0035] Optionally, the intermediate dielectric layer 20 generally includes a multi-layer structure. Figure 1 Schematically shows a 2-layer intermediate dielectric layer 20. Correspondingly, the PCB of this structure is the PCB of the 4-layer board structure described above. Of course, in some other embodiments, it may also include other numbers of intermediate dielectric layers 20 to form a PCB of an 8-layer board structure or a 14-layer board structure as described above.

[0036] Optionally, the power supply circuit 100 may include multiple electronic components. For example, Figure 1 The multiple electronic components shown are all capacitors C1. The power supply circuit 100 can input current to the load 200 through multiple vias K0 to supply power to the load 200. Figure 1 The flow direction of the current is marked with a dotted line with an arrow in.

[0037] Optionally, the load 200 may be the chip described above, and may be a BGA package chip. And the chip may have multiple functional modules with different power consumptions, and one end of the multiple vias K0 can be used to connect to the multiple functional modules in a one-to-one correspondence. For example, Figure 1 Schematically shows 3 functional modules of the chip: functional module 1, functional module 2, and functional module 3. Correspondingly, Figure 1 It also schematically marks 3 vias K0 corresponding to the 3 functional modules one by one. And as described above, because the power consumptions of different functional modules are generally different, the currents input through different vias K0 are also different. It can be understood that different functional modules in the chip are generally soldered on the top layer of the PCB through different pins, so it can also be considered that the currents on different pins are different.

[0038] Continue to refer to Figure 1 It can be seen that the current detection circuit 00 described in the embodiment of the present application includes: a sampling circuit 01 and a control circuit 02. The sampling circuit 01 is connected to at least two of the multiple vias K0 and the control circuit 02 respectively.

[0039] The sampling circuit 01 is used to: sample the voltage drops at both ends of at least two vias K0 at the first moment and the second moment respectively.

[0040] The control circuit 02 is configured to: determine the actual current input from the power supply circuit 100 to the load 200 based on the first voltage drop at the first moment and the second voltage drop at the second moment.

[0041] It can be understood that the voltage drop across each via K0 may refer to: the voltage difference between the voltage at one end of each via K0 located in the bottom layer 10 and the voltage at the other end located in the top layer 30. Thus, referring to Figure 1 It can be seen that the sampling circuit 01 may be connected to one end and the other end of each of at least two vias K0 respectively, so as to reliably sample the voltage drop across each via K0. And, in combination with Figure 1 It can also be seen that each end of at least two vias K0 is short-circuited together after passing through the sampling circuit 01. Thus, it can be known that the voltage drop at any moment obtained by the control circuit 02 is the average value of the voltage drops across at least two vias K0. That is, after passing through the sampling circuit 01, the voltage drops across at least two vias K0 are averaged and then output to the control circuit 02 for the control circuit 02 to calculate the actual current.

[0042] It can also be understood that the first moment and the second moment may refer to two different moments of continuous sampling. The second moment may refer to the moment after the first moment, and there is a fixed sampling interval between the first moment and the second moment. The unit of the sampling interval is generally nanoseconds (ns).

[0043] Thus, it can be known that in the embodiment of the present application, the sampling circuit 01 can sample the average value of the voltage drops across two or more vias K0 at two different moments respectively, that is, perform multi-point sampling and then average, so that the control circuit 02 can accurately calculate the actual current input from the power supply circuit 100 to the load 200 based on the average value of the voltage drops across at least two vias K0.

[0044] In summary, the embodiment of the present application provides a current detection circuit for a PCB. The intermediate dielectric layer of the PCB has multiple vias, and one end of the multiple vias can be connected to the power supply circuit located in the bottom layer of the PCB, and the other end of the multiple vias can be connected to the load located in the top layer of the PCB, so that the power supply circuit can supply power to the load through the multiple vias. The current detection circuit includes a sampling circuit and a control circuit. Among them, the sampling circuit can sample the voltage drops across at least two vias at two moments respectively, and the control circuit can determine the actual current input from the power supply circuit to the load based on the voltage drops at the two moments. Since the sampling circuit can sample the voltage drops across two or more vias, that is, can perform multi-point sampling, the control circuit can accurately calculate the current input to the load based on the voltage drops of multi-point sampling.

[0045] Optionally, in the embodiments of the present application, the voltage drops sampled by the sampling circuit 01 may be analog signals. On this basis, referring to Figure 2 As can be seen from the schematic structural diagram of another PCB current detection circuit shown in

[0046] the control circuit 02 described in the embodiments of the present application may include: an analog-to-digital converter ADC and a processor 021. The ADC may be connected to the sampling circuit 01 and the processor 021 respectively.

[0047] The ADC may be configured to: convert both the first voltage drop and the second voltage drop from analog signals to digital signals.

[0048] Optionally, the processor 021 may be a micro-control unit (MCU) with analysis and calculation capabilities.

[0049] It can be understood that since the processor 021 generally cannot directly process analog signals, by setting the ADC to first convert the voltage drops sampled by the sampling circuit 01 from analog signals to digital signals and then transmit them to the processor 021 for the processor 021 to further calculate the actual current, it can ensure that the processor 021 quickly and reliably calculates the actual current input to the load 200.

[0050] Optionally, Figure 3 shows a schematic structural diagram of another current detection circuit described in the embodiments of the present application. As Figure 3 shown, the current detection circuit 00 described in the embodiments of the present application may further include: an amplification circuit 03. The amplification circuit 03 may be connected to the sampling circuit 01 and the control circuit 02 respectively.

[0051] The amplification circuit 03 may be configured to: perform amplification processing on both the first voltage drop and the second voltage drop.

[0052] The control circuit 02 may be configured to: determine the actual current based on the first voltage drop and the second voltage drop after the amplification processing.

[0053] Optionally, the amplification circuit 03 may be an operational amplifier (AMP), also known as an op-amp.

[0054] It can be understood that for Figure 2 the structure shown, the amplification circuit 03 may be connected to the ADC in the control circuit 02 to first transmit the voltage drop after the amplification processing to the ADC for the ADC to perform analog-to-digital conversion on the amplified voltage drop and then transmit it to the processor 021. By way of example, Figure 3 only the ADC in the control circuit 02 is schematically shown.

[0055] It can also be understood that by setting the amplifier circuit 03 to amplify the voltage drop sampled by the sampling circuit 01 and then transmit it to the control circuit 02, it can be ensured that the control circuit 02 reliably obtains the voltage drop, and further, it can be ensured that the control circuit 02 reliably determines the actual current.

[0056] Optionally, Figure 4 The circuit structure diagram of a current detection circuit provided by an embodiment of the present disclosure is shown. As Figure 4 shown, the sampling circuit 01 may include: at least two sampling resistor pairs 011 respectively connected to at least two vias K0.

[0057] Each sampling resistor pair 011 may include: two sampling resistors R11 and R12 respectively connected to both ends of the corresponding via K0.

[0058] Moreover, the sampling resistors respectively connected to the same end of at least two vias K0 may be connected in parallel with each other and connected to the control circuit 02.

[0059] Exemplarily, Figure 4 only the ADC in the control circuit 02 is schematically shown. And, Figure 4 4 vias K0 are schematically shown, and one end of the 4 vias K0 located at the bottom layer 10 is respectively marked as: position 11, position 12, position 13, and position 14, and the other end located at the top layer 30 is respectively marked as: position 21, position 22, position 23, and position 24. Correspondingly, as Figure 4 shown, the sampling circuit 01 shown therein may include: 4 sampling resistor pairs 011 respectively connected to the 4 vias K0. And, among the 4 sampling resistor pairs 011, one sampling resistor R11 included in each sampling resistor pair 011 is connected to one end of the corresponding via K0 located at the bottom layer 10, and the other sampling resistor R12 is connected to the other end of the corresponding via K0 located at the top layer 30. That is, as Figure 4 shown, one end of the 4 sampling resistors R11 may be respectively connected to positions 11 to 14, and the other ends of the 4 sampling resistors R11 may be connected in parallel with each other and connected to the positive input terminal + of the ADC. And, one end of the 4 sampling resistors R12 may be respectively connected to positions 21 to 24, and the other ends of the 4 sampling resistors R12 may be connected in parallel with each other and connected to the negative input terminal - of the ADC. Of course, the positions of the positive input terminal + and the negative input terminal - of the ADC may also be interchanged.

[0060] In addition, Figure 4The equivalent impedance distribution in the PCB is also schematically shown, including: four groups of resistors distributed in the vertical direction Y, namely a group of resistors R21 and R22, a group of resistors R23 and R24, a group of resistors R25 and R26, and a group of resistors R27 and R28. And, three groups of resistors distributed in the horizontal direction X, namely a group of resistors R31, R32 and R33, a group of resistors R34, R35 and R36, and a group of resistors R37, R38 and R39.

[0061] Among them, in combination with Figures 1 to 3 , the vertical direction Y can refer to the extension direction of the via K0, and the horizontal direction X can refer to the direction parallel to the bearing surface of each layer in the PCB, or can also refer to the direction perpendicular to the extension direction of the via K0. It can be seen that the four groups of resistors distributed in the vertical direction Y can correspond one-to-one with the four vias K0, that is, these four groups of resistors can be the equivalent impedances of the 4 vias K0 respectively. The three groups of resistors distributed in the horizontal direction X can correspond one-to-one with the number of layers included in the PCB, that is, these three groups of resistors can be the equivalent impedances of each layer of the PCB respectively. It can be understood that since the materials of each layer in the PCB generally include copper, these three groups of resistors can also refer to the copper foil impedance in the horizontal direction X.

[0062] In addition, referring to Figure 4 , it can also be seen that a current source can be connected to one end of position 11 and position 21, and the PCB and the current source can be connected to the same ground terminal GND. This current source can inject current into position 11 and position 21. After that, the sampling resistors R11 and R12 in the 4 sampling resistor pairs 011 can respectively detect: the voltage drop between position 11 and position 21, the voltage drop between position 12 and position 22, the voltage drop between position 13 and position 23, and the voltage drop between position 14 and position 24, that is, the voltage drops across the 4 vias K0 can be respectively detected. And, since each sampling resistor R11 / each sampling resistor R12 in the 4 sampling resistor pairs 011 is connected in parallel and then connected to the ADC, it can be known that the voltage drop obtained by the ADC is actually the average value of the voltage drops across the 4 vias K0.

[0063] Optionally, the resistance values of the sampling resistor R11 and the sampling resistor R12 can be about 100 milliohms (mΩ). The resistance values of the resistors in the equivalent impedance distribution of the PCB can be about 1 mΩ. Of course, this is only for illustrative purposes here.

[0064] Optionally, on the Figure 4 basis, Figure 5 the impedance model of each via K0 is also schematically shown. As Figure 5 shown, the impedance model of the via K0 can include: a resistor R0 and an inductor L0 connected in series.

[0065] Optionally, in the embodiments of the present application, the control circuit 02 may be used for:

[0066] Based on the first voltage drop, the second voltage drop, the sampling interval between the first moment and the second moment, and the resistance values and inductance values of at least two vias K0, determine the first sampling current at the first moment.

[0067] Based on the first voltage drop, the first sampling current, the sampling interval, and the resistance values and inductance values of at least two vias K0, determine the second sampling current at the second moment.

[0068] Based on the first sampling current and the second sampling current, determine the actual current.

[0069] Moreover, the actual current may be positively correlated with the first sampling current and the second sampling current. That is, the larger the first sampling current, the larger the determined actual current; the smaller the first sampling current, the smaller the determined actual current. Similarly, the larger the second sampling current, the larger the determined actual current; the smaller the second sampling current, the smaller the determined actual current.

[0070] Optionally, the following differential equation can be generated using the above parameters, and then the actual current I0 can be obtained by using the numerical differentiation method.

[0071] Among them, the first sampling current I1 may satisfy:

[0072]

[0073] The second sampling current I2 may satisfy:

[0074]

[0075] The actual current I0 may satisfy:

[0076]

[0077] Among them, R may be the resistance values of at least two vias K0. L may be the inductance values of at least two vias K0. That is, combined with Figure 5 , R may be the resistance value of the resistor R0, L may be the inductance value of the inductor L0. V1 may be the first voltage drop. V2 may be the second voltage drop. Δt may be the sampling interval. For example, Δt may be approximately 10 ns. m may be the number of at least two vias K0. For example, m may be 3 or 4.

[0078] Based on the above formulas (1) to (3), the control circuit 02 can accurately calculate the actual current input to the load 200, and reliably control the power supply circuit 100 to dynamically adjust its power supply capacity to the load 200 based on the detected current, that is, adjust the output current of the power supply circuit, so as to improve the output dynamic response ability of the power supply circuit, reduce the output capacitance of the power supply circuit, and ensure reliable power supply to the load.

[0079] In summary, the embodiment of the present application provides a current detection circuit for a PCB. The intermediate dielectric layer of the PCB has multiple vias, and one end of the multiple vias can be connected to the power supply circuit located on the bottom layer of the PCB, and the other end of the multiple vias can be connected to the load located on the top layer of the PCB, so that the power supply circuit can supply power to the load through the multiple vias. The current detection circuit includes a sampling circuit and a control circuit. Among them, the sampling circuit can sample the voltage drops at both ends of at least two vias at two moments respectively, and the control circuit can determine the actual current input from the power supply circuit to the load based on the voltage drops at the two moments. Since the sampling circuit can sample the voltage drops at both ends of two or more vias, that is, can perform multi-point sampling, the control circuit can accurately calculate the current input to the load based on the voltage drops of multi-point sampling.

[0080] The embodiment of the present application also provides a method for detecting the current of a PCB. As Figure 1 shown, the PCB includes: a bottom layer 10, an intermediate dielectric layer 20, and a top layer 30 stacked in sequence. The intermediate dielectric layer 30 has multiple vias K0, and one end of the multiple vias K0 is used to connect to the power supply circuit 100 located on the bottom layer 10, and the other end of the multiple vias K0 is used to connect to the load 200 located on the top layer 30. As Figure 6 shown, the method includes:

[0081] Step 601: Sample the voltage drops at both ends of at least two vias at the first moment and the second moment respectively.

[0082] Combined with Figure 1 , the current detection circuit of the PCB can include a sampling circuit 01 and a control circuit 02. And, in the embodiment of the present application, it can be the sampling circuit 01 that samples the voltage drops at both ends of at least two vias K0 at the first moment and the second moment respectively. And, as recorded above, what the sampling circuit 01 samples here can be the average value of the voltage drops at both ends of at least two vias K0.

[0083] Step 602: Determine the actual current input from the power supply circuit to the load based on the first voltage drop at the first moment and the second voltage drop at the second moment.

[0084] Continue to combine Figure 1, it may be that the control circuit 02 in the current detection circuit 00 of the PCB determines the actual current input from the power supply circuit 100 to the load 200 based on the first voltage drop at the first moment and the second voltage drop at the second moment.

[0085] Optionally, in the embodiment of the present application, the above step 602 may include (that is, the control circuit 02 may be used for):

[0086] Based on the first voltage drop, the second voltage drop, the sampling interval between the first moment and the second moment, and the resistance values and inductance values of at least two vias, determine the first sampling current at the first moment.

[0087] Based on the first voltage drop, the first sampling current, the sampling interval, and the resistance values and inductance values of at least two vias, determine the second sampling current at the second moment.

[0088] Based on the first sampling current and the second sampling current, determine the actual current.

[0089] Moreover, the actual current is positively correlated with the first sampling current and the second sampling current.

[0090] Optionally, the first sampling current I1 may satisfy:

[0091]

[0092] The second sampling current I2 may satisfy:

[0093]

[0094] The actual current I0 may satisfy:

[0095]

[0096] Wherein, R may be the resistance value of at least two vias, L may be the inductance value of at least two vias, V1 may be the first voltage drop, V2 may be the second voltage drop, Δt may be the sampling interval, and m may be the number of at least two vias.

[0097] Optionally, both the first voltage drop and the second voltage drop may be analog signals. On this basis, the above step 602 may include:

[0098] Convert both the first voltage drop and the second voltage drop from analog signals to digital signals.

[0099] Based on the converted first voltage drop and second voltage drop, determine the actual current.

[0100] Optionally, in combination with Figure 2, the control circuit 02 may include an ADC and a processor 021. In the embodiment of the present application, it may be the ADC in the control circuit 02 that performs analog-to-digital conversion processing on both the first voltage drop and the second voltage drop sampled by the sampling circuit 01, and it may be the processor 021 in the control circuit 02 that determines the actual current based on the first voltage drop and the second voltage drop after the analog-to-digital conversion processing. In this way, it can be ensured that the processor 021 can calculate the actual current quickly and reliably.

[0101] Optionally, before the above step 602, the current detection method may further include:

[0102] Performing amplification processing on both the first voltage drop and the second voltage drop.

[0103] Correspondingly, the above step 602 may include:

[0104] Determining the actual current based on the first voltage drop and the second voltage drop after the amplification processing.

[0105] Optionally, in combination with Figure 3 , the current detection circuit 00 may further include an amplification circuit 03. In the embodiment of the present application, it may be the amplification circuit 03 that performs amplification processing on both the first voltage drop and the second voltage drop sampled by the sampling circuit 01. After that, the ADC in the control circuit 02 may first perform analog-to-digital conversion processing on the first voltage drop and the second voltage drop after the amplification processing, and the processor 021 in the control circuit 02 may then determine the actual current based on the first voltage drop and the second voltage drop after the analog-to-digital conversion processing. In this way, it can be ensured that the control circuit 02 reliably obtains the voltage drop sampled by the sampling circuit 01, and further ensures that the control circuit 02 reliably determines the actual current.

[0106] It can be understood that since the current detection method of the PCB has basically the same implementation manner and technical effect as the current detection circuit of the PCB described in the foregoing embodiment, for the sake of simplicity, the implementation manner and technical effect of the current detection method are not described again here.

[0107] The embodiment of the present application also provides a current detection system for a PCB. As Figure 7 shown, the current detection system includes: a power supply circuit 100, a load 200, and a current detection circuit 00 as Figures 1 to 4 shown in any one of them.

[0108] In combination with Figure 1, the PCB includes: a bottom layer 10, an intermediate dielectric layer 20, and a top layer 30 stacked in sequence. There are multiple vias K0 in the intermediate dielectric layer 20. The power circuit 100 is located on the bottom layer 10, and the load 200 is located on the top layer 30. One end of the multiple vias K0 is used to connect to the power circuit 100, and the other end of the multiple vias K0 is used to connect to the load 200. That is, the power circuit 100 can be connected to the load 200 through the multiple vias K0.

[0109] The current detection circuit 00 is respectively connected to at least two of the multiple vias K0 and the power circuit 100, and the power circuit 100 is also connected to the load 200. It can be understood that Figure 7 the via K0 is not shown, but it is represented that the current detection circuit 00 is connected to one end of the power circuit 100 connecting to the load 200 to indicate that the current detection circuit 00 is connected to at least two vias K0.

[0110] The current detection circuit 00 is used to: detect the actual current input from the power circuit 100 to the load 200, and output a control signal to the power circuit 100 based on the actual current.

[0111] The power circuit 100: is used to supply power to the load 200 based on the control signal.

[0112] That is, in the embodiment of the present application, after the current detection circuit 00 detects the actual current input to the load 200, it can control the power supply ability of the power circuit 100 to the load 200 based on the detected current, such as adjusting the output current of the power circuit 100, thereby improving the output dynamic response ability of the power circuit 100. Optionally, the control signal can be a pulse-width modulation (PWM) signal.

[0113] Optionally, Figure 8 is a schematic structural diagram of another current detection system described in the embodiment of the present application. As Figure 8 shown, the load 200 may include: a BGA package chip, Figure 8 schematically showing a DIE of the BGA package chip. In addition, referring to Figure 8 it can also be seen that one end of the DIE can be connected to the power circuit 100 through a resistor R01, the other end can be directly connected to the power circuit 100, and a capacitor C01 can be connected in series at both ends of the DIE.

[0114] Optionally, continuing to refer to Figure 8 it can also be seen that the power circuit 100 may include: a VRM.

[0115] Exemplarily, the VRM can be a buck-type power supply circuit, or it can also be a boost-type power supply circuit. Among them, the buck-type power supply circuit can be used to step down the received input voltage and then output it to the load 200 to supply power to the load 200. The boost-type power supply circuit can be used to step up the received input voltage and then output it to the load 200 to supply power to the load 200. Figure 8 The shown VRM is a buck-type power supply circuit. And, referring to Figure 8 It can also be seen that the buck-type power supply circuit can include: two transistors T1 and T2, and the two transistors T1 and T2 can both be metal-oxide-semiconductor field-effect transistors (MOSFETs).

[0116] Among them, the gates of transistor T1 and transistor T2 can be used to receive control signals (such as PWM signals), and conduct or turn off based on the control signals to achieve the purpose of voltage reduction. The first poles of transistor T1 and transistor T2 can be respectively connected to the input terminal VIN to receive the input voltage provided by the input terminal VIN. The second poles of transistor T1 and transistor T2 can be connected to each other and can be connected to the output terminal VOUT through the inductor L01. In addition, Figure 8 It is also schematically shown that the output capacitor C02 is connected to the output terminal VOUT.

[0117] Exemplarily, Figure 8 In the shown power supply circuit, the input voltage provided by the input terminal VIN can be 12 volts (V), and the supply voltage output to the load 200 after the power supply circuit steps down the 12V input voltage can be 0.7V. That is, the power supply circuit can step down the 12V input voltage to an output voltage of 0.7V.

[0118] Optionally, continuing to refer to Figure 8 It can also be seen that the current detection circuit 00 described in the embodiments of the present application includes: a sampling circuit 01, an amplifying circuit 03, and a control circuit 02. The amplifying circuit 03 can be Figure 8 the shown AMP. The sampling circuit 01 can include a sampling resistor, Figure 8 Only one sampling resistor is schematically shown. And, the sampling circuit 01 can be connected between the output terminal VOUT and the load 200 and can be connected to the control circuit 02 through the AMP. The control circuit 02 can also be connected to the VRM.

[0119] Among them, the sampling circuit 01 can be used to sample the voltage drop. The control circuit 02 can be used to adjust the PWM signal output to the VRM based on the voltage drop sampled by the sampling circuit 01. The VRM can supply power to the chip based on this PWM signal.

[0120] In addition, continuing to refer to Figure 8 It can also be seen that the voltage at the output terminal VOUT can also be fed back to the control circuit 02, and the control circuit 02 can also adjust the PWM signal output to the VRM based on the received feedback voltage. Also, the current Imos flowing through the transistor T2 in the VRM can also be fed back to the control circuit 02, and the control circuit can also adjust the PWM signal output to the VRM based on the received feedback current Imos. In this way, the output dynamic response ability of the VRM (i.e., the power supply circuit) can be further improved.

[0121] Optionally, the current detection system provided in the embodiments of the present application can be applied to communication devices such as optical transmission devices, routers, and switches. The current detection system can be located on the single-board PCB of the communication device.

[0122] In the embodiments of the present application, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance. The term "at least one" means one or more, and "multiple" means two or more.

[0123] The term "and / or" in the present application is merely a description of the association relationship between associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in this article generally represents an "or" relationship between the associated objects before and after.

[0124] As described above, it is only an optional implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of various equivalent modifications or replacements, and these modifications or replacements should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A current detection circuit for a printed circuit board (PCB), characterized in that: The PCB includes: a bottom layer, an intermediate dielectric layer, and a top layer stacked in sequence; the intermediate dielectric layer has a plurality of vias, one end of each of the vias being connected to a power circuit located on the bottom layer, and the other end of each of the vias being connected to a load located on the top layer; the current detection circuit includes: a sampling circuit and a control circuit; the sampling circuit is respectively connected to at least two of the vias and the control circuit; The sampling circuit is used to: sample the voltage drops across the at least two vias at a first moment and a second moment respectively; The control circuit is configured to determine an actual current input to the load by the power supply circuit based on a first voltage drop at the first moment and a second voltage drop at the second moment.

2. The current detection circuit according to claim 1, wherein: The control circuit is used to: Determine a first sampling current at the first moment based on the first voltage drop, the second voltage drop, a sampling interval between the first moment and the second moment, and the resistance and inductance values of the at least two vias; Determining a second sampling current at the second moment based on the first voltage drop, the first sampling current, the sampling interval, and the resistance and inductance values of the at least two vias; determining the actual current based on the first sampling current and the second sampling current; Furthermore, the actual current is positively correlated with the first sampling current and the second sampling current.

3. The current detection circuit according to claim 2, characterized in that: The first sampling current I1 satisfies: The second sampling current I2 satisfies: The actual current I0 satisfies: Wherein, R is the resistance value of the at least two vias, L is the inductance value of the at least two vias, V1 is the first voltage drop, V2 is the second voltage drop, Δt is the sampling interval, and m is the number of the at least two vias.

4. The current detection circuit according to any one of claims 1 to 3, characterized in that: The sampling circuit comprises: at least two sampling resistor pairs connected in a one-to-one correspondence with the at least two vias; Each sampling resistor pair includes: two sampling resistors connected to the two ends of the corresponding via hole in a one-to-one correspondence; Furthermore, the sampling resistors corresponding to the same end of the at least two vias are connected in parallel to each other and to the control circuit.

5. The current detection circuit according to any one of claims 1 to 4, characterized in that: The voltage drop sampled by the sampling circuit is an analog signal; the control circuit includes: an analog-to-digital converter ADC and a processor, the ADC being connected to the sampling circuit and the processor respectively; The ADC is used to convert the first voltage drop and the second voltage drop from analog signals into digital signals; The processor is configured to determine the actual current based on the converted first voltage drop and the second voltage drop.

6. The current detection circuit according to any one of claims 1 to 5, characterized in that: The current detection circuit further includes: an amplifier circuit; the amplifier circuit is connected to the sampling circuit and the control circuit respectively; The amplifier circuit is used to: amplify both the first voltage drop and the second voltage drop; The control circuit is configured to determine the actual current based on the amplified first voltage drop and the second voltage drop.

7. A PCB current detection method, characterized in that: The PCB comprises: a bottom layer, an intermediate dielectric layer, and a top layer stacked in sequence, wherein the intermediate dielectric layer has a plurality of vias, and one end of the plurality of vias is used to connect to a power circuit located on the bottom layer, and the other end of the plurality of vias is used to connect to a load located on the top layer; the method comprises: sampling the voltage drops across the at least two vias at a first moment and a second moment respectively; An actual current input to the load by the power circuit is determined based on a first voltage drop at the first moment and a second voltage drop at the second moment.

8. A PCB current detection system, characterized in that: The system comprises: a power supply circuit, a load, and a current detection circuit of a PCB according to any one of claims 1 to 6; the PCB comprises: a bottom layer, an intermediate dielectric layer, and a top layer stacked in sequence, the intermediate dielectric layer having a plurality of vias; the power supply circuit is located on the bottom layer, the load is located on the top layer, one end of the plurality of vias is used to connect to the power supply circuit, and the other end of the plurality of vias is used to connect to the load; The current detection circuit is respectively connected to at least two vias among the plurality of vias and the power circuit, and the power circuit is further connected to the load; The current detection circuit is used to: detect the actual current input from the power supply circuit to the load, and output a control signal to the power supply circuit based on the actual current; The power supply circuit is configured to supply power to the load based on the control signal.

9. The system according to claim 8, characterized in that The load includes: a ball grid array (BGA) package chip.

10. The system according to claim 8 or 9, characterized in that The power supply circuit includes: a voltage regulation module VRM.

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