Substrate testing device, system and method

Abstract

The invention provides a substrate testing device, system and method, the device comprises a base, a first bearing assembly, a second bearing assembly, a first supporting assembly, a second supporting assembly, a lifting assembly, a DBC bottom plate, a probe assembly and a DBC, and the DBC comprises an IGBT chip; one end of the lifting assembly, the first supporting assembly and the second supporting assembly are fixedly arranged on the base; the first bearing assembly is horizontally arranged on the top face of the first supporting assembly, and the second bearing assembly is horizontally arranged on the top face of the second supporting assembly and the other end of the lifting assembly. The first bearing assembly bears the probe assembly; the second bearing assembly bears the DBC on the DBC bottom plate; the first supporting assembly supports the first bearing assembly and the probe assembly, and the second supporting assembly supports the second bearing assembly, the DBC substrate and the DBC; the lifting assembly enables the electrode of the IGBT chip on the DBC of the DBC bottom plate to be in butt joint with the contact interface of the probe assembly, and the test accuracy of the substrate is improved.

Description

Technical Field

[0001] The present invention relates to the field of chip testing technology, and in particular to a substrate testing device, system and method. Background Art

[0002] In the field of chip testing, dynamic characteristics testing is performed on insulated gate bipolar transistor (IGBT) chips to determine the switching loss of the IGBT chips.

[0003] Currently, when testing the dynamic characteristics of IGBT chips, multiple IGBT chips with similar performance are typically packaged into an IGBT module. A direct bonded copper (DBC) substrate serves as the internal substrate of the IGBT module, and the DBC is then tested for dynamic characteristics. After the IGBT chips are packaged into the IGBT module, parasitic parameters such as parasitic inductance, parasitic resistance, and parasitic capacitance are generated, affecting the accuracy of the DBC dynamic characteristics test results. Furthermore, the DBC testing process used in existing technologies is complex and inefficient.

[0004] Therefore, the dynamic characteristics test of IGBT chips in the prior art has certain limitations. Summary of the Invention

[0005] The object of the present invention is to provide a substrate testing device, system and method to address the practical needs of the existing technology in view of the above-mentioned deficiencies in the prior art, so as to solve the practical problem that the dynamic characteristics test of IGBT chips in the prior art has certain limitations.

[0006] To achieve the above object, the technical solution adopted by the present invention is as follows: In a first aspect, the present invention provides a substrate testing device, the device comprising: a base, a first bearing assembly, a second bearing assembly, a first support assembly, a second support assembly, a lifting assembly, a DBC bottom plate, at least one probe assembly, and at least one DBC, wherein the DBC includes an IGBT chip; One end of the lifting assembly, the first supporting assembly, and the second supporting assembly are all fixedly disposed on the base; The first bearing assembly is horizontally arranged on the top surface of the first supporting assembly, and the second bearing assembly is horizontally arranged on the top surface of the second supporting assembly and the other end of the lifting assembly; The first bearing assembly is used to bear the probe assembly, the probe assembly vertically passes through the first bearing assembly, and the contact interface of the probe assembly passes through the bottom surface of the first bearing assembly; the second bearing assembly is used to bear the DBC bottom plate, and the DBC is arranged on the DBC bottom plate; The first supporting assembly is used to support the first bearing assembly and the probe assembly, and the second supporting assembly is used to support the second bearing assembly, the DBC base plate and the DBC; The lifting assembly is used to perform lifting movement in the vertical direction under air pressure drive to adjust the height of the second supporting assembly and the DBC base plate so that the electrodes of the IGBT chip on the DBC on the DBC base plate are docked with the contact interface of the probe assembly.

[0007] As an optional implementation, the DBC includes: a DBC to be tested and a companion DBC, the DBC to be tested includes a first IGBT chip, and the companion DBC includes a second IGBT chip; The first IGBT chip includes a first gate, a first emitter and a first collector; The second IGBT chip includes a second gate, a second emitter and a second collector; The DBC to be tested is arranged in the first area of the DBC bottom plate, and the accompanying DBC to be tested is arranged in the second area of the DBC bottom plate.

[0008] As an optional implementation, the probe assembly includes: a first probe element and a second probe element, the first probe element including a first gate probe, a first emitter probe, and a first collector probe, the first gate probe, the first emitter probe, and the first collector probe being interspersed with each other in a first region of the first carrier assembly, and the position of the first probe element in the first region of the first carrier assembly being vertically aligned with the position of the DBC to be tested on the first region of the DBC base plate; The second probe elements include a second gate probe, a second emitter probe, and a second collector probe, wherein the second gate probe, the second emitter probe, and the second collector probe are arranged in a second region of the first carrier assembly at intervals, and a position of the second probe elements in the second region of the first carrier assembly is vertically aligned with a position of the accompanying DBC on the second region of the DBC base plate; The contact interfaces of the first gate probe, the first emitter probe and the first collector probe are respectively connected to the first gate, the first emitter and the first collector of the first IGBT chip on the DBC to be tested; Contact interfaces of the second gate probe, the second emitter probe, and the second collector probe are respectively connected to the second gate, the second emitter, and the second collector of the second IGBT chip on the companion test DBC.

[0009] As an optional implementation, when the lifting assembly rises to the point where the electrode of the IGBT chip on the DBC docks with the contact interface of the probe assembly, a closed space is formed between the first supporting assembly and the second supporting assembly, and the closed space is filled with nitrogen.

[0010] As an optional implementation, the device further includes: an air pump; The air pump is connected to the lifting assembly via an air pressure circuit; The air pump releases air pressure through the air pressure circuit to drive the lifting assembly to perform piston movement, so that the lifting assembly performs lifting movement in the vertical direction under the drive of air pressure.

[0011] In a second aspect, the present invention provides a substrate testing system, the system comprising: a control module, a data acquisition module, a test circuit, and the substrate testing device described in the first aspect, wherein the test circuit comprises at least one protection IGBT device; The IGBT device of the IGBT chip on each DBC in the substrate testing device is connected to the test circuit via the corresponding probe assembly in the substrate testing device; The control module is connected to the test circuit and each of the IGBT devices; the data acquisition module is connected to a target IGBT device of the IGBT chip on at least one DBC; The control module is used to perform a short circuit test, a contact test, and a double pulse test on the target IGBT device, and control the shutdown of the protection IGBT device when the test circuit has an overcurrent; The data acquisition module is used to acquire the voltage waveform and current waveform of the target IGBT device in a double pulse test mode; The protection IGBT device is used to perform overcurrent protection on the test circuit.

[0012] As an optional implementation, the test circuit further includes: a plurality of switch units; The control module is connected to each switch unit in the test circuit and the protection IGBT device respectively; and the control module is connected to the gate of each IGBT device; The data acquisition module is connected to the gate, emitter and collector of the target IGBT device respectively.

[0013] As an optional implementation, the system further includes: a power supply module; The power supply end of the power supply module is connected to the control module and the test circuit respectively; The power supply module is used to supply power to the control module and provide voltage to the test circuit.

[0014] As an optional implementation, the control module includes: a main control unit and a driving unit, wherein the main control unit includes a micro control unit MCU and a field programmable gate array FPGA; The MCU is communicatively connected to the FPGA, and the FPGA is also communicatively connected to the driving unit; The MCU is connected to each switch unit in the test circuit; The FPGA is connected to the gate of the protection IGBT device; The driving unit is connected to the gate of each IGBT device; The MCU is used to control the on and off of each switch unit in the test circuit in the short circuit test mode, the contact test mode and the double pulse test mode, and generate a corresponding double pulse signal in the double pulse test mode and send it to the FPGA; The FPGA is used to send the double pulse signal to the driving unit and control the shutdown of the protection IGBT device when the test circuit has an overcurrent; The driving unit is used to amplify the double pulse signal output by the FPGA and transmit it to each of the IGBT devices, so as to control the on and off of each of the IGBT devices in a double pulse test mode.

[0015] In a third aspect, the present invention provides a substrate testing method, which is applied to the substrate testing system described in the second aspect, the method comprising: The control module performs a short circuit test, a contact test, and a double pulse test on a target IGBT device of an IGBT chip on at least one DBC, and controls the shutdown protection of the IGBT device when an overcurrent occurs in the test circuit; The data acquisition module acquires the voltage waveform and the current waveform of the target IGBT device in a double-pulse test mode.

[0016] The beneficial effects of the present invention are: The present invention provides a substrate testing device, system and method. The substrate testing device includes a base, a first bearing assembly, a second bearing assembly, a first support assembly, a second support assembly, a lifting assembly, a DBC bottom plate, at least one probe assembly and at least one DBC, and the DBC includes an IBGT chip. One end of the lifting assembly, the first support assembly and the second support assembly are fixedly arranged on the base. The first bearing assembly is horizontally arranged on the top surface of the first support assembly, and the second bearing assembly is horizontally arranged on the top surface of the second support assembly and on the other end of the lifting assembly. The first bearing assembly carries the probe assembly. The probe assembly vertically penetrates the first bearing assembly, and the contact interface of the probe assembly extends from the bottom surface of the first bearing assembly. The second bearing assembly carries the DBC bottom plate and the DBC arranged on the DBC bottom plate. The first support assembly provides horizontal support force for the first bearing assembly and the probe assembly. The second support assembly provides horizontal support force for the second bearing assembly, the DBC bottom plate and the DBC, and performs lifting and lowering motion in conjunction with the lifting assembly. Driven by pneumatic pressure, the lifting assembly moves vertically, adjusting the height of the second support assembly and the DBC baseplate. This allows the electrodes of the IGBT chip on the DBC on the DBC baseplate to mate with the contact interface of the probe assembly, allowing the probe assembly to apply a test pulse signal to test the dynamic characteristics of the IGBT chip. The substrate test device completes the dynamic characteristics test of the IGBT chip during the DBC stage, before packaging it into an IGBT module. This avoids parasitic parameters introduced after packaging, improves the accuracy of test results, and reduces scrap loss costs. The lifting assembly in the substrate test device allows for flexible adjustment of the DBC height, improving test efficiency and accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solution of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 1 ; Figure 2 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 2 ; Figure 3 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 3 ; Figure 4 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 4 ; Figure 5Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 5 ; Figure 6 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 6 ; Figure 7 This is a structural diagram of the substrate testing system provided by the present invention.

[0019] Figure numerals: substrate testing device: 10; base: 11; first bearing assembly: 12; second bearing assembly: 13; first supporting assembly: 14; second supporting assembly: 15; lifting assembly: 16; DBC bottom plate: 17; probe assembly: 18; DBC: 19; DBC to be tested: 191; accompanying test DBC: 192; first probe element: 181; second probe element: 182; substrate testing system: 20; control module: 21; data acquisition module: 22; power supply module: 23; main control unit: 211; drive unit: 212; protection IGBT device: Q3; target IGBT device Q2; accompanying test IGBT device: Q1; first switch unit: K1; second switch unit: K2; third switch unit: K3; fourth switch unit: K4; first diode: D1; first capacitor: C1; first resistor: R1; first inductor: L1.

[0020] Specific implementation method In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the drawings in the present invention. It should be understood that the drawings in the present invention only serve the purpose of illustration and description and are not used to limit the scope of protection of the present invention. In addition, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in the present invention illustrate the operations implemented according to some embodiments of the present invention. It should be understood that the operations of the flowchart can be implemented out of sequence, and steps that have no logical context relationship can be reversed or implemented simultaneously. In addition, those skilled in the art, guided by the content of the present invention, can add one or more other operations to the flowchart, or remove one or more operations from the flowchart.

[0021] In addition, the described embodiments are only some embodiments of the present invention, rather than all embodiments. The components of the present invention generally described and shown in the drawings herein can be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present invention.

[0022] It should be noted that the term "comprising" will be used in the present invention to indicate the existence of the features claimed thereafter, but does not exclude the addition of other features.

[0023] In the field of chip testing, dynamic characteristics testing of IGBT chips is required to determine their switching losses. Currently, multiple IGBT chips with similar performance are typically packaged into an IGBT module, and dynamic characteristics testing is performed on the DBC within the IGBT module. After the IGBT chip is packaged into an IGBT module, the outer shell generates parasitic parameters such as parasitic inductance, parasitic resistance, and parasitic capacitance, which affect the accuracy of the DBC dynamic characteristics test results. Furthermore, the DBC testing process used in existing technologies is complex and inefficient.

[0024] Based on the above problems, the present invention proposes a substrate testing device, which adjusts the height of the DBC by upgrading the lifting movement of the assembly, so that the electrode of the IDBT chip on the DBC is docked with the contact interface of the probe assembly. The substrate testing device facilitates the dynamic characteristics test of the IGBT chip on the DBC, avoids the parasitic parameters caused by the IGBT chip packaging, and improves the accuracy of the dynamic characteristics test results. The lifting movement of the lifting assembly makes the substrate testing device suitable for DBCs of different thicknesses, thereby improving the flexibility and test efficiency of the substrate test.

[0025] Figure 1 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 1 , Figure 2 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 2 , Figure 3 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 3 ,like Figure 1-Figure 3 As shown, the substrate testing device 10 includes: a base 11, a first bearing assembly 12, a second bearing assembly 13, a first support assembly 14, a second support assembly 15, a lifting assembly 16, a DBC bottom plate 17, at least one probe assembly 18 and at least one DBC 19, and the DBC 19 includes an IGBT chip.

[0026] Optionally, refer to Figure 1-Figure 3 The substrate testing device 10 includes a base, two bearing assemblies, two support assemblies, a lifting assembly, a DBC bottom plate, at least one probe assembly, and at least one DBC. Specifically, the substrate testing device 10, used to test the dynamic characteristics of IGBT chips on a DBC, includes a base 11, a first bearing assembly 12, a second bearing assembly 13, a first support assembly 14, a second support assembly 15, a lifting assembly 16, a DBC bottom plate 17, at least one probe assembly 18, and at least one DBC 19, wherein the DBC 19 includes an IGBT chip.

[0027] One end of the lifting assembly 16, the first support assembly 14 and the second support assembly 15 are all fixedly arranged on the base 11; the first bearing assembly 12 is horizontally arranged on the top surface of the first support assembly 14, and the second bearing assembly 13 is horizontally arranged on the top surface of the second support assembly 15 and the other end of the lifting assembly 16.

[0028] Optionally, continue with reference to Figure 1-Figure 3 The base 11 serves as the foundation of the substrate testing apparatus 10 and provides structural support. One end of the lifting assembly 16, the first support assembly 14, and the second support assembly 15 are fixedly mounted on the base. The first support assembly 14 has the first bearing assembly 12 mounted horizontally on its top surface, providing horizontal support for the first bearing assembly 12. The second bearing assembly 13 is mounted horizontally on the top surface of the second support assembly 15 and at the other end of the lifting assembly 16, providing horizontal support for the second bearing assembly 13.

[0029] Figure 4 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 4 , Figure 5 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 5 , Figure 6 Schematic diagram of the structure of the substrate testing device provided by the present invention Figure 6 ,like Figure 4-Figure 6 As shown, the first carrier assembly 12 is used to carry the probe assembly 18, the probe assembly 18 passes through the first carrier assembly 12 in the vertical direction, and the contact interface of the probe assembly 18 passes through the bottom surface of the first carrier assembly 12; the second carrier assembly 13 is used to carry the DBC base plate 17, and the DBC 19 is set on the DBC base plate 17.

[0030] Optionally, refer to Figure 4 and Figure 6 The first carrier assembly 12 horizontally disposed on the top surface of the first support assembly 14 is used to carry the probe assembly 18. The probe assembly 18 vertically penetrates the first carrier assembly 12, and the contact interface (such as a metal probe) at the lower end of the probe assembly 18 extends from the bottom surface of the first carrier assembly 12.

[0031] The second bearing assembly 13 horizontally arranged on the top surface of the second supporting assembly 15 and the other end of the lifting assembly 16 is used to bear the DBC bottom plate 17. Figure 5 , DBC19 is installed on the DBC base plate 17, and the IGBT chip is integrated on the DBC19.

[0032] The contact interface of the probe assembly 18 extending from the bottom surface of the first carrier assembly 12 is used to connect to the electrodes of the IGBT chip on the DBC 19 on the DBC base plate 17 to achieve electrical connection between the probe assembly 18 and the IGBT chip.

[0033] The first supporting assembly 14 is used to support the first carrying assembly 12 and the probe assembly 18 , and the second supporting assembly 15 is used to support the second carrying assembly 13 , the DBC base plate 17 and the DBC 19 .

[0034] Optionally, continue with reference to Figure 1-Figure 3 The first support assembly 14 is used to provide stable horizontal support for the first carrier assembly 12 and the probe assembly 18 that passes through the first carrier assembly 12. The second support assembly 15 is used to provide horizontal support for the second carrier assembly 13, the DBC base plate 17, and the DBC 19, and is linked with the lifting assembly 16 to perform lifting motion.

[0035] The lifting assembly 16 is used to perform lifting motion in the vertical direction under air pressure drive to adjust the height of the second supporting assembly 13 and the DBC base plate 17 so that the electrodes of the IGBT chip on the DBC 19 on the DBC base plate 17 can be docked with the contact interface of the probe assembly 18.

[0036] Optionally, refer to Figure 1-Figure 3 The lifting assembly 16 is driven by air pressure to perform vertical lifting movement, and the second support assembly 15 and the lifting assembly 16 are linked to perform vertical lifting movement, driving the second bearing assembly 13 and the DBC base plate 17 supported by the second support assembly 15 to perform vertical lifting movement, thereby adjusting the height of the second bearing assembly 13 and the DBC base plate 17, so that the electrodes of the IGBT chip on the DBC 19 on the DBC base plate 17 are accurately docked with the contact interface of the probe assembly 18.

[0037] Specifically, in the initial state of the substrate testing device 10, the lifting assembly 16 is located at Figure 1 The lower position shown, at this time, the contact interface of the probe assembly 18 and the electrode of the IGBT chip on the DBC 19 on the DBC base plate 17 are in Figure 1 During the substrate test, the air pressure drives the lifting assembly 16 to rise, and the second support assembly 15 and the lifting assembly 16 rise in conjunction with each other, driving the second bearing assembly 13 and the DBC base plate 17 to move upward, so that the electrodes of the IGBT chip on the DBC 19 on the DBC base plate 17 are tightly connected to the contact interface of the probe assembly 18 ( Figure 3 ), forming an electrical path, and then applying a test pulse signal through the probe assembly 18, and collecting test data such as the switching waveform, to obtain the dynamic characteristics test results of the IGBT chip, and the switching loss parameters of the IGBT chip are obtained by testing.

[0038] When the test is completed, the air pressure drives the lifting assembly 16 to descend, and the second support assembly 15 and the lifting assembly 16 are linked to descend, driving the second bearing assembly 13 and the DBC base plate 17 to move downward, so that the electrodes of the IGBT chip on the DBC 19 on the DBC base plate 17 are separated from the contact interface of the probe assembly 18 ( Figure 1 ), complete a test cycle, which is convenient for replacing the next DBC so that the dynamic characteristics test of the IGBT chip on the next DBC can be carried out before packaging.

[0039] Completing the dynamic characteristics test of the IGBT chip during the DBC stage before packaging into an IGBT module avoids parasitic parameters introduced after packaging and improves the accuracy of test results. Furthermore, if a failure occurs during the DBC stage, only the DBC needs to be scrapped, not the entire IGBT module, significantly reducing scrap costs. The substrate testing device 10 eliminates the need for manual alignment of the IGBT chip's electrodes and the contact interface of the probe assembly 18, improving test efficiency and accuracy.

[0040] In the present invention, the substrate testing device includes a base, a first bearing assembly, a second bearing assembly, a first support assembly, a second support assembly, a lifting assembly, a DBC bottom plate, at least one probe assembly and at least one DBC, and the DBC includes an IBGT chip. One end of the lifting assembly, the first support assembly and the second support assembly are fixedly arranged on the base. The first bearing assembly is horizontally arranged on the top surface of the first support assembly, and the second bearing assembly is horizontally arranged on the top surface of the second support assembly and on the other end of the lifting assembly. The first bearing assembly carries the probe assembly. The probe assembly vertically penetrates the first bearing assembly, and the contact interface of the probe assembly extends from the bottom surface of the first bearing assembly. The second bearing assembly carries the DBC bottom plate and the DBC arranged on the DBC bottom plate. The first support assembly provides horizontal support force for the first bearing assembly and the probe assembly. The second support assembly provides horizontal support force for the second bearing assembly, the DBC bottom plate and the DBC, and performs lifting and lowering motion in conjunction with the lifting assembly. Driven by pneumatic pressure, the lifting assembly moves vertically, adjusting the height of the second support assembly and the DBC baseplate. This allows the electrodes of the IGBT chip on the DBC on the DBC baseplate to mate with the contact interface of the probe assembly, allowing the probe assembly to apply a test pulse signal to test the dynamic characteristics of the IGBT chip. The substrate test device completes the dynamic characteristics test of the IGBT chip during the DBC stage, before packaging it into an IGBT module. This avoids parasitic parameters introduced after packaging, improves the accuracy of test results, and reduces scrap loss costs. The lifting assembly in the substrate test device allows for flexible adjustment of the DBC height, improving test efficiency and accuracy.

[0041] As an optional implementation, the DBC 19 includes a DBC to be tested 191 and a companion test DBC 192 . The DBC to be tested 191 includes a first IGBT chip, and the companion test DBC 192 includes a second IGBT chip.

[0042] Optionally, continue with reference to Figure 5 A dual-station comparison test mechanism is introduced in substrate testing apparatus 10. DBC 19 includes a DBC under test 191 and a companion test 192. The first IGBT chip in DBC under test 191 is the target chip to be tested, while the second IGBT chip in DBC under test 192 serves as a reference chip or auxiliary chip for testing. Specifically, the second IGBT chip in DBC under test 192 can be a previously tested IGBT chip.

[0043] The first IGBT chip includes a first gate, a first emitter, and a first collector; the second IGBT chip includes a second gate, a second emitter, and a second collector.

[0044] Optionally, the first IGBT chip includes three electrodes, namely a first gate, a first emitter, and a first collector. Correspondingly, the second IGBT chip includes three electrodes, namely a second gate, a first emitter, and a first collector.

[0045] The DBC to be tested 191 is arranged in the first area of the DBC bottom plate 17 , and the accompanying DBC 192 is arranged in the second area of the DBC bottom plate.

[0046] Optionally, continue with reference to Figure 5 , the DBC bottom plate 17 is divided into a first area and a second area, and the DBC 191 to be tested is fixedly set in the first area of the DBC bottom plate 17 (such as Figure 5 The accompanying DBC192 is fixed in the second area of the DBC bottom plate (as shown in the left area). Figure 5 As shown in the right area), the DBC191 to be tested and the accompanying DBC192 are spatially arranged side by side, maintaining the same test environment (such as temperature, air pressure, etc.).

[0047] The present invention introduces a dual-station comparison test mechanism into a substrate testing device. The DBC includes a DBC to be tested located in the first area of the DBC baseplate and a companion DBC to be tested located in the second area of the DBC baseplate. The first IGBT chip in the DBC to be tested serves as the target chip to be tested, while the second IGBT chip in the companion DBC to be tested serves as the reference chip or auxiliary chip during testing. The first IGBT chip includes a first gate, a first emitter, and a first collector, while the second IGBT chip includes a second gate, a second emitter, and a second collector. The DBC to be tested and the companion DBC to be tested are spatially juxtaposed and share the same testing environment, enabling comparison and verification based on the DBC to be tested and the companion DBC to be tested.

[0048] As an optional implementation, the probe assembly 18 includes: a first probe element 181 and a second probe element 182, the first probe element 181 includes a first gate probe, a first emitter probe and a first collector probe, the first gate probe, the first emitter probe and the first collector probe are arranged in a first area of the first carrier assembly 12 at intervals, and the position of the first probe element 181 in the first area of the first carrier assembly 12 is vertically aligned with the position of the DBC 191 to be tested on the first area of the DBC base plate 17.

[0049] Optionally, continue with reference to Figure 4 and Figure 6 The probe assembly 18 includes a first probe element 181 and a second probe element 182. The first probe element 181 includes a first region (such as Figure 4 or Figure 6 The first gate probe, the first emitter probe and the first collector probe are shown in the left area.

[0050] Continue to refer to Figure 1-Figure 3 The position of the first probe element 181 in the first area of the first carrier assembly 12 is aligned in the vertical direction with the position of the DBC 191 to be tested on the first area of the DBC base plate 17, so that the first probe element 181 corresponds to the electrode of the first IGBT chip on the DBC 191 to be tested, which facilitates the docking of the contact interfaces of the probes at each level in the first probe element 181 with the electrodes of the first IGBT chip.

[0051] The second probe element 182 includes a second gate probe, a second emitter probe and a second collector probe. The second gate probe, the second emitter probe and the second collector probe are arranged in the second area of the first carrier component 12 at intervals. The position of the second probe element 182 in the second area of the first carrier component 12 is vertically aligned with the position of the accompanying test DBC192 on the second area of the DBC base plate 17.

[0052] Optionally, the second probe element 182 includes two probe elements arranged in a second area of the first supporting component 12 (eg, Figure 4 or Figure 6 The second gate probe, the second emitter probe, and the second collector probe are shown in the right area.

[0053] Continue to refer to Figure 1-Figure 3 The position of the second probe element 182 in the second area of the first carrier assembly 12 is aligned in the vertical direction with the position of the accompanying test DBC 192 on the second area of the DBC base plate 17, so that the second probe element 182 corresponds to the electrodes of the second IGBT chip on the accompanying test DBC 192, which facilitates the docking of the contact interfaces of the probes of each level in the second probe element 182 with the electrodes of the second IGBT chip.

[0054] The contact interfaces of the first gate probe, first emitter probe, and first collector probe are respectively connected to the first gate, first emitter, and first collector of the first IGBT chip under test on DBC191. The contact interfaces of the second gate probe, second emitter probe, and second collector probe are respectively connected to the second gate, second emitter, and second collector of the second IGBT chip under test on DBC192.

[0055] Optionally, after the lifting assembly 16 ascends, the first gate probe connects to the first gate of the first IGBT chip on the DBC 191 under test, the first emitter probe connects to the first emitter of the first IGBT chip, and the first collector probe connects to the first collector of the first IGBT chip. This forms an independent test path, enabling precise transmission of test signals (gate drive pulse signal and collector current).

[0056] Correspondingly, the second gate probe connects to the second gate of the second IGBT chip on the companion test DBC192, the second emitter probe connects to the second emitter of the second IGBT chip, and the second collector probe connects to the second collector of the second IGBT chip, forming an independent reference test path that operates in parallel with the path under test.

[0057] Based on this, under the dual-station comparison test mechanism introduced in the substrate testing device 10, an independent probe assembly is set at the corresponding position of each station where the DCB is located to achieve independent transmission of signals in the dual-station channel.

[0058] In the present invention, a probe assembly includes a first probe element and a second probe element. The first probe element includes a first gate probe, a first emitter probe, and a first collector probe, which are interspersed and spaced apart in a first region of a first carrier assembly. The first probe element is positioned in the first region of the first carrier assembly and vertically aligned with the position of a DBC under test on a first region of a DBC baseplate. This allows the contact interfaces of the first gate probe, first emitter probe, and first collector probe to respectively interface with the first gate, first emitter, and first collector of a first IGBT chip on the DBC under test. The second probe element includes a second gate probe, second emitter probe, and second collector probe, which are interspersed and spaced apart in a second region of the first carrier assembly. The second probe element is positioned in the second region of the first carrier assembly and vertically aligned with the position of a DBC under test on a second region of the DBC baseplate. This allows the contact interfaces of the second gate probe, second emitter probe, and second collector probe to respectively interface with the second gate, second emitter, and second collector of a second IGBT chip on the DBC under test. This achieves independent signal transmission between the dual-station test channel and the reference test channel.

[0059] As an optional implementation, when the lifting assembly 16 rises to the contact interface where the electrode of the IGBT chip on the DBC 19 docks with the probe assembly 18 , a closed space is formed between the first carrier assembly 12 and the second carrier assembly 13 , and the closed space is filled with nitrogen.

[0060] Optionally, continue with reference to Figure 3 When lift assembly 16 reaches the test position, the electrodes of the IGBT chip on DBC 19 mate with the contact interfaces of probe assembly 18, creating a sealed space between first carrier assembly 12 and second carrier assembly 13, effectively forming a closed cavity. This sealed space encompasses the electrodes of the IGBT chip on DBC 19 and the contact interfaces of probe assembly 18, ensuring that the test area is isolated from the external environment.

[0061] Nitrogen is also filled in the confined space. As an inert gas, nitrogen can reduce the oxygen concentration and moisture content in the confined space after filling, and prevent sparks from occurring during high-voltage testing.

[0062] In this invention, when the lifting assembly rises to the contact interface between the IGBT chip's electrode and the probe assembly on the DBC, a sealed space is formed between the first and second support assemblies, isolating the test area from the external environment. Nitrogen is filled into the sealed space to prevent sparking during high-voltage testing, enhancing the safety of substrate testing.

[0063] As an optional implementation, the device further includes an air pump connected to the lifting assembly 16 via an air pressure circuit.

[0064] Optionally, an air pump (not shown) is provided in the substrate testing device, and the air pump serves as a power source and is connected to the lifting assembly 16 via a pneumatic circuit. For example, the pneumatic circuit may include a cylinder, a solenoid valve, and the like.

[0065] The air pressure released by the air pump through the air pressure circuit drives the lifting assembly 16 to perform piston movement, so that the lifting assembly 16 performs lifting movement in the vertical direction under the drive of the air pressure.

[0066] Optionally, when the air pressure drives the lift, the air pump inputs compressed air into the cylinder, and the piston inside the lifting assembly 16 overcomes gravity and friction and moves upward under the action of the air pressure, driving the second supporting assembly 13 and the DBC base plate 17 to rise until the electrodes of the IGBT chip on the DBC 19 on the DBC base plate 17 are docked with the contact interface of the probe assembly 18 (such as Figure 1 shown).

[0067] After the test is completed, when the air pressure is released and dropped, the air pump stops supplying air, and the air pressure in the cylinder is released through the exhaust port of the solenoid valve. The piston inside the lifting assembly 16 drops under the action of gravity or the return spring, separating the electrode of the IGBT chip on the DBC19 from the contact interface of the probe assembly 18 (such as Figure 3 shown).

[0068] In the present invention, an air pump is provided in the substrate testing device and is connected to the lifting assembly via a pneumatic circuit. The air pump, through the air pressure released by the pneumatic circuit, drives the lifting assembly to perform piston motion, causing the lifting assembly to move vertically under the pneumatic pressure. This achieves the air pump's ability to drive the lifting assembly up and down.

[0069] The present invention also provides a substrate testing system. Figure 7 The schematic diagram of the structure of the substrate testing system provided by the present invention is as follows: Figure 7 As shown, the substrate testing system 20 includes: a control module 21, a data acquisition module 22, a test circuit and Figure 1 In the substrate testing device 10 shown, the testing circuit includes at least one protection IGBT device Q3.

[0070] Optionally, refer to Figure 7 The control module 21, the data acquisition module 22, the test circuit and the substrate test device 10 constitute a substrate test system 20. The test circuit includes at least one protection IGBT device Q3.

[0071] The IGBT devices of the IGBT chips on each DBC 19 in the substrate testing device 10 are connected to the test circuit via the corresponding probe assembly 18 in the substrate testing device 10 .

[0072] Optionally, continue with reference to Figure 7In the substrate testing device 10 , the first IGBT device Q2 of the first IGBT chip under test on DBC191 is connected to the test circuit via the first probe element 181 , and the second IGBT device of the second IGBT chip under test on DBC192 is connected to the test circuit via the second probe element 182 .

[0073] The IGBT device in the IGBT chip on the DBC 19 is connected to the test circuit through the probe assembly 18 in the substrate testing device 10 to achieve electrical connection, so as to perform dynamic characteristic test of the IGBT device in the IGBT chip through an independent test channel.

[0074] The control module 21 is connected to the test circuit and each IGBT device; the data acquisition module 22 is connected to a target IGBT device of an IGBT chip on at least one DBC 19 .

[0075] Optionally, continue with reference to Figure 7 The control module 21 is connected to the test circuit, the first IGBT device Q2 and the second IGBT device Q1 through the I / O interface, so as to control the test circuit and the first IGBT device Q2 and the second IGBT device Q1 based on this connection relationship.

[0076] Continue to refer to Figure 7 The data acquisition module 22 is connected to the target IGBT device of the IGBT chip on at least one DBC19, wherein the target IGBT device of the IGBT chip on at least one DBC19 can be the first IGBT device Q2 of the first IGBT chip on the DBC191 to be tested, so that the data acquisition module 22 collects data of the first IGBT device Q2 in real time for analyzing the test results.

[0077] The control module 21 is used to perform short circuit test, contact test and double pulse test on the target IGBT device, and control the shutdown of the protective IGBT device Q3 when the test circuit is overcurrent. The protective IGBT device Q3 is used to perform overcurrent protection on the test circuit.

[0078] Optionally, the control module 21 can communicate with an external host computer ( Figure 7 The host computer receives the test mode selected by the user, and the test mode can be a short circuit test, a contact test, and a double pulse test.

[0079] Control module 21 receives the test mode identifier sent by the host computer and performs the test corresponding to the test mode identifier on the target IGBT device (i.e., first IGBT device Q2). During the test, it monitors the current in the test circuit and controls the protection IGBT device Q3 to shut down if the current is too high. Because the protection IGBT device Q3 shuts down quickly, the protection IGBT device Q3 provides rapid overcurrent protection for the test circuit, preventing damage to the IGBT devices and the test circuit, thereby improving the safety of the test circuit.

[0080] Specifically, the control module 21 first performs a contact test on the target IGBT device to determine whether the target IGBT device's electrodes properly contact the contact interface in the probe assembly 18. After passing the contact test, the control module 21 performs a short-circuit test on the target IGBT device to determine whether the test circuit of the target IGBT device is short-circuited. After passing the short-circuit test, the control module 21 performs a double-pulse test on the target IGBT device to control the opening and closing of the gate and emitter of the target IGBT device, as well as the conduction and cutoff of the anti-parallel diode integrated in the target IGBT device.

[0081] The data acquisition module 22 is used to acquire the voltage waveform and current waveform of the target IGBT device in the double pulse test mode.

[0082] Optionally, the data acquisition module 22 collects the voltage and current waveforms of the target IGBT device (i.e., the second IGBT device Q2) in real time when the target IGBT device is turned on and off in the dual-pulse test mode, and analyzes them to obtain turn-on and turn-off test results of the target IGBT device. Exemplarily, the data acquisition module can be an oscilloscope, which uses an oscilloscope probe to collect the voltage and current waveforms of the target IGBT device in real time.

[0083] It is worth noting that based on the collected current waveform of the target IGBT device under the dual-pulse test mode, the reverse recovery charge of the anti-parallel diode integrated in the target IGBT device is calculated. The reverse recovery charge of the anti-parallel diode is used to characterize the dynamic characteristics of the anti-parallel diode when switching from the on state to the off state, and then the switching characteristics of the target IGBT device are determined.

[0084] In the present invention, a substrate testing system comprises a control module, a data acquisition module, a test circuit, and a substrate testing device. The test circuit includes at least one protection IGBT device. The IGBT device of each IGBT chip on a DBC in the substrate testing device is connected to the test circuit via a corresponding probe assembly in the substrate testing device. The probe assembly in the substrate testing device connects the IGBT device to the test circuit, achieving electrical connection, allowing dynamic characteristics testing of the IGBT device in the IGBT chip to be performed through independent test channels. The control module is connected to the test circuit and each IGBT device; the data acquisition module is connected to a target IGBT device in at least one IGBT chip on a DBC. The control module performs short-circuit testing, contact testing, and dual-pulse testing on the target IGBT device, and controls the shutdown of the protection IGBT device when the test circuit experiences overcurrent. The protection IGBT device provides overcurrent protection for the test circuit. In dual-pulse testing mode, the data acquisition module collects the voltage and current waveforms of the target IGBT device in real time when the target IGBT device is turned on and off, analyzing the voltage and current waveforms to obtain turn-on and turn-off test results for the target IGBT device. It can realize short-circuit test, contact test and double-pulse test on the target IGBT device, and improve the efficiency of dynamic characteristic test.

[0085] As an optional implementation, the test circuit further includes: a plurality of switch units. The control module 21 is respectively connected to each switch unit in the test circuit and the protection IGBT device Q3; and the control module 21 is connected to the gate of each IGBT device.

[0086] Optionally, continue with reference to Figure 7 ,The test circuit also includes multiple switch units, such as Figure 7 The control module 21 is connected to the first switch unit K1, the second switch unit K2, the third switch unit K3, the fourth switch unit K4 and the protection IGBT device Q3 through the I / O interface to control the on and off of the first switch unit K1, the second switch unit K2, the third switch unit K3, the fourth switch unit K4 and the protection IGBT device Q3.

[0087] The control module 21 is respectively connected to the gate of the first IGBT device Q2 (target IGBT device) and the gate of the second IGBT device Q1, so as to transmit a dual pulse signal to the first IGBT device Q2 and the second IGBT device Q1 in the dual pulse test mode to control the on and off of the first IGBT device Q2 and the second IGBT device Q1.

[0088] It is worth mentioning that, continue to refer to Figure 7The test circuit further includes a first diode D1, a first capacitor C1, a first resistor R1, and a first inductor L1. The first diode D1 is used to prevent leakage, the first capacitor C1 is used for charging, and the first resistor R1 is used for discharging when the second switch unit K2 is closed.

[0089] The data acquisition module 22 is connected to the gate, emitter and collector of the target IGBT device respectively.

[0090] Optionally, continue with reference to Figure 7 The three terminals of the data acquisition module 22 are respectively connected to the gate, emitter, and collector of the first IGBT period Q2 (i.e., the target IGBT device) to collect the voltage waveform and current waveform of the first IGBT period Q2 when it is turned on and off in real time, thereby obtaining the turn-on and turn-off test results of the first IGBT period Q2 and analyzing the switching characteristics of the first IGBT device Q2.

[0091] In the present invention, the test circuit also includes multiple switching units. A control module is connected to each switching unit and protection IGBT device in the test circuit to control the on and off of each switching unit and protection IGBT device. The control module is connected to the gate of each IGBT device and transmits a dual-pulse signal to each IGBT device in a dual-pulse test mode to control the on and off of each IGBT device. A data acquisition module is connected to the gate, emitter, and collector of the target IGBT device to collect real-time voltage and current waveforms when the target IGBT is turned on and off, thereby determining the switching characteristics of the target IGBT device.

[0092] As an optional implementation, the system further includes a power supply module 23. The power supply end of the power supply module 23 is connected to the control module 21 and the test circuit respectively. The power supply module 23 is used to supply power to the control module 21 and provide voltage to the test circuit.

[0093] Optionally, optionally, continue with reference to Figure 7 The power supply end of the power supply module 23 is connected to the control module 21 to provide power to the control module 21. The power supply end of the power supply module 23 is also connected to the test circuit to provide voltage for the test circuit.

[0094] Specifically, the power module 23 charges the first capacitor C1 in the test circuit and uses a multimeter to detect the voltage across the first capacitor C1. After the first capacitor C1 is charged to a preset voltage value, the power module 23 is disconnected from the output of the test circuit.

[0095] In the present invention, a power module is provided in the substrate testing system. The power supply end of the power module is connected to the control module and the test circuit respectively, supplying power to the control module and charging the test circuit. The power supply provides the required electrical energy for the control module and the test circuit.

[0096] As an optional implementation, the control module 21 includes: a main control unit 211 and a driving unit 212. The main control unit 211 includes an MCU and an FPGA. The MCU is communicatively connected to the FPGA, and the FPGA is also communicatively connected to the driving unit.

[0097] Optionally, continue with reference to Figure 7 The control module 21 includes a main control unit 211 and a drive unit 212 communicatively connected to the main control unit 211. The main control unit 211 includes a microcontroller unit (MCU) and a field-programmable gate array (FPGA) communicatively connected to the MCU. The FPGA is communicatively connected to the drive unit 212.

[0098] The MCU is connected to each switch unit in the test circuit; the FPGA is connected to the gate of the protection IGBT device Q3; and the driving unit 212 is connected to the gate of each IGBT device.

[0099] Optionally, continue with reference to Figure 7 The MCU is connected to the first switch unit K1, the second switch unit K2, the third switch unit K3, the fourth switch unit K4 and the protection IGBT device Q3 through the I / O interface to control the on and off of the first switch unit K1, the second switch unit K2, the third switch unit K3 and the fourth switch unit K4 in each test mode.

[0100] The pin of the FPGA is connected to the gate of the protection IGBT device Q3. When an overcurrent is detected in the test circuit, the protection IGBT device Q3 is controlled to be turned off, thereby realizing overcurrent protection of the test circuit.

[0101] The driving unit 212 is connected to the gate of the first IGBT device Q2 (target IGBT device) and the gate of the second IGBT device Q1 , respectively, to control the on and off of the first IGBT device Q2 and the second IGBT device Q1 .

[0102] The MCU is used to control the on and off of each switch unit in the test circuit in the short-circuit test mode, contact test mode and double-pulse test mode, and generate the corresponding pulse signal in the double-pulse test mode and send it to the FPGA.

[0103] Optionally, the MCU controls the on and off of the first switch unit K1, the second switch unit K2, the third switch unit K3, and the fourth switch unit K4 in the short circuit test mode, the contact test mode, and the double pulse test mode, and generates a corresponding double pulse signal in the double pulse test mode and sends it to the FPGA.

[0104] The MCU may include a pulse generator, which is used to generate a dual pulse signal with adjustable pulse width and amplitude in a dual pulse test mode.

[0105] The FPGA is used to send the double pulse signal to the driving unit 212 and control the shutdown protection of the IGBT device Q3 when the test circuit is overcurrent.

[0106] Optionally, the FPGA transmits the dual pulse signal generated by the MCU to the driving unit 212 , and when the FPGA detects an overcurrent in the test circuit, it controls the protective IGBT device Q3 to turn off, thereby achieving overcurrent protection for the test circuit.

[0107] The driving unit 212 is used to amplify the dual pulse signal output by the FPGA and transmit it to each IGBT device to control the on and off of each IGBT device in the dual pulse test mode.

[0108] Optionally, the driving unit 212 amplifies the dual pulse signal transmitted by the FPGA in the dual pulse test mode and transmits the amplified signal to the first IGBT device Q2 and the second IGBT device Q1 to control the on and off of the first IGBT device Q2 and the second IGBT device Q1.

[0109] In the present invention, the control module includes a main control unit and a drive unit 212 communicatively connected to the main control unit. The main control unit includes an MCU and an FPGA communicatively connected to the MCU. The FPGA is communicatively connected to the drive unit 212. The MCU is respectively connected to the first switch unit K1, the second switch unit K2, the third switch unit K3, the fourth switch unit K4, and the protection IGBT device Q3 to control the on and off of the first switch unit K1, the second switch unit K2, the third switch unit K3, and the fourth switch unit K4 in short-circuit test mode, contact test mode, and dual-pulse test mode. In the dual-pulse test mode, it generates a corresponding dual-pulse signal and transmits it to the FPGA. The FPGA is connected to the gate of the protection IGBT device Q3. When the FPGA detects an overcurrent in the test circuit, it controls the protection IGBT device Q3 to shut down, thereby implementing overcurrent protection for the test circuit. The drive unit 212 is connected to the gate of each IGBT device. In the dual-pulse test mode, the drive unit amplifies the dual-pulse signal transmitted by the FPGA and transmits it to each IGBT device to control the on and off of each IGBT device. Realize short-circuit test, contact test and double-pulse test on target IGBT devices, improving test efficiency and test accuracy.

[0110] Based on the same inventive concept, the present invention also provides a substrate testing method corresponding to the substrate testing system. Since the principle of solving the problem by the method in the present invention is similar to that of the above-mentioned substrate testing system of the present invention, the implementation of the method can refer to the implementation of the system, and the repeated parts will not be repeated.

[0111] The substrate testing method is applied to the substrate testing system described in the above embodiment, and the method includes: The control module 21 performs a short circuit test, a contact test, and a double pulse test on a target IGBT device of an IGBT chip on at least one DBC 19 , and controls the shutdown of the protective IGBT device Q3 when an overcurrent occurs in the test circuit.

[0112] The data acquisition module 22 acquires the voltage waveform and the current waveform of the target IGBT device in the double pulse test mode.

[0113] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, the specific working processes of the systems and devices described above can refer to the corresponding processes in the method embodiments, and will not be repeated in the present invention. In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation. For example, multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0114] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. If the functions are implemented as software functional units and sold or used as independent products, they may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or a portion of the technical solution, may be embodied in the form of a software product. This computer software product, stored in a storage medium, includes instructions for causing a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage media include various media capable of storing program code, such as USB flash drives, mobile hard drives, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical disks.

[0115] The above is only a specific implementation of the present invention, but the protection scope of the present invention is not limited to this. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A substrate testing device, characterized in that: include: A base, a first bearing assembly, a second bearing assembly, a first supporting assembly, a second supporting assembly, a lifting assembly, a DBC bottom plate, at least one probe assembly, and at least one DBC, wherein the DBC includes an insulated gate bipolar transistor IGBT chip; One end of the lifting assembly, the first supporting assembly, and the second supporting assembly are all fixedly disposed on the base; The first bearing assembly is horizontally arranged on the top surface of the first supporting assembly, and the second bearing assembly is horizontally arranged on the top surface of the second supporting assembly and the other end of the lifting assembly; The first bearing assembly is used to bear the probe assembly, the probe assembly vertically passes through the first bearing assembly, and the contact interface of the probe assembly passes through the bottom surface of the first bearing assembly; the second bearing assembly is used to bear the DBC bottom plate, and the DBC is arranged on the DBC bottom plate; The first supporting assembly is used to support the first bearing assembly and the probe assembly, and the second supporting assembly is used to support the second bearing assembly, the DBC base plate and the DBC; The lifting assembly is used to perform lifting movement in the vertical direction under air pressure drive to adjust the height of the second supporting assembly and the DBC base plate so that the electrodes of the IGBT chip on the DBC on the DBC base plate are docked with the contact interface of the probe assembly.

2. The device according to claim 1, characterized in that The DBC includes: a DBC to be tested and a companion DBC, wherein the DBC to be tested includes a first IGBT chip, and the companion DBC includes a second IGBT chip; The first IGBT chip includes a first gate, a first emitter and a first collector; The second IGBT chip includes a second gate, a second emitter and a second collector; The DBC to be tested is arranged in the first area of the DBC bottom plate, and the accompanying DBC to be tested is arranged in the second area of the DBC bottom plate.

3. The device according to claim 2, characterized in that The probe assembly includes: a first probe element and a second probe element, the first probe element includes a first gate probe, a first emitter probe, and a first collector probe, the first gate probe, the first emitter probe, and the first collector probe are arranged in a first area of the first carrier assembly at intervals, and the position of the first probe element in the first area of the first carrier assembly is vertically aligned with the position of the DBC to be tested on the first area of the DBC base plate; The second probe elements include a second gate probe, a second emitter probe, and a second collector probe, wherein the second gate probe, the second emitter probe, and the second collector probe are arranged in a second region of the first carrier assembly at intervals, and a position of the second probe elements in the second region of the first carrier assembly is vertically aligned with a position of the accompanying DBC on the second region of the DBC base plate; The contact interfaces of the first gate probe, the first emitter probe and the first collector probe are respectively connected to the first gate, the first emitter and the first collector of the first IGBT chip on the DBC to be tested; Contact interfaces of the second gate probe, the second emitter probe, and the second collector probe are respectively connected to the second gate, the second emitter, and the second collector of the second IGBT chip on the companion test DBC.

4. The device according to claim 1, characterized in that When the lifting assembly rises to the point where the electrode of the IGBT chip on the DBC docks with the contact interface of the probe assembly, a closed space is formed between the first supporting assembly and the second supporting assembly, and the closed space is used to be filled with nitrogen.

5. The device according to claim 1, characterized in that The device further comprises: an air pump; The air pump is connected to the lifting assembly via an air pressure circuit; The air pump releases air pressure through the air pressure circuit to drive the lifting assembly to perform piston movement, so that the lifting assembly performs lifting movement in the vertical direction under the drive of air pressure.

6. A substrate testing system, characterized in that: include: A control module, a data acquisition module, a test circuit, and a substrate testing device according to any one of claims 1 to 5, wherein the test circuit includes at least one protection IGBT device; The IGBT device of the IGBT chip on each DBC in the substrate testing device is connected to the test circuit via the corresponding probe assembly in the substrate testing device; The control module is connected to the test circuit and each of the IGBT devices; the data acquisition module is connected to a target IGBT device of an IGBT chip on at least one DBC; The control module is used to perform a short circuit test, a contact test, and a double pulse test on the target IGBT device, and control the shutdown of the protection IGBT device when the test circuit has an overcurrent; The data acquisition module is used to acquire the voltage waveform and current waveform of the target IGBT device in a double pulse test mode; The protection IGBT device is used to perform overcurrent protection on the test circuit.

7. The system according to claim 6, characterized in that The test circuit further includes: a plurality of switch units; The control module is connected to each switch unit in the test circuit and the protection IGBT device respectively; and the control module is connected to the gate of each IGBT device; The data acquisition module is connected to the gate, emitter and collector of the target IGBT device respectively.

8. The system according to claim 6, wherein: The system further includes: a power supply module; The power supply end of the power supply module is connected to the control module and the test circuit respectively; The power supply module is used to supply power to the control module and provide voltage to the test circuit.

9. The system according to claim 7, wherein: The control module includes: a main control unit and a driving unit, wherein the main control unit includes a micro control unit MCU and a field programmable gate array FPGA; The MCU is communicatively connected to the FPGA, and the FPGA is also communicatively connected to the driving unit; The MCU is connected to each switch unit in the test circuit; The FPGA is connected to the gate of the protection IGBT device; The driving unit is connected to the gate of each IGBT device; The MCU is used to control the on and off of each switch unit in the test circuit in the short circuit test mode, the contact test mode and the double pulse test mode, and generate a corresponding double pulse signal in the double pulse test mode and send it to the FPGA; The FPGA is used to send the double pulse signal to the driving unit and control the shutdown of the protection IGBT device when the test circuit has an overcurrent; The driving unit is used to amplify the double pulse signal output by the FPGA and transmit it to each of the IGBT devices, so as to control the on and off of each of the IGBT devices in a double pulse test mode.

10. A substrate testing method, characterized in that: Applied to the substrate testing system according to any one of claims 6 to 9, the method comprising: The control module performs a short circuit test, a contact test, and a double pulse test on a target IGBT device of an IGBT chip on at least one DBC, and controls the shutdown protection of the IGBT device when an overcurrent occurs in the test circuit; The data acquisition module acquires the voltage waveform and the current waveform of the target IGBT device in a double-pulse test mode.

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