A feedback control circuit for high-voltage output power supply

Abstract

The present invention belongs to the technical field of high-voltage output control, and specifically relates to a feedback control circuit for a high-voltage output power supply. This invention, through a peripheral decoding circuit or control circuit, sequentially drives corresponding switches on or off according to the desired output voltage level, changing the equivalent voltage divider ratio, thereby achieving rough regulation of VOUT. A low-voltage control circuit is connected in series with a high-voltage control circuit, and fine-tuning of the output voltage VOUT is achieved through internal voltage divider units and switches. A high-voltage buffer subcircuit is connected in parallel with the high-voltage control circuit, and a low-voltage buffer subcircuit is connected in parallel with the low-voltage control circuit to absorb and clamp voltage spikes caused by switch switching, sudden load changes, and other factors, preventing feedback node overshoot from damaging control accuracy and downstream devices. When the circuit is powered, a protection circuit provides power supply protection to avoid circuit abnormalities.

Description

Technical Field

[0001] The present invention belongs to the technical field of high-voltage output control, and in particular relates to a feedback control circuit applied to a high-voltage output power supply. Background Art

[0002] In the existing power control system, if you want to adjust the VOUT output voltage, you can control Figure 3 When VOUT is within a relatively low voltage range (≤5V), the MOS switch and voltage divider resistor integrated in the BCD process can accurately adjust the feedback voltage to the required value. By digitally controlling the on / off of the MOS tubes at different gears, coarse and fine adjustments of the output voltage can be easily achieved.

[0003] However, when the application scenario expands to high-voltage output (VOUT>5V), MOS transistors in traditional BCD processes face the problem of insufficient gate voltage withstand. In high-voltage systems, the voltage divider network must withstand higher voltage differentials. Once the gate-source voltage or drain-source voltage of the switching MOS transistor on the feedback side exceeds its process limits, the device is prone to overvoltage breakdown or increased leakage, resulting in unstable feedback control, reduced output accuracy, and even reliability risks. Furthermore, switching under high-voltage output generates large voltage spikes and high-frequency noise. Traditional voltage divider circuits have limited ability to suppress transient spikes, which can easily cause loop oscillation or malfunction. Summary of the Invention

[0004] The purpose of the present invention is to provide a feedback control circuit for a high-voltage output power supply, which can realize multi-stage, high-precision output voltage regulation under high-voltage environment.

[0005] The technical solutions adopted by the present invention are as follows:

[0006] A feedback control circuit for a high-voltage output power supply, comprising:

[0007] A high-voltage control circuit is used to control the output voltage. The high-voltage control circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a switch Q1, a switch Q2, a switch Q3, a switch Q4, a switch Q5, a switch Q6, a switch Q7, and a switch Q8. One end of the resistor R1 is connected to one end of the resistor R2, one end of the resistor R3, one end of the resistor R4, one end of the resistor R5, one end of the resistor R6, one end of the resistor R7, and one end of the resistor R8. The other end of the resistor R1 is connected to one end of the switch Q1. The resistor R2 the other end of resistor R3 is connected to one end of switch Q3, the other end of resistor R4 is connected to one end of switch Q4, the other end of resistor R5 is connected to one end of switch Q5, the other end of resistor R6 is connected to one end of switch Q6, the other end of resistor R7 is connected to one end of switch Q7, the other end of resistor R8 is connected to one end of switch Q8, and the other end of switch Q1 is connected to the other end of switch Q2, the other end of switch Q3, the other end of switch Q4, the other end of switch Q5, the other end of switch Q7, and the other end of switch Q8;

[0008] A low-voltage control circuit, a high-voltage control circuit connected to the low-voltage control circuit, for coordinating with the high-voltage control circuit to gradually fine-tune the output voltage VOUT;

[0009] a buffer circuit, the buffer circuit comprising a high-voltage buffer subcircuit and a low-voltage buffer subcircuit, the high-voltage buffer subcircuit being connected to the high-voltage control circuit, and the low-voltage buffer subcircuit being connected to the low-voltage control circuit, for clamping voltage spikes;

[0010] The protection circuit is connected to the low-voltage control circuit to provide power supply protection.

[0011] In a preferred embodiment, the low-voltage control circuit includes a resistor R9, a switch Q9, a switch Q10, a resistor R10, a switch Q11, a switch Q12, a resistor R11, a switch Q13, a switch Q14, a resistor R12, a switch Q15, and a switch Q16. One end of the resistor R9 is connected to one end of the switch Q9, one end of the switch Q10, and the other end of the switch Q1. The other end of the resistor R9 is connected to the other end of the switch Q9, the other end of the switch Q10, one end of the resistor R10, one end of the switch Q11, and one end of the switch Q12. The other end of the resistor R10 is connected to the other end of the switch Q11, the other end of the switch Q12, one end of the resistor R11, one end of the switch Q13, and one end of the switch Q14. The other end of the resistor R11 is connected to the other end of the switch Q13, the other end of the switch Q14, one end of the resistor R12, one end of the switch Q15, and one end of the switch Q16. The other end of the resistor R12 is connected to the other end of the switch Q15 and the other end of the switch Q16.

[0012] In a preferred embodiment, the high-voltage buffer subcircuit includes a resistor R13, a capacitor C1, a resistor R14, a capacitor C2, a resistor R15, a capacitor C3, a resistor R16, a capacitor C4, a resistor R17, a capacitor C5, a resistor R18, a capacitor C6, a resistor R19, a capacitor C7, a resistor R20, and a capacitor C8. One end of the resistor R13 is connected to one end of the switch Q1, the other end of the resistor R13 is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to the other end of the switch Q1, one end of the resistor R14 is connected to one end of the switch Q2, the other end of the resistor R14 is connected to one end of the capacitor C2, the other end of the capacitor C2 is connected to the other end of the switch Q2, one end of the resistor R15 is connected to one end of the switch Q3, the other end of the resistor R15 is connected to one end of the capacitor C3, the other end of the capacitor C3 is connected to the other end of the switch Q3, and the resistor R16 is connected to one end of the switch Q3. One end is connected to one end of the switch Q4, the other end of the resistor R16 is connected to one end of the capacitor C4, the other end of the capacitor C4 is connected to the other end of the switch Q4, one end of the resistor R17 is connected to one end of the switch Q5, the other end of the resistor R17 is connected to one end of the capacitor C5, the other end of the capacitor C5 is connected to the other end of the switch Q5, one end of the resistor R18 is connected to one end of the switch Q6, the other end of the resistor R18 is connected to one end of the capacitor C6, the other end of the capacitor C6 is connected to the other end of the switch Q6, one end of the resistor R19 is connected to one end of the switch Q7, the other end of the resistor R19 is connected to one end of the capacitor C7, the other end of the capacitor C7 is connected to the other end of the switch Q7, one end of the resistor R20 is connected to one end of the switch Q8, the other end of the resistor R20 is connected to one end of the capacitor C8, and the other end of the capacitor C8 is connected to the other end of the switch Q8.

[0013] In a preferred embodiment, the low-voltage buffer subcircuit includes a resistor R21, a capacitor C9, a resistor R22, a capacitor C10, a resistor R23, a capacitor C11, a resistor R24, and a capacitor C12. One end of the resistor R21 is connected to one end of the switch Q10, the other end of the resistor R21 is connected to one end of the capacitor C9, the other end of the capacitor C9 is connected to the other end of the switch Q10, one end of the resistor R22 is connected to one end of the switch Q12, the other end of the resistor R22 is connected to one end of the capacitor C10, the other end of the capacitor C10 is connected to the other end of the switch Q12, one end of the resistor R23 is connected to one end of the switch Q14, the other end of the resistor R23 is connected to one end of the capacitor C11, the other end of the capacitor C11 is connected to the other end of the switch Q14, one end of the resistor R24 ​​is connected to one end of the switch Q16, the other end of the resistor R24 ​​is connected to one end of the capacitor C12, and the other end of the capacitor C12 is connected to the other end of the switch Q16.

[0014] In a preferred solution, the protection circuit includes an NTC thermistor RT, and one end of the NTC thermistor RT is connected to the other end of the resistor R12.

[0015] In a preferred embodiment, the switches Q1, Q2, Q3, Q4, Q5, Q7, and Q8 are LDMOS transistors V1, V2, V3, V4, V5, V6, V7, and V8, respectively. The drain of the LDMOS transistor V1 is connected to the other end of the resistor R1 and one end of the resistor R13. The source of the LDMOS transistor V1 is connected to the source of the LDMOS transistor V2, the source of the LDMOS transistor V3, the source of the LDMOS transistor V4, the source of the LDMOS transistor V5, the source of the LDMOS transistor V6, the source of the LDMOS transistor V7, the source of the LDMOS transistor V8, the other end of the capacitor C1, the other end of the capacitor C2, the other end of the capacitor C3, and the other end of the capacitor C1. The drain of the LDMOS transistor V8 is connected to the other end of the resistor R8 and one end of the resistor R20.

[0016] In a preferred embodiment, the switches Q9, Q10, Q11, Q12, Q13, Q14, Q15, and Q16 are CMOS transistors V9, V10, V11, V12, V13, V14, V15, and V16, respectively. The source of the CMOS transistor V10 is connected to the drain of the CMOS transistor V9, one end of the resistor R21, and one end of the resistor R9. The drain of the CMOS transistor V10 is connected to the source of the CMOS transistor V9, the other end of the capacitor C9, the other end of the resistor R9, one end of the resistor R22, one end of the resistor R10, and the end of the CMOS transistor V11. The drain is connected to the source of the CMOS transistor V12. The drain of the CMOS transistor V12 is connected to the source of the CMOS transistor V11, the other end of the capacitor C10, the other end of the resistor R10, one end of the resistor R23, one end of the resistor R11, the drain of the CMOS transistor V13, and the source of the CMOS transistor V14. The drain of the CMOS transistor V14 is connected to the source of the CMOS transistor V13, the other end of the capacitor C11, the other end of the resistor R11, one end of the resistor R24, one end of the resistor R12, the drain of the CMOS transistor V15, and the source of the CMOS transistor V16. The drain of the CMOS transistor V16 is connected to the source of the CMOS transistor V15, the other end of the capacitor C12, and the other end of the resistor R12.

[0017] The technical effects achieved by the present invention are:

[0018] The present invention uses a peripheral decoding circuit or a control circuit to sequentially drive the corresponding switches on or off according to the required output voltage level, thereby changing the equivalent voltage divider ratio and achieving rough adjustment of VOUT.

[0019] The present invention realizes fine adjustment of the output voltage VOUT by connecting a low-voltage control circuit in series with a high-voltage control circuit through an internal voltage dividing unit and a switch;

[0020] The present invention connects a high-voltage buffer subcircuit in parallel with the high-voltage control circuit, and a low-voltage buffer subcircuit in parallel with the low-voltage control circuit, to absorb and clamp voltage spikes caused by switch switching, sudden load changes, etc., and prevent feedback node overshoot from damaging control accuracy and subsequent devices.

[0021] The present invention provides power supply protection through a protection circuit when powering a circuit, thereby avoiding circuit abnormality. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a circuit diagram provided by the present invention;

[0023] Figure 2 is a circuit diagram of embodiment 2 provided by the present invention;

[0024] Figure 3 The present invention is a circuit diagram of a high voltage system output voltage control circuit in the prior art. DETAILED DESCRIPTION

[0025] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0026] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0027] Secondly, the term "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in a preferred embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment, nor does it constitute a separate or selective embodiment that is mutually exclusive of other embodiments.

[0028] Secondly, the present invention is described in detail with reference to schematic diagrams. When describing the embodiments of the present invention in detail, for the sake of convenience, the schematic diagrams are only examples and should not limit the scope of protection of the present invention.

[0029] Please see the attached Figure 1 As shown, a feedback control circuit for a high-voltage output power supply is provided, comprising:

[0030] A high-voltage control circuit is used to control the output voltage. The high-voltage control circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a switch Q1, a switch Q2, a switch Q3, a switch Q4, a switch Q5, a switch Q6, a switch Q7, and a switch Q8. One end of the resistor R1 is connected to one end of the resistor R2, one end of the resistor R3, one end of the resistor R4, one end of the resistor R5, one end of the resistor R6, one end of the resistor R7, and one end of the resistor R8. The other end of the resistor R1 is connected to one end of the switch Q1. The resistor R2 the other end of resistor R3 is connected to one end of switch Q3, the other end of resistor R4 is connected to one end of switch Q4, the other end of resistor R5 is connected to one end of switch Q5, the other end of resistor R6 is connected to one end of switch Q6, the other end of resistor R7 is connected to one end of switch Q7, the other end of resistor R8 is connected to one end of switch Q8, and the other end of switch Q1 is connected to the other end of switch Q2, the other end of switch Q3, the other end of switch Q4, the other end of switch Q5, the other end of switch Q7, and the other end of switch Q8;

[0031] A low-voltage control circuit, a high-voltage control circuit connected to the low-voltage control circuit, for coordinating with the high-voltage control circuit to gradually fine-tune the output voltage VOUT;

[0032] a buffer circuit, the buffer circuit comprising a high-voltage buffer subcircuit and a low-voltage buffer subcircuit, the high-voltage buffer subcircuit being connected to the high-voltage control circuit, and the low-voltage buffer subcircuit being connected to the low-voltage control circuit, for clamping voltage spikes;

[0033] The protection circuit is connected to the low-voltage control circuit to provide power supply protection.

[0034] It should be noted that the feedback control circuit of the high-voltage output power supply of the present application is also connected to peripheral circuits such as a matching decoding circuit, a voltage feedback circuit (VFB), and a corresponding control circuit, wherein one end of the resistor R1 is connected to the high-voltage output terminal VOUT.

[0035] It is worth mentioning that a voltage feedback detection point, VFB, is set between the protection circuit and the low-voltage control circuit for detecting voltage.

[0036] As described above, a multi-stage switchable voltage divider network is formed by resistors R1, R2, R3, R4, R5, R6, R7 and R8, and switches Q1, Q2, Q3, Q4, Q5, Q6, Q7 and Q8. One end of resistor R1 is connected to the output terminal VOUT, and the other end is connected in parallel with resistors R2, R3, R4, R5, R6, R7 and R8. Each resistor branch is connected in series with a corresponding switch Q1, Q2, Q3, Q4, Q5, Q6, Q7 and Q8. Through a peripheral decoding circuit or a control circuit, the desired output voltage is obtained. The low-voltage control circuit is connected in series with the high-voltage control circuit, and fine-tunes the output voltage VOUT through internal voltage divider units and switches. The high-voltage buffer sub-circuit is connected in parallel with the high-voltage control circuit, and the low-voltage buffer sub-circuit is connected in parallel with the low-voltage control circuit to absorb and clamp voltage spikes caused by switch switching, sudden load changes, etc., to prevent feedback node overshoot from damaging control accuracy and subsequent devices. When powering the circuit, the protection circuit provides power protection to avoid circuit abnormalities.

[0037] In a preferred embodiment, the low-voltage control circuit includes a resistor R9, a switch Q9, a switch Q10, a resistor R10, a switch Q11, a switch Q12, a resistor R11, a switch Q13, a switch Q14, a resistor R12, a switch Q15, and a switch Q16. One end of the resistor R9 is connected to one end of the switch Q9, one end of the switch Q10, and the other end of the switch Q1. The other end of the resistor R9 is connected to the other end of the switch Q9, the other end of the switch Q10, one end of the resistor R10, one end of the switch Q11, and one end of the switch Q12. The other end of the resistor R10 is connected to the other end of the switch Q11, the other end of the switch Q12, one end of the resistor R11, one end of the switch Q13, and one end of the switch Q14. The other end of the resistor R11 is connected to the other end of the switch Q13, the other end of the switch Q14, one end of the resistor R12, one end of the switch Q15, and one end of the switch Q16. The other end of the resistor R12 is connected to the other end of the switch Q15 and the other end of the switch Q16.

[0038] As mentioned above, the low-voltage control circuit consists of four resistor-switch voltage divider units, which are:

[0039] First stage: resistor R9 and switch Q9 / switch Q10;

[0040] Second stage: resistor R10 and switch Q11 / switch Q12;

[0041] The third stage: resistor R11 and switch Q13 / switch Q14;

[0042] Fourth stage: resistor R12 and switch Q15 / switch Q16;

[0043] When the high-voltage control circuit is coarsely adjusted to a certain voltage range, the low-voltage control circuit controls switches Q9, Q10, Q11, Q12, Q13, Q14, Q15, and Q16 through a decoding circuit or a control circuit. Only one of the two switches in each stage is allowed to be turned on to select the voltage ratio distributed across the resistors in that stage. After cascading four stages, multiple levels of fine-tuning resolution can be provided. Through this "multi-stage binary voltage division" method, the high-voltage coarse adjustment interval can be further subdivided, significantly improving the fine-tuning accuracy.

[0044] In a preferred embodiment, the high-voltage snubber subcircuit includes a resistor R13, a capacitor C1, a resistor R14, a capacitor C2, a resistor R15, a capacitor C3, a resistor R16, a capacitor C4, a resistor R17, a capacitor C5, a resistor R18, a capacitor C6, a resistor R19, a capacitor C7, a resistor R20, and a capacitor C8. One end of the resistor R13 is connected to one end of the switch Q1, the other end of the resistor R13 is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to the other end of the switch Q1, one end of the resistor R14 is connected to one end of the switch Q2, the other end of the resistor R14 is connected to one end of the capacitor C2, the other end of the capacitor C2 is connected to the other end of the switch Q2, one end of the resistor R15 is connected to one end of the switch Q3, the other end of the resistor R15 is connected to one end of the capacitor C3, the other end of the capacitor C3 is connected to the other end of the switch Q3, and the resistor R1 One end of resistor R6 is connected to one end of switch Q4, the other end of resistor R16 is connected to one end of capacitor C4, the other end of capacitor C4 is connected to the other end of switch Q4, one end of resistor R17 is connected to one end of switch Q5, the other end of resistor R17 is connected to one end of capacitor C5, the other end of capacitor C5 is connected to the other end of switch Q5, one end of resistor R18 is connected to one end of switch Q6, the other end of resistor R18 is connected to one end of capacitor C6, the other end of capacitor C6 is connected to the other end of switch Q6, one end of resistor R19 is connected to one end of switch Q7, the other end of resistor R19 is connected to one end of capacitor C7, the other end of capacitor C7 is connected to the other end of switch Q7, one end of resistor R20 is connected to one end of switch Q8, the other end of resistor R20 is connected to one end of capacitor C8, and the other end of capacitor C8 is connected to the other end of switch Q8.

[0045] As described above, each voltage divider switch Q1 to Q8 in the high-voltage control circuit has an RC network (resistor R13 – capacitor C1, resistor R14 – capacitor C2, and so on) connected in parallel to its voltage divider network. When a switch is turned on or off, the RC network responds instantly to the voltage change. Resistors (R13 – R20) limit the instantaneous current and slow the voltage jump, while capacitors (C1 – C8) store and release energy, bypassing or absorbing high-frequency components. At the switching moment of switches Q1 – Q8, rapid voltage spikes or oscillations are generated at the voltage divider nodes. The RC network low-pass filters these spikes, clamping their amplitude and preventing sharp overshoots from entering the subsequent feedback amplifier. The parameters of each RC component can be individually optimized based on the voltage amplitude and switching frequency of the corresponding voltage divider level to achieve buffering balance between levels. The RC network provides impedance isolation in the high-voltage divider loop, suppressing the coupling of switching noise into the error amplifier.

[0046] In a preferred embodiment, the low-voltage buffer subcircuit includes a resistor R21, a capacitor C9, a resistor R22, a capacitor C10, a resistor R23, a capacitor C11, a resistor R24, and a capacitor C12. One end of the resistor R21 is connected to one end of the switch Q10, the other end of the resistor R21 is connected to one end of the capacitor C9, the other end of the capacitor C9 is connected to the other end of the switch Q10, one end of the resistor R22 is connected to one end of the switch Q12, the other end of the resistor R22 is connected to one end of the capacitor C10, the other end of the capacitor C10 is connected to the other end of the switch Q12, one end of the resistor R23 is connected to one end of the switch Q14, the other end of the resistor R23 is connected to one end of the capacitor C11, the other end of the capacitor C11 is connected to the other end of the switch Q14, one end of the resistor R24 ​​is connected to one end of the switch Q16, the other end of the resistor R24 ​​is connected to one end of the capacitor C12, and the other end of the capacitor C12 is connected to the other end of the switch Q16.

[0047] As mentioned above, the four fine-tuning switches Q10, Q12, Q14, and Q16 in the low-voltage control circuit are each connected in parallel with an RC network: switch Q10 corresponds to resistor R21 and capacitor C9, switch Q12 corresponds to resistor R22 and capacitor C10, switch Q14 corresponds to resistor R23 and capacitor C11, and switch Q16 corresponds to resistor R24 ​​and capacitor C12. When the low-voltage divider switches (Q10, Q12, Q14, and Q16) are switched, the corresponding RC network limits and filters the sudden change of the node voltage. The resistor ( R21…R24) limit the charge and discharge currents and slow the voltage transition slope (dV / dt). Capacitors (C9…C12) store or release instantaneous energy, bypassing high-frequency spikes and absorbing or filtering excess energy from the feedback node. Each RC pair can be individually selected based on the corresponding voltage divider and expected switching rate to achieve optimal response speed and filtering effect at different fine-tuning levels. During the fine-tuning process, the RC branches act together on the feedback signal, making the voltage changes received by the system error amplifier smoother and easier to track in a closed loop.

[0048] In a preferred embodiment, the protection circuit includes an NTC thermistor RT, one end of the NTC thermistor RT is connected to the other end of the resistor R12, wherein the other end of the NTC thermistor RT is connected to the power input end.

[0049] The NTC thermistor RT has a high resistance at low temperatures. As it heats up or the ambient temperature rises, its resistance drops rapidly. When the power is turned on, the NTC thermistor RT is still in a low-temperature, high-resistance state. It can be connected in series at the input to form a large impedance, significantly suppressing the impact current (inrush current) of the DC input. As the circuit operates, the NTC thermistor RT heats up, and its temperature rises, causing the resistance to drop below a few ohms. At this point, it has almost no effect on the normal operating current.

[0050] like Figure 2 FIG2 is a second embodiment of the present invention. This embodiment is a further improvement on the first embodiment. The difference between this embodiment and the first embodiment lies in the different switches used in switch Q1, switch Q2, switch Q3, switch Q4, switch Q5, switch Q7, switch Q9, switch Q10, switch Q11, switch Q12, switch Q13, switch Q14, and switch Q15.

[0051] In a preferred embodiment, the switches Q1, Q2, Q3, Q4, Q5, Q7, and Q8 are LDMOS transistors V1, V2, V3, V4, V5, V6, V7, and V8, respectively. The drain of the LDMOS transistor V1 is connected to the other end of the resistor R1 and one end of the resistor R13. The source of the LDMOS transistor V1 is connected to the source of the LDMOS transistor V2, the source of the LDMOS transistor V3, the source of the LDMOS transistor V4, the source of the LDMOS transistor V5, the source of the LDMOS transistor V6, the source of the LDMOS transistor V7, the source of the LDMOS transistor V8, the other end of the capacitor C1, the other end of the capacitor C2, the other end of the capacitor C3, and the other end of the capacitor C4. The other end of capacitor C4, the other end of capacitor C5, the other end of capacitor C6, the other end of capacitor C7, the other end of capacitor C8, and one end of resistor R9 are connected. The drain of LDMOS transistor V2 is connected to the other end of resistor R2 and one end of resistor R14. The drain of LDMOS transistor V3 is connected to the other end of resistor R3 and one end of resistor R15. The drain of LDMOS transistor V4 is connected to the other end of resistor R4 and one end of resistor R16. The drain of LDMOS transistor V5 is connected to the other end of resistor R5 and one end of resistor R17. The drain of LDMOS transistor V6 is connected to the other end of resistor R6 and one end of resistor R18. The drain of LDMOS transistor V7 is connected to the other end of resistor R7 and one end of resistor R19. The drain of LDMOS transistor V8 is connected to the other end of resistor R8 and one end of resistor R20.

[0052] As mentioned above, switches Q1, Q2, Q3, Q4, Q5, Q7, and Q8 all use LDMOS transistors (V1…V8). When the decoding circuit outputs a high level to turn on the gate of a certain LDMOS transistor, the LDMOS transistor is turned on on the high-voltage side, "connecting" the corresponding voltage divider / buffer network to the feedback loop. When turned off, the branch is completely isolated. Multiple LDMOS transistors are turned on as needed, dynamically combining different equivalent voltage divider ratios, and absorbing spikes and ripples through their respective parallel RC networks. All LDMOS transistors are turned on as needed, dynamically combining different equivalent voltage divider ratios, and absorbing spikes and ripples through their respective parallel RC networks. The common source junction of the MOS tube forms a unified feedback sampling node. This node is both the convergence point of various voltage dividers and buffer branches and the input of the error amplifier. The common source reduces the ground loop impedance of the feedback network, ensuring consistent potential during multi-channel switching without additional parasitic inductance or ground bounce, further improving closed-loop accuracy. The gate decoding circuit signal of the LDMOS tube is directly driven, which can achieve sub-microsecond switching. The high-speed response enables the system to quickly adjust the voltage divider combination when the load suddenly changes or the target voltage switches, and relies on the RC network buffer to suppress switching spikes.

[0053] In a preferred embodiment, the switches Q9, Q10, Q11, Q12, Q13, Q14, Q15, and Q16 are CMOS transistors V9, V10, V11, V12, V13, V14, V15, and V16, respectively. The source of the CMOS transistor V10 is connected to the drain of the CMOS transistor V9, one end of the resistor R21, and one end of the resistor R9. The drain of the CMOS transistor V10 is connected to the source of the CMOS transistor V9, the other end of the capacitor C9, the other end of the resistor R9, one end of the resistor R22, one end of the resistor R10, and the CMOS transistor V10. The drain of CMOS transistor V11 is connected to the source of CMOS transistor V12. The drain of CMOS transistor V12 is connected to the source of CMOS transistor V11, the other end of capacitor C10, the other end of resistor R10, one end of resistor R23, one end of resistor R11, the drain of CMOS transistor V13, and the source of CMOS transistor V14. The drain of CMOS transistor V14 is connected to the source of CMOS transistor V13, the other end of capacitor C11, the other end of resistor R11, one end of resistor R24, one end of resistor R12, the drain of CMOS transistor V15, and the source of CMOS transistor V16. The drain of CMOS transistor V16 is connected to the source of CMOS transistor V15, the other end of capacitor C12, and the other end of resistor R12.

[0054] The four-stage fine-tuning voltage divider switches (Q9...Q16) each utilize a single CMOS transistor (V9...V16) to implement the transmission switch function. By cascading four pairs of CMOS transistors, a multi-stage transmission channel is formed. When the decoding circuit drives the corresponding CMOS transistor gate high, the CMOS transistor conducts, creating an extremely low channel resistance, equivalent to a low-resistance on-switch. When the gate is low, the CMOS transistor is completely off. By precisely driving the gates of the CMOS transistors (V9...V16) through the decoding circuit, a variety of different path combinations can be generated to achieve fine-tuning voltage division. Each CMOS transistor contains a parasitic body diode. When switching on or off, this diode provides a node clamp to prevent reverse overvoltage when necessary. The peak current generated by the CMOS switch during turn-on and turn-off is absorbed by a parallel RC network (e.g., resistor R21 and capacitor C9), preventing high-speed switching spikes from entering the error amplifier. The cascade design ensures that the RC branch buffers at each stage work in conjunction with the corresponding CMOS transistor switch, ensuring a smooth and oscillatory operation of the entire fine-tuning loop.

[0055] The foregoing is merely a preferred embodiment of the present invention. It should be noted that those skilled in the art may make various improvements and modifications without departing from the principles of the present invention, and such improvements and modifications are also within the scope of protection of the present invention. Structures, devices, and operating methods not specifically described or explained herein shall, unless otherwise specified or limited, be implemented in accordance with conventional means in the art.

Claims

1. A feedback control circuit for a high-voltage output power supply, characterized in that: include: A high-voltage control circuit is used to control the output voltage. The high-voltage control circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a switch Q1, a switch Q2, a switch Q3, a switch Q4, a switch Q5, a switch Q6, a switch Q7, and a switch Q8. One end of the resistor R1 is connected to one end of the resistor R2, one end of the resistor R3, one end of the resistor R4, one end of the resistor R5, one end of the resistor R6, one end of the resistor R7, and one end of the resistor R8. The other end of the resistor R1 is connected to one end of the switch Q1, and the other end of the resistor R2 is connected to the one end of the resistor R1 is connected to a high-voltage output terminal VOUT; the other end of the resistor R1 is connected to a high-voltage output terminal VOUT; the other end of the resistor R2 is connected to a high-voltage output terminal VOUT; the other end of the resistor R3 is connected to a high-voltage output terminal VOUT; the other end of the resistor R4 is connected to a high-voltage output terminal VOUT; the other end of the resistor R5 is connected to a high-voltage output terminal VOUT; the other end of the resistor R6 is connected to a high-voltage output terminal VOUT; the other end of the resistor R7 is connected to a high-voltage output terminal VOUT; the other end of the resistor R8 is connected to a high-voltage output terminal VOUT; the other end of the switch Q1 is connected to the other end of the switch Q2, the other end of the switch Q3, the other end of the switch Q4, the other end of the switch Q5, the other end of the switch Q7, and the other end of the switch Q8; and one end of the resistor R1 is connected to the high-voltage output terminal VOUT; The low-voltage control circuit is connected to the high-voltage control circuit and is used to cooperate with the high-voltage control circuit to gradually fine-tune the output voltage VOUT. The low-voltage control circuit includes a resistor R9, a switch Q9, a switch Q10, a resistor R10, a switch Q11, a switch Q12, a resistor R11, a switch Q13, a switch Q14, a resistor R12, a switch Q15 and a switch Q16. One end of the resistor R9 is connected to one end of the switch Q9, one end of the switch Q10 and the other end of the switch Q1. The other end of the resistor R9 is connected to the other end of the switch Q9, the switch Q10 and the other end of the switch Q1. The other end of the resistor R10 is connected to one end of the switch Q11 and one end of the switch Q12, the other end of the resistor R10 is connected to the other end of the switch Q11, the other end of the switch Q12, one end of the resistor R11, one end of the switch Q13 and one end of the switch Q14, the other end of the resistor R11 is connected to the other end of the switch Q13, the other end of the switch Q14, one end of the resistor R12, one end of the switch Q15 and one end of the switch Q16, and the other end of the resistor R12 is connected to the other end of the switch Q15 and the other end of the switch Q16; a buffer circuit, the buffer circuit comprising a high-voltage buffer subcircuit and a low-voltage buffer subcircuit, the high-voltage buffer subcircuit being connected to the high-voltage control circuit, and the low-voltage buffer subcircuit being connected to the low-voltage control circuit, for clamping voltage spikes; The protection circuit is connected to the low-voltage control circuit to provide power supply protection.

2. The feedback control circuit for a high-voltage output power supply according to claim 1, wherein: The high-voltage snubber subcircuit includes a resistor R13, a capacitor C1, a resistor R14, a capacitor C2, a resistor R15, a capacitor C3, a resistor R16, a capacitor C4, a resistor R17, a capacitor C5, a resistor R18, a capacitor C6, a resistor R19, a capacitor C7, a resistor R20, and a capacitor C8. One end of the resistor R13 is connected to one end of the switch Q1, the other end of the resistor R13 is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to the other end of the switch Q1, one end of the resistor R14 is connected to one end of the switch Q2, the other end of the resistor R14 is connected to one end of the capacitor C2, the other end of the capacitor C2 is connected to the other end of the switch Q2, one end of the resistor R15 is connected to one end of the switch Q3, the other end of the resistor R15 is connected to one end of the capacitor C3, the other end of the capacitor C3 is connected to the other end of the switch Q3, and one end of the resistor R16 is connected to the switch One end of the resistor R19 is connected to one end of the switch Q7, the other end of the resistor R19 is connected to one end of the capacitor C7, and the other end of the capacitor C7 is connected to the other end of the switch Q7. One end of the resistor R20 is connected to one end of the switch Q8, the other end of the resistor R20 is connected to one end of the capacitor C8, and the other end of the capacitor C8 is connected to the other end of the switch Q8.

3. The feedback control circuit for high-voltage output power supply according to claim 2, characterized in that: The low-voltage buffer subcircuit includes a resistor R21, a capacitor C9, a resistor R22, a capacitor C10, a resistor R23, a capacitor C11, a resistor R24, and a capacitor C12. One end of the resistor R21 is connected to one end of the switch Q10, the other end of the resistor R21 is connected to one end of the capacitor C9, the other end of the capacitor C9 is connected to the other end of the switch Q10, one end of the resistor R22 is connected to one end of the switch Q12, the other end of the resistor R22 is connected to one end of the capacitor C10, the other end of the capacitor C10 is connected to the other end of the switch Q12, one end of the resistor R23 is connected to one end of the switch Q14, the other end of the resistor R23 is connected to one end of the capacitor C11, the other end of the capacitor C11 is connected to the other end of the switch Q14, one end of the resistor R24 ​​is connected to one end of the switch Q16, the other end of the resistor R24 ​​is connected to one end of the capacitor C12, and the other end of the capacitor C12 is connected to the other end of the switch Q16.

4. The feedback control circuit for a high-voltage output power supply according to claim 1, wherein: The protection circuit includes an NTC thermistor RT, one end of the NTC thermistor RT is connected to the other end of the resistor R12.

5. The feedback control circuit for high-voltage output power supply according to claim 2, characterized in that: The switches Q1, Q2, Q3, Q4, Q5, Q7, and Q8 are LDMOS transistors V1, V2, V3, V4, V5, V6, V7, and V8, respectively. The drain of the LDMOS transistor V1 is connected to the other end of the resistor R1 and one end of the resistor R13. The source of the LDMOS transistor V1 is connected to the source of the LDMOS transistor V2, the source of the LDMOS transistor V3, the source of the LDMOS transistor V4, the source of the LDMOS transistor V5, the source of the LDMOS transistor V6, the source of the LDMOS transistor V7, the source of the LDMOS transistor V8, the other end of the capacitor C1, the other end of the capacitor C2, the other end of the capacitor C3, and the other end of the capacitor C4. The drain of the LDMOS transistor V2 is connected to the other end of the resistor R2 and one end of the resistor R14. The drain of the LDMOS transistor V3 is connected to the other end of the resistor R3 and one end of the resistor R15. The drain of the LDMOS transistor V4 is connected to the other end of the resistor R4 and one end of the resistor R16. The drain of the LDMOS transistor V5 is connected to the other end of the resistor R5 and one end of the resistor R17. The drain of the LDMOS transistor V6 is connected to the other end of the resistor R6 and one end of the resistor R18. The drain of the LDMOS transistor V7 is connected to the other end of the resistor R7 and one end of the resistor R19. The drain of the LDMOS transistor V8 is connected to the other end of the resistor R8 and one end of the resistor R20.

6. The feedback control circuit for high-voltage output power supply according to claim 3, characterized in that: The switches Q9, Q10, Q11, Q12, Q13, Q14, Q15 and Q16 are CMOS transistors V9, V10, V11, V12, V13, V14, V15 and V16 respectively. The source of CMOS transistor V10 is connected to the drain of CMOS transistor V9, one end of resistor R21 and one end of resistor R9. The drain of CMOS transistor V10 is connected to the source of CMOS transistor V9, the other end of capacitor C9, the other end of resistor R9, one end of resistor R22, one end of resistor R10, the drain of CMOS transistor V11 and C The source of the MOS transistor V12 is connected, the drain of the CMOS transistor V12 is connected to the source of the CMOS transistor V11, the other end of the capacitor C10, the other end of the resistor R10, one end of the resistor R23, one end of the resistor R11, the drain of the CMOS transistor V13, and the source of the CMOS transistor V14. The drain of the CMOS transistor V14 is connected to the source of the CMOS transistor V13, the other end of the capacitor C11, the other end of the resistor R11, one end of the resistor R24, one end of the resistor R12, the drain of the CMOS transistor V15, and the source of the CMOS transistor V16. The drain of the CMOS transistor V16 is connected to the source of the CMOS transistor V15, the other end of the capacitor C12, and the other end of the resistor R12.

Images