FlexRay communication system

By introducing the NIC bus module between the FlexRay module and the processor and performing protocol conversion, the problem of low communication efficiency and high complexity when integrating the FlexRay module with the processor is solved, and efficient real-time data transmission and simplified design are achieved.

CN120434299APending Publication Date: 2025-08-05SUZHOU R&D CENT OF NO 214 RES INST OF CHINA NORTH IND GRP
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510848512.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-24
Publication Date
2025-08-05

AI Technical Summary

Technical Problem

The integration of FlexRay modules with mainstream processor architectures (such as RISC-V) has problems such as low communication efficiency and high design complexity, which is difficult to meet the needs of high real-time applications.

Method used

The NIC bus module is introduced between the FlexRay module and the processor, and through format conversion (protocol conversion), seamless communication between the FlexRay module and the processor is realized, including data segmentation cache and conversion between multiple protocols.

Benefits of technology

Improve data transmission efficiency, meet real-time requirements, and reduce design complexity.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120434299A_ABST
    Figure CN120434299A_ABST
Patent Text Reader

Abstract

The invention discloses a FlexRay communication system, which is characterized in that an NIC bus module is connected between a FlexRay module and a processor, seamless communication between the FlexRay module and the processor is realized through format conversion (namely protocol conversion), the data transmission efficiency is high, the real-time requirement can be met, and the design complexity is reduced.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to a FlexRay communication system, belonging to the technical field of FlexRay communication. Background Art

[0002] With the rapid development of embedded systems and automotive electronics, FlexRay, a highly reliable and real-time communication protocol, has been widely adopted in automotive electronics, industrial control, and other fields. However, integrating FlexRay modules with mainstream processor architectures (such as RISC-V) in system design still faces the following challenges: 1. Communication between the FlexRay protocol and the processor typically relies on traditional bus architectures, resulting in low data transmission efficiency and difficulty meeting the requirements of high-real-time applications. 2. Current integration of FlexRay modules with processors requires the design of complex interface protocols, which is complex and difficult to ensure compatibility. Summary of the Invention

[0003] The present invention provides a FlexRay communication system, which solves the problems disclosed in the background technology.

[0004] According to one aspect of the present application, there is provided a FlexRay communication system, comprising a NIC bus module and a FlexRay module; The FlexRay module: when transmitting data, performs a first format conversion on the data to be transmitted, and sends the first format-converted data to be transmitted to the NIC bus module; when receiving data, receives a data request from the NIC bus module, performs a first format deconversion on the data request, performs a first format conversion on the target data corresponding to the first format deconverted data request, and sends the converted target data to the NIC bus module; The NIC bus module performs a second format conversion on the data to be sent by the FlexRay module during data transmission, and sends the data to be sent after the second format conversion to the processor. When receiving data, the NIC bus module performs a second format deconversion on the data request of the processor, sends the data request after the second format deconversion to the FlexRay module, performs a second format conversion on the target data sent by the FlexRay module, and sends the target data after the second format conversion to the processor.

[0005] Furthermore, the NIC bus module: when sending data, performs segmented buffering on the data to be sent by the FlexRay module, performs second format conversion on the segmented buffered data to be sent, and sends the second format-converted data to be sent to the processor; when receiving data, performs second format deconversion on the data request of the processor, sends the second format deconverted data request to the FlexRay module, performs segmented buffering on the target data sent by the FlexRay module, performs second format conversion on the segmented buffered target data, and sends the second format-converted target data to the processor.

[0006] Furthermore, it also includes: NIC bus module: during configuration, performs reverse conversion of the configuration data sent by the processor into the third format, and sends the reverse converted configuration data to the FlexRay module; FlexRay module: During configuration, the configuration data is inversely converted into the fourth format, and the configuration data after the inverse conversion into the fourth format is used to configure registers.

[0007] Further, the FlexRay module includes an interconnection module, a second format conversion module, a third format conversion module and a cache module; Interconnection module: connects to the processor; when sending data, sends the data to be sent to the processor; when receiving data, receives the data request of the processor and sends the target data to the processor; The second format conversion module is connected to the interconnection module and the FlexRay module; when sending data, it segments and caches the data to be sent by the FlexRay module in the cache module, performs a second format conversion on the segmented cached data to be sent, and sends the data to be sent after the second format conversion to the interconnection module; when receiving data, it deconverts the data request into the second format, sends the data request after the second format deconversion to the FlexRay module, segments and caches the target data sent by the FlexRay module in the cache module, performs a second format conversion on the segmented cached target data, and sends the target data after the second format conversion to the interconnection module; Cache module: connected to the second format conversion module; when sending data, caches the data to be sent in segments; when receiving data, caches the target data in segments; The third format conversion module performs a third format deconversion on the configuration data sent by the processor during configuration, and sends the deconverted configuration data to the FlexRay module.

[0008] Furthermore, the fourth format inverse conversion is implemented using glue logic.

[0009] Furthermore, the fourth format is reversely converted to convert the APB protocol data into FlexRay protocol data.

[0010] Furthermore, both the first format conversion and the first format inverse conversion are implemented using a dynamic frame format conversion algorithm.

[0011] Furthermore, the first format conversion converts the FlexRay protocol data into AHblite protocol data, and the first format inverse conversion converts the AHblite protocol data into FlexRay protocol data.

[0012] Furthermore, the second format conversion converts the AHblite protocol data into the AXI protocol data, and the second format inverse conversion converts the AXI protocol data into the AHblite protocol data.

[0013] Furthermore, the third format is reversely converted to convert the AXI protocol data into APB protocol data.

[0014] The beneficial effects achieved by the present invention are as follows: the present invention connects the NIC bus module between the FlexRay module and the processor, and realizes seamless communication between the FlexRay module and the processor through format conversion (i.e., protocol conversion), with high data transmission efficiency, meeting real-time requirements, and reducing design complexity. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 Schematic diagram of the structure of the FlexRay communication system. DETAILED DESCRIPTION

[0016] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. It is obvious that the embodiments described are only part of the embodiments of the present application, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is in no way intended to limit the present application and its application or use. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0017] Unless specifically stated otherwise, the relative arrangement of components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present application.

[0018] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0019] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0020] In all examples shown and discussed herein, any specific values should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0021] It should be noted that like symbols and letters refer to like items in the following figures, so once an item is defined in one figure, it does not need to be further discussed in subsequent figures.

[0022] At the same time, in the description of the embodiments of this application, the terms "first" and "second" are used only to distinguish the description and should not be understood as indicating or implying relative importance. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features.

[0023] In order to solve the communication problem between the FlexRay module and the processor, this application proposes a FlexRay communication system, which specifically connects the NIC bus module between the FlexRay module and the processor, and performs protocol conversion between the NIC bus module and the FlexRay module to achieve seamless communication between the FlexRay module and the processor.

[0024] See also Figure 1 , Figure 1 1 is a schematic structural diagram of a FlexRay communication system provided in an embodiment of the present application. The system may include at least a NIC bus module and a FlexRay module.

[0025] The NIC bus module performs a second format conversion on the data to be sent by the FlexRay module during data transmission, and sends the data to be sent after the second format conversion to the processor. When receiving data, the NIC bus module performs a second format deconversion on the data request of the processor, sends the data request after the second format deconversion to the FlexRay module, performs a second format conversion on the target data sent by the FlexRay module, and sends the target data after the second format conversion to the processor.

[0026] In order to improve data transmission efficiency, in some embodiments, when sending data, the NIC bus module segments and caches the data to be sent by the FlexRay module, converts the segmented cached data to be sent into a second format, and sends the data to be sent after the second format conversion to the processor; when receiving data, the NIC bus module reversely converts the data request of the processor into the second format, sends the data request after the second format reverse conversion to the FlexRay module, segments and caches the target data sent by the FlexRay module, converts the segmented cached target data into the second format, and sends the target data after the second format conversion to the processor.

[0027] It should be noted that, taking the C910 as an example, the processor usually uses the AXI bus to communicate with the NIC bus module. Therefore, the interconnection module (i.e., axi_interconnect in the figure) is integrated in the NIC bus module. The interconnection module connects to the processor. When data is sent, the data to be sent is sent to the processor. When data is received, the processor's data request is received and the target data is sent to the processor.

[0028] Taking the AXI bus connection as an example, the second format conversion in the NIC bus module may be converting AHblite protocol data into AXI protocol data, and the second format inverse conversion may be converting AXI protocol data into AHblite protocol data.

[0029] In order to realize the second format conversion, the second format deconversion and the segmented caching of data, the second format conversion module and the cache module are integrated in the NIC bus module; wherein, the second format conversion module is connected to the interconnection module and the FlexRay module. When data is sent, the data to be sent by the FlexRay module is segmented and cached in the cache module, the segmented cached data to be sent is converted into the second format, and the data to be sent after the second format conversion is sent to the interconnection module. When data is received, the data request is deconverted into the second format, the data request after the second format deconversion is sent to the FlexRay module, the target data sent by the FlexRay module is segmented and cached in the cache module, the segmented cached target data is converted into the second format, and the target data after the second format conversion is sent to the interconnection module. The cache module is connected to the second format conversion module. When data is sent, the data to be sent is segmented and cached. When data is received, the target data is segmented and cached.

[0030] It should be noted that the second format conversion module is implemented using a bridge module, namely the AXI-to-AHblite Bridge in the figure, which converts between the AHblite protocol and the AXI protocol to accommodate different communication requirements. The cache module can be directly implemented using BRAM (block memory).

[0031] It should be noted that data transmission is also closely related to the configuration of the FlexRay module. In order to configure the registers of the FlexRay module, the above-mentioned NIC bus module converts the configuration data sent by the processor into a third format during configuration, and sends the configuration data after the third format conversion to the FlexRay module.

[0032] Specifically, the NIC bus module will integrate a third format conversion module. During configuration, the third format conversion module will perform a third format deconversion on the configuration data sent by the processor, and send the deconverted configuration data to the FlexRay module.

[0033] Taking the AXI bus connection as an example, the third format inverse conversion in the NIC bus module may be converting AXI protocol data into APB protocol data.

[0034] It should be noted that the third format conversion module is also implemented using a bridge module, namely the AXI-to-APBBridge in the figure.

[0035] To adapt to the conversion in the NIC bus module, the FlexRay module: when sending data, performs a first format conversion on the data to be sent, and sends the first format-converted data to the NIC bus module; when receiving data, receives a data request from the NIC bus module, performs a first format deconversion on the data request, performs a first format conversion on the target data corresponding to the first format deconverted data request, and sends the converted target data to the NIC bus module.

[0036] Similarly, in order to implement configuration of its own registers, the FlexRay module performs inverse conversion of the configuration data into the fourth format during configuration, and uses the configuration data after inverse conversion into the fourth format to perform register configuration.

[0037] It should be noted that, in combination with the conversion in the NIC bus module, in the FlexRay module, the first format conversion can be to convert FlexRay protocol data into AHblite protocol data, the first format inverse conversion can be to convert AHblite protocol data into FlexRay protocol data, and the fourth format inverse conversion can be to convert APB protocol data into FlexRay protocol data.

[0038] It should be noted that, in the FlexRay module, to ensure data format compatibility, both the first format conversion and the first format inverse conversion are implemented using a dynamic frame format conversion algorithm. The specific process of the algorithm can be as follows: Data generation: The event trigger module generates non-periodic data; data packaging: The data is encapsulated into a dynamic frame containing a frame header, payload, and checksum; dynamic time slot allocation and arbitration: The time slot is dynamically allocated based on the frame ID priority and Mini-slot; data transmission: The packaged dynamic frame is sent through the bus; data reception and processing: The receiving end parses the dynamic frame, verifies the data integrity, and performs logical processing.

[0039] In order to achieve clock synchronization between the FlexRay module and the processor, a clock synchronization module is also integrated into the FlexRay module. The clock synchronization module resolves the timing differences and ensures the real-time and consistency of data transmission. The clock synchronization mechanism is combined with the bridge module to achieve efficient communication between the NIC bus module and the FlexRay module.

[0040] It should be noted that in the FlexRay module, the fourth format deconversion is implemented using glue logic. Through the glue logic and the redundancy mechanism of the FlexRay module, the fault tolerance and reliability of communication can be improved.

[0041] The output transmission process of the FlexRay communication system is as follows: Data transmission: After receiving external data (i.e., data to be sent), the FlexRay module transmits the data to the processor through the NIC bus module. The NIC bus module segments and caches the data to be sent, uses a protocol conversion mechanism to convert the data into a format recognizable by the processor, and writes the data to the processor memory using DMA technology.

[0042] Data reception: The processor sends a data request to the FlexRay module through the NIC bus module. After receiving the request, the NIC bus module obtains the target data from the FlexRay module and transmits it to the processor after protocol conversion.

[0043] The above-mentioned FlexRay communication system connects the NIC bus module between the FlexRay module and the processor, and realizes seamless communication between the FlexRay module and the processor through format conversion (i.e., protocol conversion). The data transmission efficiency is high, which can meet the real-time requirements and reduce the design complexity.

[0044] The above is only a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A FlexRay communication system, characterized in that: Including NIC bus module and FlexRay module; The FlexRay module: when transmitting data, performs a first format conversion on the data to be transmitted, and sends the first format-converted data to be transmitted to the NIC bus module; when receiving data, receives a data request from the NIC bus module, performs a first format deconversion on the data request, performs a first format conversion on the target data corresponding to the first format deconverted data request, and sends the converted target data to the NIC bus module; The NIC bus module performs a second format conversion on the data to be sent by the FlexRay module during data transmission, and sends the data to be sent after the second format conversion to the processor. When receiving data, the NIC bus module performs a second format deconversion on the data request of the processor, sends the data request after the second format deconversion to the FlexRay module, performs a second format conversion on the target data sent by the FlexRay module, and sends the target data after the second format conversion to the processor.

2. The system according to claim 1, wherein: The NIC bus module: when sending data, performs segmented buffering on the data to be sent by the FlexRay module, performs second format conversion on the segmented buffered data to be sent, and sends the second format-converted data to be sent to the processor; when receiving data, performs second format deconversion on the data request of the processor, sends the second format deconverted data request to the FlexRay module, performs segmented buffering on the target data sent by the FlexRay module, performs second format conversion on the segmented buffered target data, and sends the second format-converted target data to the processor.

3. The system according to claim 2, characterized in that Also includes: NIC bus module: during configuration, performs reverse conversion of the configuration data sent by the processor into the third format, and sends the reverse converted configuration data to the FlexRay module; FlexRay module: During configuration, the configuration data is inversely converted into the fourth format, and the configuration data after the inverse conversion into the fourth format is used to configure registers.

4. The system according to claim 3, characterized in that The FlexRay module includes an interconnection module, a second format conversion module, a third format conversion module and a cache module; Interconnection module: connects to the processor; when sending data, sends the data to be sent to the processor; when receiving data, receives the data request of the processor and sends the target data to the processor; The second format conversion module is connected to the interconnection module and the FlexRay module; when sending data, it segments and caches the data to be sent by the FlexRay module in the cache module, performs a second format conversion on the segmented cached data to be sent, and sends the data to be sent after the second format conversion to the interconnection module; when receiving data, it deconverts the data request into the second format, sends the data request after the second format deconversion to the FlexRay module, segments and caches the target data sent by the FlexRay module in the cache module, performs a second format conversion on the segmented cached target data, and sends the target data after the second format conversion to the interconnection module; Cache module: connected to the second format conversion module; when sending data, caches the data to be sent in segments; when receiving data, caches the target data in segments; The third format conversion module performs a third format deconversion on the configuration data sent by the processor during configuration, and sends the deconverted configuration data to the FlexRay module.

5. The system according to claim 3, wherein: The fourth format deconversion is implemented using glue logic.

6. The system according to claim 3 or 5, characterized in that The fourth format inverse conversion converts the APB protocol data into FlexRay protocol data.

7. The system according to claim 1, wherein: The first format conversion and the first format inverse conversion are both implemented by using a dynamic frame format conversion algorithm.

8. The system according to claim 1 or 7, characterized in that The first format conversion converts the FlexRay protocol data into AHblite protocol data, and the first format inverse conversion converts the AHblite protocol data into FlexRay protocol data.

9. The system according to claim 1, 2 or 4, characterized in that The second format conversion converts AHblite protocol data into AXI protocol data, and the second format inverse conversion converts AXI protocol data into AHblite protocol data.

10. The system according to claim 3 or 4, characterized in that The third format inverse conversion is to convert the AXI protocol data into APB protocol data.