Natural light chip with 6-inch substrate and preparation method thereof

Abstract

The invention belongs to the technical field of semiconductor photoelectric devices, and particularly relates to a natural light chip with a 6-inch substrate and a preparation method of the natural light chip, the natural light chip is composed of the substrate, a p-type layer, a punch-through barrier layer, an n-type layer, a thermal expansion improvement layer and an electrode layer, the invention relates to 6-inch epitaxial growth and device processing of a natural light chip, in particular to a scheme for solving wafer warpage and improving the product yield, and aims at solving the problems of wafer warpage and improving the product yield by adding the scheme of controlling the heating and cooling rate, adding special material plasma auxiliary treatment for the chip, adding a stress release layer and the like. The problem of wafer warping of the natural light chip in a large size is solved, the red light emission of the chip is further improved, the productivity of the natural light chip can be greatly improved, and the industrialization process of the natural light chip is greatly promoted.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor optoelectronic devices, and in particular relates to a natural light chip with a 6-inch substrate and a preparation method thereof. Background Art

[0002] In semiconductor processing, wafer warpage refers to the phenomenon of localized bulges or uneven growth on the wafer surface during selective epitaxial growth due to factors such as local stress differences, uneven reaction gas flow and pressure, or poor substrate surface quality. This can affect the quality of the epitaxial layer and device performance. While this effect is not particularly severe when the wafer size is small, at larger wafer sizes, especially when epitaxial growth is performed on 6-inch substrates, its impact on devices cannot be ignored.

[0003] In the prior art, for example, publication number CN110416376B describes a semiconductor heterojunction light-emitting chip that can directly emit white light. The innovation of this semiconductor heterojunction light-emitting chip lies in the provision of a punch-through barrier layer between n-type ZnO and p-type GaN to regulate the energy band, combining multiple light intensities to achieve white light emission. Without the need for phosphors, the punch-through barrier layer regulates the energy band through the properties and interactions of each layer's materials, causing the heterojunction to emit multiple colors of light. By regulating the various light intensities, white light emission is achieved, and the electrodes provide a current path. However, this does not buffer thermal expansion and does not include detailed processing steps. Publication number CN203406313U describes a light-emitting diode epitaxial wafer that uses a sapphire substrate with an anti-reflection film beneath it. A buffer layer is also provided, and the composition and thickness of each layer structure are clearly defined to prevent light absorption by the substrate. This is primarily intended to improve luminous efficiency and does not provide any anti-warping function. Publication No. CN110416376B, a semiconductor heterojunction light-emitting chip that can directly emit white light. The device is only a prototype device. In order to promote it to industrialization, it is necessary to expand production and solve some problems involved in expanding production. Summary of the Invention

[0004] The main purpose of the present invention is to propose a solution to the above-mentioned existing problems that due to the structure and material characteristics of natural light chips, there is a unique growth unevenness during the size expansion of the natural light chips, the natural light chips suffer from severe warping during the preparation process, and the device involves relatively many types of materials, making it impossible to use a single method to comprehensively control their uniformity.

[0005] To solve the above problems, and since the current maximum substrate size is 6 inches, the new goal is to prepare a 6-inch natural light chip and develop a set of efficient and precise 6-inch corresponding processes for this chip.

[0006] Option 1.

[0007] A 6-inch natural light chip comprises a substrate, a p-type layer, a punch-through barrier layer, an n-type layer, a thermal expansion improvement layer, and an electrode layer. The electrode layer may or may not be on the same side of the chip. The chip is plasma-assisted during growth, and thermal expansion treatment is added. The chip undergoes plasma-assisted treatment; the thermal expansion improvement layer is doped with yttrium; and the p-type layer, punch-through barrier layer, n-type layer, and stress relief layer are grown at a heating and cooling rate of no more than 50°C / min.

[0008] Furthermore, the p-type layer is mainly composed of gallium nitride, which is doped with zinc (Zn) and treated with nitrogen (N) plasma.

[0009] Furthermore, the punch-through barrier layer is mainly composed of zirconium oxide or gallium oxide, and is treated with nitrogen (N) and oxygen (O) plasma in sequence during the growth process.

[0010] Furthermore, the main component of the n-type layer is zinc oxide, which is doped with high-concentration hydrogen (H) and treated with oxygen (O) plasma.

[0011] Furthermore, the main component of the thermal expansion improving layer is yttrium-doped zinc oxide, and oxygen (O) plasma treatment is performed during the growth process.

[0012] Furthermore, the electrode layer is any one or more of indium-doped tin oxide (ITO), aluminum-doped zinc oxide (AZO), Cr / Au, Ni / Au, Al and Ag.

[0013] Furthermore, the punch-through barrier layer has a thickness of 25-35 nm, the n-type layer has a thickness of 270-320 nm, and the thermal expansion improving layer has a thickness of 8-12 nm.

[0014] Option 2.

[0015] A method for preparing a natural light chip with a 6-inch substrate, based on the first solution, performs the following steps:

[0016] S1, prepare a p-type layer on the substrate, and precisely control the heating and cooling rates during the preparation process;

[0017] S2, growing a punch-through barrier layer on the p-type layer. During the preparation process, while precisely controlling the heating and cooling rates, a correspondingly uniform low-energy plasma treatment is performed, and the processing power cannot exceed 1000 W;

[0018] S3, preparing the zinc oxide layer. During the preparation process, while precisely controlling the heating and cooling rates, a relatively uniform low-energy plasma treatment is performed, and the treatment power cannot exceed 1000W;

[0019] S4, after step S3, depositing a layer of yttrium-doped zinc oxide, and performing precise heating and cooling rates and plasma treatment;

[0020] S5, using photolithography and etching processes to expose the top / bottom electrode areas, and depositing electrodes by magnetron sputtering, vacuum evaporation or PLD to obtain the natural light chip of the 6-inch substrate.

[0021] Furthermore, the precise temperature control involved in the epitaxial growth of the p-type layer, the punch-through barrier layer, the n-type layer, and the thermal expansion improvement layer has a heating and cooling rate not exceeding 50°C / min;

[0022] The punch-through barrier layer needs to be subjected to nitrogen (N) plasma-assisted treatment at the initial stage of deposition, with a treatment time of not less than 10 seconds and a power not exceeding 1000W;

[0023] The punch-through barrier layer needs to be subjected to oxygen (O) plasma-assisted treatment in the middle and late stages of deposition, with a treatment time of no less than 10 seconds and a power not exceeding 1000W;

[0024] During the epitaxial growth of the n-type layer and the thermal expansion improving layer, oxygen (O) plasma-assisted treatment is required, and the treatment time is not less than 5 seconds.

[0025] Furthermore, the materials of the p-type layer, punch-through barrier layer, n-type layer, and thermal expansion improvement layer can be processed by the following equipment: molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), magnetron sputtering, thermal evaporation, electron beam evaporation (EBE), and atomic layer deposition (ALD). Each device is equipped with a plasma source to assist in growth.

[0026] The present invention has the following beneficial effects:

[0027] 1. The present invention discloses a 6-inch substrate-based natural light chip and its preparation method. The natural light chip, prepared according to the present invention using the required number of layers and processes, is capable of directly emitting white light and is the closest to sunlight among all commonly used light sources. Potential applications include lighting, particularly specialty lighting and standard light sources, backlighting, visible light communication (LIFI), visual stealth, and Micro-LEDs. The warpage of a 6-inch natural light chip grown directly using this method exceeds 200μm, while the warpage of a 6-inch natural light chip processed using this process can be reduced to less than 40μm, an improvement of over 80%.

[0028] 2. The 6-inch substrate natural light chip and its preparation method described in the present invention not only provide carriers but also have the function of buffering thermal expansion. The special process thermal expansion improvement layer in this chip can not only adjust the degree of thermal expansion, but also enhance the emission of the red light portion to a certain extent, further improving the quality of the natural light emitted by this chip. In addition, a separate special process thermal expansion improvement layer with a relatively large thermal expansion coefficient is added. The addition of yttrium to this layer of zinc oxide can increase the thermal expansion coefficient of this layer of material, which can balance the impact of the imbalance of thermal expansion coefficient. At the same time as adding the thermal expansion improvement layer, the control of the heating and cooling rate is strengthened during the epitaxial growth of each layer of material. The heating rate is strictly controlled to achieve a slow heating and cooling, thereby achieving the purpose of reducing warping.

[0029] 3. The natural light chip with a 6-inch substrate and the preparation method thereof described in the present invention further reduce the risk of epitaxial wafer warping under the mitigating effect of controlling the heating and cooling rates. Plasma-assisted treatment methods are applied to further reduce warping. Plasma treatment processes are added to the individual processes of the reaction. The introduction of plasma will adjust the gas flow and pressure in the reaction chamber, which will prompt it to improve the lattice stress caused by the imbalance of the thermal expansion coefficient. At the same time, during the time when the plasma is introduced, the normal reaction is relatively stopped, and there is an atmosphere annealing process, which can also further reduce the warping. The most critical thing is that in the process of transition from the p-type layer to the n-type layer, the material system gradually transitions from nitride to oxide. When using delayed N and O plasma treatment, that is, in the epitaxial process, the N plasma treatment is still maintained for a certain period of time in the early stage of epitaxy to the oxide, and then slowly transitions to O plasma treatment, it can continue to promote the reduction of the warping of the chip.

[0030] 4. The 6-inch substrate natural light chip and its preparation method described in this invention address the wafer warpage problem of large-scale natural light chips by incorporating controlled heating and cooling rates, plasma-assisted treatment of materials specific to this chip, and the addition of a thermal expansion-modifying layer. This method further enhances the chip's red light emission and suppresses warpage, significantly increasing the production capacity of natural light chips and significantly promoting their industrialization. Compared to the chip described in Publication No. CN110416376B, this method not only increases the substrate size but also increases the number of chips produced per furnace, reducing costs and promoting industrialization. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 This is a schematic structural diagram of a natural light chip with a 6-inch substrate prepared by the present invention, wherein the substrate 01, the p-type layer 02, the punch-through barrier layer 03, the n-type layer 04, the thermal expansion improvement layer 05, and the electrode layer 06.

[0033] Figure 2 It is a schematic diagram comparing the overall warpage of the chip of the present invention when it is less than 4 inches and when it is greater than 4 inches.

[0034] Figure 3 It is a schematic diagram comparing the overall warpage without process treatment and with process treatment prepared by the present invention. DETAILED DESCRIPTION

[0035] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0036] Option 1.

[0037] In order to achieve the above-mentioned purpose, the present invention provides a 6-inch substrate natural light chip, which is composed of a substrate 01, a p-type layer 02, a punch-through barrier layer 03, an n-type layer 04, a thermal expansion improvement layer 05, and an electrode layer 06. Figure 1 As shown in (a), the p-type layer, punch-through barrier layer, and n-type layer are all essential in the 6-inch natural light chip structure. If any one layer is missing, the chip will not emit natural light properly, that is, it will emit white light. The substrate layer, as a supporting layer, and the electrode layer are also essential. However, through the special processing of the present invention, the thermal expansion improvement layer in this chip not only adjusts the degree of thermal expansion, but also improves the emission of red light to a certain extent, further improving the quality of the natural light emitted by this chip.

[0038] The electrode layer may or may not be on the same side of the chip, and the chip undergoes plasma-assisted processing; the thermal expansion improvement layer is doped with yttrium; and the heating and cooling rates during the epitaxial growth of the p-type layer, the punch-through barrier layer, the n-type layer, and the stress release layer are not higher than 50°C / min.

[0039] The main component of the p-type layer is gallium nitride, which is doped with zinc (Zn) and treated with nitrogen (N) plasma.

[0040] The main component of the punch-through barrier layer is zirconium oxide or gallium oxide, and nitrogen (N) and oxygen (O) plasma treatment are used in sequence during the growth process.

[0041] The main component of the n-type layer is zinc oxide, which is doped with high-concentration hydrogen (H) and treated with oxygen (O) plasma.

[0042] The thermal expansion improvement layer is primarily composed of yttrium-doped zinc oxide (YTO), and undergoes oxygen (O) plasma treatment during growth. Due to differences in thermal expansion coefficients between materials, high heating and cooling rates during growth can lead to asynchronous expansion and contraction, resulting in warping of the epitaxial wafer (i.e., bowling effect), which in turn affects the photolithography process, reduces device performance, and even increases the risk of fragmentation. Without the special process treatment of the present invention, the thermal expansion coefficients of different layers would decrease, resulting in more severe warping. The present invention adds a separate special process thermal expansion improvement layer with a relatively large thermal expansion coefficient. Yttrium is added to this zinc oxide layer to increase the thermal expansion coefficient of this layer, thereby balancing the effects of the imbalanced thermal expansion coefficients.

[0043] The electrode layer is any one or more of indium-doped tin oxide (ITO), aluminum-doped zinc oxide (AZO), Cr / Au, Ni / Au, Al and Ag.

[0044] The punch-through barrier layer has a thickness of 25-35 nm, the n-type layer has a thickness of 270-320 nm, and the thermal expansion improving layer has a thickness of 8-12 nm.

[0045] Example 2.

[0046] The preparation method of the present invention is described in detail based on Example 1. Plasma is described using corresponding energy.

[0047] (1) From bottom to top, at 150°C, the overall heating and cooling rate is controlled at 50°C / min, and a through-barrier layer film (Ga2O3) with a thickness of 30nm is grown on the clean p-type GaN material using the atomic layer deposition method. In the first 20 cycles of deposition, nitrogen (N) plasma assisted treatment is required, that is, in each growth cycle, two N plasma treatment steps are inserted, the first insertion point is after the metal precursor source purge, and the second insertion point is after the oxygen precursor source purge, the treatment time is not less than 20s, and the plasma energy is 150W. In each subsequent growth cycle, two O plasma treatment steps are inserted, the first insertion point is after the metal precursor source purge, and the second insertion point is after the oxygen precursor source purge, the treatment time is less than 15s, and the plasma energy is 200W.

[0048] (2) Then, n-type ZnO material is grown to a thickness of 300 nm. Oxygen (O) plasma-assisted treatment is required. That is, an O plasma treatment step is inserted into each growth cycle after the oxygen precursor source is purged. The treatment time is 10 seconds and the plasma energy is 200 W.

[0049] (3) Yttrium-doped zinc oxide (YZN) is then grown as a thermal expansion-improving layer with a thickness of 10 nm and a yttrium doping ratio of 10:1. This means that 10 cycles of zinc are grown and 1 cycle of yttrium is inserted. Oxygen (O) plasma-assisted treatment is also required. An O plasma treatment step is inserted into each growth cycle, after the oxygen precursor source is purged. The treatment time is 20 seconds and the plasma energy is 200 W.

[0050] (4) Continuing to grow AZO material as an n-type electrode also requires oxygen (O) plasma-assisted treatment. That is, in each growth cycle, an O plasma treatment step is inserted. The insertion point is after the oxygen precursor source is purged, the treatment time is 10s, and the plasma energy is 100W.

[0051] (5) Then, photolithography is performed first and then wet etching is performed using 10% volume fraction dilute phosphoric acid until the barrier layer below is penetrated.

[0052] (6) The punch-through barrier layer in the p-type region is then etched using an Ar ion reactive ion beam with an etching power of 100 W and a gas flow rate of 200 sccm. The electrode shape is then photoetched in both the n- and p-regions to a size of 100 μm × 100 μm.

[0053] (7) Cr / Au electrode is then evaporated in the p-region as a p-type electrode, with a Cr thickness of 5 nm (to form an ohmic contact) and an Au thickness of 95 nm (to reduce electrode resistance).

[0054] At this point, the basic structure of the 6-inch device (i.e., a semiconductor heterojunction light-emitting chip that can directly emit white light) is completed. By loading the corresponding voltage and current, it can emit natural light similar to that of the sun.

[0055] The above time and temperature, such as the precise temperature control involved in the epitaxial growth of the p-type layer, punch-through barrier layer, n-type layer, and thermal expansion improvement layer, have a heating and cooling rate no higher than 50° C. / min.

[0056] The punch-through barrier layer needs to be subjected to nitrogen (N) plasma-assisted treatment at the initial stage of deposition, with a treatment time of no less than 10 seconds and a power not exceeding 1000W.

[0057] The punch-through barrier layer needs to be subjected to oxygen (O) plasma-assisted treatment in the middle and late stages of deposition, with a treatment time of no less than 10s and a power not exceeding 1000W.

[0058] The materials of the p-type layer, punch-through barrier layer, n-type layer, and thermal expansion improvement layer can be processed using the following equipment: molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), magnetron sputtering, thermal evaporation, electron beam evaporation (EBE), and atomic layer deposition (ALD). Each equipment is equipped with a plasma source to assist in growth.

[0059] The above description is only a preferred embodiment of the present invention and does not limit the patent scope of the present invention. All equivalent structural transformations made by using the contents of the present invention description and drawings under the inventive concept of the present invention, or direct / indirect application in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A natural light chip with a 6-inch substrate, comprising a substrate, a p-type layer, a punch-through barrier layer, an n-type layer, a thermal expansion improvement layer, and an electrode layer, wherein the electrode layer may or may not be on the same side of the chip, characterized in that: The chip is subjected to plasma-assisted treatment; the thermal expansion improvement layer is doped with yttrium; and the heating and cooling rates during the epitaxial growth of the p-type layer, the punch-through barrier layer, the n-type layer, and the stress release layer are all no higher than 50° C. / min.

2. The natural light chip with a 6-inch substrate according to claim 1, characterized in that: The p-type layer is mainly composed of gallium nitride, which is doped with zinc (Zn) and treated with nitrogen (N) plasma.

3. The natural light chip with a 6-inch substrate according to claim 1, characterized in that: The punch-through barrier layer is mainly composed of zirconium oxide or gallium oxide, and is treated with nitrogen (N) and oxygen (O) plasma in sequence during the growth process.

4. The natural light chip with a 6-inch substrate according to claim 1, characterized in that: The main component of the n-type layer is zinc oxide, which is doped with high-concentration hydrogen (H) and treated with oxygen (O) plasma.

5. The natural light chip with a 6-inch substrate according to claim 1, characterized in that: The main component of the thermal expansion improving layer is yttrium-doped zinc oxide, and oxygen (O) plasma treatment is performed during the growth process.

6. The natural light chip with a 6-inch substrate according to claim 1, characterized in that: The electrode layer is any one or more of indium-doped tin oxide (ITO), aluminum-doped zinc oxide (AZO), Cr / Au, Ni / Au, Al and Ag.

7. The natural light chip with a 6-inch substrate according to claim 1, characterized in that: The punch-through barrier layer has a thickness of 25-35 nm, the n-type layer has a thickness of 270-320 nm, and the thermal expansion improving layer has a thickness of 8-12 nm.

8. The method for preparing a natural light chip based on a 6-inch substrate according to any one of claims 1 to 7, characterized in that: The following steps are included: S1, prepare a p-type layer on the substrate, and precisely control the heating and cooling rates during the preparation process; S2, growing a punch-through barrier layer on the p-type layer, and during the preparation process, performing a corresponding uniform low-energy plasma treatment while precisely controlling the heating and cooling rates; S3, preparing a zinc oxide layer, during which a relatively uniform low-energy plasma treatment is performed while precisely controlling the heating and cooling rates; S4, after step S3, depositing a layer of yttrium-doped zinc oxide, and performing precise heating and cooling rates and plasma treatment; S5, using photolithography and etching processes to expose the top / bottom electrode areas, and depositing electrodes by magnetron sputtering, vacuum evaporation or PLD to obtain the natural light chip of the 6-inch substrate.

9. The method for preparing a natural light chip based on a 6-inch substrate according to claim 8, characterized in that: The precise temperature control involved in the epitaxial growth of the p-type layer, punch-through barrier layer, n-type layer, and thermal expansion improvement layer has a heating and cooling rate of no more than 50°C / min; The punch-through barrier layer needs to be subjected to nitrogen (N) plasma-assisted treatment at the initial stage of deposition, with a treatment time of not less than 10 seconds and a power not exceeding 1000W; The punch-through barrier layer needs to be treated with oxygen (O) plasma in the middle and late stages of deposition, with a treatment time of no less than 10 seconds and a power not exceeding 1000W; During the epitaxial growth of the n-type layer and the thermal expansion improving layer, oxygen (O) plasma-assisted treatment is required, and the treatment time is not less than 5 seconds.

10. The method for preparing a natural light chip based on a 6-inch substrate according to claim 8, characterized in that: The materials of the p-type layer, punch-through barrier layer, n-type layer, and thermal expansion improvement layer can be processed using the following equipment: molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), magnetron sputtering, thermal evaporation, electron beam evaporation (EBE), and atomic layer deposition (ALD). Each equipment is equipped with a plasma source to assist in growth.

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