Substrate processing method

Abstract

A method of filling a gap without a gap or void within the gap is provided. According to an embodiment of the present disclosure, a gap filling method includes forming a first suppression layer on an upper portion of a gap, forming a second suppression layer on the upper portion of the gap by removing the first suppression layer, forming a silicon-containing layer, and performing post-processing to remove residual impurities from the silicon-containing layer, where the post-processing includes a first process and a second process.

Description

Technical Field

[0001] The present disclosure relates to substrate processing methods, and more particularly, to methods for filling gaps without forming seams or voids. Background Art

[0002] Semiconductor devices include a large number of transistors. Transistors need to be insulated from their surroundings and not electrically disconnected from adjacent transistors. To this end, an insulating structure is introduced between transistors. STI (shallow trench isolation) is a gap structure formed between transistors and filled with an insulating layer such as SiO2. The insulating layer filling STI needs to be free of gaps or cracks and have high etching resistance for low leakage.

[0003] Flowable CVD is widely used to fill gaps with insulating layers. Flowable CVD is used to fill the gap from the bottom, followed by an annealing process at high temperatures. However, the annealing process causes damage (i.e., cracks) to the bottom layer of the gap, resulting in degraded electrical properties.

[0004] To address these issues, a plasma atomic layer deposition (PEALD) method was employed to fill the gap at low temperatures. To improve gap filling efficiency, an inhibitor was introduced into the gap filling method, suppressing the formation of a SiO2 layer in the upper portion of the gap. Conversely, the formation of a SiO2 layer was promoted in the lower portion of the gap, enabling the gap to be filled from the bottom.

[0005] As an inhibitor, nitrogen activated by a power source (e.g., a plasma generator or an RF generator) is generally used. The activated nitrogen is adsorbed on the upper portion of the gap to form an inhibitory layer thereon, followed by the formation of a SiO2 layer on the gap. When the SiO2 layer is formed on the gap, the silicon source layer is not formed on the upper portion of the gap due to the inhibitory layer. Instead, the silicon source reacts with the bonding sites (i.e., -OH sites) on the lower portion of the gap. The gap filling cycle using the inhibitor in the PEALD method is cyclically repeated to fill the gap with the SiO2 layer.

[0006] However, as the number of cycles of filling the gap with the SiO2 layer increases, the silicon source reacts with the inhibition layer (i.e., nitrogen layer) on the upper portion of the gap and forms a SiN layer thereon, while a SiO2 layer forms on the lower portion of the gap, ultimately resulting in voids within the gap. The voids are generated by the difference in activation energy for film formation under plasma.

[0007] It is known that the activation energy for forming a SiO2 layer under plasma is 17.4 kJ / mol, while the activation energy for forming a SiN layer is 6.7 kJ / mol. In other words, the SiN layer is easier to form.

[0008] Figure 1A to E in FIG. 1 show a conventional SiO 2 gap filling method using a nitrogen inhibitor (ie, N 2 plasma), wherein a SiN layer is formed on the nitrogen inhibitor layer on the upper portion of the gap, while the lower portion of the gap is filled with a SiO 2 layer.

[0009] exist Figure 1 In A, a gap 2 may be formed in the substrate 1. Figure 1 In Figure B, a nitrogen-containing gas (i.e., N2) as an inhibitor is supplied to the substrate 1, and a nitrogen inhibition layer 3 can be formed on the upper portion of the gap 2. The position of the inhibition layer 3 can be controlled by adjusting process conditions such as plasma power, plasma frequency, nitrogen flow rate, and nitrogen supply time to form it on the upper portion of the gap 2.

[0010] exist Figure 1 In Figure C, the gap 2 can be filled with a SiO2 layer 4 by supplying a silicon source gas and an oxygen-containing gas. The SiO2 layer 4 can be formed by a PEALD method, in which, for example, oxygen plasma can be supplied. Due to the inhibition layer 3 formed on the upper portion of the gap, the SiO2 layer 4 can be formed on the lower portion of the gap 2, filling the gap 2 from the bottom. Figure 1 The C in can be repeated multiple times.

[0011] exist Figure 1 In D, as Figure 1 By continuing to repeat the C in the gap 2, the SiN layer 5 can be formed on the upper part of the gap 2, while the lower part of the gap 2 is filled with the SiO2 layer 4 from the bottom. As mentioned above, the activation energy for forming the SiN layer is 6.7 kJ / mol, which is lower than the activation energy for forming the SiO2 layer of 17.4 kJ / mol. Therefore, the SiN layer 5 can be formed on the upper part of the gap 2 while repeating Figure 1 C in.

[0012] exist Figure 1 In E, when repeated Figure 1 C and Figure 1 When D in , a void 6 may be formed in the gap 2. The void 6 formed in the gap 2 may degrade the insulation property of the semiconductor device and degrade the electrical characteristics of the device.

[0013] Therefore, in a SiO 2 gap-filling method using an inhibitor, it is required to suppress the formation of a SiN layer on the upper portion of the gap while promoting the formation of a SiO 2 layer on the lower portion of the gap. Summary of the Invention

[0014] The present invention discloses a method of filling a gap, and more particularly, discloses a method of filling a gap with a SiO2 layer by using an inhibitor while suppressing the formation of a SiN layer on an upper portion of the gap.

[0015] In one or more embodiments, a method of filling a gap in a substrate may include: providing a substrate having a gap in a reactor, forming a first inhibition layer on the substrate by supplying a first inhibitor including a nitrogen-containing gas while applying a first power to the reactor, forming a second inhibition layer by supplying a second inhibitor including a fluorine-containing gas while applying a second power to the reactor, and removing the first inhibition layer, and forming a silicon-containing layer on the substrate, wherein the first inhibition layer and the second inhibition layer may be formed on an upper portion of the gap, and the silicon-containing layer may be formed on a lower portion of the gap.

[0016] In one or more embodiments, the silicon-containing layer may be silicon oxide formed by repeating a method including supplying a silicon source gas followed by supplying an oxygen-containing gas while applying a third power.

[0017] In one or more embodiments, the silicon source gas may include at least one of the following: trisilylamine ((SiH3)3N); disilane ((SiH3)2); disilylmethylamine ((SiH3)2NMe); disilylethylamine ((SiH3)2NEt); disilylisopropylamine ((SiH3)2N(iPr)); disilyl-tert-butylamine ((SiH3)2N(tBu)); diethylsilylamine (SiH3NEt2); di-tert-butylsilylamine (SiH3N(tBu)2); bis-diethylamino-silane (SiH2(NEt2)2); bis-dimethylamino-silane (SiH2(NMe2)2); bis-tert-butylamino-silane (SiH2(NHtBu)2); diisopropylaminosilane (SiH3N(iPr)2); tetraethyl orthosilicate (Si(OEt)4); 1,2-bis(triethyl)silane 2); bis(triethoxysilyl)methane (CH2[Si(OC2H5)3]2); bis(methyldiethoxysilyl)ethane ([CH2Si(OC2H5)2(OCH3)]2); bis(methyldiethoxysilyl)methane (CH2[Si(OC2H5)2(OCH3)]2); aminopropyltrimethoxysilane (NH2 C3H6)Si(OCH3)3; silicon tetrachloride (SiCl4); hexachlorodisilane (Si2Cl6); tris-dimethylaminosilane (SiH(N(Me)2)3); bis-ethylmethylamino-silane (SiH2[N(Et)(Me)]2); hexaethylamino-disilane (Si2(NHEt)6); tetraethylamino-silane (Si(NHEt)4); trisilane (Si3H8) or a mixture thereof.

[0018] In one or more embodiments, the oxygen-containing gas may include at least one of: O 2 , O 3 , or H 2 O, or a mixture thereof.

[0019] In one or more embodiments, the first inhibitor may include at least one of: N2, NH3, NH4, N2H2 or N2H4, or a mixture thereof.

[0020] In one or more embodiments, the second inhibitor may include at least one of: F2, SF6, CF4, C2F6, CHF3, CH2F2, ClF3, NF3, C3F8, C4F8, HF or SiF4, or a mixture thereof.

[0021] In one or more embodiments, the first power may be applied at a power between about 50 W and about 2000 W at a frequency between about 10 MHz and about 30 MHz.

[0022] In one or more embodiments, the first power may be applied at an additive power of between about 50 W and about 500 W at a frequency between about 300 kHz and about 1 MHz.

[0023] In one or more embodiments, the second power may be applied at a power of between about 50 W and about 100 W at a frequency between about 300 kHz and about 20 MHz.

[0024] In one or more embodiments, the second power may be applied at an additional power of between about 15 W and about 500 W at a frequency between about 300 kHz and about 1 MHz.

[0025] In one or more embodiments, the third power may be between about 100 W and about 300 W at a frequency between about 10 MHz and about 30 MHz.

[0026] In one or more embodiments, the method of filling a gap in a substrate may further include performing a post-processing on the silicon-containing layer.

[0027] In one or more embodiments, the post-processing may include: a first process of removing fluorine from the silicon-containing layer by supplying a first process gas including at least one of a nitrogen-containing gas and a hydrogen-containing gas while applying a fourth power; and a second process of removing nitrogen from the silicon-containing layer by supplying a second process gas including at least one of an oxygen-containing gas and a hydrogen-containing gas while applying a fifth power.

[0028] In one or more embodiments, the first process gas may include at least one of: N2, NH3, NH4, N2H2, N2H4 or H2 or a mixture thereof, and the second process gas may include at least one of: O2, O3, H2O, H2O2 or H2 or a mixture thereof.

[0029] In one or more embodiments, each of the fourth power and the fifth power may be applied at a power between about 50 W and about 2000 W at a frequency between about 10 MHz and about 30 MHz.

[0030] In one or more embodiments, each of the fourth power and the fifth power may be applied at an additional power of between about 15 W and about 500 W at a frequency between 300 kHz and about 1 MHz.

[0031] In one or more embodiments, each of forming the first inhibition layer, forming the second inhibition layer, forming the silicon-containing layer, performing the first process, and performing the second process may be repeated at least once.

[0032] This summary is provided to introduce a selection of concepts in a simplified form. These concepts are further described in detail in the detailed description of example embodiments of the present disclosure below. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A to E in FIG. 1 show a conventional SiO 2 gap-filling method using a nitrogen inhibitor, in which a SiN layer is formed on an upper portion of the gap.

[0034] Figure 2 A gap filling method according to an embodiment of the present disclosure is shown.

[0035] Figure 3 A to F in FIG. 1 schematically show the Figure 2 A gap filling method of an embodiment.

[0036] Figure 4 A to D in FIG show the Figure 2 and Figure 3 Substances A to F are formed on the surface of the gap.

[0037] Figure 5 A gap filling method according to another embodiment of the present disclosure is shown.

[0038] Figure 6 Details of post-processing according to another embodiment of the present disclosure are shown.

[0039] Figure 7A is a TEM photograph showing the gap filled with SiO2 layer, Figure 7B : are EDX (Energy Dispersive X-ray Spectroscopy) analysis results showing the amounts of fluorine in the respective SiO 2 layers when the first treatment and the second treatment are not performed.

[0040] Figure 8Ais a TEM photograph showing the gap filled with SiO2 layer, Figure 8B 3 are EDX (Energy Dispersive X-ray Spectroscopy) analysis results showing the amounts of fluorine in the respective SiO 2 layers when the first treatment and the second treatment were performed.

[0041] Figure 9A A timing diagram of a gap filling method according to an embodiment of the present disclosure is shown.

[0042] Figure 9B A timing diagram of a gap filling method according to an embodiment of the present disclosure is shown.

[0043] It should be understood that the elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the sizes of some elements in the drawings may be exaggerated relative to other elements to help improve understanding of the illustrated embodiments of the present disclosure. DETAILED DESCRIPTION

[0044] Although certain embodiments and examples are disclosed below, those skilled in the art will appreciate that the invention extends beyond the specifically disclosed embodiments and / or uses of the invention and obvious modifications and equivalents thereof. Accordingly, it is intended that the scope of the disclosed invention should not be limited by the specific disclosed embodiments described below.

[0045] As used herein, the term "substrate" may refer to any underlying material or materials, including any underlying material or materials that can be modified or on which a device, circuit, or film can be formed. A "substrate" can be continuous or discontinuous; rigid or flexible; solid or porous; and combinations thereof. A substrate can be in any form, such as a powder, a sheet, or a workpiece. Sheet-form substrates can include wafers of various shapes and sizes. Substrates can be made of semiconductor materials, including, for example, silicon, silicon germanium, silicon oxide, gallium arsenide, gallium nitride, and silicon carbide.

[0046] The continuous substrate may extend beyond the boundaries of the processing chamber in which the deposition process occurs. In some processes, the continuous substrate may be moved through the processing chamber, such that the process continues until the end of the substrate is reached. The continuous substrate may be supplied from a continuous substrate feed system to allow for the manufacture and output of the continuous substrate in any suitable form.

[0047] The illustrations presented herein are not intended to be actual views of any particular material, structure, or device, but are merely idealized representations used to describe embodiments of the present disclosure.

[0048] The specific embodiments shown and described are illustrative of the present invention and its best mode and are not intended to limit the scope of the various aspects and embodiments in any other way. In fact, for the sake of brevity, the conventional manufacturing, connection, preparation and other functional aspects of the system may not be described in detail. In addition, the connecting lines shown in the various figures are intended to represent exemplary functional relationships and / or physical connections between the various elements. Many alternative or additional functional relationships or physical connections may exist in actual systems and / or may not exist in some embodiments.

[0049] It should be understood that the configurations and / or methods described herein are exemplary in nature, and these specific embodiments or examples should not be considered restrictive, as many variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. Therefore, the various actions shown may be performed in the order shown, in other orders, or in some cases omitted.

[0050] The subject matter of the present disclosure includes all novel and nonobvious combinations and subcombinations of the various processes, systems and configurations, and other features, functions, acts, and / or properties disclosed herein, as well as any and all equivalents thereof.

[0051] Figure 2 A gap filling method according to an embodiment of the present disclosure is shown.

[0052] exist Figure 2 In step 210 of the gap filling method 200, a substrate having a gap may be provided in a reactor. The gap in the substrate may be a structure (e.g., STI (shallow trench isolation)) that isolates a transistor from the surrounding environment, for example, or any other shape of trench in a DRAM or 3D VNAND device.

[0053] In step 220, a first inhibition layer may be formed on the substrate. The first inhibition layer may be formed by supplying a first inhibitor to the substrate. The first inhibitor may be activated by a first power applied in situ or remotely to the reactor. The surface of the substrate may contain bonding sites (e.g., -OH). The inhibitor may react with the bonding sites located on the upper portion of the gap and form a first inhibition layer including inhibition sites (e.g., -HN) thereon.

[0054] To form the first suppression layer on the upper portion of the gap, some process parameters may be adjusted (e.g., pressure, supply time of the first suppressant, flow rate, or first suppressant and plasma conditions, etc.). For example, the first suppressant may be supplied for a short period of time while applying low-intensity high-frequency RF power.

[0055] In some embodiments, the first power may be applied at a power between about 50 W and about 2000 W at a frequency between about 10 MHz and about 30 MHz. More specifically, the first power may be applied at a power between about 300 W and about 1500 W at a frequency between about 10 MHz and about 20 MHz. The first power may be applied for about 6 seconds to about 50 seconds.

[0056] In another embodiment, the first power may be applied at an additional power between about 50 W and about 500 W at a frequency between about 300 kHz and about 1 MHz. That is, a dual-frequency first power including high-frequency power and low-frequency power may be applied to the reactor.

[0057] The first inhibitor may include a nitrogen-containing gas. In one embodiment of the present disclosure, the first inhibitor may include at least one of the following: N2, NH3, NH4, N2H2 or N2H4, or a mixture thereof.

[0058] In step 230, a second inhibitory layer may be formed on the upper portion of the gap, and the first inhibitory layer formed thereon in step 210 may be removed. The second inhibitory layer may be formed by supplying a second inhibitor to the substrate. The second inhibitor may be activated by a second power applied in situ or remotely to the reactor.

[0059] In some embodiments, the second power may be applied at a power between about 15 W and about 500 W at a frequency between about 10 MHz and about 30 MHz. More specifically, the first power may be applied at a frequency between about 50 W and about 100 W at a frequency between about 10 MHz and about 20 MHz. The second power may be applied for about 0.1 seconds to about 5 seconds to form the second inhibitory layer.

[0060] In another embodiment, the second power may be applied at an additional power between about 15 W and about 500 W at a frequency between about 300 kHz and about 1 MHz. That is, a dual-frequency second power including high-frequency power and low-frequency power may be applied to the reactor.

[0061] The second inhibitor may include a fluorine-containing gas. In one embodiment of the present disclosure, the second inhibitor may include at least one of the following: F2, SF6, CF4, C2F6, CHF3, CH2F2, ClF3, NF3, C3F8, C4F8, HF, or SiF4, or a mixture thereof. The second inhibitor may remove the first inhibitory layer formed on the upper portion of the gap and form a second inhibitory layer thereon having the first inhibitory layer previously formed thereon.

[0062] The surface of the gap may include bonding sites (i.e., -OH) formed on the lower portion of the gap and a first inhibition layer (i.e., -HN) formed on the upper portion of the gap. In step 230, it is believed that the second inhibitor (i.e., fluorine-containing gas) reacts better with the first inhibition layer (i.e., -HN) formed on the upper portion of the gap than with the bonding sites formed on the lower portion of the gap, thereby removing the first inhibition layer. As a result, a second inhibition layer (i.e., -F) may be formed on the upper portion of the gap on which the first inhibition layer was previously formed, better than on the lower portion of the gap.

[0063] That is, the difference in reactivity between the second inhibitor and the different surface layers can enable the second inhibitory layer to be selectively formed on the upper portion of the gap rather than on the lower portion of the gap. Therefore, bottom-up gap filling can continue, so that the upper portion of the gap can remain fully open, and the SiN layer can be inhibited from forming on the upper portion of the gap during gap filling (e.g., during the repetition of step 240).

[0064] In step 240, a silicon-containing layer may be formed to fill the gap. The silicon-containing layer may be an insulating layer. For example, the silicon-containing layer may be SiO2 formed by a PEALD method, in which a silicon source gas and an activated oxygen-containing gas as a reactant are alternately and sequentially supplied. Step 240 may be repeated multiple times until the gap is filled.

[0065] The silicon source gas may include at least one of the following: trisilylamine ((SiH3)3N); disilane ((SiH3)2); disilylmethylamine ((SiH3)2NMe); disilylethylamine ((SiH3)2NEt); disilylisopropylamine ((SiH3)2N(iPr)); disilyl-tert-butylamine ((SiH3)2N(tBu)); diethylsilylamine (SiH3NEt 2); di-tert-butylsilylamine (SiH3N(tBu)2); bis-diethylamino-silane (SiH2(NEt2)2); bis-dimethylamino-silane (SiH2(NMe2)2); bis-tert-butylamino-silane (SiH2(NHtBu)2); diisopropylaminosilane (SiH3N(iPr)2); tetraethyl orthosilicate (Si(OEt)4); 1,2-bis(triethoxysilyl) )ethane ([CH2Si(OC2H5)3]2); bis(triethoxysilyl)methane (CH2[Si(OC2H5)3]2); bis(methyldiethoxysilyl)ethane ([CH2Si(OC2H5)2(OCH3)]2); bis(methyldiethoxysilyl)methane (CH2[Si(OC2H5)2(OCH3)]2); aminopropyltrimethoxysilane (NH2C3H6 )Si(OCH3)3; silicon tetrachloride (SiCl4); hexachlorodisilane (Si2Cl6); tris-dimethylaminosilane (SiH(N(Me)2)3); bis-ethylmethylamino-silane (SiH2[N(Et)(Me)]2); hexaethylamino-disilane (Si2(NHEt)6); tetraethylamino-silane (Si(NHEt)4); or trisilane (Si3H8) or a mixture thereof.

[0066] The reactants may include an oxygen-containing gas to form the SiO2 layer. For example, at least one of the following may be supplied to form the SiO2 layer: O2, O3, or H2O, or a mixture thereof. The oxygen-containing gas may be activated by applying a third power to the reactor.

[0067] In some embodiments, the third power may be applied at a power between about 100 W and about 300 W at a frequency between about 10 MHz and about 30 MHz. More specifically, the third power may be applied at a power between about 150 W and about 250 W at a frequency between about 10 MHz and about 20 MHz to form the silicon-containing layer. The third power may be applied for about 0.1 second to about 0.5 second.

[0068] Figure 3 A to F in FIG. 1 schematically show the Figure 2 A gap filling method of an embodiment.

[0069] exist Figure 3In A in FIG, a gap 11 may be formed in the substrate 10. Figure 3 In Figure B, a first inhibitor layer 12 can be formed on the upper portion of the gap 11 by supplying a first inhibitor to the substrate 10. The first inhibitor can be activated by power applied to the reactor in situ or remotely. The position of the first inhibitor layer 12 can be controlled to form on the upper portion of the gap 11 by adjusting process conditions (such as plasma power, plasma frequency, flow rate of the first inhibitor, and supply time of the first inhibitor). The first inhibitor can include a nitrogen-containing gas.

[0070] exist Figure 3 In C, the first inhibition layer 12 can be removed from the upper portion of the gap, and a second inhibition layer 13 can be formed thereon by supplying a second inhibitor. The second inhibition layer 13 can be formed by supplying the second inhibitor to the substrate. The second inhibitor can be activated by power applied to the reactor in situ or remotely. The second inhibitor can include a fluorine-containing gas.

[0071] exist Figure 3 In D, a silicon-containing layer 14 may be formed to fill the gap. The silicon-containing layer may be a SiO2 layer. The SiO2 layer may be formed by a PEALD method by alternately and sequentially supplying a silicon source gas and an activated oxygen-containing gas. The SiO2 layer may fill the gap 11 from the bottom, while the SiO2 layer or SiN layer may not be formed on the upper portion of the gap due to the second inhibition layer 13 formed thereon. Figure 3 As shown in E.

[0072] exist Figure 3 In F, by repeating Figure 3 D and Figure 3 In E, the gap can be completely filled with SiO2 layer without forming voids.

[0073] Figure 4 A to D in FIG. 1 schematically show the Figure 2 and Figure 3 Substances A to F are formed on the surface of the gap.

[0074] exist Figure 4 In A of FIG. 1 , a substrate having a gap is provided. Bonding sites (eg, -OH) may be formed on the surface of the gap from the top to the bottom.

[0075] exist Figure 4 In B, a first inhibitor may be supplied to the gap. The first inhibitor may be, for example, a nitrogen-containing gas N2 activated by power. The first inhibitor may react with the bonding sites on the upper portion of the gap to form an inhibitory layer (eg, NH-) thereon. Figure 4 The B in can correspond to Figure 2 and Figure 3 Step 220 of B in .

[0076] exist Figure 4 In the C of FIG, a second inhibitor may be supplied to the gap. The second inhibitor may be a fluorine-containing gas, such as NF3. The second inhibitor may remove the first inhibitor previously formed by the first inhibitor layer formed on the upper portion of the gap and adsorbed thereon. That is, the second inhibitor layer (e.g., -F) may be formed on the upper portion of the gap, while the lower portion of the gap may still have bonding sites (i.e., -OH). Figure 4 The C in can correspond to Figure 2 Step 230 and Figure 3 The chemical reaction equation between NF3 (the second inhibitor) and -HN (the first inhibitor layer) can be as follows.

[0077] NF3+4NH 3F+NH4(g)+2N2(g)

[0078] In the above equation, F can form a second inhibition layer, while NH4 and N2 can be removed as gaseous byproducts. In other words, the first inhibition layer can be removed by reacting with the second inhibitor, and then a second inhibition layer can be formed on the upper portion of the gap where the first inhibition layer was previously formed.

[0079] exist Figure 4 In D, the gap can be filled with a SiO2 layer. The SiO2 layer can be formed by a PEALD method. As the cycle for forming the SiO2 layer is repeated, the gap can be filled from bottom to top without forming a void. Figure 4 The D in can correspond to Figure 2 Step 240, and Figure 3 D to F in . The second suppression layer (ie, -F) may have stronger suppression characteristics than the first suppression layer (ie, -HN). Therefore, during the gap filling with the SiO2 layer, layer formation on the upper portion of the gap may be suppressed.

[0080] Figure 5 A gap filling method according to another embodiment of the present disclosure is shown.

[0081] exist Figure 5 In the embodiment, the gap filling method 500 may include steps 510 to 550. Steps 510 to 540 may be combined with Figure 2 Steps 210 to 240 are the same.

[0082] In more detail, in step 510, a substrate having a gap may be provided to a reactor. In step 520, a first inhibitor, such as N2 or NH3, may be provided to form a first inhibition layer on the upper portion of the gap. In step 530, a second inhibition layer may be provided to form the upper portion of the gap by providing a second inhibitor, NF3, and the first inhibition layer may be removed. In step 540, a SiO2 layer may be formed by a PEALD method to fill the gap.

[0083] Apart from Figure 2 In addition, post-processing may be performed in step 550. Post-processing may be performed to remove impurities from the SiO2 layer. For example, nitrogen-containing gas, residual first inhibitor, and fluorine-containing gas, residual second inhibitor may be removed from the SiO2 layer.

[0084] Figure 6 Details of post-processing according to another embodiment of the present disclosure are shown.

[0085] exist Figure 6 In the embodiment of the present invention, the post-processing may include a first process 610 and a second process 620. The first process 610 may be performed to remove residual fluorine-containing gas from the SiO2 layer by supplying a first process gas while applying a fourth power. The first process gas may include at least one of a nitrogen-containing gas and a hydrogen-containing gas. In more detail, the first process gas may include at least one of the following: N2, NH3, NH4, N2H2, N2H4, or H2, or a mixture thereof. The first process gas may react with the residual fluorine-containing gas to form a fluorine compound. The fluorine compound (e.g., NF3, HF, etc.) may be removed as a gaseous byproduct.

[0086] A second process 620 may be performed to remove residual nitrogen-containing gas from the SiO2 layer by supplying a second process gas while applying a fifth power. The second process gas may include at least one of an oxygen-containing gas and a hydrogen-containing gas. More specifically, the second process gas may include at least one of O2, O3, H2O2, H2O, or H2, or a mixture thereof. The second process gas may react with the residual nitrogen-containing gas to form a nitrogen compound. The nitrogen compound (e.g., NO2, N2O, NH3, etc.) may be removed as a gaseous byproduct.

[0087] In another embodiment of the present disclosure, a first process 610 may be performed to remove residual nitrogen-containing gas from the SiO2 layer by supplying an oxygen-containing gas as a first process gas, and then a second process 620 may be performed to remove residual fluorine-containing gas from the SiO2 layer by supplying a nitrogen-containing gas as a second process gas.

[0088] In some embodiments, each of the fourth power and the fifth power may be applied at a power between about 50 W and about 2000 W at a frequency between about 10 MHz and about 30 MHz. More specifically, each of the fourth power and the fifth power may be applied at a power between about 200 W and about 600 W at a frequency between about 10 MHz and about 20 MHz to perform post-processing.

[0089] The first process 610 may be performed for about 10 seconds to about 150 seconds, and the second process 620 may be performed for about 0.5 seconds to about 2 seconds.

[0090] In another embodiment, each of the fourth power and the fifth power can be applied at an additional power between about 15 W and about 500 W at a frequency between 300 kHz and about 1 MHz. That is, each of the dual-frequency fourth power and the dual-frequency fifth power including high-frequency power and low-frequency power can be applied to the reactor.

[0091] Figure 7A is a TEM (transmission electron microscope) photograph image showing the gap filled with the SiO2 layer. Figure 7B is an EDX (Energy Dispersive X-ray Spectroscopy) analysis result showing that the amount of fluorine in the corresponding SiO2 layer changes with depth ( Figure 7A direction of the arrow in the figure). Figure 7A and Figure 7B Can be executed Figure 2 results.

[0092] like Figure 7A As shown, the gap is filled with a SiO2 layer without forming a void therein. Figure 7B The fluorine content in the SiO2 film is between greater than 2% and 12%, and is unevenly distributed with depth. Figure 7B It is shown that fluorine is more distributed in the upper part of the gap (low depth area). In other words, Figure 7A and Figure 7B Shown according to Figure 2 An embodiment forms a second suppression layer on an upper portion of the gap.

[0093] Figure 8A is a TEM (transmission electron microscope) photograph image showing the gap filled with the SiO2 layer. Figure 8B is an EDX (Energy Dispersive X-ray Spectroscopy) analysis result showing that the amount of fluorine in the corresponding SiO2 layer changes with depth ( Figure 8A direction of the arrow in the figure). Figure 8A and Figure 8B Can be executed Figure 5 results.

[0094] like Figure 8AAs shown, the gap is filled with a SiO2 layer without forming a void therein. Figure 8B In the experiment, after the first and second treatments, the fluorine in the SiO2 film was reduced to less than 2% and was evenly distributed throughout the depth. Figure 7B compared to, Figure 8B It is shown that the second suppression layer formed on the upper portion of the gap is significantly removed by post-processing.

[0095] Figure 9A A timing diagram of a gap filling method according to an embodiment of the present disclosure is shown. Figure 9A Can correspond to Figure 2 .

[0096] In T1, a first inhibitory layer may be formed by supplying a nitrogen-containing gas as a first inhibitor while applying a first power, followed by a purge step T2. The first power may be single-frequency power or dual-frequency power. A purge gas (e.g., Ar) may be supplied during the purge step T2. The purge gas may be supplied from T1 to T8.

[0097] In T3, a second inhibitory layer may be formed by supplying a fluorine-containing gas as a second inhibitor while applying a second power, followed by T4, a purge step. The second power may be single-frequency power or dual-frequency power.

[0098] In T5 to T8, a silicon-containing layer may be formed by a PEALD method. The silicon-containing layer may be SiO2 by supplying a silicon source gas in T5 and supplying an oxygen-containing gas in T7 while applying a third power in T7.

[0099] exist Figure 9A , each of forming the first inhibition layer (T1 to T2), forming the second inhibition layer (T3 to T4), and forming the silicon-containing layer (T5 to T8) may be repeated at least once (ie, M, N, and X ≥ 1).

[0100] exist Figure 9A In another embodiment, the method may further include a super cycle of repeating multiple (i.e., P≥1) sub-steps including forming a first inhibition layer (T1 to T2), forming a second inhibition layer (T3 to T4), and forming a silicon-containing layer (T5 to T8).

[0101] Figure 9B A timing diagram of a gap filling method according to an embodiment of the present disclosure is shown. Figure 9B Can correspond to Figure 5 .

[0102] In T1, a first inhibitory layer may be formed by supplying a nitrogen-containing gas as a first inhibitor while applying a first power, followed by a purge step T2. The first power may be single-frequency power or dual-frequency power. A purge gas (e.g., Ar) may be supplied during the purge step T2. The purge gas may be supplied from T1 to T12.

[0103] In T3, a second inhibitory layer may be formed by supplying a fluorine-containing gas as a second inhibitor while applying a second power, followed by T4, a purge step. The second power may be single-frequency power or dual-frequency power.

[0104] In T5 to T8, a silicon-containing layer may be formed by a PEALD method. The silicon-containing layer may be SiO2 by supplying a silicon source gas in T5 and supplying an oxygen-containing gas in T7 while applying a third power in T7.

[0105] In T9 to T12, a post-processing may be performed on the silicon-containing layer. Specifically, the post-processing may include a first process from T9 to T10 and a second process from T11 to T12.

[0106] At T9, a first treatment may be performed by supplying a first process gas while applying a fourth power, followed by a purge step at T10. The first process gas may include at least one of a nitrogen-containing gas and a hydrogen-containing gas to remove residual fluorine-containing gas from the silicon-containing layer. Residual fluorine-containing gas in the layer may react with the first process gas and be removed as gaseous byproducts (e.g., NF3, HF, etc.). The fourth power may be a single-frequency power or a dual-frequency power.

[0107] In T11, a second process can be performed by supplying a second process gas while applying the fifth power, followed by a purge step T12. The second process gas can include at least one of an oxygen-containing gas and a hydrogen-containing gas to remove residual nitrogen from the silicon-containing layer. Residual nitrogen-containing gas in the layer can react with the second process gas and be removed as gaseous byproducts (e.g., NO2, H2O, etc.). The fourth power can be a single-frequency power or a dual-frequency power.

[0108] On the other hand, after the residual fluorine-containing gas is removed from the silicon-containing layer, the sites originally occupied by fluorine may remain as vacancies. Therefore, the oxygen supplied in T11 can provide additional oxygen to the vacancies, resulting in the restoration of the stoichiometry of the silicon-containing oxide layer (e.g., SiO2).

[0109] exist Figure 9B In the embodiment, each of forming a first inhibition layer (T1 to T2), forming a second inhibition layer (T3 to T4), forming a silicon-containing layer (T5 to T8), performing a first treatment (T9 to T10) and performing a second treatment (T11 to T12) can be repeated at least once (i.e., M, N, X, Y and Z ≥ 1).

[0110] exist Figure 9B In another embodiment, the method may further include a super cycle of repeating multiple (i.e., P≥1) sub-steps, the sub-steps including forming a first inhibition layer (T1 to T2), forming a second inhibition layer (T3 to T4), forming a silicon-containing layer (T5 to T8), performing a first treatment (T9 to T10), and performing a second treatment (T11 to T12).

[0111] Table 1 shows the process conditions for SiO 2 gap filling according to an embodiment of the present disclosure.

[0112] Table 1 - Process conditions for SiO2 gap filling

[0113]

Claims

1. A method for filling a gap in a substrate, comprising: providing a substrate having a gap in a reactor; forming a first inhibition layer on the substrate by supplying a first inhibitor including a nitrogen-containing gas while applying a first power to the reactor; forming a second inhibition layer by supplying a second inhibitor including a fluorine-containing gas while applying a second power to the reactor, and removing the first inhibition layer; as well as forming a silicon-containing layer on a substrate, The first and second inhibition layers are formed on an upper portion of the gap, and the silicon-containing layer is formed on a lower portion of the gap.

2. The method according to claim 1, wherein The silicon-containing layer is formed by a silicon oxide by repeatedly comprising: supplying a silicon source gas; and The oxygen-containing gas is supplied while the third power is applied.

3. The method according to claim 2, wherein: The silicon source gas includes at least one of the following: trisilylamine ((SiH3)3N); disilane ((SiH3)2); disilylmethylamine ((SiH3)2NMe); disilylethylamine ((SiH3)2NEt); disilylisopropylamine ((SiH3)2N(iPr)); disilyl-tert-butylamine ((SiH3)2N(tBu)); diethylsilylamine (SiH3NEt 2); di-tert-butylsilylamine (SiH3N(tBu)2); bis-diethylamino-silane (SiH2(NEt2)2); bis-dimethylamino-silane (SiH2(NMe2)2); bis-tert-butylamino-silane (SiH2(NHtBu)2); diisopropylaminosilane (SiH3N(iPr)2); tetraethyl orthosilicate (Si(OEt)4); 1,2-bis(triethoxysilyl) )ethane ([CH2Si(OC2H5)3]2); bis(triethoxysilyl)methane (CH2[Si(OC2H5)3]2); bis(methyldiethoxysilyl)ethane ([CH2Si(OC2H5)2(OCH3)]2); bis(methyldiethoxysilyl)methane (CH2[Si(OC2H5)2(OCH3)]2); aminopropyltrimethoxysilane (NH2C3H6 )Si(OCH3)3; silicon tetrachloride (SiCl4); hexachlorodisilane (Si2Cl6); tris-dimethylaminosilane (SiH(N(Me)2)3); bis-ethylmethylamino-silane (SiH2[N(Et)(Me)]2); hexaethylamino-disilane (Si2(NHEt)6); tetraethylamino-silane (Si(NHEt)4); or trisilane (Si3H8) or a mixture thereof.

4. The method according to claim 2, wherein: The oxygen-containing gas comprises at least one of the following: O2, O3 or H2O or a mixture thereof.

5. The method according to claim 2, wherein: The third power is applied at a power of between about 100 W and about 300 W at a frequency between about 10 MHz and about 30 MHz.

6. The method according to claim 1, wherein The first inhibitor includes at least one of the following: N2, NH3, NH4, N2H2 or N2H4 or a mixture thereof.

7. The method according to claim 1, wherein The second inhibitor includes at least one of the following: F2, SF6, CF4, C2F6, CHF3, CH2F2, ClF3, NF3, C3F8, C4F8, HF or SiF4 or a mixture thereof.

8. The method according to claim 1, wherein The first power is applied at a power of between about 50 W and about 2000 W at a frequency between about 10 MHz and about 30 MHz.

9. The method according to claim 8, wherein The first power is applied at an additive power of between about 50 W and about 500 W at a frequency between about 300 kHz and about 1 MHz.

10. The method according to claim 1, wherein The second power is applied at a power of between about 15 W and about 500 W at a frequency between about 10 MHz and about 30 MHz.

11. The method according to claim 10, wherein: The second power is applied at an additional power of between about 15 W and about 500 W at a frequency between about 300 kHz and about 1 MHz.

12. The method according to claim 1, wherein Each of forming the first inhibition layer, forming the second inhibition layer, and forming the silicon-containing layer is repeated at least once.

13. The method according to claim 12, wherein: The method further comprises repeating a super cycle comprising the sub-steps of the method according to claim 12 a plurality of times.

14. The method according to claim 1, wherein The method also includes performing a post-processing on the silicon-containing layer.

15. The method according to claim 14, wherein Performing the post-processing includes: a first process by supplying a first process gas including at least one of a nitrogen-containing gas and a hydrogen-containing gas to remove residual fluorine-containing gas from the silicon-containing layer while applying a fourth power; and A second process is performed by supplying a second process gas including at least one of an oxygen-containing gas and a hydrogen-containing gas to remove residual nitrogen-containing gas from the silicon-containing layer while applying a fifth power.

16. The method according to claim 15, wherein The silicon-containing layer contains less than 2% fluorine.

17. The method according to claim 15, wherein: The first process gas includes at least one of the following: N2, NH3, NH4, N2H2, N2H4 or H2, or a mixture thereof.

18. The method according to claim 15, wherein The second process gas includes at least one of the following: O2, O3, H2O2, H2O or H2, or a mixture thereof.

19. The method according to claim 14, wherein Each of the fourth power and the fifth power is applied at a power between about 50 W and about 2000 W at a frequency between about 10 MHz and about 30 MHz.

20. The method according to claim 19, wherein Each of the fourth power and the fifth power is applied at an additive power of between about 15 W and about 500 W at a frequency between 300 kHz and about 1 MHz.

21. The method according to claim 15, wherein Each of forming the first inhibition layer, forming the second inhibition layer, forming the silicon-containing layer, performing the first process, and performing the second process is repeated at least once.

22. The method according to claim 21, wherein The method further comprises repeating a super cycle comprising the sub-steps of the method according to claim 21 a plurality of times.

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