Method for improving contact resistance of high-resistance region after through hole etching

Abstract

The invention provides a method for improving the contact resistance of a high-resistance region after through hole etching, and the method comprises the steps: 1, providing a substrate, and sequentially forming an etching stop layer and a high-resistance material layer with an increased thickness on the substrate; 2, performing oxidation treatment on the high-resistance material layer to increase the resistance of the high-resistance material layer; step 3, removing the high-resistance material layer on the non-high-resistance region of the substrate; and 4, after the interlayer dielectric layer is formed, forming a first through hole and a second through hole which penetrate through the interlayer dielectric layer and of which the bottoms are respectively communicated with the substrate and the high-resistance material layer. The process is simple and reliable, and excessive loss of the high-resistance material layer in the high-resistance region caused by through hole etching can be avoided, so that the stability of the contact resistance value is ensured.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for improving the contact resistance of a high-resistance region after through-hole etching. Background Art

[0002] Existing advanced technology nodes use through-holes to connect to the underlying metal to achieve the interconnection between the front-end devices and the back-end metal. At the same time, the etching for forming the through-holes must stop at the high-resistance layer (which plays the role of voltage divider and current limiter in the circuit). However, due to the large height difference between the high-resistance area where the high-resistance layer is located and other areas and the high-resistance layer is relatively thin (usually less than 50 angstroms), the plasma will continuously bombard the high-resistance layer during the etching process, causing serious loss of the high-resistance layer (such as Figure 1 As shown in the figure, the contact resistance in the high resistance area increases, which ultimately affects the product performance. Summary of the Invention

[0003] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide a method for improving the contact resistance of the high-resistance region after through-hole etching, so as to solve the problems in the prior art.

[0004] To achieve the above objectives and other related objectives, the present application provides a method for improving the contact resistance of a high-resistance region after through-hole etching, comprising:

[0005] Step 1: providing a substrate, and sequentially forming an etching stop layer and a high-resistance material layer with increasing thickness on the substrate;

[0006] Step 2: performing oxidation treatment on the high-resistance material layer to increase the resistance of the high-resistance material layer;

[0007] Step 3, removing the high-resistance material layer located on the non-high-resistance region of the substrate;

[0008] Step 4: After forming the interlayer dielectric layer, forming a first through hole and a second through hole that penetrate the interlayer dielectric layer and are connected to the substrate and the high-resistance material layer at the bottom.

[0009] Preferably, the value range of the increase in thickness of the high-resistance material layer in step 1 is suitable for compensating for the increase in resistance through the oxidation treatment in step 2.

[0010] Preferably, the thickness of the high resistance material layer increases by 25 angstroms to 30 angstroms.

[0011] Preferably, the gases used in the oxidation treatment are oxygen and nitrogen, and the treatment time is 60s-70s.

[0012] Preferably, the flow rate of oxygen is 9000-10000 sccm, and the flow rate of nitrogen is 500-600 sccm.

[0013] Preferably, step three includes: forming a hard mask layer on the high-resistance material layer through a deposition process; forming a patterned bottom-up stacked bottom anti-reflective coating and photoresist layer on the hard mask layer through photolithography and etching processes; using the patterned bottom-up stacked bottom anti-reflective coating and photoresist layer as a mask, removing the high-resistance material layer and the hard mask layer located on the non-high-resistance area of the substrate through an etching process; and removing the patterned bottom-up stacked bottom anti-reflective coating and photoresist layer through an ashing process.

[0014] Preferably, the material of the hard mask layer includes silicon nitride.

[0015] Preferably, the material of the high-resistance material layer includes metal nitride.

[0016] As described above, the method provided in the present application for improving the contact resistance of the high-resistance region after through-hole etching has the following beneficial effects: the process is simple and reliable, and can avoid excessive loss of the high-resistance material layer in the high-resistance region due to through-hole etching, thereby ensuring the stability of the contact resistance value. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the specific implementation methods or the description of the prior art. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0018] Figure 1 A schematic diagram showing a cross-sectional structure of a device in which the high-resistance layer is severely damaged after through-hole etching is performed using the prior art;

[0019] Figure 2 A flow chart showing a method for improving the contact resistance of a high-resistance region after through-hole etching provided by an embodiment of the present application;

[0020] Figure 3A-3C Shown is a schematic diagram of the device cross-sectional structure formed after completing each step in the method for improving the contact resistance of the high-resistance region after through-hole etching provided in an embodiment of the present application. DETAILED DESCRIPTION

[0021] The following describes the embodiments of the present application through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present application from the disclosure herein. The present application may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different viewpoints and applications without departing from the spirit of the present invention.

[0022] The following is a clear and complete description of the technical solutions in this application in conjunction with the accompanying drawings. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of this application.

[0023] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating positions or location relationships, are used solely to facilitate the description of this application and simplify the description. They are not intended to indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0024] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal connections between two components; they can refer to wireless connections or wired connections. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0025] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0026] See also Figure 2 , which shows a flow chart of a method for improving the contact resistance of the high-resistance region after through-hole etching provided by an embodiment of the present application.

[0027] like Figure 2 As shown, the method for improving the contact resistance of the high-resistance region after through-hole etching includes the following steps:

[0028] Step 1: providing a substrate, and sequentially forming an etching stop layer and a high-resistance material layer with increasing thickness on the substrate;

[0029] Step 2: performing oxidation treatment on the high-resistance material layer to increase the resistance of the high-resistance material layer;

[0030] Step 3, removing the high-resistance material layer located on the non-high-resistance region of the substrate;

[0031] Step 4: After forming the interlayer dielectric layer, forming a first through hole and a second through hole that penetrate the interlayer dielectric layer and are connected to the substrate and the high-resistance material layer at the bottom.

[0032] In step one, if Figure 3A As shown, substrate 300 may optionally be a silicon substrate, a germanium substrate, or a silicon-on-insulator substrate; or the material of substrate 300 may include other materials, such as III-V compounds such as gallium arsenide. Those skilled in the art may select the material constituting substrate 300 based on the type of device structure to be formed on substrate 300. Therefore, the type of substrate 300 should not limit the scope of protection of the present invention.

[0033] As an example, an etch stop layer 301 and a high-resistance material layer 302 with an increased thickness are sequentially formed on the substrate 300 by a deposition process, wherein the deposition process includes chemical vapor deposition or the like.

[0034] As an example, the material of the etch stop layer 301 includes silicon nitride, and the material of the high-resistance material layer 302 includes metal nitride, such as titanium nitride (TiN).

[0035] In this embodiment, the increased thickness refers to an increase in the thickness of the high-resistance material layer 302 compared to existing processes to prevent excessive plasma loss of the high-resistance material layer 302 during the subsequent etching process for forming the through-hole. Since the increased thickness of the high-resistance material layer 302 reduces the resistance of the high-resistance material layer 302, the resistance of the high-resistance material layer 302 is increased by implementing the next step (increasing the resistivity and thus increasing the resistance). Therefore, the value range of the increased thickness of the high-resistance material layer 302 is preferably such that the increased resistivity can compensate for the increased resistance, typically 25 angstroms to 30 angstroms. The thickness of the high-resistance material layer 302 should not be too thick, as this will affect the morphology of the through-hole.

[0036] In step 2, an oxidation treatment is performed on the high-resistance material layer 302 to increase the resistance of the high-resistance material layer 302 to compensate for the resistance reduction caused by the increase in thickness of the high-resistance material layer 302 .

[0037] As an example, the oxidation process uses oxygen and nitrogen, the process time is 60s-70s, the oxygen flow rate is 9000-10000 sccm, and the nitrogen flow rate is 500-600 sccm. When the high-resistance material layer 302 is TiN, the TiN is converted into TiON after the oxidation process.

[0038] In step three, if Figure 3BAs shown, the steps of removing the high-resistance material layer 302 located on the non-high-resistance region of the substrate include: forming a hard mask layer 303 on the high-resistance material layer 302 through a deposition process; forming a patterned bottom-up stacked bottom anti-reflection coating and photoresist layer on the hard mask layer 303 through photolithography and etching processes; using the patterned bottom-up stacked bottom anti-reflection coating and photoresist layer as a mask, removing the high-resistance material layer 302 and the hard mask layer 303 located on the non-high-resistance region of the substrate through an etching process; and removing the patterned bottom-up stacked bottom anti-reflection coating and photoresist layer through an ashing process.

[0039] As an example, the material of the hard mask layer 303 includes silicon nitride.

[0040] In step 4, if Figure 3C As shown, after an interlayer dielectric layer 305 is formed on the substrate 300 by a deposition process, a first through hole 306 and a second through hole 307 are formed by a damascene process, which penetrate the interlayer dielectric layer 305 and respectively connect the substrate 300 and the high-resistance material layer 302 at the bottom.

[0041] As an example, the material of the interlayer dielectric layer 305 is, but is not limited to, silicon nitride (Si3N4), silicon oxide (SiO2), fluorinated SiO2 (FSG), hydrogenated silicon oxycarbide (SiCOH), porous SiCOH, borophosphosilicate glass (BPSG), silsesquioxane, carbon (C)-doped oxides (i.e., organosilicates) including silicon (Si), carbon (C), oxygen (O) and / or hydrogen (H) atoms, thermosetting polyarylene ether, or other materials with a low dielectric constant (<3.9).

[0042] First, compared with the existing process, the thickness of the high-resistance material layer 302 is increased, which can avoid excessive loss of the high-resistance material layer 302 by the through-hole etching in step four. The reduction in resistance caused by the increase in the thickness of the high-resistance material layer 302 is compensated by implementing step two to ensure that the resistance of the high-resistance material layer 302 will not decrease after implementing steps one and two, thereby ensuring the stability of the contact resistance value.

[0043] In summary, the method provided by this application for improving the contact resistance of high-resistance regions after via etching offers a simple and reliable process, preventing excessive wear of the high-resistance material layer in the high-resistance region during via etching, thereby ensuring stable contact resistance. Therefore, this application effectively overcomes the shortcomings of the prior art and possesses high industrial value.

[0044] It should be noted that the illustrations provided in this embodiment are only used to schematically illustrate the basic concept of the present application. Therefore, the illustrations only show components related to the present invention and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.

[0045] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical concepts disclosed herein shall be covered by the claims of this application.

Claims

1. A method for improving the contact resistance of a high-resistance region after through-hole etching, characterized in that: The method comprises: Step 1: providing a substrate, and sequentially forming an etching stop layer and a high-resistance material layer with increasing thickness on the substrate; Step 2: performing an oxidation treatment on the high-resistance material layer to increase the resistance of the high-resistance material layer; Step 3, removing the high-resistance material layer located on the non-high-resistance region of the substrate; Step 4: After forming the interlayer dielectric layer, forming a first through hole and a second through hole that penetrate the interlayer dielectric layer and are connected to the substrate and the high-resistance material layer at the bottom.

2. The method according to claim 1, characterized in that The value range of the increase in thickness of the high-resistance material layer in the step 1 is preferably such that the increase in resistance can be compensated by the oxidation treatment in the step 2.

3. The method according to claim 2, characterized in that The thickness of the high resistance material layer increases by 25 angstroms to 30 angstroms.

4. The method according to claim 1, wherein The gases used in the oxidation treatment are oxygen and nitrogen, and the treatment time is 60s-70s.

5. The method according to claim 4, characterized in that The flow rate of the oxygen gas is 9000-10000 sccm, and the flow rate of the nitrogen gas is 500-600 sccm.

6. The method according to claim 1, characterized in that The step three includes: forming a hard mask layer on the high-resistance material layer through a deposition process; forming a patterned bottom-up stacked bottom anti-reflective coating and photoresist layer on the hard mask layer through photolithography and etching processes; using the patterned bottom-up stacked bottom anti-reflective coating and photoresist layer as a mask, removing the high-resistance material layer and hard mask layer located on the non-high-resistance area of the substrate through an etching process; and removing the patterned bottom-up stacked bottom anti-reflective coating and photoresist layer through an ashing process.

7. The method according to claim 6, characterized in that The material of the hard mask layer includes silicon nitride.

8. The method according to claim 1, characterized in that The material of the high resistance material layer includes metal nitride.

Images