Improved common-mode voltage suppression method suitable for specific harmonic suppression pulse width modulation

Abstract

The invention provides an improved common-mode voltage suppression method suitable for specific harmonic suppression pulse width modulation (SHMPWM), and the method comprises the steps: A, according to the definition of a common-mode voltage, converting a common-mode voltage mathematical model u < cmv > formed by the infinite summation of all triple frequency voltage harmonic waves into a closed-loop analytical expression UCMV; b, according to the common-mode voltage closed-loop analytical expression UCMV obtained through conversion and a specific harmonic suppression pulse width modulation expression, a mathematical model capable of achieving common-mode voltage suppression and specific harmonic mitigation at the same time is built. According to the invention, the switching angle is used as a variable, and on the basis that a traditional SHMPWM takes the switching angle as the variable, a deduced common-mode voltage closed-loop expression is used as a target function, an SHMPWM mathematical model with common-mode voltage suppression capability is constructed, and the algorithm is simple to implement.

Description

Technical Field

[0001] The present disclosure relates to the field of electronic technology, and more particularly to an improved common-mode voltage suppression method suitable for specific harmonic suppression pulse width modulation. Background Art

[0002] Three-phase, two-level pulse width modulation (PWM) inverters are widely used in small and medium-capacity variable frequency drive systems, such as general-purpose industrial inverters and electric vehicle drive motor control systems. The inverter's performance depends largely on the specific PWM technology employed. High-power locomotive traction systems typically operate at a low switching frequency to reduce switching losses, resulting in a small carrier ratio. Although motor drive systems typically switch at higher frequencies, the recent trend toward higher speeds for drive motors results in a smaller carrier ratio due to high speed operation. Low carrier ratios often exacerbate harmonic distortion in the output waveform. Selective harmonic elimination pulse width modulation (SHEPWM) technology, due to its ability to eliminate specific subharmonics, offers improved waveform quality at the same switching frequency. While maintaining the same waveform quality, it can reduce switching losses and is therefore widely used in low switching frequency or low carrier ratio applications. However, in actual industrial applications, strict elimination of low-order voltage harmonics is usually not required, and specific harmonic suppression pulse width modulation (SHMPEM) can also achieve the effect of SHEPWM when the harmonic suppression error is very small (depending on the degree of suppression). It is also widely used because it introduces additional control degrees of freedom due to different degrees of suppression.

[0003] The application of PWM technology generates high-frequency alternating common-mode voltage, which in turn generates motor shaft currents. These bearing currents can impair the normal operation of the motor and, in severe cases, even shorten its service life. In traditional SHEPWM methods, the amplitude of the common-mode voltage can reach ±1 / 2 Udc. To suppress this common-mode voltage, various solutions have been proposed at the hardware and software levels. Software solutions are more economical and efficient, suppressing common-mode voltage by improving the inverter PWM algorithm. Several common-mode voltage suppression methods have been proposed, but these are complex and lack practical application, not suitable for low switching frequencies or low carrier ratios. Research on common-mode voltage suppression methods for SHEPWM and SHMPWM is limited. For example, the paper "Multi-Objective SHM-PWM Modulation Technique for CMV Control in 3-Phase Inverters" eliminates the 3rd harmonic in addition to the existing 6k±1st harmonics. This not only increases the number of switching operations (the number of harmonics eliminated is equal to the number of switching angles minus 1), but also reduces the maximum allowable linear modulation ratio to 1. In addition, the paper "A Generalized Selective Harmonic Elimination PWM Formulation With Common-Mode Voltage Reduction Ability for Multilevel Converters" introduces the concept of discrete level variables, replacing the traditional method of using switching angle as a variable to accurately express common-mode voltage. It also provides a discrete SHEPWM mathematical model, which can theoretically completely eliminate common-mode voltage. However, it is only applicable to inverters with odd levels and does not consider the two-level case.

[0004] Due to the topological limitations of the inverter itself, two-level inverters cannot completely eliminate common-mode voltage. Existing common-mode voltage suppression methods fail to simultaneously meet the following requirements: 1) at low switching frequencies or low carrier ratios; 2) suppress the common-mode voltage amplitude to ±1 / 6 Udc; and 3) with minimal increase in switching frequency or switching losses. Therefore, a simple, practical method for two-level inverters that achieves good common-mode voltage suppression at low switching frequencies or low carrier ratios is needed. Summary of the Invention

[0005] This disclosure aims to address the problem of suppressing the common-mode voltage amplitude to ±1 / 6 Udc when using SHMPWM modulation technology in a three-phase, two-level inverter at low switching frequencies or low carrier ratios. This approach achieves common-mode voltage suppression without shortening the linear modulation range or generating additional switching transitions that increase switching frequency or switching losses. This disclosure provides a method for improving common-mode voltage suppression applicable to SHMPWM.

[0006] The present disclosure provides an improved common-mode voltage suppression method applicable to specific harmonic suppression pulse width modulation (SHMPWM), comprising:

[0007] Step A: According to the definition of common mode voltage, the mathematical model of common mode voltage u is formed by infinite summation of all triple frequency voltage harmonics. cmv Converted into a closed-loop analytical expression U CMV ;

[0008] Step B: Based on the converted common-mode voltage closed-loop analytical expression U CMV , and the expression of pulse width modulation for specific harmonic suppression are used to construct a mathematical model that can simultaneously achieve common-mode voltage suppression and specific harmonic mitigation.

[0009] In some embodiments, step A comprises:

[0010] According to the two-level three-phase inverter to meet the half-cycle symmetry and quarter-cycle symmetry, the A phase voltage U a The expression is as follows:

[0011]

[0012] Among them, b n is the Fourier coefficient that has been normalized to one unit, p i To unify b n The auxiliary coefficient introduced by the expression is: n represents the nth harmonic, θ is the initial phase of the voltage, α i represents the i-th switching angle and α0=0, N is the number of switching angles in a quarter cycle;

[0013] According to the calculation formula of common mode voltage u cmv Substituting the Fourier expansion of the three-phase voltage into each other, we can get the traditional common mode voltage mathematical model u based on specific harmonic suppression pulse width modulation. cmv , is the sum of all triple frequency voltage harmonics:

[0014]

[0015] Construct an improved common-mode voltage closed-loop expression. First, give the expression U that can accurately represent the common-mode voltage. CMV is the sum of the squares of all triple frequency voltage harmonics:

[0016]

[0017] According to the expression of the sum of squares of single-phase voltage harmonics μ(α), substitute b n (α) and introduce an additional auxiliary series γ(x) to simplify the infinite summation formula μ(α) into an analytical form:

[0018]

[0019] According to the single-phase voltage harmonic Fourier coefficient b n (α) and b represent the triple frequency voltage harmonic coefficient of the common mode voltage 3n (α), the sum of the squares of all triple frequency voltage harmonics that can accurately represent the common-mode voltage is converted into a closed-loop analytical expression:

[0020]

[0021] In some embodiments, step B comprises:

[0022] According to the fundamental wave constraint conditions and each harmonic constraint, the improved SHMPWM formula is as follows:

[0023]

[0024] Where m is the modulation ratio, U dc is the DC power supply voltage, and e is the harmonic suppression error vector. The corresponding value is set according to the actual requirements for each harmonic suppression. For example, low-order non-tripling voltage harmonics (for example, harmonics between the 2nd and 25th orders or harmonics between the 2nd and 15th orders) are required to meet the grid connection requirements. According to the simulation and experimental needs, the actual value is given, and even e is set small enough to achieve the effect of harmonic elimination.

[0025] The derived closed-loop analytical expression of the common-mode voltage is used as the objective function. The constraints are to improve the mathematical expression of the pulse width modulation with specific harmonic suppression. A mathematical model that can simultaneously achieve common-mode voltage suppression and specific harmonic suppression is constructed. The complete mathematical model of the two-level pulse width modulation with specific harmonic suppression and common-mode voltage suppression that satisfies half-cycle symmetry and quarter-cycle symmetry is obtained as follows:

[0026]

[0027] stb1=m

[0028]

[0029] 0<α1<,...,<α N <π / 2

[0030] Solve the optimal switching angle according to the complete mathematical model constructed, and obtain the optimal switching angle that meets the conditions under the corresponding modulation ratio m in the entire linear modulation area; store the optimal switching angle into an offline lookup table; according to the U given in the actual demand ref and N, obtain the corresponding optimal switching angle, and construct the driving signal of each switch tube of the inverter.

[0031] The present disclosure has the following features and advantages:

[0032] (1) The switching angle is used as a variable. Based on the traditional SHMPWM with the switching angle as a variable, the objective function uses the derived common-mode voltage closed-loop expression to construct a SHMPWM mathematical model with common-mode voltage suppression capability. The algorithm is simple to implement.

[0033] (2) Compared with the traditional common-mode voltage suppression scheme, the DC bus voltage utilization rate is not reduced. Under the premise of reducing the common-mode voltage amplitude, the maximum available modulation ratio is still 1.15, and the linear modulation range is not reduced.

[0034] (3) Based on the two-level inverter, the common-mode voltage amplitude is limited to ±1 / 6Udc, and the common-mode voltage suppression effect is significant.

[0035] (4) Compared with the traditional common-mode voltage suppression scheme, the number of switching angles has not increased, which has the advantage of reducing the switching frequency to a certain extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is the hardware structure diagram of the three-phase two-level permanent magnet synchronous motor control system;

[0037] Figure 2 It is a flow chart of SHMPWM algorithm with common mode voltage suppression capability;

[0038] Figure 3 This is the switching angle solution trajectory diagram of the traditional SHEPWM common-mode voltage suppression method;

[0039] Figure 4 This is the switching angle solution trajectory diagram of the improved common-mode voltage suppression solution based on SHMPWM.

[0040] Figure 5a and Figure 5b These are the common-mode voltage waveforms of the traditional SHEPWM common-mode voltage suppression method when m=0.78 and m=1.1;

[0041] Figure 6a and Figure 6b They are the common-mode voltage waveforms of the improved common-mode voltage suppression scheme based on SHMPWM when m=0.78 and m=1.1. DETAILED DESCRIPTION

[0042] The following embodiments may enable those skilled in the art to more fully understand the present disclosure, but are not intended to limit the present disclosure in any way.

[0043] The present disclosure provides a method for improving common-mode voltage suppression applicable to SHMPWM, comprising:

[0044] Step 1: First, the reference voltage U obtained by system sampling ref Get the corresponding modulation ratio m * The number N of switching angles within a quarter cycle is determined based on the actual needs of the system, and the initial value of the switching angle is randomly generated.

[0045] Step 2: Based on the initial value of the switching angle randomly obtained in step 1, it is brought into the mathematical model constructed by this method that can simultaneously achieve common mode voltage suppression and specific harmonic suppression, and the fundamental wave and harmonic wave constraints of SHMPWM are satisfied when the modulation ratio m=0.01 and the objective function value U is obtained. CMV Minimum optimal switching angle;

[0046] Step 3: Substitute the optimal switching angle obtained in step 2 as the initial value of the next modulation ratio (m = 0.02) into the mathematical model to continue solving the optimal switching angle. Referring to steps 2 and 3, the optimal switching angle corresponding to each modulation ratio in the entire linear modulation range of 0.01 to 1.15 is iterated sequentially.

[0047] Step 4: The optimal switching angle within the entire linear modulation range under a certain N obtained in step 3 is stored in a discrete lookup table;

[0048] Step 5: Based on the U given in step 1 ref and N, the offline lookup table in step 4 can be searched to obtain the corresponding optimal switching angle, thereby constructing the driving signal for each switch tube of the inverter.

[0049] The present disclosure is further illustrated below with reference to the accompanying figures. The present disclosure optimizes six non-tripled odd harmonics (5th, 7th, 11th, 13th, 17th, and 19th). Therefore, the number of switching angles required per quarter cycle for a conventional SHEPWM is seven. The number of switching angles required for common-mode voltage suppression in conventional SHEPWM varies depending on the number of triple harmonics eliminated, resulting in varying common-mode voltage suppression effects. Here, three triple harmonics (3rd, 9th, and 15th) are eliminated, requiring ten switching angles per quarter cycle. The improved common-mode voltage suppression for SHMPWM also requires only seven switching angles per quarter cycle. The specific number of harmonics to be optimized in engineering applications can be determined based on actual application requirements.

[0050] Figure 1This is a diagram of the hardware circuit structure of the present invention, which includes a DC voltage source, a permanent magnet synchronous motor, a three-phase diode rectifier bridge, a voltage and current sampling circuit, a digital signal processor (DSP) controller, and a drive circuit. The voltage and current sampling circuit uses a voltage Hall effect sensor and a current Hall effect sensor to respectively collect the DC side voltage and the permanent magnet synchronous motor's a and b phase currents. The sampled signals pass through a signal conditioning circuit and then enter the DSP controller for conversion into digital signals. The DSP controller performs the calculations of the method proposed in this disclosure, outputting six switching pulses. These pulses then pass through the drive circuit to obtain the final drive signals for the inverter's six switching transistors.

[0051] Figure 2 This is the algorithm flow chart of the present disclosure, the control algorithm is Figure 1 The DSP controller is implemented in the following steps:

[0052] Step 1: First, the reference voltage U obtained by system sampling ref Get the corresponding modulation ratio m * The number N of switching angles within a quarter cycle is determined based on the actual needs of the system. This disclosure takes the elimination of six non-triple harmonics as an example. The code is used to randomly generate the initial value of the switching angle corresponding to a modulation ratio m of 0.01.

[0053]

[0054] N=7

[0055] Among them U dc Indicates the DC capacitor voltage value;

[0056] Step 2: Construct a mathematical model, where the objective function is the closed-loop expression of the common-mode voltage, and the constraints are the expressions of SHMPWM, satisfying the fundamental wave equality constraint and the constraints of the optimized six harmonics. Substitute the N and initial switching angle values obtained in step 1 into the mathematical model to solve for the optimal switching angle α when the modulation ratio is 0.01.

[0057] (1) Objective function: Construction of the closed-loop expression for the common-mode voltage

[0058] The sum of squares of single-phase voltage harmonics is:

[0059]

[0060] The introduction of the auxiliary series expansion γ(x) can simplify the above infinite series into a closed-loop expression:

[0061]

[0062] The auxiliary series expansion is:

[0063]

[0064] The common-mode voltage expression is:

[0065]

[0066] According to the single-phase voltage harmonic Fourier coefficient b n (α) and b represent the triple frequency voltage harmonic coefficient of the common mode voltage 3n (α), the sum of the squares of all triple frequency voltage harmonics that can accurately represent the common-mode voltage can be converted into a closed-loop analytical expression:

[0067]

[0068]

[0069] (2) SHMPWM constraints

[0070] The fundamental wave constraint and each harmonic constraint are satisfied, and the formula is as follows:

[0071]

[0072] Wherein, e is the error vector, and the corresponding value is set according to the actual demand (meeting the harmonic grid connection demand, or giving the actual value as needed).

[0073] (3) Mathematical model

[0074] Combine (1) and (2) to construct a complete SHMPWM mathematical model with improved common-mode voltage suppression.

[0075]

[0076] stb1=m

[0077]

[0078] 0<α1<,...,<α N <π / 2

[0079] Step 3: Based on the optimal switching angle obtained in step 2, the initial value of the switching angle for the next modulation ratio m = 0.02 is used. The mathematical model is then used to solve for the corresponding optimal switching angle. This is repeated until the modulation ratio reaches 1.15. This results in the optimal switching angles that meet the conditions for the entire linear modulation range of modulation ratio m from 0.01 to 1.15.

[0080] Step 4: Store the optimal switching angle obtained in step 3 into an offline lookup table;

[0081] Step 5: Based on the U given in step 1 refand N, the offline lookup table in step 4 can be searched to obtain the corresponding optimal switching angle, thereby constructing the driving signal for each switch tube of the inverter.

[0082] The effectiveness of the method proposed in this disclosure can be seen by comparing Figure 3 、 Figure 4 And compared with the experimental results shown in Figure 5 and Figure 6.

[0083] Figure 3 In order to achieve common mode voltage suppression by eliminating 3 triple frequency harmonics in addition to 6 non-tripled odd voltage harmonics in traditional SHEPWM, 10 switching angle solution trajectories are required within a quarter cycle. Figure 4 The switching angle solution trajectory diagram of the improved SHMPWM common mode suppression method in this disclosure is also optimized for 6 non-tripled odd voltage harmonics. Figure 3 and Figure 4 A comparison reveals that the disclosed method requires only seven switching angles within a quarter cycle, and the switching angles are consistently determined throughout the entire linear modulation range, exhibiting a consistent linear trend. However, the traditional method's algorithm ceases to be applicable after the modulation ratio reaches 1, resulting in some switching angles reaching 0. Therefore, this method can reduce the switching frequency to a certain extent without shortening the modulation range.

[0084] Figures 5a to 6b The common-mode voltage waveform of the simulated output under a specific modulation ratio (in this example, m = 0.78 and m = 1.1) is shown in FIG. Figure 5a and Figure 5b This corresponds to the simulation results of the traditional SHEPWM common-mode voltage suppression. Figure 6a and Figure 6b The corresponding results are the simulation results of the improved SHMPWM common mode voltage suppression method described in this disclosure. Figures 5a to 6b It can be seen from the comparison that in terms of the suppression effect of the common mode voltage, the method described in the present disclosure can achieve a better common mode voltage suppression effect, suppressing the amplitude of the common mode voltage to ±1 / 6U dc , and is still effective in the high modulation ratio region. Therefore, the present disclosure has a better common-mode voltage suppression effect than the traditional method.

[0085] The present disclosure solves the problem that the SHMPWM technology considering common-mode voltage suppression leads to a significant increase in current harmonics, a reduction in modulation range, and an increase in the number of switching angles as the number of eliminated triple harmonics increases. For the three-phase two-level inverter topology, considering the quarter-cycle symmetry and three-phase symmetry, the Fourier series expansion of the traditional two-level SHMPWM is substituted into the definition of the common-mode voltage, and the mathematical model expression of the traditional common-mode voltage can be obtained as the infinite sum of all tripled frequency voltage harmonics (excluding even harmonics, because the quarter-cycle symmetry ensures that the Fourier expansion does not contain even harmonics). The present disclosure converts the traditional common-mode voltage mathematical model into a simple universal closed-loop expression by introducing an auxiliary series expansion, and further uses this closed-loop expression that can accurately characterize the common-mode voltage as the optimization target. Combined with the fundamental wave and harmonic wave constraints of SHMPWM, an improved SHMPWM mathematical model with common-mode voltage suppression and specific harmonic suppression is finally established. Solving this mathematical model can obtain the optimal switching angle, thereby achieving joint suppression of common-mode voltage and specific harmonics.

[0086] Those skilled in the art should understand that the above embodiments are merely exemplary embodiments and that various changes, substitutions, and alterations may be made without departing from the spirit and scope of the present disclosure.

Claims

1. An improved common mode voltage suppression method for specific harmonic suppression pulse width modulation (SHMPWM), characterized in that: include: Step A: According to the definition of common mode voltage, the mathematical model of common mode voltage u is formed by infinite summation of all triple frequency voltage harmonics. cmv Converted into a closed-loop analytical expression U CMV ; Step B: Based on the converted common-mode voltage closed-loop analytical expression U CMV , and the expression of pulse width modulation for specific harmonic suppression are used to construct a mathematical model that can simultaneously achieve common-mode voltage suppression and specific harmonic mitigation.

2. The method according to claim 1, characterized in that The step A comprises: According to the two-level three-phase inverter to meet the half-cycle symmetry and quarter-cycle symmetry, the A phase voltage U a The expression is as follows: Among them, b n is the Fourier coefficient that has been normalized to one unit, p i To unify b n The auxiliary coefficient introduced by the expression is: n represents the nth harmonic, θ is the initial phase of the voltage, α i represents the i-th switching angle and α0=0, N is the number of switching angles in a quarter cycle; According to the calculation formula of common mode voltage u cmv Substituting the Fourier expansion of the three-phase voltage into each other, we can get the traditional common mode voltage mathematical model u based on specific harmonic suppression pulse width modulation. cmv , is the sum of all triple frequency voltage harmonics: Construct an improved common-mode voltage closed-loop expression. First, give the expression U that can accurately represent the common-mode voltage. CMV is the sum of the squares of all triple frequency voltage harmonics: According to the expression of the sum of squares of single-phase voltage harmonics μ(α), substitute b n (α) and introduce an additional auxiliary series γ(x) to simplify the infinite summation formula μ(α) into an analytical form: According to the single-phase voltage harmonic Fourier coefficient b n (α) and b represent the triple frequency voltage harmonic coefficient of the common mode voltage 3n (α), the sum of the squares of all triple frequency voltage harmonics that can accurately represent the common-mode voltage is converted into a closed-loop analytical expression:

3. The method according to claim 1, characterized in that The step B comprises: According to the included fundamental wave constraints and each harmonic constraint, the improved specific harmonic suppression pulse width modulation formula is as follows: Where m is the modulation ratio, U dc is the DC power supply voltage, e is the harmonic suppression error vector, and the corresponding value is set according to the actual requirements for each harmonic suppression; The derived closed-loop analytical expression of the common-mode voltage is used as the objective function. The constraints are to improve the mathematical expression of the pulse width modulation with specific harmonic suppression. A mathematical model that can simultaneously achieve common-mode voltage suppression and specific harmonic suppression is constructed. The complete mathematical model of the two-level pulse width modulation with specific harmonic suppression and common-mode voltage suppression that satisfies half-cycle symmetry and quarter-cycle symmetry is obtained as follows: stb1=m 0＜α1＜,...,＜α N ＜π / 2 Solve the optimal switching angle according to the complete mathematical model constructed, and obtain the optimal switching angle that meets the conditions under the corresponding modulation ratio m in the entire linear modulation area; store the optimal switching angle into an offline lookup table; according to the U given in the actual demand ref and N, obtain the corresponding optimal switching angle, and construct the driving signal of each switch tube of the inverter.

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